merge of 15add738eb54d20132cb520348c334580b071e35

     and b08ae13eaefb15f3a4908e4d72a9fcf212733c72

34 files changed, 1817 insertions, 7 deletions

diff --git a/packages/cpio/cpio_2.5.bb b/packages/cpio/cpio_2.5.bb
index e7ee85e001..a625dd7fd5 100644
--- a/packages/cpio/cpio_2.5.bb
+++ b/packages/cpio/cpio_2.5.bb
@@ -5,6 +5,8 @@ LICENSE = "GPL"
 MAINTAINER = "Chris Larson <kergoth@handhelds.org>"
 PR = "r3"
 
+DEPENDS += " texinfo-native "
+
 SRC_URI = "${GNU_MIRROR}/cpio/cpio-${PV}.tar.gz \
 	   file://install.patch;patch=1"
 S = "${WORKDIR}/cpio-${PV}"
diff --git a/packages/gcc/gcc-4.1.0/.mtn2git_empty b/packages/gcc/gcc-4.1.0/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/gcc/gcc-4.1.0/.mtn2git_empty
diff --git a/packages/gcc/gcc-4.1.0/arm-nolibfloat.patch b/packages/gcc/gcc-4.1.0/arm-nolibfloat.patch
new file mode 100644
index 0000000000..c4897c0330
--- /dev/null
+++ b/packages/gcc/gcc-4.1.0/arm-nolibfloat.patch
@@ -0,0 +1,24 @@
+# Dimitry Andric <dimitry@andric.com>, 2004-05-01
+#
+# * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
+#   anymore.  (The required functions are now in libgcc.)
+# 
+# Fixes errors like
+# arm-softfloat-linux-gnu/3.4.0/../../../../arm-softfloat-linux-gnu/bin/ld: cannot find -lfloat
+# collect2: ld returned 1 exit status
+# make[2]: *** [arm-softfloat-linux-gnu/gcc-3.4.0-glibc-2.3.2/build-glibc/iconvdata/ISO8859-1.so] Error 1
+# when building glibc-2.3.3 with gcc-3.4.0 for arm-softfloat
+
+Index: gcc-4.0.2/gcc/config/arm/linux-elf.h
+===================================================================
+--- gcc-4.0.2.orig/gcc/config/arm/linux-elf.h	2005-03-04 16:14:01.000000000 +0000
++++ gcc-4.0.2/gcc/config/arm/linux-elf.h	2005-11-11 18:02:54.000000000 +0000
+@@ -56,7 +56,7 @@
+    %{shared:-lc} \
+    %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
+ 
+-#define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc"
++#define LIBGCC_SPEC "-lgcc"
+ 
+ /* Provide a STARTFILE_SPEC appropriate for GNU/Linux.  Here we add
+    the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
diff --git a/packages/gcc/gcc-4.1.0/arm-softfloat.patch b/packages/gcc/gcc-4.1.0/arm-softfloat.patch
new file mode 100644
index 0000000000..c86c83ed15
--- /dev/null
+++ b/packages/gcc/gcc-4.1.0/arm-softfloat.patch
@@ -0,0 +1,16 @@
+Index: gcc-4.0.2/gcc/config/arm/t-linux
+===================================================================
+--- gcc-4.0.2.orig/gcc/config/arm/t-linux	2004-05-15 12:41:35.000000000 +0000
++++ gcc-4.0.2/gcc/config/arm/t-linux	2005-11-11 16:07:53.000000000 +0000
+@@ -4,7 +4,10 @@
+ LIBGCC2_DEBUG_CFLAGS = -g0
+ 
+ LIB1ASMSRC = arm/lib1funcs.asm
+-LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
++LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
++    _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
++    _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
++    _fixsfsi _fixunssfsi _floatdidf _floatdisf
+ 
+ # MULTILIB_OPTIONS = mhard-float/msoft-float
+ # MULTILIB_DIRNAMES = hard-float soft-float
diff --git a/packages/gcc/gcc-4.1.0/ldflags.patch b/packages/gcc/gcc-4.1.0/ldflags.patch
new file mode 100644
index 0000000000..9576f60778
--- /dev/null
+++ b/packages/gcc/gcc-4.1.0/ldflags.patch
@@ -0,0 +1,22 @@
+--- /tmp/Makefile.in	2006-02-23 20:56:01.399758728 +0100
++++ gcc-4.1-20060217/Makefile.in	2006-02-23 20:56:16.874406224 +0100
+@@ -334,7 +334,7 @@
+ CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
+ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
+-LDFLAGS_FOR_TARGET = 
++LDFLAGS_FOR_TARGET = @LDFLAGS@ 
+ PICFLAG_FOR_TARGET = 
+ 
+ # ------------------------------------
+--- /tmp/Makefile.tpl	2006-02-23 20:50:34.077519272 +0100
++++ gcc-4.1-20060217/Makefile.tpl	2006-02-23 21:04:31.092273688 +0100
+@@ -337,7 +337,7 @@
+ CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
+ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
+-LDFLAGS_FOR_TARGET = 
++LDFLAGS_FOR_TARGET = @LDFLAGS@ 
+ PICFLAG_FOR_TARGET = 
+ 
+ # ------------------------------------
diff --git a/packages/gcc/gcc-cross-initial_4.1.0.bb b/packages/gcc/gcc-cross-initial_4.1.0.bb
new file mode 100644
index 0000000000..63308c2cfe
--- /dev/null
+++ b/packages/gcc/gcc-cross-initial_4.1.0.bb
@@ -0,0 +1,30 @@
+include gcc-cross_${PV}.bb
+
+DEPENDS = "virtual/${TARGET_PREFIX}binutils"
+DEPENDS += "${@['virtual/${TARGET_PREFIX}libc-initial',''][bb.data.getVar('TARGET_ARCH', d, 1) in ['arm', 'armeb', 'mips', 'mipsel']]}"
+PROVIDES = "virtual/${TARGET_PREFIX}gcc-initial"
+PACKAGES = ""
+
+# This is intended to be a -very- basic config
+EXTRA_OECONF = "--with-local-prefix=${CROSS_DIR}/${TARGET_SYS} \
+		--with-newlib \
+		--disable-shared \
+		--disable-threads \
+		--disable-multilib \
+		--disable-__cxa_atexit \
+		--disable-libmudflap \
+		--disable-libssp \
+		--enable-languages=c \
+		--enable-target-optspace \
+		--program-prefix=${TARGET_PREFIX} \
+		${@get_gcc_fpu_setting(bb, d)}"
+
+do_stage_prepend () {
+	mkdir -p ${CROSS_DIR}/lib/gcc/${TARGET_SYS}/${BINV}
+	ln -sf libgcc.a ${CROSS_DIR}/lib/gcc/${TARGET_SYS}/${BINV}/libgcc_eh.a
+}
+
+# Override the method from gcc-cross so we don't try to install libgcc
+do_install () {
+	oe_runmake 'DESTDIR=${D}' install
+}
diff --git a/packages/gcc/gcc-cross_4.1.0.bb b/packages/gcc/gcc-cross_4.1.0.bb
new file mode 100644
index 0000000000..6e299e8299
--- /dev/null
+++ b/packages/gcc/gcc-cross_4.1.0.bb
@@ -0,0 +1,16 @@
+include gcc_${PV}.bb
+# path mangling, needed by the cross packaging
+include gcc-paths-cross.inc
+inherit cross
+FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/gcc-${PV}"
+# NOTE: split PR.  If the main .oe changes something that affects its *build*
+# remember to increment this one too.
+PR = "r1"
+
+DEPENDS = "virtual/${TARGET_PREFIX}binutils virtual/${TARGET_PREFIX}libc-for-gcc gmp-native mpfr-native"
+PROVIDES = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++"
+
+# cross build
+include gcc3-build-cross.inc
+# cross packaging
+include gcc-package-cross.inc
diff --git a/packages/gcc/gcc_4.1.0.bb b/packages/gcc/gcc_4.1.0.bb
new file mode 100644
index 0000000000..0a0406c7e6
--- /dev/null
+++ b/packages/gcc/gcc_4.1.0.bb
@@ -0,0 +1,18 @@
+PR = "r0"
+DESCRIPTION = "The GNU cc and gcc C compilers."
+HOMEPAGE = "http://www.gnu.org/software/gcc/"
+SECTION = "devel"
+LICENSE = "GPL"
+DEFAULT_PREFERENCE = "-1"
+
+inherit autotools gettext
+
+include gcc-package.inc
+
+SRC_URI = "http://ftp.gnu.org/pub/gnu/gcc/gcc-4.1.0/gcc-4.1.0.tar.bz2 \
+	file://arm-nolibfloat.patch;patch=1 \
+	file://arm-softfloat.patch;patch=1 \
+	file://ldflags.patch;patch=1"
+
+include gcc4-build.inc
+EXTRA_OECONF += "--disable-libssp"  
diff --git a/packages/glibc/glibc-2.4/.mtn2git_empty b/packages/glibc/glibc-2.4/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/glibc/glibc-2.4/.mtn2git_empty
diff --git a/packages/glibc/glibc-2.4/arm-longlong.patch b/packages/glibc/glibc-2.4/arm-longlong.patch
new file mode 100644
index 0000000000..320a55524c
--- /dev/null
+++ b/packages/glibc/glibc-2.4/arm-longlong.patch
@@ -0,0 +1,58 @@
+--- glibc-2.4/stdlib/longlong.h.ark	2006-03-11 22:49:27.000000000 +0100
++++ glibc-2.4/stdlib/longlong.h	2006-03-11 22:55:12.000000000 +0100
+@@ -206,6 +206,14 @@
+ 	     "rI" ((USItype) (bh)),					\
+ 	     "r" ((USItype) (al)),					\
+ 	     "rI" ((USItype) (bl)) __CLOBBER_CC)
++/* v3m and all higher arches have long multiply support.  */
++#if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__)
++#define umul_ppmm(xh, xl, a, b) \
++  __asm__ ("umull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#define UMUL_TIME 5
++#define smul_ppmm(xh, xl, a, b) \
++  __asm__ ("smull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#else							   
+ #define umul_ppmm(xh, xl, a, b) \
+ {register USItype __t0, __t1, __t2;					\
+   __asm__ ("%@ Inlined umul_ppmm\n"					\
+@@ -227,7 +235,13 @@
+ 	   : "r" ((USItype) (a)),					\
+ 	     "r" ((USItype) (b)) __CLOBBER_CC );}
+ #define UMUL_TIME 20
++#endif
+ #define UDIV_TIME 100
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++#define count_leading_zeros(COUNT,X)   ((COUNT) = __builtin_clz (X))
++#define COUNT_LEADING_ZEROS_0 32
++#endif
++							   
+ #endif /* __arm__ */
+ 
+ #if defined (__hppa) && W_TYPE_SIZE == 32
+--- glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c.ark	2006-03-11 22:56:43.000000000 +0100
++++ glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c	2006-03-11 22:58:19.000000000 +0100
+@@ -0,0 +1,24 @@
++/* __clz_tab -- support for longlong.h
++   Copyright (C) 2004 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, write to the Free
++   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++   02111-1307 USA.  */
++
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++/* Nothing required.  */
++#else
++#include <sysdeps/generic/mp_clz_tab.c>
++#endif
diff --git a/packages/glibc/glibc-2.4/arm-memcpy.patch b/packages/glibc/glibc-2.4/arm-memcpy.patch
new file mode 100644
index 0000000000..bc2b3dab84
--- /dev/null
+++ b/packages/glibc/glibc-2.4/arm-memcpy.patch
@@ -0,0 +1,758 @@
+--- /dev/null	2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memmove.S	2004-03-20 18:37:23.000000000 +0000
+@@ -0,0 +1,251 @@
++/*
++ *   Optimized memmove implementation for ARM processors
++ *
++ *	Author: 	Nicolas Pitre
++ *	Created:	Dec 23, 2003
++ *	Copyright:	(C) MontaVista Software, Inc.
++ *
++ *   This file is free software; you can redistribute it and/or
++ *   modify it under the terms of the GNU Lesser General Public
++ *   License as published by the Free Software Foundation; either
++ *   version 2.1 of the License, or (at your option) any later version.
++ *
++ *   This file is distributed in the hope that it will be useful,
++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ *   Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull            lsr
++#define push            lsl
++#else
++#define pull            lsl
++#define push            lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++    defined(__ARM_ARCH_5T__) || \
++    defined(__ARM_ARCH_5TE__)
++#define PLD(code...)	code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memmove (char *dst, const char *src) */
++ENTRY(memmove)
++		subs	ip, r0, r1
++		cmphi	r2, ip
++		bls	memcpy(PLT)
++
++		stmfd	sp!, {r0, r4, lr}
++		add	r1, r1, r2
++		add	r0, r0, r2
++		subs	r2, r2, #4
++		blt	25f
++		ands	ip, r0, #3
++	PLD(	pld	[r1, #-4]		)
++		bne	26f
++		ands	ip, r1, #3
++		bne	27f
++
++19:		subs	r2, r2, #4
++		blt	24f
++		subs	r2, r2, #8
++		blt	23f
++		subs	r2, r2, #16
++		blt	22f
++
++	PLD(	pld	[r1, #-32]		)
++	PLD(	subs	r2, r2, #96		)
++		stmfd	sp!, {r5 - r8}
++	PLD(	blt	21f			)
++
++	PLD(	@ cache alignment		)
++	PLD(	ands	ip, r1, #31		)
++	PLD(	pld	[r1, #-64]		)
++	PLD(	beq	20f			)
++	PLD(	cmp	r2, ip			)
++	PLD(	pld	[r1, #-96]		)
++	PLD(	blt	20f			)
++	PLD(	cmp	ip, #16			)
++	PLD(	sub	r2, r2, ip		)
++	PLD(	ldmgedb	r1!, {r3 - r6}		)
++	PLD(	stmgedb	r0!, {r3 - r6}		)
++	PLD(	beq	20f			)
++	PLD(	and	ip, ip, #15		)
++	PLD(	cmp	ip, #8			)
++	PLD(	ldr	r3, [r1, #-4]!		)
++	PLD(	ldrge	r4, [r1, #-4]!		)
++	PLD(	ldrgt	r5, [r1, #-4]!		)
++	PLD(	str	r3, [r0, #-4]!		)
++	PLD(	strge	r4, [r0, #-4]!		)
++	PLD(	strgt	r5, [r0, #-4]!		)
++
++20:	PLD(	pld	[r1, #-96]		)
++	PLD(	pld	[r1, #-128]		)
++21:		ldmdb	r1!, {r3, r4, ip, lr}
++		subs	r2, r2, #32
++		stmdb	r0!, {r3, r4, ip, lr}
++		ldmdb	r1!, {r3, r4, ip, lr}
++		stmgedb	r0!, {r3, r4, ip, lr}
++		ldmgedb	r1!, {r3, r4, ip, lr}
++		stmgedb	r0!, {r3, r4, ip, lr}
++		ldmgedb	r1!, {r3, r4, ip, lr}
++		subges	r2, r2, #32
++		stmdb	r0!, {r3, r4, ip, lr}
++		bge	20b
++	PLD(	cmn	r2, #96			)
++	PLD(	bge	21b			)
++	PLD(	add	r2, r2, #96		)
++		tst	r2, #31
++		ldmfd	sp!, {r5 - r8}
++		ldmeqfd	sp!, {r0, r4, pc}
++
++		tst	r2, #16
++22:		ldmnedb	r1!, {r3, r4, ip, lr}
++		stmnedb	r0!, {r3, r4, ip, lr}
++
++		tst	r2, #8
++23:		ldmnedb	r1!, {r3, r4}
++		stmnedb	r0!, {r3, r4}
++
++		tst	r2, #4
++24:		ldrne	r3, [r1, #-4]!
++		strne	r3, [r0, #-4]!
++
++25:		ands	r2, r2, #3
++		ldmeqfd	sp!, {r0, r4, pc}
++
++		cmp	r2, #2
++		ldrb	r3, [r1, #-1]
++		ldrgeb	r4, [r1, #-2]
++		ldrgtb	ip, [r1, #-3]
++		strb	r3, [r0, #-1]
++		strgeb	r4, [r0, #-2]
++		strgtb	ip, [r0, #-3]
++		ldmfd	sp!, {r0, r4, pc}
++
++26:		cmp	ip, #2
++		ldrb	r3, [r1, #-1]!
++		ldrgeb	r4, [r1, #-1]!
++		ldrgtb	lr, [r1, #-1]!
++		strb	r3, [r0, #-1]!
++		strgeb	r4, [r0, #-1]!
++		strgtb	lr, [r0, #-1]!
++		subs	r2, r2, ip
++		blt	25b
++		ands	ip, r1, #3
++		beq	19b
++
++27:		bic	r1, r1, #3
++		cmp	ip, #2
++		ldr	r3, [r1]
++		beq	35f
++		blt	36f
++
++
++		.macro	backward_copy_shift push pull
++
++		cmp	r2, #12
++	PLD(	pld	[r1, #-4]		)
++		blt	33f
++		subs	r2, r2, #28
++		stmfd	sp!, {r5 - r9}
++		blt	31f
++
++	PLD(	subs	r2, r2, #96		)
++	PLD(	pld	[r1, #-32]		)
++	PLD(	blt	30f			)
++	PLD(	pld	[r1, #-64]		)
++
++	PLD(	@ cache alignment		)
++	PLD(	ands	ip, r1, #31		)
++	PLD(	pld	[r1, #-96]		)
++	PLD(	beq	29f			)
++	PLD(	cmp	r2, ip			)
++	PLD(	pld	[r1, #-128]		)
++	PLD(	blt	29f			)
++	PLD(	sub	r2, r2, ip		)
++28:	PLD(	mov	r4, r3, push #\push	)
++	PLD(	ldr	r3, [r1, #-4]!		)
++	PLD(	subs	ip, ip, #4		)
++	PLD(	orr	r4, r4, r3, pull #\pull	)
++	PLD(	str	r4, [r0, #-4]!		)
++	PLD(	bgt	28b			)
++
++29:	PLD(	pld	[r1, #-128]		)
++30:		mov	lr, r3, push #\push
++		ldmdb	r1!, {r3 - r9, ip}
++		subs	r2, r2, #32
++		orr	lr, lr, ip, pull #\pull
++		mov	ip, ip, push #\push
++		orr	ip, ip, r9, pull #\pull
++		mov	r9, r9, push #\push
++		orr	r9, r9, r8, pull #\pull
++		mov	r8, r8, push #\push
++		orr	r8, r8, r7, pull #\pull
++		mov	r7, r7, push #\push
++		orr	r7, r7, r6, pull #\pull
++		mov	r6, r6, push #\push
++		orr	r6, r6, r5, pull #\pull
++		mov	r5, r5, push #\push
++		orr	r5, r5, r4, pull #\pull
++		mov	r4, r4, push #\push
++		orr	r4, r4, r3, pull #\pull
++		stmdb	r0!, {r4 - r9, ip, lr}
++		bge	29b
++	PLD(	cmn	r2, #96			)
++	PLD(	bge	30b			)
++	PLD(	add	r2, r2, #96		)
++		cmn	r2, #16
++		blt	32f
++31:		mov	r7, r3, push #\push
++		ldmdb	r1!, {r3 - r6}
++		sub	r2, r2, #16
++		orr	r7, r7, r6, pull #\pull
++		mov	r6, r6, push #\push
++		orr	r6, r6, r5, pull #\pull
++		mov	r5, r5, push #\push
++		orr	r5, r5, r4, pull #\pull
++		mov	r4, r4, push #\push
++		orr	r4, r4, r3, pull #\pull
++		stmdb	r0!, {r4 - r7}
++32:		adds	r2, r2, #28
++		ldmfd	sp!, {r5 - r9}
++		blt	34f
++33:		mov	r4, r3, push #\push
++		ldr	r3, [r1, #-4]!
++		subs	r2, r2, #4
++		orr	r4, r4, r3, pull #\pull
++		str	r4, [r0, #-4]!
++		bge	33b
++34:
++		.endm
++
++
++		backward_copy_shift	push=8	pull=24
++		add	r1, r1, #3
++		b	25b
++
++35:		backward_copy_shift	push=16	pull=16
++		add	r1, r1, #2
++		b	25b
++
++36:		backward_copy_shift	push=24	pull=8
++		add	r1, r1, #1
++		b	25b
++
++		.size	memmove, . - memmove
++END(memmove)
++libc_hidden_builtin_def (memmove)
+--- /dev/null	2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/bcopy.S	2004-03-20 18:37:48.000000000 +0000
+@@ -0,0 +1,255 @@
++/*
++ *   Optimized memmove implementation for ARM processors
++ *
++ *	Author: 	Nicolas Pitre
++ *	Created:	Dec 23, 2003
++ *	Copyright:	(C) MontaVista Software, Inc.
++ *
++ *   This file is free software; you can redistribute it and/or
++ *   modify it under the terms of the GNU Lesser General Public
++ *   License as published by the Free Software Foundation; either
++ *   version 2.1 of the License, or (at your option) any later version.
++ *
++ *   This file is distributed in the hope that it will be useful,
++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ *   Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull            lsr
++#define push            lsl
++#else
++#define pull            lsl
++#define push            lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++    defined(__ARM_ARCH_5T__) || \
++    defined(__ARM_ARCH_5TE__)
++#define PLD(code...)	code
++#else
++#define PLD(code...)
++#endif
++
++dst		.req	r1
++src		.req	r0
++
++/* void *bcopy (const char *src, char *dst, size_t size) */
++ENTRY(bcopy)
++		subs	ip, dst, src
++		cmphi	r2, ip
++		movls	r3, r0
++		movls	r0, r1
++		movls	r1, r3
++		bls	memcpy(PLT)
++
++		stmfd	sp!, {r4, lr}
++		add	src, src, r2
++		add	dst, dst, r2
++		subs	r2, r2, #4
++		blt	25f
++		ands	ip, dst, #3
++	PLD(	pld	[src, #-4]		)
++		bne	26f
++		ands	ip, src, #3
++		bne	27f
++
++19:		subs	r2, r2, #4
++		blt	24f
++		subs	r2, r2, #8
++		blt	23f
++		subs	r2, r2, #16
++		blt	22f
++
++	PLD(	pld	[src, #-32]		)
++	PLD(	subs	r2, r2, #96		)
++		stmfd	sp!, {r5 - r8}
++	PLD(	blt	21f			)
++
++	PLD(	@ cache alignment		)
++	PLD(	ands	ip, src, #31		)
++	PLD(	pld	[src, #-64]		)
++	PLD(	beq	20f			)
++	PLD(	cmp	r2, ip			)
++	PLD(	pld	[src, #-96]		)
++	PLD(	blt	20f			)
++	PLD(	cmp	ip, #16			)
++	PLD(	sub	r2, r2, ip		)
++	PLD(	ldmgedb	src!, {r3 - r6}		)
++	PLD(	stmgedb	dst!, {r3 - r6}		)
++	PLD(	beq	20f			)
++	PLD(	and	ip, ip, #15		)
++	PLD(	cmp	ip, #8			)
++	PLD(	ldr	r3, [src, #-4]!		)
++	PLD(	ldrge	r4, [src, #-4]!		)
++	PLD(	ldrgt	r5, [src, #-4]!		)
++	PLD(	str	r3, [dst, #-4]!		)
++	PLD(	strge	r4, [dst, #-4]!		)
++	PLD(	strgt	r5, [dst, #-4]!		)
++
++20:	PLD(	pld	[src, #-96]		)
++	PLD(	pld	[src, #-128]		)
++21:		ldmdb	src!, {r3, r4, ip, lr}
++		subs	r2, r2, #32
++		stmdb	dst!, {r3, r4, ip, lr}
++		ldmdb	src!, {r3, r4, ip, lr}
++		stmgedb	dst!, {r3, r4, ip, lr}
++		ldmgedb	src!, {r3, r4, ip, lr}
++		stmgedb	dst!, {r3, r4, ip, lr}
++		ldmgedb	src!, {r3, r4, ip, lr}
++		subges	r2, r2, #32
++		stmdb	dst!, {r3, r4, ip, lr}
++		bge	20b
++	PLD(	cmn	r2, #96			)
++	PLD(	bge	21b			)
++	PLD(	add	r2, r2, #96		)
++		tst	r2, #31
++		ldmfd	sp!, {r5 - r8}
++		ldmeqfd	sp!, {r4, pc}
++
++		tst	r2, #16
++22:		ldmnedb	src!, {r3, r4, ip, lr}
++		stmnedb	dst!, {r3, r4, ip, lr}
++
++		tst	r2, #8
++23:		ldmnedb	src!, {r3, r4}
++		stmnedb	dst!, {r3, r4}
++
++		tst	r2, #4
++24:		ldrne	r3, [src, #-4]!
++		strne	r3, [dst, #-4]!
++
++25:		ands	r2, r2, #3
++		ldmeqfd	sp!, {dst, r4, pc}
++
++		cmp	r2, #2
++		ldrb	r3, [src, #-1]
++		ldrgeb	r4, [src, #-2]
++		ldrgtb	ip, [src, #-3]
++		strb	r3, [dst, #-1]
++		strgeb	r4, [dst, #-2]
++		strgtb	ip, [dst, #-3]
++		ldmfd	sp!, {dst, r4, pc}
++
++26:		cmp	ip, #2
++		ldrb	r3, [src, #-1]!
++		ldrgeb	r4, [src, #-1]!
++		ldrgtb	lr, [src, #-1]!
++		strb	r3, [dst, #-1]!
++		strgeb	r4, [dst, #-1]!
++		strgtb	lr, [dst, #-1]!
++		subs	r2, r2, ip
++		blt	25b
++		ands	ip, src, #3
++		beq	19b
++
++27:		bic	src, src, #3
++		cmp	ip, #2
++		ldr	r3, [src]
++		beq	35f
++		blt	36f
++
++
++		.macro	backward_copy_shift push pull
++
++		cmp	r2, #12
++	PLD(	pld	[src, #-4]		)
++		blt	33f
++		subs	r2, r2, #28
++		stmfd	sp!, {r5 - r9}
++		blt	31f
++
++	PLD(	subs	r2, r2, #96		)
++	PLD(	pld	[src, #-32]		)
++	PLD(	blt	30f			)
++	PLD(	pld	[src, #-64]		)
++
++	PLD(	@ cache alignment		)
++	PLD(	ands	ip, src, #31		)
++	PLD(	pld	[src, #-96]		)
++	PLD(	beq	29f			)
++	PLD(	cmp	r2, ip			)
++	PLD(	pld	[src, #-128]		)
++	PLD(	blt	29f			)
++	PLD(	sub	r2, r2, ip		)
++28:	PLD(	mov	r4, r3, push #\push	)
++	PLD(	ldr	r3, [src, #-4]!		)
++	PLD(	subs	ip, ip, #4		)
++	PLD(	orr	r4, r4, r3, pull #\pull	)
++	PLD(	str	r4, [dst, #-4]!		)
++	PLD(	bgt	28b			)
++
++29:	PLD(	pld	[src, #-128]		)
++30:		mov	lr, r3, push #\push
++		ldmdb	src!, {r3 - r9, ip}
++		subs	r2, r2, #32
++		orr	lr, lr, ip, pull #\pull
++		mov	ip, ip, push #\push
++		orr	ip, ip, r9, pull #\pull
++		mov	r9, r9, push #\push
++		orr	r9, r9, r8, pull #\pull
++		mov	r8, r8, push #\push
++		orr	r8, r8, r7, pull #\pull
++		mov	r7, r7, push #\push
++		orr	r7, r7, r6, pull #\pull
++		mov	r6, r6, push #\push
++		orr	r6, r6, r5, pull #\pull
++		mov	r5, r5, push #\push
++		orr	r5, r5, r4, pull #\pull
++		mov	r4, r4, push #\push
++		orr	r4, r4, r3, pull #\pull
++		stmdb	dst!, {r4 - r9, ip, lr}
++		bge	29b
++	PLD(	cmn	r2, #96			)
++	PLD(	bge	30b			)
++	PLD(	add	r2, r2, #96		)
++		cmn	r2, #16
++		blt	32f
++31:		mov	r7, r3, push #\push
++		ldmdb	src!, {r3 - r6}
++		sub	r2, r2, #16
++		orr	r7, r7, r6, pull #\pull
++		mov	r6, r6, push #\push
++		orr	r6, r6, r5, pull #\pull
++		mov	r5, r5, push #\push
++		orr	r5, r5, r4, pull #\pull
++		mov	r4, r4, push #\push
++		orr	r4, r4, r3, pull #\pull
++		stmdb	dst!, {r4 - r7}
++32:		adds	r2, r2, #28
++		ldmfd	sp!, {r5 - r9}
++		blt	34f
++33:		mov	r4, r3, push #\push
++		ldr	r3, [src, #-4]!
++		subs	r2, r2, #4
++		orr	r4, r4, r3, pull #\pull
++		str	r4, [dst, #-4]!
++		bge	33b
++34:
++		.endm
++
++
++		backward_copy_shift	push=8	pull=24
++		add	src, src, #3
++		b	25b
++
++35:		backward_copy_shift	push=16	pull=16
++		add	src, src, #2
++		b	25b
++
++36:		backward_copy_shift	push=24	pull=8
++		add	src, src, #1
++		b	25b
++
++		.size	bcopy, . - bcopy
++END(bcopy)
+
+--- /dev/null	2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memcpy.S	2004-05-02 14:33:22.000000000 +0100
+@@ -0,0 +1,242 @@
++/*
++ *   Optimized memcpy implementation for ARM processors
++ *
++ *	Author: 	Nicolas Pitre
++ *	Created:	Dec 23, 2003
++ *	Copyright:	(C) MontaVista Software, Inc.
++ *
++ *   This file is free software; you can redistribute it and/or
++ *   modify it under the terms of the GNU Lesser General Public
++ *   License as published by the Free Software Foundation; either
++ *   version 2.1 of the License, or (at your option) any later version.
++ *
++ *   This file is distributed in the hope that it will be useful,
++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ *   Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull            lsr
++#define push            lsl
++#else
++#define pull            lsl
++#define push            lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++    defined(__ARM_ARCH_5T__) || \
++    defined(__ARM_ARCH_5TE__)
++#define PLD(code...)	code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memcpy (char *dst, const char *src) */
++
++ENTRY(memcpy)
++		subs	r2, r2, #4
++		stmfd	sp!, {r0, r4, lr}
++		blt	7f
++		ands	ip, r0, #3
++	PLD(	pld	[r1, #0]		)
++		bne	8f
++		ands	ip, r1, #3
++		bne	9f
++
++1:		subs	r2, r2, #4