diff options
| author | Michael Lauer <mickey@vanille-media.de> | 2007-06-13 17:31:37 +0000 |
|---|---|---|
| committer | Michael Lauer <mickey@vanille-media.de> | 2007-06-13 17:31:37 +0000 |
| commit | 49fc40335631daf60d2ead73ca6e346d52b0f305 (patch) | |
| tree | f5bd9553945ef5bc014068a389707376b96c5e4b /packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch | |
| parent | 3ddc7888534e1c11c5a64b67aa2276f1baa57811 (diff) | |
| parent | a28b3ce0ceda1bb468005d0950cb2f9b453ac68b (diff) | |
merge of 'bc14395624375a26acbbd5e4c92900e2e5e456f0'
and 'dfe282821bb00a1e4097acfcf4e97e3d5169bdc4'
Diffstat (limited to 'packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch')
| -rw-r--r-- | packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch b/packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch new file mode 100644 index 0000000000..6efe24651a --- /dev/null +++ b/packages/uboot/u-boot-mkimage-gta01-native/uboot-s3c2410-misccr-definitions.patch @@ -0,0 +1,45 @@ +Index: u-boot/include/s3c2410.h +=================================================================== +--- u-boot.orig/include/s3c2410.h ++++ u-boot/include/s3c2410.h +@@ -233,4 +233,40 @@ static inline S3C2410_SDI * S3C2410_GetB + rINTPND;\ + } + /* Wait until rINTPND is changed for the case that the ISR is very short. */ ++ ++#define S3C2410_MISCCR_USBDEV (0<<3) ++#define S3C2410_MISCCR_USBHOST (1<<3) ++ ++#define S3C2410_MISCCR_CLK0_MPLL (0<<4) ++#define S3C2410_MISCCR_CLK0_UPLL (1<<4) ++#define S3C2410_MISCCR_CLK0_FCLK (2<<4) ++#define S3C2410_MISCCR_CLK0_HCLK (3<<4) ++#define S3C2410_MISCCR_CLK0_PCLK (4<<4) ++#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) ++#define S3C2410_MISCCR_CLK0_MASK (7<<4) ++ ++#define S3C2410_MISCCR_CLK1_MPLL (0<<8) ++#define S3C2410_MISCCR_CLK1_UPLL (1<<8) ++#define S3C2410_MISCCR_CLK1_FCLK (2<<8) ++#define S3C2410_MISCCR_CLK1_HCLK (3<<8) ++#define S3C2410_MISCCR_CLK1_PCLK (4<<8) ++#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) ++#define S3C2410_MISCCR_CLK1_MASK (7<<8) ++ ++#define S3C2410_MISCCR_USBSUSPND0 (1<<12) ++#define S3C2410_MISCCR_USBSUSPND1 (1<<13) ++ ++#define S3C2410_MISCCR_nRSTCON (1<<16) ++ ++#define S3C2410_MISCCR_nEN_SCLK0 (1<<17) ++#define S3C2410_MISCCR_nEN_SCLK1 (1<<18) ++#define S3C2410_MISCCR_nEN_SCLKE (1<<19) ++#define S3C2410_MISCCR_SDSLEEP (7<<17) ++ ++#define S3C2410_CLKSLOW_UCLK_OFF (1<<7) ++#define S3C2410_CLKSLOW_MPLL_OFF (1<<5) ++#define S3C2410_CLKSLOW_SLOW (1<<4) ++#define S3C2410_CLKSLOW_SLOWVAL(x) (x) ++#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) ++ + #endif /*__S3C2410_H__*/ |