merge of 'a9d59f7c5db704e36d7f7dbda87b750cabbbc775'

     and 'fcf3721db5cf2d3c669e8d3d36cd3ca4df792f6f'

1 files changed, 0 insertions, 901 deletions

diff --git a/packages/uboot/files/u-boot-20060907-gta01.patch b/packages/uboot/files/u-boot-20060907-gta01.patch
deleted file mode 100644
index 6aa54fa208..0000000000
--- a/packages/uboot/files/u-boot-20060907-gta01.patch
+++ /dev/null
@@ -1,901 +0,0 @@
-diff --exclude .git -Nru u-boot/Makefile u-boot.new/Makefile
---- u-boot/Makefile	2006-08-11 23:19:07.000000000 +0200
-+++ u-boot.new/Makefile	2006-10-26 13:02:41.000000000 +0200
-@@ -1641,6 +1641,9 @@
- qt2410_config	:	unconfig
- 	@./mkconfig $(@:_config=) arm arm920t qt2410 NULL s3c24x0
- 
-+gta01_config	:	unconfig
-+	@./mkconfig $(@:_config=) arm arm920t gta01 NULL s3c24x0
-+
- scb9328_config	:	unconfig
- 	@./mkconfig $(@:_config=) arm arm920t scb9328 NULL imx
- 
-diff --exclude .git -Nru u-boot/board/gta01/Makefile u-boot.new/board/gta01/Makefile
---- u-boot/board/gta01/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/gta01/Makefile	2006-10-25 17:21:44.000000000 +0200
-@@ -0,0 +1,47 @@
-+#
-+# (C) Copyright 2000, 2001, 2002
-+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB	= lib$(BOARD).a
-+
-+OBJS	:= gta01.o
-+SOBJS	:= lowlevel_init.o
-+
-+$(LIB):	$(OBJS) $(SOBJS)
-+	$(AR) crv $@ $(OBJS) $(SOBJS)
-+
-+clean:
-+	rm -f $(SOBJS) $(OBJS)
-+
-+distclean:	clean
-+	rm -f $(LIB) core *.bak .depend
-+
-+#########################################################################
-+
-+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
-+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-+
-+-include .depend
-+
-+#########################################################################
-diff --exclude .git -Nru u-boot/board/gta01/config.mk u-boot.new/board/gta01/config.mk
---- u-boot/board/gta01/config.mk	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/gta01/config.mk	2006-10-25 17:22:09.000000000 +0200
-@@ -0,0 +1,25 @@
-+#
-+# (C) Copyright 2002
-+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-+#
-+# FIC GTA01 board with S3C2410X (ARM920T) cpu
-+#
-+# see http://www.samsung.com/ for more information on SAMSUNG
-+#
-+
-+#
-+# GTA01 has 1 bank of 64 MB DRAM
-+#
-+# 3000'0000 to 3400'0000
-+#
-+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
-+# optionally with a ramdisk at 3080'0000
-+#
-+# we load ourself to 33F8'0000
-+#
-+# download area is 3300'0000
-+#
-+
-+
-+TEXT_BASE = 0x33F80000
-diff --exclude .git -Nru u-boot/board/gta01/gta01.c u-boot.new/board/gta01/gta01.c
---- u-boot/board/gta01/gta01.c	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/gta01/gta01.c	2006-10-25 17:27:50.000000000 +0200
-@@ -0,0 +1,133 @@
-+/*
-+ * (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
-+ *
-+ * based on existing S3C2410 startup code in u-boot:
-+ *
-+ * (C) Copyright 2002
-+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-+ * Marius Groeger <mgroeger@sysgo.de>
-+ *
-+ * (C) Copyright 2002
-+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <s3c2410.h>
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+#if 1
-+//#define M_MDIV	0xA1		/* Fout = 202.8MHz */
-+//#define M_PDIV	0x3
-+//#define M_SDIV	0x1
-+#define M_MDIV	0x90		/* Fout = 202.8MHz */
-+#define M_PDIV	0x7
-+#define M_SDIV	0x0
-+#else
-+#define M_MDIV	0x5c		/* Fout = 150.0MHz */
-+#define M_PDIV	0x4
-+#define M_SDIV	0x0
-+#endif
-+
-+#if 1
-+#define U_M_MDIV	0x78
-+#define U_M_PDIV	0x2
-+#define U_M_SDIV	0x3
-+#else
-+#define U_M_MDIV	0x48
-+#define U_M_PDIV	0x3
-+#define U_M_SDIV	0x2
-+#endif
-+
-+static inline void delay (unsigned long loops)
-+{
-+	__asm__ volatile ("1:\n"
-+	  "subs %0, %1, #1\n"
-+	  "bne 1b":"=r" (loops):"0" (loops));
-+}
-+
-+/*
-+ * Miscellaneous platform dependent initialisations
-+ */
-+
-+int board_init (void)
-+{
-+	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
-+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-+
-+	/* to reduce PLL lock time, adjust the LOCKTIME register */
-+	clk_power->LOCKTIME = 0xFFFFFF;
-+
-+	/* configure MPLL */
-+	clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
-+
-+	/* some delay between MPLL and UPLL */
-+	delay (4000);
-+
-+	/* configure UPLL */
-+	clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
-+
-+	/* some delay between MPLL and UPLL */
-+	delay (8000);
-+
-+	/* set up the I/O ports */
-+	gpio->GPACON = 0x007FFFFF;
-+
-+	gpio->GPBCON = 0x00005056;
-+	gpio->GPBUP = 0x000007FF;
-+
-+	gpio->GPCCON = 0xAAAA12A8;
-+	gpio->GPCUP = 0x0000FFFF;
-+
-+	gpio->GPDCON = 0xAAAAAAAA;
-+	gpio->GPDUP = 0x0000FFFF;
-+
-+	gpio->GPECON = 0xAAAAAAAA;
-+	gpio->GPEUP = 0x0000FFFF;
-+
-+	gpio->GPFCON = 0x00002AA9;
-+	gpio->GPFUP = 0x000000FF;
-+
-+	gpio->GPGCON = 0xA846F0C0;
-+	gpio->GPGUP = 0x0000AFEF;
-+
-+	gpio->GPHCON = 0x0008FAAA;
-+	gpio->GPHUP = 0x000007FF;
-+
-+	/* arch number of SMDK2410-Board */
-+	gd->bd->bi_arch_number = MACH_TYPE_GTA01;
-+
-+	/* adress of boot parameters */
-+	gd->bd->bi_boot_params = 0x30000100;
-+
-+	icache_enable();
-+	dcache_enable();
-+
-+	return 0;
-+}
-+
-+int dram_init (void)
-+{
-+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+
-+	return 0;
-+}
-diff --exclude .git -Nru u-boot/board/gta01/lowlevel_init.S u-boot.new/board/gta01/lowlevel_init.S
---- u-boot/board/gta01/lowlevel_init.S	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/gta01/lowlevel_init.S	2006-10-25 17:20:42.000000000 +0200
-@@ -0,0 +1,171 @@
-+/*
-+ * Memory Setup stuff - taken from blob memsetup.S
-+ *
-+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
-+ *                     Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
-+ *
-+ * Modified for the FIC GTA01 by Harald Welte <hwelte@hmw-consulting.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+
-+#include <config.h>
-+#include <version.h>
-+
-+
-+/* some parameters for the board */
-+
-+/*
-+ *
-+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
-+ *
-+ * Copyright (C) 2002 Samsung Electronics SW.LEE  <hitchcar@sec.samsung.com>
-+ *
-+ */
-+
-+#define BWSCON	0x48000000
-+
-+/* BWSCON */
-+#define DW8		 	(0x0)
-+#define DW16		 	(0x1)
-+#define DW32		 	(0x2)
-+#define WAIT		 	(0x1<<2)
-+#define UBLB		 	(0x1<<3)
-+
-+#define B1_BWSCON	  	(DW32)
-+#define B2_BWSCON	  	(DW16)
-+#define B3_BWSCON	  	(DW16 + WAIT + UBLB)
-+#define B4_BWSCON	  	(DW16)
-+#define B5_BWSCON	  	(DW16)
-+#define B6_BWSCON	  	(DW32)
-+#define B7_BWSCON	  	(DW32)
-+
-+/* BANK0CON */
-+#define B0_Tacs		 	0x0	/*  0clk */
-+#define B0_Tcos		 	0x0	/*  0clk */
-+#define B0_Tacc		 	0x7	/* 14clk */
-+#define B0_Tcoh		 	0x0	/*  0clk */
-+#define B0_Tah		 	0x0	/*  0clk */
-+#define B0_Tacp		 	0x0
-+#define B0_PMC		 	0x0	/* normal */
-+
-+/* BANK1CON */
-+#define B1_Tacs		 	0x0	/*  0clk */
-+#define B1_Tcos		 	0x0	/*  0clk */
-+#define B1_Tacc		 	0x7	/* 14clk */
-+#define B1_Tcoh		 	0x0	/*  0clk */
-+#define B1_Tah		 	0x0	/*  0clk */
-+#define B1_Tacp		 	0x0
-+#define B1_PMC		 	0x0
-+
-+#define B2_Tacs		 	0x0
-+#define B2_Tcos		 	0x0
-+#define B2_Tacc		 	0x7
-+#define B2_Tcoh		 	0x0
-+#define B2_Tah		 	0x0
-+#define B2_Tacp		 	0x0
-+#define B2_PMC		 	0x0
-+
-+#define B3_Tacs		 	0x0	/*  0clk */
-+#define B3_Tcos		 	0x3	/*  4clk */
-+#define B3_Tacc		 	0x7	/* 14clk */
-+#define B3_Tcoh		 	0x1	/*  1clk */
-+#define B3_Tah		 	0x0	/*  0clk */
-+#define B3_Tacp		 	0x3     /*  6clk */
-+#define B3_PMC		 	0x0	/* normal */
-+
-+#define B4_Tacs		 	0x0	/*  0clk */
-+#define B4_Tcos		 	0x0	/*  0clk */
-+#define B4_Tacc		 	0x7	/* 14clk */
-+#define B4_Tcoh		 	0x0	/*  0clk */
-+#define B4_Tah		 	0x0	/*  0clk */
-+#define B4_Tacp		 	0x0
-+#define B4_PMC		 	0x0	/* normal */
-+
-+#define B5_Tacs		 	0x0	/*  0clk */
-+#define B5_Tcos		 	0x0	/*  0clk */
-+#define B5_Tacc		 	0x7	/* 14clk */
-+#define B5_Tcoh		 	0x0	/*  0clk */
-+#define B5_Tah		 	0x0	/*  0clk */
-+#define B5_Tacp		 	0x0
-+#define B5_PMC		 	0x0	/* normal */
-+
-+#define B6_MT		 	0x3	/* SDRAM */
-+#define B6_Trcd	 	 	0x1
-+#define B6_SCAN		 	0x1	/* 9bit */
-+
-+#define B7_MT		 	0x3	/* SDRAM */
-+#define B7_Trcd		 	0x1	/* 3clk */
-+#define B7_SCAN		 	0x1	/* 9bit */
-+
-+/* REFRESH parameter */
-+#define REFEN		 	0x1	/* Refresh enable */
-+#define TREFMD		 	0x0	/* CBR(CAS before RAS)/Auto refresh */
-+#define Trp		 	0x1	/* 3clk */
-+#define Trc		 	0x3	/* 7clk */
-+#define Tchr		 	0x2	/* 3clk */
-+//#define REFCNT		 	1113	/* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
-+#define REFCNT		 	997	/* period=17.5us, HCLK=60Mhz, (2048+1-15.6*60) */
-+/**************************************/
-+
-+_TEXT_BASE:
-+	.word	TEXT_BASE
-+
-+.globl lowlevel_init
-+lowlevel_init:
-+	/* memory control configuration */
-+	/* make r0 relative the current location so that it */
-+	/* reads SMRDATA out of FLASH rather than memory ! */
-+	ldr     r0, =SMRDATA
-+	ldr	r1, _TEXT_BASE
-+	sub	r0, r0, r1
-+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
-+	add     r2, r0, #13*4
-+0:
-+	ldr     r3, [r0], #4
-+	str     r3, [r1], #4
-+	cmp     r2, r0
-+	bne     0b
-+
-+	/* setup asynchronous bus mode */
-+	mrc	p15, 0, r1 ,c1 ,c0, 0
-+	orr	r1, r1, #0xc0000000
-+	mcr	p15, 0, r1, c1, c0, 0
-+
-+	/* everything is fine now */
-+	mov	pc, lr
-+
-+	.ltorg
-+/* the literal pools origin */
-+
-+SMRDATA:
-+    .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
-+    .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
-+    .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
-+    .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
-+    .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
-+    .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
-+    .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
-+    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
-+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
-+    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
-+    .word 0xb2
-+    .word 0x30
-+    .word 0x30
-diff --exclude .git -Nru u-boot/board/gta01/u-boot.lds u-boot.new/board/gta01/u-boot.lds
---- u-boot/board/gta01/u-boot.lds	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/gta01/u-boot.lds	2006-10-25 17:28:02.000000000 +0200
-@@ -0,0 +1,57 @@
-+/*
-+ * (C) Copyright 2002
-+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-+OUTPUT_ARCH(arm)
-+ENTRY(_start)
-+SECTIONS
-+{
-+	. = 0x00000000;
-+
-+	. = ALIGN(4);
-+	.text      :
-+	{
-+	  cpu/arm920t/start.o	(.text)
-+	  *(.text)
-+	}
-+
-+	. = ALIGN(4);
-+	.rodata : { *(.rodata) }
-+
-+	. = ALIGN(4);
-+	.data : { *(.data) }
-+
-+	. = ALIGN(4);
-+	.got : { *(.got) }
-+
-+	. = .;
-+	__u_boot_cmd_start = .;
-+	.u_boot_cmd : { *(.u_boot_cmd) }
-+	__u_boot_cmd_end = .;
-+
-+	. = ALIGN(4);
-+	__bss_start = .;
-+	.bss : { *(.bss) }
-+	_end = .;
-+}
-diff --exclude .git -Nru u-boot/board/qt2410/qt2410.c.old u-boot.new/board/qt2410/qt2410.c.old
---- u-boot/board/qt2410/qt2410.c.old	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/board/qt2410/qt2410.c.old	2006-10-10 11:09:43.000000000 +0200
-@@ -0,0 +1,127 @@
-+/*
-+ * (C) 2006 by Harald Welte <hwelte@hmw-consulting.de>
-+ *
-+ * based on existing S3C2410 startup code in u-boot:
-+ *
-+ * (C) Copyright 2002
-+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-+ * Marius Groeger <mgroeger@sysgo.de>
-+ *
-+ * (C) Copyright 2002
-+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <common.h>
-+#include <s3c2410.h>
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+#if 1
-+#define M_MDIV	0xA1		/* Fout = 202.8MHz */
-+#define M_PDIV	0x3
-+#define M_SDIV	0x1
-+//#define M_MDIV	0x90		/* Fout = 202.8MHz */
-+//#define M_PDIV	0x7
-+//#define M_SDIV	0x0
-+#else
-+#define M_MDIV	0x5c		/* Fout = 150.0MHz */
-+#define M_PDIV	0x4
-+#define M_SDIV	0x0
-+#endif
-+
-+#if 1
-+#define U_M_MDIV	0x78
-+#define U_M_PDIV	0x2
-+#define U_M_SDIV	0x3
-+#else
-+#define U_M_MDIV	0x48
-+#define U_M_PDIV	0x3
-+#define U_M_SDIV	0x2
-+#endif
-+
-+static inline void delay (unsigned long loops)
-+{
-+	__asm__ volatile ("1:\n"
-+	  "subs %0, %1, #1\n"
-+	  "bne 1b":"=r" (loops):"0" (loops));
-+}
-+
-+/*
-+ * Miscellaneous platform dependent initialisations
-+ */
-+
-+int board_init (void)
-+{
-+	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
-+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
-+
-+	/* to reduce PLL lock time, adjust the LOCKTIME register */
-+	clk_power->LOCKTIME = 0xFFFFFF;
-+
-+	/* configure MPLL */
-+	clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
-+
-+	/* some delay between MPLL and UPLL */
-+	delay (4000);
-+
-+	/* configure UPLL */
-+	clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
-+
-+	/* some delay between MPLL and UPLL */
-+	delay (8000);
-+
-+	/* set up the I/O ports */
-+	gpio->GPACON = 0x007FFFFF;
-+	gpio->GPBCON = 0x00044555;
-+	gpio->GPBUP = 0x000007FF;
-+	gpio->GPCCON = 0xAAAAAAAA;
-+	gpio->GPCUP = 0x0000FFFF;
-+	gpio->GPDCON = 0xAAAAAAAA;
-+	gpio->GPDUP = 0x0000FFFF;
-+	gpio->GPECON = 0xAAAAAAAA;
-+	gpio->GPEUP = 0x0000FFFF;
-+	gpio->GPFCON = 0x000055AA;
-+	gpio->GPFUP = 0x000000FF;
-+	gpio->GPGCON = 0xFF95FFBA;
-+	//gpio->GPGUP = 0x0000FFFF;
-+	gpio->GPGUP = 0x0000AFEF;
-+	gpio->GPHCON = 0x0028FAAA;
-+	gpio->GPHUP = 0x000007FF;
-+
-+	/* arch number of SMDK2410-Board */
-+	gd->bd->bi_arch_number = MACH_TYPE_QT2410;
-+
-+	/* adress of boot parameters */
-+	gd->bd->bi_boot_params = 0x30000100;
-+
-+	icache_enable();
-+	dcache_enable();
-+
-+	return 0;
-+}
-+
-+int dram_init (void)
-+{
-+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+
-+	return 0;
-+}
-diff --exclude .git -Nru u-boot/fs/cramfs/cramfs.c u-boot.new/fs/cramfs/cramfs.c
---- u-boot/fs/cramfs/cramfs.c	2006-07-14 12:41:02.000000000 +0200
-+++ u-boot.new/fs/cramfs/cramfs.c	2006-10-26 14:01:41.000000000 +0200
-@@ -27,7 +27,7 @@
- #include <common.h>
- #include <malloc.h>
- 
--#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
-+#if (CONFIG_COMMANDS & CFG_CMD_CRAMFS)
- 
- #include <asm/byteorder.h>
- #include <linux/stat.h>
-@@ -343,5 +343,22 @@
- 	}
- 	return 1;
- }
--
-+#else
-+int cramfs_load (char *loadoffset, struct part_info *info, char *filename)
-+{
-+	return -1;
-+}
-+int cramfs_ls (struct part_info *info, char *filename)
-+{
-+	return 0;
-+}
-+int cramfs_info (struct part_info *info)
-+{
-+	return 0;
-+}
-+int cramfs_check (struct part_info *info)
-+{
-+	return 0;
-+}
- #endif /* CFG_FS_CRAMFS */
-+
-diff --exclude .git -Nru u-boot/include/asm-arm/mach-types.h u-boot.new/include/asm-arm/mach-types.h
---- u-boot/include/asm-arm/mach-types.h	2006-08-11 23:19:07.000000000 +0200
-+++ u-boot.new/include/asm-arm/mach-types.h	2006-10-25 23:55:00.000000000 +0200
-@@ -1038,6 +1038,7 @@
- #define MACH_TYPE_IXP465               1028
- #define MACH_TYPE_BALLOON3             1029
- #define MACH_TYPE_QT2410               1108
-+#define MACH_TYPE_GTA01                1182
- 
- #ifdef CONFIG_ARCH_EBSA110
- # ifdef machine_arch_type
-@@ -13327,6 +13328,19 @@
- # define machine_is_qt2410()	(0)
- #endif
- 
-+#ifdef CONFIG_MACH_GTA01
-+# ifdef machine_arch_type
-+#  undef machine_arch_type
-+#  define machine_arch_type	__machine_arch_type
-+# else
-+#  define machine_arch_type	MACH_TYPE_GTA01
-+# endif
-+# define machine_is_gta01()	(machine_arch_type == MACH_TYPE_GTA01)
-+#else
-+# define machine_is_gta01()	(0)
-+#endif
-+
-+
- /*
-  * These have not yet been registered
-  */
-diff --exclude .git -Nru u-boot/include/configs/gta01.h u-boot.new/include/configs/gta01.h
---- u-boot/include/configs/gta01.h	1970-01-01 01:00:00.000000000 +0100
-+++ u-boot.new/include/configs/gta01.h	2006-10-26 20:21:30.000000000 +0200
-@@ -0,0 +1,233 @@
-+/*
-+ * (C) Copyright 2006 Harald Welte <hwelte@hmw-consulting.de>
-+ *
-+ * Configuation settings for the FIC GTA01 Linux GSM phone
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+
-+/* we want to start u-boot directly from within NAND flash */
-+#define CONFIG_S3C2410_NAND_BOOT	1
-+
-+/*
-+ * High Level Configuration Options
-+ * (easy to change)
-+ */
-+#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
-+#define	CONFIG_S3C2410		1	/* in a SAMSUNG S3C2410 SoC     */
-+#define CONFIG_SMDK2410		1	/* on a SAMSUNG SMDK2410 Board  */
-+
-+/* input clock of PLL */
-+#define CONFIG_SYS_CLK_FREQ	12000000/* the GTA01 has 12MHz input clock */
-+
-+
-+#define USE_920T_MMU		1
-+#define CONFIG_USE_IRQ		1
-+
-+/*
-+ * Size of malloc() pool
-+ */
-+#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
-+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-+
-+/*
-+ * Hardware drivers
-+ */
-+
-+/*
-+ * select serial console configuration
-+ */
-+#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on GTA01 */
-+//#define CONFIG_HWFLOW		1
-+
-+/************************************************************
-+ * RTC
-+ ************************************************************/
-+#define	CONFIG_RTC_S3C24X0	1
-+
-+/* allow to overwrite serial and ethaddr */
-+#define CONFIG_ENV_OVERWRITE
-+
-+#define CONFIG_BAUDRATE		115200
-+
-+/***********************************************************
-+ * Command definition
-+ ***********************************************************/
-+#define CONFIG_COMMANDS (\
-+			CFG_CMD_BDI	 | \
-+			CFG_CMD_LOADS	 | \
-+			CFG_CMD_LAODB	 | \
-+			CFG_CMD_IMI	 | \
-+			CFG_CMD_CACHE	 | \
-+			CFG_CMD_MEMORY	 | \
-+			CFG_CMD_ENV	 | \
-+			/* CFG_CMD_IRQ	 | */  \
-+			CFG_CMD_BOOTD	 | \
-+			CFG_CMD_CONSOLE	 | \
-+			CFG_CMD_ASKENV	 | \
-+			CFG_CMD_RUN	 | \
-+			CFG_CMD_ECHO	 | \
-+			CFG_CMD_I2C	 | \
-+			CFG_CMD_REGINFO	 | \
-+			CFG_CMD_IMMAP	 | \
-+			CFG_CMD_DATE	 | \
-+			CFG_CMD_AUTOSCRIPT | \
-+			CFG_CMD_BSP	 | \
-+			CFG_CMD_ELF	 | \
-+			CFG_CMD_MISC	 | \
-+			CFG_CMD_USB	 | \
-+			CFG_CMD_JFFS2	 | \
-+			CFG_CMD_DIAG	 | \
-+			/* CFG_CMD_HWFLOW	 | */ \
-+			CFG_CMD_SAVES	 | \
-+			CFG_CMD_NAND	 | \
-+			CFG_CMD_PORTIO	 | \
-+			CFG_CMD_MMC	 | \
-+			CFG_CMD_FAT	 | \
-+			CFG_CMD_EXT2	 | \
-+			0)
-+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-+#include <cmd_confdefs.h>
-+
-+#define CONFIG_BOOTDELAY	3
-+#define CONFIG_BOOTARGS    	"rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
-+/*#define CONFIG_BOOTFILE	"elinos-lart" */
-+#define CONFIG_BOOTCOMMAND	"nand load 0x32000000 0x34000 0x200000; bootm 0x32000000"
-+
-+#define CONFIG_DOS_PARTITION	1
-+
-+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-+#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
-+/* what's this ? it's not used anywhere */
-+#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
-+#endif
-+
-+/*
-+ * Miscellaneous configurable options
-+ */
-+#define	CFG_LONGHELP				/* undef to save memory		*/
-+#define	CFG_PROMPT		"GTA01 # "	/* Monitor Command Prompt	*/
-+#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
-+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-+#define	CFG_MAXARGS		16		/* max number of command args	*/
-+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
-+
-+#define CFG_MEMTEST_START	0x30000000	/* memtest works on	*/
-+#define CFG_MEMTEST_END		0x33F00000	/* 63 MB in DRAM	*/
-+
-+#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
-+
-+#define	CFG_LOAD_ADDR		0x33000000	/* default load address	*/
-+
-+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
-+/* it to wrap 100 times (total 1562500) to get 1 sec. */
-+#define	CFG_HZ			1562500
-+
-+/* valid baudrates */
-+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-+
-+/*-----------------------------------------------------------------------
-+ * Stack sizes
-+ *
-+ * The stack sizes are set up in start.S using the settings below
-+ */
-+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
-+#ifdef CONFIG_USE_IRQ
-+#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
-+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
-+#endif
-+
-+#define CONFIG_USB_OHCI		1
-+
-+/*-----------------------------------------------------------------------
-+ * Physical Memory Map
-+ */
-+#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
-+#define PHYS_SDRAM_1		0x30000000 /* SDRAM Bank #1 */
-+#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */
-+#define PHYS_SDRAM_RES_SIZE	0x00200000 /* 2 MB for frame buffer */
-+
-+/*-----------------------------------------------------------------------
-+ * FLASH and environment organization
-+ */
-+
-+#if 1
-+#define CFG_NO_FLASH		1
-+#else
-+#define CFG_MAX_FLASH_SECT	1
-+#define CFG_MAX_FLASH_BANKS	1
-+#endif
-+
-+#define	CFG_ENV_IS_IN_NAND	1
-+#define CFG_ENV_SIZE		0x4000		/* 16k Total Size of Environment Sector */
-+#define CFG_ENV_OFFSET		0x30000		/* environment after bootloader */
-+
-+#define NAND_MAX_CHIPS		1
-+#define CFG_NAND_BASE		0x4e000000
-+#define CFG_MAX_NAND_DEVICE	1
-+
-+#define CONFIG_MMC		1
-+#define CFG_MMC_BASE		0xff000000
-+
-+/* EXT2 driver */
-+#define CONFIG_EXT2		1
-+
-+/* FAT driver in u-boot is broken currently */
-+#define CONFIG_FAT		1
-+#define CONFIG_SUPPORT_VFAT	1
-+
-+/* JFFS2 driver */
-+#define CONFIG_JFFS2_NAND	1
-+#define CONFIG_JFFS2_NAND_DEV	0
-+#define CONFIG_JFFS2_NAND_OFF	0x634000
-+#define CONFIG_JFFS2_NAND_SIZE	0x39cc000
-+
-+/* ATAG configuration */
-+#define CONFIG_INITRD_TAG		1
-+#define CONFIG_SETUP_MEMORY_TAGS	1
-+#define CONFIG_CMDLINE_TAG		1
-+#if 0
-+#define CONFIG_SERIAL_TAG		1
-+#define CONFIG_REVISION_TAG		1
-+#endif
-+
-+#define CONFIG_DRIVER_S3C24X0_I2C	1
-+#define CONFIG_HARD_I2C			1
-+#define CFG_I2C_SPEED			400000	/* 400kHz according to PCF50707 data sheet */
-+#define CFG_I2C_SLAVE			0x7f
-+
-+
-+#if 0
-+#define CONFIG_VIDEO
-+#define CONFIG_VIDEO_S3C2410
-+#define CONFIG_CFB_CONSOLE
-+#define CONFIG_VIDEO_LOGO
-+#define CONFIG_VGA_AS_SINGLE_DEVICE
-+
-+#define VIDEO_KBD_INIT_FCT	0
-+#define VIDEO_TSTC_FCT		serial_tstc
-+#define VIDEO_GETC_FCT		serial_getc
-+
-+#define LCD_VIDEO_ADDR		0x33d00000
-+#endif
-+
-+#endif	/* __CONFIG_H */