diff options
| author | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
|---|---|---|
| committer | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
| commit | 709c4d66e0b107ca606941b988bad717c0b45d9b (patch) | |
| tree | 37ee08b1eb308f3b2b6426d5793545c38396b838 /packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch | |
| parent | fa6cd5a3b993f16c27de4ff82b42684516d433ba (diff) | |
rename packages/ to recipes/ per earlier agreement
See links below for more details:
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816
Signed-off-by: Denys Dmytriyenko <denis@denix.org>
Acked-by: Mike Westerhof <mwester@dls.net>
Acked-by: Philip Balister <philip@balister.org>
Acked-by: Khem Raj <raj.khem@gmail.com>
Acked-by: Marcin Juszkiewicz <hrw@openembedded.org>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch')
| -rw-r--r-- | packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch b/packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch deleted file mode 100644 index 0dce8f7904..0000000000 --- a/packages/u-boot/u-boot-omap3beagleboard-1.1.4/500mhz-l2enable.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- u-boot.orig/board/omap3530beagle/clock.c -+++ u-boot/board/omap3530beagle/clock.c -@@ -167,7 +167,7 @@ void prcm_init(void) - /* Getting the base address of Core DPLL param table*/ - dpll_param_p = (dpll_param *)get_core_dpll_param(); - /* Moving it to the right sysclk and ES rev base */ -- dpll_param_p = dpll_param_p + 2*clk_index + sil_index; -+ dpll_param_p = dpll_param_p + 3*clk_index + sil_index; - if(xip_safe){ - /* CORE DPLL */ - /* sr32(CM_CLKSEL2_EMU) set override to work when asleep */ -@@ -254,7 +254,7 @@ void prcm_init(void) - /* Getting the base address to MPU DPLL param table*/ - dpll_param_p = (dpll_param *)get_mpu_dpll_param(); - /* Moving it to the right sysclk and ES rev base */ -- dpll_param_p = dpll_param_p + 2*clk_index + sil_index; -+ dpll_param_p = dpll_param_p + 3*clk_index + sil_index; - /* MPU DPLL (unlocked already) */ - sr32(CM_CLKSEL2_PLL_MPU, 0, 5, dpll_param_p->m2); /* Set M2 */ - sr32(CM_CLKSEL1_PLL_MPU, 8, 11, dpll_param_p->m); /* Set M */ -@@ -266,7 +266,7 @@ void prcm_init(void) - /* Getting the base address to IVA DPLL param table*/ - dpll_param_p = (dpll_param *)get_iva_dpll_param(); - /* Moving it to the right sysclk and ES rev base */ -- dpll_param_p = dpll_param_p + 2*clk_index + sil_index; -+ dpll_param_p = dpll_param_p + 3*clk_index + sil_index; - /* IVA DPLL (set to 12*20=240MHz) */ - sr32(CM_CLKEN_PLL_IVA2, 0, 3, PLL_STOP); - wait_on_value(BIT0, 0, CM_IDLEST_PLL_IVA2, LDELAY); ---- u-boot_1_1_4_beagle.orig/cpu/omap3/cpu.c -+++ u-boot_1_1_4_beagle/cpu/omap3/cpu.c -@@ -129,9 +129,7 @@ int cleanup_before_linux (void) - - /* invalidate I-cache */ - arm_cache_flush(); --#ifndef CONFIG_L2_OFF -- /* turn off L2 cache */ -- l2cache_disable(); -+#ifndef CONFIG_L2_OFF - /* invalidate L2 cache also */ - v7_flush_dcache_all(get_device_type()); - #endif |