diff options
| author | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
|---|---|---|
| committer | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
| commit | 709c4d66e0b107ca606941b988bad717c0b45d9b (patch) | |
| tree | 37ee08b1eb308f3b2b6426d5793545c38396b838 /packages/u-boot/u-boot-git | |
| parent | fa6cd5a3b993f16c27de4ff82b42684516d433ba (diff) | |
rename packages/ to recipes/ per earlier agreement
See links below for more details:
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816
Signed-off-by: Denys Dmytriyenko <denis@denix.org>
Acked-by: Mike Westerhof <mwester@dls.net>
Acked-by: Philip Balister <philip@balister.org>
Acked-by: Khem Raj <raj.khem@gmail.com>
Acked-by: Marcin Juszkiewicz <hrw@openembedded.org>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'packages/u-boot/u-boot-git')
9 files changed, 0 insertions, 2920 deletions
diff --git a/packages/u-boot/u-boot-git/akita/akita-standard-partitioning.patch b/packages/u-boot/u-boot-git/akita/akita-standard-partitioning.patch deleted file mode 100644 index ad62e13d2e..0000000000 --- a/packages/u-boot/u-boot-git/akita/akita-standard-partitioning.patch +++ /dev/null @@ -1,56 +0,0 @@ ---- git/include/configs/akita.h 2007-12-26 17:57:00.000000000 +0000 -+++ git/include/configs/akita.h 2007-12-26 18:07:47.000000000 +0000 -@@ -81,35 +81,35 @@ - "if testkey 101 ; " \ - "then " \ - "nand read.logical 0xa1000000 0x00060000 0x00540000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/ram rw fbcon=rotate:1 ramdisk_size=8192; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/ram rw fbcon=rotate:1 ramdisk_size=8192 mtdparts=sharpsl-nand-0:7168k(smf),ROOT_FLASH_SIZEM(root),-(home); " \ - "bootm; " \ - "fi; " \ - "if testkey 2 ; " \ - "then " \ - "nand read.logical 0xa1000000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mmcblk0p1 fbcon=rotate:1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mmcblk0p1 rootwait fbcon=rotate:1; " \ - "bootm; " \ - "fi; " \ - "if testkey 18 ; " \ - "then " \ - "nand read.logical 0xa1000000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hda1 fbcon=rotate:1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hda1 rootwait fbcon=rotate:1; " \ - "bootm; " \ - "fi; " \ - "if testkey 3 ; " \ - "then " \ - "nand read.logical 0xa1000000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hdc1 fbcon=rotate:1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hdc1 rootwait fbcon=rotate:1; " \ - "bootm; " \ - "fi; " \ - "nand read.logical 0xa1000000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mtdblock2 rootfstype=jffs2 fbcon=rotate:1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mtdblock2 rootfstype=jffs2 fbcon=rotate:1 mtdparts=sharpsl-nand-0:7168k(smf),ROOT_FLASH_SIZEM(root),-(home); " \ - "bootm; " - #else - #define CONFIG_BOOTCOMMAND "" // "run boot_flash" - #endif - --#define CONFIG_BOOTARGS "console=ttyS0,115200 console=tty1 root=/dev/ram rw fbcon=rotate:1 ramdisk_size=8192" -+#define CONFIG_BOOTARGS "console=ttyS0,115200 console=tty1 root=/dev/ram rw fbcon=rotate:1 ramdisk_size=8192 mtdparts=sharpsl-nand-0:7168k(smf),ROOT_FLASH_SIZEM(root),-(home)" - #define CONFIG_SETUP_MEMORY_TAGS 1 - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ - #define CONFIG_INITRD_TAG 1 -@@ -302,9 +302,9 @@ - /* Note: fake mtd_id used, no linux mtd map file */ - - #define CONFIG_JFFS2_CMDLINE --#define MTDIDS_DEFAULT "nand0=laze-0" -+#define MTDIDS_DEFAULT "nand0=sharpsl-nand" - //#define MTDPARTS_DEFAULT "mtdparts=laze-0:256k(uboot),128k(env),-(jffs2)" --#define MTDPARTS_DEFAULT "mtdparts=laze-0:7168k(Logical),-(JFFS2)" -+#define MTDPARTS_DEFAULT "mtdparts=sharpsl-nand-0:7168k(smf),ROOT_FLASH_SIZEM(root),-(home)" - - /* - * SHARP SL NAND logical partition diff --git a/packages/u-boot/u-boot-git/beagleboard/armv7-a.patch b/packages/u-boot/u-boot-git/beagleboard/armv7-a.patch deleted file mode 100644 index 49f8de0879..0000000000 --- a/packages/u-boot/u-boot-git/beagleboard/armv7-a.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- u-boot/cpu/omap3/config.mk-orig 2008-05-27 16:46:45.000000000 -0700 -+++ u-boot/cpu/omap3/config.mk 2008-05-29 12:50:49.000000000 -0700 -@@ -23,7 +23,7 @@ - PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ - -msoft-float - --PLATFORM_CPPFLAGS += -march=armv7a -+PLATFORM_CPPFLAGS += -march=armv7-a - # ========================================================================= - # - # Supply options according to compiler version diff --git a/packages/u-boot/u-boot-git/beagleboard/beagle-600MHz.diff b/packages/u-boot/u-boot-git/beagleboard/beagle-600MHz.diff deleted file mode 100644 index fe183ddb77..0000000000 --- a/packages/u-boot/u-boot-git/beagleboard/beagle-600MHz.diff +++ /dev/null @@ -1,21 +0,0 @@ -From: Mans Rullgard <mans@mansr.com> -Date: Mon, 29 Sep 2008 19:56:45 +0000 (+0100) -Subject: OMAP3: Set MPU clock to 600 MHz -X-Git-Url: http://git.mansr.com/?p=u-boot;a=commitdiff_plain;h=caccdb772c3028a3e3e801fb1554788150752ffc - -OMAP3: Set MPU clock to 600 MHz ---- - -diff --git a/cpu/omap3/lowlevel_init.S b/cpu/omap3/lowlevel_init.S -index 1f9a0e9..f95a65f 100644 ---- a/cpu/omap3/lowlevel_init.S -+++ b/cpu/omap3/lowlevel_init.S -@@ -208,7 +208,7 @@ mpu_dpll_param: - /* ES1 */ - .word 0x17D,0x0C,0x03,0x01 - /* ES2 */ --.word 0x1F4,0x0C,0x03,0x01 -+.word 0x258,0x0C,0x03,0x01 - /* 3410 */ - .word 0x10A,0x0C,0x03,0x01 - diff --git a/packages/u-boot/u-boot-git/beagleboard/mru-256.diff b/packages/u-boot/u-boot-git/beagleboard/mru-256.diff deleted file mode 100644 index 6099fe6c9d..0000000000 --- a/packages/u-boot/u-boot-git/beagleboard/mru-256.diff +++ /dev/null @@ -1,192 +0,0 @@ -From: Mans Rullgard <mans@mansr.com> -Date: Thu, 2 Oct 2008 01:25:35 +0000 (+0100) -Subject: OMAP3: Beagleboard can have dual-chip RAM -X-Git-Url: http://git.mansr.com/?p=u-boot;a=commitdiff_plain;h=ef6ee5af8d584bddadb2d45ad4320cef96b8a934;hp=caccdb772c3028a3e3e801fb1554788150752ffc - -OMAP3: Beagleboard can have dual-chip RAM - -Some Beagleboards are fitted with dual-chip RAM. Returning DDR_STACKED -from get_mem_type() causes the second chip (on CS1) to be enabled. - -FIXME: need a better way to configure this. - -Signed-off-by: Mans Rullgard <mans@mansr.com> ---- - -diff --git a/cpu/omap3/board.c b/cpu/omap3/board.c -index 804021f..f7cf289 100644 ---- a/cpu/omap3/board.c -+++ b/cpu/omap3/board.c -@@ -265,15 +265,17 @@ int dram_init(void) - * where it can be started. Early init code will init - * memory on CS0. - */ -- if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) -+ if ((mtype == DDR_COMBO) || (mtype == DDR_STACKED)) { - do_sdrc_init(SDRC_CS1_OSET, NOT_EARLY); -+ make_cs1_contiguous(); -+ } - - size0 = get_sdr_cs_size(SDRC_CS0_OSET); - size1 = get_sdr_cs_size(SDRC_CS1_OSET); - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = size0; -- gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + size0; -+ gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(1); - gd->bd->bi_dram[1].size = size1; - - return 0; -diff --git a/cpu/omap3/mem.c b/cpu/omap3/mem.c -index 955fa70..53687a5 100644 ---- a/cpu/omap3/mem.c -+++ b/cpu/omap3/mem.c -@@ -114,12 +114,12 @@ void make_cs1_contiguous(void) - * for a part. Helps in guessing which part - * we are currently using. - *******************************************************/ --u32 mem_ok(void) -+u32 mem_ok(u32 cs) - { - u32 val1, val2, addr; - u32 pattern = 0x12345678; - -- addr = OMAP34XX_SDRC_CS0; -+ addr = OMAP34XX_SDRC_CS0 + get_sdr_cs_offset(cs); - - __raw_writel(0x0, addr + 0x400); /* clear pos A */ - __raw_writel(pattern, addr); /* pattern to pos B */ -@@ -156,43 +156,40 @@ void sdrc_init(void) - - void do_sdrc_init(u32 offset, u32 early) - { -+ u32 actim_offs = offset? 0x28: 0; - -- /* reset sdrc controller */ -- __raw_writel(SOFTRESET, SDRC_SYSCONFIG); -- wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000); -- __raw_writel(0, SDRC_SYSCONFIG); -+ if (early) { -+ /* reset sdrc controller */ -+ __raw_writel(SOFTRESET, SDRC_SYSCONFIG); -+ wait_on_value(BIT0, BIT0, SDRC_STATUS, 12000000); -+ __raw_writel(0, SDRC_SYSCONFIG); - -- /* setup sdrc to ball mux */ -- __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING); -+ /* setup sdrc to ball mux */ -+ __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING); - -- /* SDRC_MCFG0 register */ -- (*(unsigned int *) 0x6D000080) = 0x02584099; /* from Micron */ -+ /* Disble Power Down of CKE cuz of 1 CKE on combo part */ -+ __raw_writel(0x00000081, SDRC_POWER); - -- /* SDRC_RFR_CTRL0 register */ -- (*(unsigned int *) 0x6D0000a4) = 0x54601; /* for 166M */ -+ __raw_writel(0x0000A, SDRC_DLLA_CTRL); -+ sdelay(0x20000); -+ } - -- /* SDRC_ACTIM_CTRLA0 register */ -- (*(unsigned int *) 0x6D00009c) = 0xa29db4c6; /* for 166M */ -+ __raw_writel(0x02584099, SDRC_MCFG_0 + offset); -+ __raw_writel(0x4e201, SDRC_RFR_CTRL + offset); -+ __raw_writel(0xaa9db4c6, SDRC_ACTIM_CTRLA_0 + actim_offs); -+ __raw_writel(0x11517, SDRC_ACTIM_CTRLB_0 + actim_offs); - -- /* SDRC_ACTIM_CTRLB0 register */ -- (*(unsigned int *) 0x6D0000a0) = 0x12214; /* for 166M */ -+ __raw_writel(CMD_NOP, SDRC_MANUAL_0 + offset); -+ __raw_writel(CMD_PRECHARGE, SDRC_MANUAL_0 + offset); -+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset); -+ __raw_writel(CMD_AUTOREFRESH, SDRC_MANUAL_0 + offset); - -- /* Disble Power Down of CKE cuz of 1 CKE on combo part */ -- (*(unsigned int *) 0x6D000070) = 0x00000081; -+ /* CAS latency 3, Write Burst = Read Burst, Serial Mode, -+ Burst length = 4 */ -+ __raw_writel(0x00000032, SDRC_MR_0 + offset); - -- /* SDRC_Manual command register */ -- (*(unsigned int *) 0x6D0000a8) = 0x00000000; /* NOP command */ -- (*(unsigned int *) 0x6D0000a8) = 0x00000001; /* Precharge command */ -- (*(unsigned int *) 0x6D0000a8) = 0x00000002; /* Auto-refresh command */ -- (*(unsigned int *) 0x6D0000a8) = 0x00000002; /* Auto-refresh command */ -- -- /* SDRC MR0 register */ -- (*(int *) 0x6D000084) = 0x00000032; /* Burst length = 4 */ -- /* CAS latency = 3, Write Burst = Read Burst Serial Mode */ -- -- /* SDRC DLLA control register */ -- (*(unsigned int *) 0x6D000060) = 0x0000A; -- sdelay(0x20000); -+ if (!mem_ok(offset)) -+ __raw_writel(0, SDRC_MCFG_0 + offset); - } - - void enable_gpmc_config(u32 *gpmc_config, u32 gpmc_base, u32 base, u32 size) -diff --git a/cpu/omap3/sys_info.c b/cpu/omap3/sys_info.c -index 12cf5ba..64d9e7e 100644 ---- a/cpu/omap3/sys_info.c -+++ b/cpu/omap3/sys_info.c -@@ -90,8 +90,11 @@ u32 is_mem_sdr(void) - ***********************************************************/ - u32 get_mem_type(void) - { -- /* Current SDP3430 uses 2x16 MDDR Infenion parts */ -+#ifdef CONFIG_OMAP3_BEAGLE -+ return DDR_STACKED; -+#else - return DDR_DISCRETE; -+#endif - } - - /*********************************************************************** -@@ -109,6 +112,22 @@ u32 get_sdr_cs_size(u32 offset) - } - - /*********************************************************************** -+ * get_sdr_cs_offset() - get offset of cs from cs0 start -+ ************************************************************************/ -+u32 get_sdr_cs_offset(u32 cs) -+{ -+ u32 offset; -+ -+ if (!cs) -+ return 0; -+ -+ offset = __raw_readl(SDRC_CS_CFG); -+ offset = (offset & 15) << 27 | (offset & 0x30) >> 17; -+ -+ return offset; -+} -+ -+/*********************************************************************** - * get_board_type() - get board type based on current production stats. - * - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info. - * when they are available we can get info from there. This should -diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h -index d47defb..df2d150 100644 ---- a/include/asm-arm/arch-omap3/cpu.h -+++ b/include/asm-arm/arch-omap3/cpu.h -@@ -123,7 +123,6 @@ - #define SDRC_ACTIM_CTRLA_1 (OMAP34XX_SDRC_BASE+0xC4) - #define SDRC_ACTIM_CTRLB_1 (OMAP34XX_SDRC_BASE+0xC8) - #define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4) --#define SDRC_RFR_CTRL (OMAP34XX_SDRC_BASE+0xA4) - #define SDRC_MANUAL_0 (OMAP34XX_SDRC_BASE+0xA8) - #define OMAP34XX_SDRC_CS0 0x80000000 - #define OMAP34XX_SDRC_CS1 0xA0000000 -diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h -index 279bdce..5b0bd9e 100644 ---- a/include/asm-arm/arch-omap3/sys_proto.h -+++ b/include/asm-arm/arch-omap3/sys_proto.h -@@ -50,6 +50,7 @@ u32 get_gpmc0_width(void); - u32 get_board_type(void); - void display_board_info(u32); - u32 get_sdr_cs_size(u32 offset); -+u32 get_sdr_cs_offset(u32 cs); - u32 running_in_sdram(void); - u32 running_in_sram(void); - u32 running_in_flash(void); diff --git a/packages/u-boot/u-boot-git/beagleboard/name.patch b/packages/u-boot/u-boot-git/beagleboard/name.patch deleted file mode 100644 index ac03e47774..0000000000 --- a/packages/u-boot/u-boot-git/beagleboard/name.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- git/Makefile.orig 2008-07-25 16:21:22.000000000 -0700 -+++ git/Makefile 2008-07-27 06:49:08.000000000 -0700 -@@ -2582,8 +2582,8 @@ SMN42_config : unconfig - ######################################################################### - ## ARM CORTEX Systems - ######################################################################### --omap3530beagle_config : unconfig -- @$(MKCONFIG) $(@:_config=) arm omap3 omap3530beagle -+beagleboard_config : unconfig -+ @$(MKCONFIG) omap3530beagle arm omap3 omap3530beagle - - overo_config : unconfig - @$(MKCONFIG) $(@:_config=) arm omap3 overo - diff --git a/packages/u-boot/u-boot-git/c7x0/corgi-standard-partitioning.patch b/packages/u-boot/u-boot-git/c7x0/corgi-standard-partitioning.patch deleted file mode 100644 index 7d25c0877c..0000000000 --- a/packages/u-boot/u-boot-git/c7x0/corgi-standard-partitioning.patch +++ /dev/null @@ -1,56 +0,0 @@ ---- git/include/configs/corgi.h 2007-12-26 17:57:00.000000000 +0000 -+++ git/include/configs/corgi.h 2007-12-26 18:07:47.000000000 +0000 -@@ -81,35 +81,35 @@ - "if testkey 101 ; " \ - "then " \ - "nand read.logical 0xa0800000 0x00060000 0x00540000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/ram rw ramdisk_size=8192; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/ram rw ramdisk_size=8192 mtdparts=sharpsl-nand:7168k(smf),ROOT_FLASH_SIZEM(root),-(home); " \ - "bootm; " \ - "fi; " \ - "if testkey 2 ; " \ - "then " \ - "nand read.logical 0xa0800000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mmcblk0p1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mmcblk0p1 rootwait; " \ - "bootm; " \ - "fi; " \ - "if testkey 18 ; " \ - "then " \ - "nand read.logical 0xa0800000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hda1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hda1 rootwait; " \ - "bootm; " \ - "fi; " \ - "if testkey 3 ; " \ - "then " \ - "nand read.logical 0xa0800000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hdc1; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/hdc1 rootwait; " \ - "bootm; " \ - "fi; " \ - "nand read.logical 0xa0800000 0x005a0000 0x00160000; " \ -- "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mtdblock2 rootfstype=jffs2; " \ -+ "setenv bootargs console=ttyS0,115200 console=tty1 root=/dev/mtdblock2 rootfstype=jffs2 mtdparts=sharpsl-nand:7168k(smf),ROOT_FLASH_SIZEM(root),-(home); " \ - "bootm; " - #else - #define CONFIG_BOOTCOMMAND "" // "run boot_flash" - #endif - --#define CONFIG_BOOTARGS "console=ttyS0,115200 console=tty1 root=/dev/ram rw ramdisk_size=8192" -+#define CONFIG_BOOTARGS "console=ttyS0,115200 console=tty1 root=/dev/ram rw ramdisk_size=8192 mtdparts=sharpsl-nand:7168k(smf),ROOT_FLASH_SIZEM(root),-(home)" - #define CONFIG_SETUP_MEMORY_TAGS 1 - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ - #define CONFIG_INITRD_TAG 1 -@@ -304,9 +304,9 @@ - /* Note: fake mtd_id used, no linux mtd map file */ - - #define CONFIG_JFFS2_CMDLINE --#define MTDIDS_DEFAULT "nand0=laze-0" -+#define MTDIDS_DEFAULT "nand0=sharpsl-nand" - //#define MTDPARTS_DEFAULT "mtdparts=laze-0:256k(uboot),128k(env),-(jffs2)" --#define MTDPARTS_DEFAULT "mtdparts=laze-0:7168k(Logical),-(JFFS2)" -+#define MTDPARTS_DEFAULT "mtdparts=sharpsl-nand:7168k(smf),ROOT_FLASH_SIZEM(root),-(home)" - - /* - * SHARP SL NAND logical partition diff --git a/packages/u-boot/u-boot-git/pdaXrom-u-boot.patch b/packages/u-boot/u-boot-git/pdaXrom-u-boot.patch deleted file mode 100644 index 0bf071399d..0000000000 --- a/packages/u-boot/u-boot-git/pdaXrom-u-boot.patch +++ /dev/null @@ -1,2467 +0,0 @@ -diff -Nur u-boot-2006-04-18-1106/CREDITS u-boot-2006-04-18-1106-new/CREDITS ---- u-boot-2006-04-18-1106/CREDITS 2006-04-18 09:05:03.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/CREDITS 2006-07-05 11:19:44.000000000 +0000 -@@ -93,6 +93,12 @@ - E: jonathan.debruyne@siemens.atea.be - D: Port to Siemens IAD210 board - -+N: Alexander Chukov -+E: sash@pdaXrom.org -+D: initial support for Sharp Zaurus SL-C1000/3100 -+D: initial support for Sharp Zaurus SL-C7x0/C860 -+W: http://www.pdaXrom.org -+ - N: Ken Chou - E: kchou@ieee.org - D: Support for A3000 SBC board -diff -Nur u-boot-2006-04-18-1106/MAINTAINERS u-boot-2006-04-18-1106-new/MAINTAINERS ---- u-boot-2006-04-18-1106/MAINTAINERS 2006-04-18 09:05:03.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/MAINTAINERS 2006-07-05 11:19:44.000000000 +0000 -@@ -379,6 +379,11 @@ - - AT91RM9200DK at91rm9200 - -+Alexander Chukov <sash@pdaXrom.org> -+ -+ akita xscale -+ corgi xscale -+ - George G. Davis <gdavis@mvista.com> - - assabet SA1100 -diff -Nur u-boot-2006-04-18-1106/MAKEALL u-boot-2006-04-18-1106-new/MAKEALL ---- u-boot-2006-04-18-1106/MAKEALL 2006-04-18 09:05:03.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/MAKEALL 2006-07-05 11:19:44.000000000 +0000 -@@ -206,7 +206,7 @@ - adsvix cerf250 cradle csb226 \ - delta innokom lubbock pxa255_idp \ - wepep250 xaeniax xm250 xsengine \ -- zylonite \ -+ zylonite akita corgi \ - " - - LIST_ixp="ixdp425" -diff -Nur u-boot-2006-04-18-1106/Makefile u-boot-2006-04-18-1106-new/Makefile ---- u-boot-2006-04-18-1106/Makefile 2006-04-18 09:05:03.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/Makefile 2006-07-05 11:19:44.000000000 +0000 -@@ -61,7 +61,7 @@ - CROSS_COMPILE = powerpc-linux- - endif - ifeq ($(ARCH),arm) --CROSS_COMPILE = arm-linux- -+CROSS_COMPILE = armv5tel-linux- - endif - ifeq ($(ARCH),i386) - ifeq ($(HOSTARCH),i386) -@@ -1709,6 +1709,12 @@ - zylonite_config : - @./mkconfig $(@:_config=) arm pxa zylonite - -+akita_config : unconfig -+ @./mkconfig $(@:_config=) arm pxa akita -+ -+corgi_config : unconfig -+ @./mkconfig $(@:_config=) arm pxa corgi -+ - ######################################################################### - ## ARM1136 Systems - ######################################################################### -diff -Nur u-boot-2006-04-18-1106/README u-boot-2006-04-18-1106-new/README ---- u-boot-2006-04-18-1106/README 2006-04-18 09:05:03.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/README 2006-07-05 11:19:44.000000000 +0000 -@@ -311,7 +311,8 @@ - CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400, - CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, - CONFIG_SHANNON, CONFIG_P2_OMAP730, CONFIG_SMDK2400, -- CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9 -+ CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9, -+ CONFIG_AKITA, CONFIG_CORGI - - MicroBlaze based boards: - ------------------------ -diff -Nur u-boot-2006-04-18-1106/board/akita/Makefile u-boot-2006-04-18-1106-new/board/akita/Makefile ---- u-boot-2006-04-18-1106/board/akita/Makefile 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/board/akita/Makefile 2006-07-05 11:19:44.000000000 +0000 -@@ -0,0 +1,51 @@ -+# -+# board/akita/Makefile -+# -+# (C) Copyright 2006 Alexander Chukov <sash@pdaXrom.org> -+# -+# (C) Copyright 2000 -+# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -+# -+# See file CREDITS for list of people who contributed to this -+# project. -+# -+# This program is free software; you can redistribute it and/or -+# modify it under the terms of the GNU General Public License as -+# published by the Free Software Foundation; either version 2 of -+# the License, or (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+# MA 02111-1307 USA -+# -+ -+include $(TOPDIR)/config.mk -+ -+LIB = lib$(BOARD).a -+ -+OBJS := akita.o nand.o kbd.o -+SOBJS := lowlevel_init.o -+ -+$(LIB): $(OBJS) $(SOBJS) -+ $(AR) crv $@ $(OBJS) $(SOBJS) -+ -+clean: -+ rm -f $(SOBJS) $(OBJS) -+ -+distclean: clean -+ rm -f $(LIB) core *.bak .depend -+ -+######################################################################### -+ -+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) -+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ -+ -+-include .depend -+ -+######################################################################### -diff -Nur u-boot-2006-04-18-1106/board/akita/akita.c u-boot-2006-04-18-1106-new/board/akita/akita.c ---- u-boot-2006-04-18-1106/board/akita/akita.c 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/board/akita/akita.c 2006-07-05 11:19:44.000000000 +0000 -@@ -0,0 +1,89 @@ -+/* -+ * board/akita/akita.c -+ * -+ * Configuration settings for the Sharp Zaurus SL-Cxx00. -+ * -+ * (C) Copyright 2006 Alexander Chukov <sash@pdaXrom.org> -+ * -+ * portions from adsvix board configuration: -+ * (C) Copyright 2004 -+ * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net -+ * (C) Copyright 2002 -+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net -+ * (C) Copyright 2002 -+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com> -+ * Marius Groeger <mgroeger@sysgo.de> -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include <common.h> -+ -+void set_turbo_mode(void); -+ -+/* ------------------------------------------------------------------------- */ -+ -+/* -+ * Miscellaneous platform dependent initialisations -+ */ -+ -+int board_init (void) -+{ -+ DECLARE_GLOBAL_DATA_PTR; -+ -+ /* memory and cpu-speed are setup before relocation */ -+ /* so we do _nothing_ here */ -+ -+ /* arch number of Sharp Zaurus Akita : MACH_TYPE_AKITA */ -+ gd->bd->bi_arch_number = 744; -+ -+ /* adress of boot parameters */ -+ gd->bd->bi_boot_params = 0xa0000100; -+ -+ /* set cpu turbo mode */ -+ set_turbo_mode(); -+ -+ spitzkbd_init(); -+ -+ return 0; -+} -+ -+int board_late_init(void) -+{ -+ setenv("stdout", "serial"); -+ setenv("stderr", "serial"); -+ return 0; -+} -+ -+ -+int dram_init (void) -+{ -+ DECLARE_GLOBAL_DATA_PTR; -+ -+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; -+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2; -+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3; -+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; -+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4; -+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; -+ -+ return 0; -+} -diff -Nur u-boot-2006-04-18-1106/board/akita/config.mk u-boot-2006-04-18-1106-new/board/akita/config.mk ---- u-boot-2006-04-18-1106/board/akita/config.mk 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/board/akita/config.mk 2006-07-05 11:19:44.000000000 +0000 -@@ -0,0 +1 @@ -+TEXT_BASE = 0xa3000000 -diff -Nur u-boot-2006-04-18-1106/board/akita/kbd.c u-boot-2006-04-18-1106-new/board/akita/kbd.c ---- u-boot-2006-04-18-1106/board/akita/kbd.c 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/board/akita/kbd.c 2006-07-05 11:19:44.000000000 +0000 -@@ -0,0 +1,261 @@ -+/* -+ * board/akita/kbd.c -+ * -+ * Keyboard driver for the Sharp Zaurus SL-Cxx00. -+ * -+ * (C) Copyright 2006 Alexander Chukov <sash@pdaXrom.org> -+ * -+ * portions from: -+ * -+ * linux/drivers/input/keyboard/spitzkbd.c -+ * -+ * Keyboard driver for Sharp Spitz, Borzoi and Akita (SL-Cxx00 series) -+ * -+ * Copyright (C) 2005 Richard Purdie -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include <common.h> -+#include <command.h> -+#include <config.h> -+#include <version.h> -+#include <asm/arch/pxa-regs.h> -+ -+#define GPIO_DFLT_LOW 0x400 -+#define GPIO_DFLT_HIGH 0x800 -+ -+void pxa_gpio_mode(int gpio_mode) -+{ -+ int gpio = gpio_mode & GPIO_MD_MASK_NR; -+ int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; -+ int gafr; -+ -+ if (gpio_mode & GPIO_DFLT_LOW) -+ GPCR(gpio) = GPIO_bit(gpio); -+ else if (gpio_mode & GPIO_DFLT_HIGH) -+ GPSR(gpio) = GPIO_bit(gpio); -+ if (gpio_mode & GPIO_MD_MASK_DIR) -+ GPDR(gpio) |= GPIO_bit(gpio); -+ else -+ GPDR(gpio) &= ~GPIO_bit(gpio); -+ gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); -+ GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); -+} -+ -+#define SPITZ_KEY_STROBE_NUM (11) -+#define SPITZ_KEY_SENSE_NUM (7) -+ -+#define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000 -+#define SPITZ_GPIO_G1_STROBE_BIT 0x00100000 -+#define SPITZ_GPIO_G2_STROBE_BIT 0x01000000 -+#define SPITZ_GPIO_G3_STROBE_BIT 0x00041880 -+#define SPITZ_GPIO_G0_SENSE_BIT 0x00021000 -+#define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4 -+#define SPITZ_GPIO_G2_SENSE_BIT 0x08000000 -+#define SPITZ_GPIO_G3_SENSE_BIT 0x00000000 -+ -+#define SPITZ_GPIO_KEY_STROBE0 88 -+#define SPITZ_GPIO_KEY_STROBE1 23 -+#define SPITZ_GPIO_KEY_STROBE2 24 -+#define SPITZ_GPIO_KEY_STROBE3 25 -+#define SPITZ_GPIO_KEY_STROBE4 26 -+#define SPITZ_GPIO_KEY_STROBE5 27 -+#define SPITZ_GPIO_KEY_STROBE6 52 -+#define SPITZ_GPIO_KEY_STROBE7 103 -+#define SPITZ_GPIO_KEY_STROBE8 107 -+#define SPITZ_GPIO_KEY_STROBE9 108 -+#define SPITZ_GPIO_KEY_STROBE10 114 -+ -+#define SPITZ_GPIO_KEY_SENSE0 12 -+#define SPITZ_GPIO_KEY_SENSE1 17 -+#define SPITZ_GPIO_KEY_SENSE2 91 -+#define SPITZ_GPIO_KEY_SENSE3 34 -+#define SPITZ_GPIO_KEY_SENSE4 36 -+#define SPITZ_GPIO_KEY_SENSE5 38 -+#define SPITZ_GPIO_KEY_SENSE6 39 -+ -+#define SPITZ_GPIO_ON_KEY (95) -+ -+#define KB_ROWS 7 -+#define KB_COLS 11 -+#define KB_ROWMASK(r) (1 << (r)) -+#define SCANCODE(r,c) (((r)<<4) + (c) + 1) -+#define NR_SCANCODES ((KB_ROWS<<4) + 1) -+ -+#define SCAN_INTERVAL (50) /* ms */ -+#define HINGE_SCAN_INTERVAL (150) /* ms */ -+ -+#define KB_DISCHARGE_DELAY 10 -+#define KB_ACTIVATE_DELAY 10 -+ -+static int spitz_strobes[] = { -+ SPITZ_GPIO_KEY_STROBE0, -+ SPITZ_GPIO_KEY_STROBE1, -+ SPITZ_GPIO_KEY_STROBE2, -+ SPITZ_GPIO_KEY_STROBE3, -+ SPITZ_GPIO_KEY_STROBE4, -+ SPITZ_GPIO_KEY_STROBE5, -+ SPITZ_GPIO_KEY_STROBE6, -+ SPITZ_GPIO_KEY_STROBE7, -+ SPITZ_GPIO_KEY_STROBE8, -+ SPITZ_GPIO_KEY_STROBE9, -+ SPITZ_GPIO_KEY_STROBE10, -+}; -+ -+static int spitz_senses[] = { -+ SPITZ_GPIO_KEY_SENSE0, -+ SPITZ_GPIO_KEY_SENSE1, -+ SPITZ_GPIO_KEY_SENSE2, -+ SPITZ_GPIO_KEY_SENSE3, -+ SPITZ_GPIO_KEY_SENSE4, -+ SPITZ_GPIO_KEY_SENSE5, -+ SPITZ_GPIO_KEY_SENSE6, -+}; -+ -+static inline void spitzkbd_discharge_all(void) -+{ -+ /* STROBE All HiZ */ -+ GPCR0 = SPITZ_GPIO_G0_STROBE_BIT; -+ GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT; -+ GPCR1 = SPITZ_GPIO_G1_STROBE_BIT; -+ GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT; -+ GPCR2 = SPITZ_GPIO_G2_STROBE_BIT; -+ GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT; -+ GPCR3 = SPITZ_GPIO_G3_STROBE_BIT; -+ GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; -+} -+ -+static inline void spitzkbd_activate_all(void) -+{ -+ /* STROBE ALL -> High */ -+ GPSR0 = SPITZ_GPIO_G0_STROBE_BIT; -+ GPDR0 |= SPITZ_GPIO_G0_STROBE_BIT; -+ GPSR1 = SPITZ_GPIO_G1_STROBE_BIT; -+ GPDR1 |= SPITZ_GPIO_G1_STROBE_BIT; -+ GPSR2 = SPITZ_GPIO_G2_STROBE_BIT; -+ GPDR2 |= SPITZ_GPIO_G2_STROBE_BIT; -+ GPSR3 = SPITZ_GPIO_G3_STROBE_BIT; -+ GPDR3 |= SPITZ_GPIO_G3_STROBE_BIT; -+ -+ udelay(KB_DISCHARGE_DELAY); -+} -+ -+static inline void spitzkbd_activate_col(int col) -+{ -+ int gpio = spitz_strobes[col]; -+ GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT; -+ GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT; -+ GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT; -+ GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; -+ GPSR(gpio) = GPIO_bit(gpio); -+ GPDR(gpio) |= GPIO_bit(gpio); -+} -+ -+static inline void spitzkbd_reset_col(int col) -+{ -+ int gpio = spitz_strobes[col]; -+ GPDR0 &= ~SPITZ_GPIO_G0_STROBE_BIT; -+ GPDR1 &= ~SPITZ_GPIO_G1_STROBE_BIT; -+ GPDR2 &= ~SPITZ_GPIO_G2_STROBE_BIT; -+ GPDR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; -+ GPCR(gpio) = GPIO_bit(gpio); -+ GPDR(gpio) |= GPIO_bit(gpio); -+} -+ -+static inline int spitzkbd_get_row_status(int col) -+{ -+ return ((GPLR0 >> 12) & 0x01) | ((GPLR0 >> 16) & 0x02) -+ | ((GPLR2 >> 25) & 0x04) | ((GPLR1 << 1) & 0x08) -+ | ((GPLR1 >> 0) & 0x10) | ((GPLR1 >> 1) & 0x60); -+} -+ -+static int spitzkbd_scankeyboard(void) -+{ -+ unsigned int row, col, rowd; -+ unsigned int num_pressed, pwrkey = ((GPLR(SPITZ_GPIO_ON_KEY) & GPIO_bit(SPITZ_GPIO_ON_KEY)) != 0); -+ int ret = -1; -+ -+ num_pressed = 0; -+ for (col = 0; col < KB_COLS; col++) { -+ spitzkbd_discharge_all(); -+ udelay(KB_DISCHARGE_DELAY); -+ -+ spitzkbd_activate_col(col); -+ udelay(KB_ACTIVATE_DELAY); -+ -+ rowd = spitzkbd_get_row_status(col); -+ for (row = 0; row < KB_ROWS; row++) { -+ unsigned int scancode, pressed; -+ -+ scancode = SCANCODE(row, col); -+ pressed = rowd & KB_ROWMASK(row); -+ -+ if (pressed) -+ ret = scancode; -+ } -+ spitzkbd_reset_col(col); -+ } -+ -+ spitzkbd_activate_all(); -+ -+ if (pwrkey) -+ return -2; -+ -+ return ret; -+} -+ -+void spitzkbd_init(void) -+{ -+ int i; -+ -+ /* Setup sense interrupts - RisingEdge Detect, sense lines as inputs */ -+ for (i = 0; i < SPITZ_KEY_SENSE_NUM; i++) -+ pxa_gpio_mode(spitz_senses[i] | GPIO_IN); -+ -+ /* Set Strobe lines as outputs - set high */ -+ for (i = 0; i < SPITZ_KEY_STROBE_NUM; i++) -+ pxa_gpio_mode(spitz_strobes[i] | GPIO_OUT | GPIO_DFLT_HIGH); -+ -+ pxa_gpio_mode(SPITZ_GPIO_ON_KEY | GPIO_IN); -+} -+ -+int do_testkey(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+{ -+ int scan; -+ -+ if (argc < 2) -+ return 1; -+ -+ scan = spitzkbd_scankeyboard(); -+ -+ -+// if (scan >= 0) -+// printf("Scan = %d\n", scan); -+// else -+// printf("Nothing!\n"); -+ -+ return !(simple_strtol(argv[1], NULL, 10) == scan); -+} -+ -+U_BOOT_CMD( -+ testkey, 2, 1, do_testkey, -+ "testkey - compare pressed key with arg\n", -+ "<key scancode>" -+); -diff -Nur u-boot-2006-04-18-1106/board/akita/lowlevel_init.S u-boot-2006-04-18-1106-new/board/akita/lowlevel_init.S ---- u-boot-2006-04-18-1106/board/akita/lowlevel_init.S 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2006-04-18-1106-new/board/akita/lowlevel_init.S 2006-07-05 11:19:44.000000000 +0000 -@@ -0,0 +1,135 @@ -+/* -+ * board/akita/lowlevel_init.S -+ * -+ * Configuration settings for the Sharp Zaurus SL-Cxx00. -+ * -+ * (C) Copyright 2006 Alexander Chukov <sash@pdaXrom.org> -+ * -+ * This was o |