u-boot: add SPI, EEPROM and DTT support for mpc8313e-rdb

4 files changed, 129 insertions, 0 deletions

diff --git a/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch
new file mode 100644
index 0000000000..bdc69d9562
--- /dev/null
+++ b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-eeprom.patch
@@ -0,0 +1,21 @@
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h	2008-09-12 18:52:50.000000000 +0200
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h	2008-09-12 18:52:58.000000000 +0200
+@@ -263,6 +263,16 @@
+ #define CFG_I2C_OFFSET		0x3000
+ #define CFG_I2C2_OFFSET		0x3100
+ 
++/*
++ * EEPROM configuration
++ */
++#define CONFIG_CMD_EEPROM
++#define CFG_I2C_EEPROM_ADDR_LEN		2	/* 16-bit EEPROM address */
++#define CFG_I2C_EEPROM_ADDR		0x50	/* Atmel: AT24C256*/
++#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10	/* 10ms of delay */
++#define CFG_EEPROM_PAGE_WRITE_BITS	6	/* 64-Byte Page Write Mode */
++#define CFG_EEPROM_PAGE_WRITE_ENABLE
++
+ /* TSEC */
+ #define CFG_TSEC1_OFFSET	0x24000
+ #define CFG_TSEC1		(CFG_IMMR+CFG_TSEC1_OFFSET)
diff --git a/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-lm75.patch b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-lm75.patch
new file mode 100644
index 0000000000..d9331dde37
--- /dev/null
+++ b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-lm75.patch
@@ -0,0 +1,23 @@
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h	2008-09-12 18:52:58.000000000 +0200
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h	2008-09-12 18:53:10.000000000 +0200
+@@ -370,6 +370,7 @@
+ #define CONFIG_CMD_PCI
+ #define CONFIG_CMD_NAND
+ #define CONFIG_CMD_SPI
++#define CONFIG_CMD_DTT
+ 
+ #if defined(CFG_RAMBOOT)
+     #undef CONFIG_CMD_ENV
+@@ -392,6 +393,10 @@
+ #define MTDPARTS_DEFAULT	"mtdparts=physmap-flash.0:384k(uboot),64k(env)"
+ 
+ 
++/* Digital Thermometer and Thermostat */
++#define CONFIG_DTT_LM75		1
++#define CONFIG_DTT_SENSORS	{ 0x48 }
++
+ /*
+  * Miscellaneous configurable options
+  */
diff --git a/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-spi.patch b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-spi.patch
new file mode 100644
index 0000000000..039996c7f3
--- /dev/null
+++ b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-spi.patch
@@ -0,0 +1,70 @@
+Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c
+===================================================================
+--- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c	2008-09-12 18:48:23.000000000 +0200
++++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c	2008-09-12 18:50:10.000000000 +0200
+@@ -28,6 +28,7 @@
+ #endif
+ #include <pci.h>
+ #include <mpc83xx.h>
++#include <spi.h> 
+ 
+ DECLARE_GLOBAL_DATA_PTR;
+ 
+@@ -107,3 +108,33 @@
+ #endif
+ }
+ #endif
++
++
++/*
++ * The following are used to control the SPI chip selects for the SPI command.
++ */
++#ifdef CONFIG_HARD_SPI
++
++#define SPI_CS_MASK	0x80000000
++
++void spi_eeprom_chipsel(int cs)
++{
++	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
++
++	if (cs)
++		iopd->dat &= ~SPI_CS_MASK;
++	else
++		iopd->dat |=  SPI_CS_MASK;
++}
++
++/*
++ * The SPI command uses this table of functions for controlling the SPI
++ * chip selects.
++ */
++spi_chipsel_type spi_chipsel[] = {
++	spi_eeprom_chipsel,
++};
++int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
++
++#endif /* CONFIG_HARD_SPI */
++
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h	2008-09-12 18:50:09.000000000 +0200
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h	2008-09-12 18:50:50.000000000 +0200
+@@ -359,6 +359,7 @@
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_PCI
+ #define CONFIG_CMD_NAND
++#define CONFIG_CMD_SPI
+ 
+ #if defined(CFG_RAMBOOT)
+     #undef CONFIG_CMD_ENV
+@@ -367,6 +368,11 @@
+ 
+ #define CONFIG_CMDLINE_EDITING 1
+ 
++/* SPI */
++#define CONFIG_MPC8XXX_SPI
++#define CONFIG_HARD_SPI			/* SPI with hardware support */
++#undef CONFIG_SOFT_SPI			/* SPI bit-banged */
++
+ /*
+  * JFFS2 partitions (mtdparts command line support)
+  */
diff --git a/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-watchdog.patch b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-watchdog.patch
new file mode 100644
index 0000000000..db92fea35c
--- /dev/null
+++ b/packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-watchdog.patch
@@ -0,0 +1,15 @@
+Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h
+===================================================================
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h	2008-09-12 18:47:22.000000000 +0200
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h	2008-09-12 18:48:11.000000000 +0200
+@@ -460,6 +460,10 @@
+ 	HRCWH_BIG_ENDIAN |\
+ 	HRCWH_LALE_NORMAL)
+ 
++/* Watchdog */
++#define CONFIG_WATCHDOG
++#define CFG_WATCHDOG_VALUE 0xFFFF
++
+ /* System IO Config */
+ #define CFG_SICRH	(SICRH_TSOBI1 | SICRH_TSOBI2)	/* RGMII */
+ #define CFG_SICRL	SICRL_USBDR			/* Enable Internal USB Phy  */