diff options
| author | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
|---|---|---|
| committer | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
| commit | 709c4d66e0b107ca606941b988bad717c0b45d9b (patch) | |
| tree | 37ee08b1eb308f3b2b6426d5793545c38396b838 /packages/u-boot/u-boot-1.3.2/boc01 | |
| parent | fa6cd5a3b993f16c27de4ff82b42684516d433ba (diff) | |
rename packages/ to recipes/ per earlier agreement
See links below for more details:
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816
Signed-off-by: Denys Dmytriyenko <denis@denix.org>
Acked-by: Mike Westerhof <mwester@dls.net>
Acked-by: Philip Balister <philip@balister.org>
Acked-by: Khem Raj <raj.khem@gmail.com>
Acked-by: Marcin Juszkiewicz <hrw@openembedded.org>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'packages/u-boot/u-boot-1.3.2/boc01')
16 files changed, 0 insertions, 2461 deletions
diff --git a/packages/u-boot/u-boot-1.3.2/boc01/001-090205-SPI.patch b/packages/u-boot/u-boot-1.3.2/boc01/001-090205-SPI.patch deleted file mode 100644 index 6c0ed5c36a..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/001-090205-SPI.patch +++ /dev/null @@ -1,94 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -28,6 +28,7 @@ - #endif - #include <pci.h> - #include <mpc83xx.h> -+#include <spi.h> - - DECLARE_GLOBAL_DATA_PTR; - -@@ -107,3 +108,33 @@ void ft_board_setup(void *blob, bd_t *bd - #endif - } - #endif -+ -+ -+/* -+ * The following are used to control the SPI chip selects for the SPI command. -+ */ -+#ifdef CONFIG_HARD_SPI -+ -+#define SPI_CS_MASK 0x80000000 -+ -+void spi_eeprom_chipsel(int cs) -+{ -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ -+ if (cs) -+ iopd->dat &= ~SPI_CS_MASK; -+ else -+ iopd->dat |= SPI_CS_MASK; -+} -+ -+/* -+ * The SPI command uses this table of functions for controlling the SPI -+ * chip selects. -+ */ -+spi_chipsel_type spi_chipsel[] = { -+ spi_eeprom_chipsel, -+}; -+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); -+ -+#endif /* CONFIG_HARD_SPI */ -+ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -369,6 +369,7 @@ - #define CONFIG_CMD_PCI - #define CONFIG_CMD_NAND - #define CONFIG_CMD_JFFS2 -+#define CONFIG_CMD_SPI - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -386,6 +387,11 @@ - #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:384k(uboot),64k(env)" - - -+/* SPI */ -+#define CONFIG_MPC8XXX_SPI -+#define CONFIG_HARD_SPI /* SPI with hardware support */ -+#undef CONFIG_SOFT_SPI /* SPI bit-banged */ -+ - /* - * Miscellaneous configurable options - */ -Index: u-boot-1.3.2/drivers/spi/mpc8xxx_spi.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/spi/mpc8xxx_spi.c -+++ u-boot-1.3.2/drivers/spi/mpc8xxx_spi.c -@@ -34,6 +34,8 @@ - #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ - #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ - #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ -+#define SPI_MODE_DIV16 (0x80000000 >> 4) /*Divide by 16. */ -+#define SPI_MODE_LEN_8 (0x00700000) /*0111 8-bit characters*/ - - #define SPI_TIMEOUT 1000 - -@@ -45,9 +47,7 @@ void spi_init(void) - * SPI pins on the MPC83xx are not muxed, so all we do is initialize - * some registers - */ -- spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; -- spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8 -- (16.67MHz typ.) */ -+ spi->mode = SPI_MODE_DIV16 |SPI_MODE_LEN_8| SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; - spi->event = 0xffffffff; /* Clear all SPI events */ - spi->mask = 0x00000000; /* Mask all SPI interrupts */ - spi->com = 0; /* LST bit doesn't do anything, so disregard */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/002-081212-GPIO.patch b/packages/u-boot/u-boot-1.3.2/boc01/002-081212-GPIO.patch deleted file mode 100644 index 0fb3daf98e..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/002-081212-GPIO.patch +++ /dev/null @@ -1,252 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -29,6 +29,7 @@ - #include <pci.h> - #include <mpc83xx.h> - #include <spi.h> -+#include <gpio.h> - - DECLARE_GLOBAL_DATA_PTR; - -@@ -44,6 +45,48 @@ int board_early_init_f(void) - return 0; - } - -+int misc_init_f(void) -+{ -+ uchar value; -+ uchar i; -+ -+#ifdef PRE_INIT_GPIO -+ value=PRE_INIT_GPIO; -+ -+ for(i=0;i<MAX_GPIO_OUT;i++) -+ { -+ if(value&(1<<i)) -+ { -+ gpio_set(i); -+ } -+ else -+ { -+ gpio_clear(i); -+ } -+ } -+ udelay(1000); -+#endif -+ -+ -+#ifdef INIT_GPIO -+ value=INIT_GPIO; -+ for(i=0;i<MAX_GPIO_OUT;i++) -+ { -+ if(value&(1<<i)) -+ { -+ gpio_set(i); -+ } -+ else -+ { -+ gpio_clear(i); -+ } -+ } -+ puts("GPIO: ready\n"); -+#endif -+ -+ return 0; -+} -+ - int checkboard(void) - { - puts("Board: Freescale MPC8313ERDB\n"); -@@ -109,7 +152,42 @@ void ft_board_setup(void *blob, bd_t *bd - } - #endif - -+#ifdef CONFIG_CMD_GPIO -+void gpio_set(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ iopd->dir |= ulMask; -+ iopd->dat |= ulMask; -+ } -+} -+ -+void gpio_clear(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ iopd->dir |= ulMask; -+ iopd->dat &= ~ulMask; -+ } -+} - -+char gpio_get(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ } -+ return (iopd->dat& ulMask)? 1:0; -+} -+#endif - /* - * The following are used to control the SPI chip selects for the SPI command. - */ -Index: u-boot-1.3.2/common/cmd_gpio.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_gpio.c -@@ -0,0 +1,76 @@ -+/* -+ * (C) Copyright 2001 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+#include <gpio.h> -+ -+ -+int do_gpio (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ unsigned char ucGpio; -+ -+ if (argc < 3) -+ goto usage; -+ -+ ucGpio = simple_strtoul (argv[2], NULL, 10); -+ -+ if (!strncmp(argv[1], "set", 3)) -+ { -+ gpio_set(ucGpio); -+ } -+ else -+ if (!strncmp(argv[1], "clear", 5)) -+ { -+ gpio_clear(ucGpio); -+ } -+ else -+ if (!strncmp(argv[1], "get", 3)) -+ { -+ printf("%s %s %d = %d\n",argv[0],argv[1],ucGpio, gpio_get(ucGpio)); -+ return 0; -+ } -+ else -+ goto usage; -+ -+ printf("%s %s %d\n",argv[0],argv[1],ucGpio); -+ -+ return 0; -+ -+usage : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+} /* do_gpio() */ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ gpio, 3, 1, do_gpio, -+ "gpio - General Purpose Input/Output\n", -+ " - Set or clear General Purpose Output.\n" -+ "<set/clear/get> - Set or clear General Purpose Output.\n" -+ "<gpio> - number of gpio to be set/clear/get \n" -+); -+ -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -50,6 +50,7 @@ endif - COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o - COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -+COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o - COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -49,6 +49,7 @@ - #define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN - - #define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ -+#define CONFIG_MISC_INIT_F - - #define CFG_IMMR 0xE0000000 - -@@ -370,6 +371,7 @@ - #define CONFIG_CMD_NAND - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_SPI -+#define CONFIG_CMD_GPIO - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -392,6 +394,11 @@ - #define CONFIG_HARD_SPI /* SPI with hardware support */ - #undef CONFIG_SOFT_SPI /* SPI bit-banged */ - -+/* GPIO */ -+#define PRE_INIT_GPIO 0x28 -+#define INIT_GPIO 0x08 -+#define MAX_GPIO_OUT 7 -+ - /* - * Miscellaneous configurable options - */ -@@ -457,7 +464,7 @@ - - /* System IO Config */ - #define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ --#define CFG_SICRL SICRL_USBDR /* Enable Internal USB Phy */ -+#define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ - - #define CFG_HID0_INIT 0x000000000 - #define CFG_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ -Index: u-boot-1.3.2/include/gpio.h -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/include/gpio.h -@@ -0,0 +1,9 @@ -+#ifndef __GPIO_H__ -+#define __GPIO_H__ -+ -+extern void gpio_set(unsigned char ucGpio); -+extern void gpio_clear(unsigned char ucGpio); -+extern char gpio_get(unsigned char ucGpio); -+ -+#endif /* __GPIO_H__ */ -+ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/003-081205-DTT_LM73.patch b/packages/u-boot/u-boot-1.3.2/boc01/003-081205-DTT_LM73.patch deleted file mode 100644 index 9f821f4c71..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/003-081205-DTT_LM73.patch +++ /dev/null @@ -1,44 +0,0 @@ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:27:32.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:28:14.000000000 +0100 -@@ -371,6 +371,7 @@ - #define CONFIG_CMD_NAND - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_SPI -+#define CONFIG_CMD_DTT - #define CONFIG_CMD_GPIO - - #if defined(CFG_RAMBOOT) -@@ -399,6 +400,13 @@ - #define INIT_GPIO 0x08 - #define MAX_GPIO_OUT 7 - -+/* Digital Thermometer and Thermostat */ -+#define CONFIG_DTT_LM73 1 -+#define CONFIG_DTT_SENSORS { 0x49 } -+#define CONFIG_DTT_ALARM -+#define CFG_DTT_MAX_TEMP 70 -+#define CFG_DTT_MIN_TEMP -30 -+ - /* - * Miscellaneous configurable options - */ -Index: u-boot-1.3.2/drivers/hwmon/lm73.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/hwmon/lm73.c 2008-03-09 16:20:02.000000000 +0100 -+++ u-boot-1.3.2/drivers/hwmon/lm73.c 2008-12-09 16:27:46.000000000 +0100 -@@ -134,8 +134,13 @@ - /* - * Setup configuraton register - */ -+#ifdef CONFIG_DTT_ALARM -+ /* config = alert active low, enabled, and reset */ -+ val = 0x40; -+#else - /* config = alert active low, disabled, and reset */ - val = 0x64; -+#endif - if (dtt_write(sensor, DTT_CONFIG, val)) - return 1; - /* diff --git a/packages/u-boot/u-boot-1.3.2/boc01/004-081205-WATCHDOG.patch b/packages/u-boot/u-boot-1.3.2/boc01/004-081205-WATCHDOG.patch deleted file mode 100644 index e6e291d9b9..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/004-081205-WATCHDOG.patch +++ /dev/null @@ -1,15 +0,0 @@ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:30:51.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:30:51.000000000 +0100 -@@ -470,6 +470,10 @@ - HRCWH_BIG_ENDIAN |\ - HRCWH_LALE_NORMAL) - -+ -+#define CONFIG_WATCHDOG -+#define CFG_WATCHDOG_VALUE 0xFFFF -+ - /* System IO Config */ - #define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ - #define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/006-081205-EEPROM_INTERSIL.patch b/packages/u-boot/u-boot-1.3.2/boc01/006-081205-EEPROM_INTERSIL.patch deleted file mode 100644 index 21d7cba1a3..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/006-081205-EEPROM_INTERSIL.patch +++ /dev/null @@ -1,16 +0,0 @@ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:30:51.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:31:01.000000000 +0100 -@@ -269,9 +269,9 @@ - */ - #define CONFIG_CMD_EEPROM - #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ --#define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C256*/ -+#define CFG_I2C_EEPROM_ADDR 0x57 /* Intersil 12024 (eeprom)*/ - #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ --#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64-Byte Page Write Mode */ -+#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* 16-Byte Page Write Mode */ - #define CFG_EEPROM_PAGE_WRITE_ENABLE - - /* TSEC */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/006-081211-EEPROM_M24C32.patch b/packages/u-boot/u-boot-1.3.2/boc01/006-081211-EEPROM_M24C32.patch deleted file mode 100644 index b448d0f62d..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/006-081211-EEPROM_M24C32.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -271,7 +271,7 @@ - #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ - #define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C256*/ - #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ --#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64-Byte Page Write Mode */ -+#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ - #define CFG_EEPROM_PAGE_WRITE_ENABLE - - /* TSEC */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/007-090217-CAPSENSE.patch b/packages/u-boot/u-boot-1.3.2/boc01/007-090217-CAPSENSE.patch deleted file mode 100644 index 1b7630536f..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/007-090217-CAPSENSE.patch +++ /dev/null @@ -1,546 +0,0 @@ -Index: u-boot-1.3.2/common/cmd_capsense.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_capsense.c -@@ -0,0 +1,105 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+#include <capsense.h> -+#include <i2c.h> -+ -+#define ARG_SENSOR_NUMBER 1 -+ -+#define ARG_CMD 1 -+#define ARG_OLD_ADDRESS 2 -+ -+ -+int do_capsense (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ int i; -+ unsigned char sensors[] = CONFIG_CAPSENSE_SENSORS; -+ int old_bus, old_address; -+ char port[2]; -+ /* switch to correct I2C bus */ -+ old_bus = I2C_GET_BUS(); -+ I2C_SET_BUS(CFG_CAPSENSE_BUS_NUM); -+ -+ /* -+ * Loop through sensors, read -+ * state, and output it. -+ */ -+ if(argc==1) -+ { -+ port[0]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,0); -+ port[1]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ printf ("P0 0x%02x 0x%02x\n",port[0],port[1]); -+ for (i = 0; i < 8; i++) -+ { -+ if(sensors[0]&(1<<i)) -+ { -+ printf ("GP0[%d]: %i\n",i,port[0]&(1<<i)?1:0); -+ } -+ if(sensors[1]&(1<<i)) -+ { -+ printf ("GP1[%d]: %i\n",i,port[1]&(1<<i)?1:0); -+ } -+ -+ } -+ } -+ else -+ { -+ if ( strncmp(argv[ARG_CMD], "config", 3) == 0 ) { -+ if ( argc == 3 ) { -+ old_address=simple_strtoul (argv[ARG_OLD_ADDRESS], NULL, 10); -+ if ( capsense_change_i2c_address(old_address, CONFIG_CAPSENSE_I2C_ADDRESS) != 0 ) -+ printf("failed to change i2c address\n"); -+ else -+ printf("i2c address changed to 0x%02X\n", CONFIG_CAPSENSE_I2C_ADDRESS); -+ } -+ -+ capsense_config(CONFIG_CAPSENSE_I2C_ADDRESS); -+ capsense_store_nvm(CONFIG_CAPSENSE_I2C_ADDRESS); -+ } -+ else { -+ printf ("Usage:\n%s\n", cmdtp->help); -+ } -+ } -+ -+ /* switch back to original I2C bus */ -+ I2C_SET_BUS(old_bus); -+ -+ return 0; -+} /* do_capsense() */ -+ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ capsense, 4, 1, do_capsense, -+ "capsense - CapSense Express touch-sensing buttons\n", -+ "capsense\n Read state of the CapSense Express touch-sensing buttons.\n" -+ "capsense config [<old i2c address>]\n Setup default capsense configuration.\n" -+ ); -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -50,6 +50,7 @@ endif - COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o - COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -+COBJS-$(CONFIG_CMD_CAPSENSE) += cmd_capsense.o - COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o -Index: u-boot-1.3.2/drivers/i2c/CY8C201xx.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/drivers/i2c/CY8C201xx.c -@@ -0,0 +1,289 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+ -+#ifdef CONFIG_CAPSENSE_CY8C201XX -+ -+#include <i2c.h> -+#include <capsense.h> -+ -+int capsense_read(int address, int reg) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if ( (reg < 0) || (reg > 0xA1) ) -+ return -1; -+ -+ /* -+ * Prepare to handle 1 byte result. -+ */ -+ dlen = 1; -+ -+ /* -+ * Now try to read the register. -+ */ -+ if (i2c_read(address, reg, 1, data, dlen) != 0) -+ return -1; -+ -+ return (int)data[0]; -+} -+ -+ -+int capsense_write(int address, int reg, int val) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ /* -+ * Handle 1 byte values. -+ */ -+ dlen = 1; -+ data[0] = (char)(val & 0xff); -+ -+ /* -+ * Write value to register. -+ */ -+ if (i2c_write(address, reg, 1, data, dlen) != 0) -+ return 1; -+ -+ return 0; -+} -+ -+ -+int capsense_write_N(int address, int reg, char *data, int dlen) -+{ -+ /* -+ * Validate 'reg' param -+ */ -+ if ( (reg < 0) || (reg > 0xA1) ) -+ return -1; -+ -+ /* -+ * Write value to register. -+ */ -+ if ( i2c_write(address, reg, 1, data, dlen) != 0 ) -+ return 1; -+ -+ return 0; -+} -+ -+ -+int capsense_get_state(int address,char port) -+{ -+ return capsense_read(address,CAPSENSE_REG_READ_STATUS+port); -+} -+ -+ -+int capsense_change_i2c_address(char old_address,char new_address) -+{ -+ unsigned char data[4]; -+ int read_address; -+ printf("capsense change i2c address\n"); -+ //checking if the I2C address is in the limits ( I2C address can have a value from 0 to 127 ) -+ if((old_address>0x7F)||(new_address>0x7F)) -+ { -+ printf("I2C address is not in the limits\n"); -+ return 1; -+ } -+ -+ //reading old capsence address -+ read_address=capsense_read(old_address, CAPSENSE_REG_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("error reading old capsence address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ if((read_address&0x7F)!=old_address) -+ { -+ printf("reading old capsence address failed\n"); -+ return 1; //Capsense not respond correctly -+ } -+ -+ //writing command for unlocking the I2C device address lock -+ data[0]=0x3C; -+ data[1]=0xA5; -+ data[2]=0x69; -+ if(capsense_write_N(old_address, CAPSENSE_REG_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for unlocking the I2C device address lock failed\n"); -+ return 1; -+ } -+ -+ //writing the new I2C address to the device I2C address register -+ if(capsense_write(old_address, CAPSENSE_REG_I2C_ADDR_DM,new_address|0x80)!=0) -+ { -+ printf("writing the new I2C address to the device I2C address register failed\n"); -+ return 1; -+ } -+ -+ //writing command for locking the I2C device address lock -+ data[0]=0x96; -+ data[1]=0x5A; -+ data[2]=0xC3; -+ if(capsense_write_N(old_address, CAPSENSE_REG_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for locking the I2C device failed\n"); -+ return 1; -+ } -+ -+ //reading new capsence address -+ read_address=capsense_read(new_address, CAPSENSE_REG_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("capsense do not respond at new address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ return 0; -+} -+ -+ -+static char data_GPIO_ENABLE[] = { -+ 0x00, 0x00 // GPIO_ENABLE -+}; -+ -+static char data_CS_ENABLE[] = { -+ 0x1D, 0x10, // CS_ENABLE -+ 0x02, 0x0F, // GPIO_ENABLE -+ 0x00, 0x00, // INVERSION_MASK -+ 0x00, 0x00, // INT_MASK -+ 0x1F, 0x1F, // STATUS_HOLD_MSK -+ 0x00, 0x02, 0x00, 0x00, // DM_PULL_UP0, DM_STRONG0, DM_HIGHZ0, DM_OD_LOW0 -+ 0x00, 0x0F, 0x00, 0x00, // DM_PULL_UP1, DM_STRONG1, DM_HIGHZ1, DM_OD_LOW1 -+}; -+ -+static char data_OUTPUT_PORT[] = { -+ 0x00, 0x00 // OUTPUT_PORT -+}; -+ -+static char data_OP_SEL[] = { -+ 0x00, 0x00, 0x00, 0x00, 0x00, // OP_SEL_00 -+ 0x80, 0x01, 0x00, 0x00, 0x00, // OP_SEL_01 -+ 0x00, 0x00, 0x00, 0x00, 0x00, // OP_SEL_02 -+ 0x00, 0x00, 0x00, 0x00, 0x00, // OP_SEL_03 -+ 0x00, 0x00, 0x00, 0x00, 0x00, // OP_SEL_04 -+ 0x80, 0x10, 0x00, 0x00, 0x00, // OP_SEL_10 -+ 0x80, 0x08, 0x00, 0x00, 0x00, // OP_SEL_11 -+ 0x80, 0x04, 0x00, 0x00, 0x00, // OP_SEL_12 -+ 0x80, 0x00, 0x10, 0x00, 0x00, // OP_SEL_13 -+ 0x00, 0x00, 0x00, 0x00, 0x00, // OP_SEL_14 -+}; -+ -+static char data_CS_NOISE_TH[] = { -+ 0x28, // CS_NOISE_TH -+ 0x64, // CS_BL_UPD_TH -+ 0xA0, // CS_SETL_TIME -+ 0x22, // CS_OTH_SET -+ 0x0A, // CS_HYSTERESIS -+ 0x03, // CS_DEBOUNCE -+ 0x14, // CS_NEG_NOISE_TH -+ 0x14, // CS_LOW_BL_RST -+ 0x00, // CS_FILTERING -+}; -+ -+static char data_CS_SCAN_POS[] = { -+ 0x00, 0x00, 0x00, 0x00, 0x00, // CS_SCAN_POS_0x -+ 0x00, 0x00, 0x00, 0x00, 0x00, // CS_SCAN_POS_1x -+ 0x32, 0x00, 0x32, 0x32, 0x32, // CS_FINGER_TH_0x -+ 0x00, 0x00, 0x00, 0x00, 0x32, // CS_FINGER_TH_1x -+ 0x14, 0x00, 0x0C, 0x0A, 0x14, // CS_IDAC_0x -+ 0x00, 0x00, 0x00, 0x00, 0x0D // CS_IDAC_1x -+}; -+ -+static char data_SLEEP[] = { -+ 0x00, // SLEEP_PIN -+ 0x20, // SLEEP_CTRL -+ 0x00, // SLEEP_SA_CTR -+}; -+ -+int capsense_config(char address) -+{ -+ printf("Setting default capsense configuration at i2c address 0x%02X...\n", address); -+ -+ //entering setup operation mode -+ if ( capsense_write(address, CAPSENSE_COMMAND_REG, CAPSENSE_CMD_SETUP_OPERATION_MODE) != 0 ) { -+ printf("CAPSENSE_COMMAND_REG SETUP_OPERATION_MODE\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_GPIO_ENABLE, data_GPIO_ENABLE, sizeof(data_GPIO_ENABLE)) != 0 ) { -+ printf("CAPSENSE_REG_GPIO_ENABLE\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_CS_ENABLE, data_CS_ENABLE, sizeof(data_CS_ENABLE)) != 0 ) { -+ printf("CAPSENSE_REG_CS_ENABLE\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_OUTPUT_PORT, data_OUTPUT_PORT, sizeof(data_OUTPUT_PORT)) != 0 ) { -+ printf("CAPSENSE_REG_OUTPUT_PORT\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_OP_SEL_0, data_OP_SEL, sizeof(data_OP_SEL)) != 0 ) { -+ printf("CAPSENSE_REG_OP_SEL_0\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_CS_NOISE_TH, data_CS_NOISE_TH, sizeof(data_CS_NOISE_TH)) != 0 ) { -+ printf("CAPSENSE_REG_CS_NOISE_TH\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_CS_SCAN_POS, data_CS_SCAN_POS, sizeof(data_CS_SCAN_POS)) != 0 ) { -+ printf("CAPSENSE_REG_CS_SCAN_POS\n"); -+ return 1; -+ } -+ if ( capsense_write_N(address, CAPSENSE_REG_SLEEP_PIN, data_SLEEP, sizeof(data_SLEEP)) != 0 ) { -+ printf("CAPSENSE_REG_SLEEP_PIN\n"); -+ return 1; -+ } -+ if ( capsense_write(address, CAPSENSE_COMMAND_REG, CAPSENSE_CMD_NORMAL_OPERATION_MODE) != 0 ) { -+ printf("CAPSENSE_COMMAND_REG NORMAL_OPERATION_MODE\n"); -+ return 1; -+ } -+ -+ printf("...done.\n"); -+ -+ return 0; -+} -+ -+void capsense_store_nvm(char address) -+{ -+ //storing the new current configuration to NVM -+ printf("Storing capsense configuration to NVM\n"); -+ capsense_write(address, CAPSENSE_COMMAND_REG, CAPSENSE_CMD_STORE_TO_NVM); -+} -+ -+#endif /* CONFIG_CAPSENSE_CY8C201XX */ -Index: u-boot-1.3.2/drivers/i2c/Makefile -=================================================================== ---- u-boot-1.3.2.orig/drivers/i2c/Makefile -+++ u-boot-1.3.2/drivers/i2c/Makefile -@@ -29,6 +29,7 @@ COBJS-y += fsl_i2c.o - COBJS-y += omap1510_i2c.o - COBJS-y += omap24xx_i2c.o - COBJS-y += tsi108_i2c.o -+COBJS-y += CY8C201xx.o - - COBJS := $(COBJS-y) - SRCS := $(COBJS:.o=.c) -Index: u-boot-1.3.2/include/capsense.h -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/include/capsense.h -@@ -0,0 +1,95 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USCY8C201xx.c:234:A -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons. -+ */ -+#ifndef _CAPSENSE_H_ -+#define _CAPSENSE_H_ -+ -+#if defined(CONFIG_CAPSENSE_CY8C201XX) -+ -+#define CONFIG_CAPSENSE /* We have a Capsense */ -+ -+#ifndef CONFIG_CAPSENSE_SENSORS -+/*config for CY3218-CAPEXP1*/ -+#define CONFIG_CAPSENSE_LED {0x05,0x02} // port 0-{0,3} port 1-{2} -+#define CONFIG_CAPSENSE_SENSOR {0x02,0x0C} // port 0-{2} port 1-{3,4} -+#endif -+#endif /* CONFIG_CAPSENSE_SENSORS */ -+ -+extern int capsense_read(int address, int reg); -+extern int capsense_write(int address, int reg, int val); -+extern int capsense_get_state(int address,char port); -+extern int capsense_change_i2c_address(char old_address,char new_address); -+extern int capsense_config(char address); -+extern void capsense_store_nvm(char address); -+#endif -+ -+#if !defined(CFG_CAPSENSE_BUS_NUM) -+#define CFG_CAPSENSE_BUS_NUM 1 -+ -+//----------------------------------------------- -+// Register Map and corresponding constants -+//----------------------------------------------- -+ -+ -+#define CAPSENSE_REG_STATUS_PORT 0x02 -+#define CAPSENSE_REG_OUTPUT_PORT 0x04 -+#define CAPSENSE_REG_CS_ENABLE 0x06 -+#define CAPSENSE_REG_GPIO_ENABLE 0x08 -+#define CAPSENSE_REG_INVERSION_MASK 0x0A -+#define CAPSENSE_REG_INT_MASK 0x0C -+#define CAPSENSE_REG_STATUS_HOLD_MSK 0x0E -+#define CAPSENSE_REG_DRIVE_MODE 0x10 -+#define CAPSENSE_REG_OP_SEL_0 0x1C -+#define CAPSENSE_REG_OP_SEL_1 0x35 -+#define CAPSENSE_REG_CS_NOISE_TH 0x4E -+#define CAPSENSE_REG_CS_SETL_TIME 0x50 -+#define CAPSENSE_REG_CS_OTH_SET 0x51 -+#define CAPSENSE_REG_CS_HYSTERESIS 0x52 -+#define CAPSENSE_REG_CS_DEBOUNCE 0x53 -+#define CAPSENSE_REG_CS_NEG_NOISE_TH 0x54 -+#define CAPSENSE_REG_CS_SCAN_POS 0x57 -+#define CAPSENSE_REG_CS_FINGER_TH 0x61 -+#define CAPSENSE_REG_CS_IDAC 0x6B -+#define CAPSENSE_REG_CS_SLID_CONFIG 0x75 -+#define CAPSENSE_REG_CS_SLID_MUL 0x77 -+#define CAPSENSE_REG_I2C_DEV_LOCK 0x79 -+#define CAPSENSE_REG_DEVICE_ID 0x7A -+#define CAPSENSE_REG_I2C_ADDR_DM 0x7C -+#define CAPSENSE_REG_SLEEP_PIN 0x7E -+#define CAPSENSE_REG_SLEEP_CTRL 0x7F -+#define CAPSENSE_REG_SLEEP_SA_CTR 0x80 -+#define CAPSENSE_REG_CS_READ_BUTTON 0x81 -+#define CAPSENSE_REG_CS_READ_BL 0x82 -+#define CAPSENSE_REG_READ_STATUS 0x88 -+#define CAPSENSE_REG_READ_CEN_POS 0x8A -+ -+#define CAPSENSE_COMMAND_REG 0xA0 -+ -+#define CAPSENSE_CMD_STORE_TO_NVM 0x01 -+#define CAPSENSE_CMD_NORMAL_OPERATION_MODE 0x07 -+#define CAPSENSE_CMD_SETUP_OPERATION_MODE 0x08 -+ -+#endif /* _CAPSENSE_H_ */ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -407,6 +407,13 @@ - #define CFG_DTT_MAX_TEMP 70 - #define CFG_DTT_MIN_TEMP -30 - -+/*Capsense touch sensing buttons (Cpe board)*/ -+#define CONFIG_CMD_CAPSENSE -+#define CONFIG_CAPSENSE_CY8C201XX 1 -+#define CONFIG_CAPSENSE_I2C_ADDRESS 0x25 -+#define CONFIG_CAPSENSE_LEDS {0x02,0x0F} // port 0-{1} port 1-{0,1,2,3} -+#define CONFIG_CAPSENSE_SENSORS {0x1D,0x10} // port 0-{0,2,3,4} port 1-{4} -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/008-090107-TSEC.patch b/packages/u-boot/u-boot-1.3.2/boc01/008-090107-TSEC.patch deleted file mode 100644 index faa8a3a0be..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/008-090107-TSEC.patch +++ /dev/null @@ -1,157 +0,0 @@ -Index: u-boot-1.3.2/drivers/net/tsec.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.c 2008-03-09 16:20:02.000000000 +0100 -+++ u-boot-1.3.2/drivers/net/tsec.c 2009-01-07 15:09:40.000000000 +0100 -@@ -179,6 +179,12 @@ - priv->regs->maccfg1 |= MACCFG1_SOFT_RESET; - priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET); - -+ /* Init MACCFG2 */ -+ priv->regs->maccfg2 = MACCFG2_INIT_SETTINGS; -+ -+ /* Init ECNTRL */ -+ priv->regs->ecntrl = ECNTRL_INIT_SETTINGS; -+ - #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \ - && !defined(BITBANGMII) - miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write); -@@ -204,7 +210,7 @@ - /* Make sure the controller is stopped */ - tsec_halt(dev); - -- /* Init MACCFG2. Defaults to GMII */ -+ /* Init MACCFG2 */ - regs->maccfg2 = MACCFG2_INIT_SETTINGS; - - /* Init ECNTRL */ -@@ -868,7 +874,11 @@ - if(priv->phyinfo) - phy_run_commands(priv, priv->phyinfo->startup); - -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ priv->link = 1; -+#else - adjust_link(dev); -+#endif - - /* Enable Transmit and Receive */ - regs->maccfg1 |= (MACCFG1_RX_EN | MACCFG1_TX_EN); -@@ -1318,6 +1328,21 @@ - } - }; - -+/* a non-manageable PHY interface */ -+struct phy_info phy_info_null = { -+ 0, -+ "Non-manageable PHY", -+ 0, -+ (struct phy_cmd[]) { /* config */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* startup */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* shutdown */ -+ {miim_end,} -+ } -+}; - - uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv) - { -@@ -1473,6 +1498,10 @@ - */ - struct phy_info *get_phy_info(struct eth_device *dev) - { -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ debug("%s: Using non-manageable PHY interface\n", dev->name); -+ return &phy_info_null; -+#else - struct tsec_private *priv = (struct tsec_private *)dev->priv; - uint phy_reg, phy_ID; - int i; -@@ -1503,6 +1532,7 @@ - } - - return theInfo; -+#endif // CONFIG_TSEC_NON_MANAGEABLE_PHY - } - - /* Execute the given series of commands on the given device's -Index: u-boot-1.3.2/drivers/net/tsec.h -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.h 2008-03-09 16:20:02.000000000 +0100 -+++ u-boot-1.3.2/drivers/net/tsec.h 2009-01-07 15:09:40.000000000 +0100 -@@ -56,11 +56,11 @@ - #define MACCFG1_SYNCD_TX_EN 0x00000002 - #define MACCFG1_TX_EN 0x00000001 - --#define MACCFG2_INIT_SETTINGS 0x00007205 - #define MACCFG2_FULL_DUPLEX 0x00000001 - #define MACCFG2_IF 0x00000300 - #define MACCFG2_GMII 0x00000200 - #define MACCFG2_MII 0x00000100 -+#define MACCFG2_INIT_SETTINGS (0x00007005 | MACCFG2_MII) - - #define ECNTRL_INIT_SETTINGS 0x00001000 - #define ECNTRL_TBI_MODE 0x00000020 -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2009-01-07 15:09:39.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2009-01-07 15:11:17.000000000 +0100 -@@ -246,8 +246,8 @@ - #define CFG_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} - --#define CFG_NS16550_COM1 (CFG_IMMR+0x4500) --#define CFG_NS16550_COM2 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM1 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM2 (CFG_IMMR+0x4500) - - /* Use the HUSH parser */ - #define CFG_HUSH_PARSER -@@ -302,6 +302,7 @@ - * TSEC configuration - */ - #define CONFIG_TSEC_ENET /* TSEC ethernet support */ -+#define CONFIG_TSEC_NON_MANAGEABLE_PHY /* Non-manageable PHY interface */ - - #ifndef CONFIG_NET_MULTI - #define CONFIG_NET_MULTI 1 -@@ -313,12 +314,12 @@ - #define CONFIG_TSEC1_NAME "TSEC0" - #define CONFIG_TSEC2 1 - #define CONFIG_TSEC2_NAME "TSEC1" --#define TSEC1_PHY_ADDR 0x1c --#define TSEC2_PHY_ADDR 4 --#define TSEC1_FLAGS TSEC_GIGABIT --#define TSEC2_FLAGS TSEC_GIGABIT -+#define TSEC1_PHY_ADDR 0 //0x1c -+#define TSEC2_PHY_ADDR 0 //4 -+#define TSEC1_FLAGS TSEC_REDUCED //TSEC_GIGABIT -+#define TSEC2_FLAGS TSEC_REDUCED //TSEC_GIGABIT - #define TSEC1_PHYIDX 0 --#define TSEC2_PHYIDX 0 -+#define TSEC2_PHYIDX 1 //0 - - /* Options are: TSEC[0-1] */ - #define CONFIG_ETHPRIME "TSEC1" -@@ -472,8 +473,8 @@ - HRCWH_SW_WATCHDOG_DISABLE |\ - HRCWH_ROM_LOC_LOCAL_16BIT |\ - HRCWH_RL_EXT_LEGACY |\ -- HRCWH_TSEC1M_IN_RGMII |\ -- HRCWH_TSEC2M_IN_RGMII |\ -+ HRCWH_TSEC1M_IN_MII |\ -+ HRCWH_TSEC2M_IN_MII |\ - HRCWH_BIG_ENDIAN |\ - HRCWH_LALE_NORMAL) - -@@ -482,7 +483,7 @@ - #define CFG_WATCHDOG_VALUE 0xFFFF - - /* System IO Config */ --#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -+#define CFG_SICRH 0 //(SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ - #define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ - - #define CFG_HID0_INIT 0x000000000 diff --git a/packages/u-boot/u-boot-1.3.2/boc01/009-081212-EXIO.patch b/packages/u-boot/u-boot-1.3.2/boc01/009-081212-EXIO.patch deleted file mode 100644 index 9ea0b0594f..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/009-081212-EXIO.patch +++ /dev/null @@ -1,139 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -49,6 +49,7 @@ int misc_init_f(void) - { - uchar value; - uchar i; -+ ulong addr; - - #ifdef PRE_INIT_GPIO - value=PRE_INIT_GPIO; -@@ -84,6 +85,18 @@ int misc_init_f(void) - puts("GPIO: ready\n"); - #endif - -+#ifdef PRE_INIT_EXIO -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = PRE_INIT_EXIO; -+ udelay(1000); -+#endif -+ -+#ifdef INIT_EXIO -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = INIT_EXIO; -+ puts("EXIO: ready\n"); -+#endif -+ - return 0; - } - -Index: u-boot-1.3.2/common/cmd_exio.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_exio.c -@@ -0,0 +1,67 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+extern void init_exio(char value); -+ -+int do_exio (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ unsigned char ucExio; -+ ulong addr; -+ if (argc < 2) -+ goto usage; -+ -+ if (!strncmp(argv[1], "get", 3)) -+ { -+ addr = ADDR_EXIO; -+ ucExio=*((u_char *)addr); -+ printf("%s = 0x%02x\n",argv[0],ucExio); -+ } -+ else -+ { -+ ucExio = simple_strtoul (argv[1], NULL, 10); -+ -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = ucExio; -+ -+ printf("%s 0x%2x\n",argv[0],ucExio); -+ } -+ return 0; -+ -+usage : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+} /* do_gpio() */ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ exio, 2, 1, do_exio, -+ "exio - Extender io Output\n", -+ " - Set or clear extender io Output.\n" -+ "exio value - \n" -+); -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -52,6 +52,7 @@ COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o - COBJS-$(CONFIG_CMD_CAPSENSE) += cmd_capsense.o - COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o -+COBJS-$(CONFIG_CMD_EXIO) += cmd_exio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o - COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -374,6 +374,7 @@ - #define CONFIG_CMD_SPI - #define CONFIG_CMD_DTT - #define CONFIG_CMD_GPIO -+#define CONFIG_CMD_EXIO - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -415,6 +416,11 @@ - #define CONFIG_CAPSENSE_LEDS {0x02,0x0F} // port 0-{1} port 1-{0,1,2,3} - #define CONFIG_CAPSENSE_SENSORS {0x1D,0x10} // port 0-{0,2,3,4} port 1-{4} - -+/* Extender io */ -+#define ADDR_EXIO 0xFA000000 -+#define PRE_INIT_EXIO 0x18 -+#define INIT_EXIO 0x58 -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/010-081212-LCD.patch b/packages/u-boot/u-boot-1.3.2/boc01/010-081212-LCD.patch deleted file mode 100644 index 33a0c761f9..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/010-081212-LCD.patch +++ /dev/null @@ -1,541 +0,0 @@ -Index: u-boot-1.3.2/common/Bollore.xbm -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/Bollore.xbm -@@ -0,0 +1,174 @@ -+#define Bollore_width 128 -+#define Bollore_height 128 -+static unsigned char Bollore_bits[] = { -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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u-boot-1.3.2/common/cmd_lcd.c -@@ -0,0 +1,237 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+#include <NT7506.h> -+//Splash screen in xbm format -+#include "Bollore.xbm" -+ -+ -+#define DELAY 1 -+#define AEL 0x0F -+ -+ -+static void iowrite16(unsigned short value) -+{ -+ ulong addr; -+ unsigned short send; -+ send=value>>8; -+ send+=(value&0xFF)<<8; -+ addr = CFG_LCD_BASE; -+ -+ *((unsigned short *)addr)=send; -+} -+ -+static void NT7506_writeb_ctl(unsigned char value) -+{ -+ unsigned short svalue; -+ svalue=value<<8 | LCD_RSN | LCD_RST | LCD_ERDN | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+ svalue=value<<8 | LCD_RSN | LCD_RST | LCD_ERD | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+ -+} -+ -+static void NT7506_writeb_data(unsigned char value) -+{ -+ unsigned short svalue; -+ svalue=value<<8|LCD_RS |LCD_RST | LCD_ERD | LCD_BCKLIGH ; -+ iowrite16(svalue); -+ udelay(DELAY); -+ svalue=value<<8|LCD_RS |LCD_RST | LCD_ERDN | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+} -+ -+static void NT7506_set_yaddr(unsigned char y) -+{ -+ NT7506_writeb_ctl(NT_PAGE_ADDR+y); -+} -+ -+static void NT7506_set_xaddr(unsigned char x) -+{ -+ NT7506_writeb_ctl(NT_COL_MSB | (x >> 0x04) ); //Send high nibble -+ NT7506_writeb_ctl(NT_COL_LSB | (x & 0x0F) ); //Send low nibble -+} -+ -+static void ImageRota(unsigned char *src, unsigned char *dest, int w ,int h) -+{ -+ int i,j,bit,IndexRead; -+ char mask=0; -+ char bitvalue; -+ for(i=0;i<h/8;i++) -+ { -+ for(j=0;j<(w);j++) -+ { -+ -+ for(bit=0,IndexRead=(i*128)+(j/8);bit<8;bit++,IndexRead+=(w/8)) -+ { -+ mask=(1<<((j%8))); -+ bitvalue=(src[IndexRead]&mask)>>((j%8)); -+ dest[j+i*w]+=(bitvalue<<bit); -+ } -+ } -+ } -+} -+ -+ -+static void NT7506_print_splash(unsigned char *picture, char width, char height) -+{ -+ int i; -+ unsigned char imagerota[2048]; -+ int indeximage=0; -+ -+ int x,y,xfb,yfb; -+ char src[2048]; -+ if(width>128) -+ width=128; -+ if(height>128) -+ height=128; -+ -+ for(i=0;i<2048;i++) -+ imagerota[i]=0; -+ -+ ImageRota(picture,imagerota, width ,128); -+ -+ for(yfb=0;yfb<(height/8);yfb++) -+ { -+ for(xfb=0;xfb<width;xfb++) -+ { -+ src[xfb*16+yfb]=imagerota[indeximage++] ; -+ } -+ } -+ -+ for (y = 0; y < (height/8); y++) -+ { -+ NT7506_set_yaddr(y); -+ NT7506_set_xaddr(0); -+ -+ for (x = 0; x < width; x++) -+ { -+ NT7506_writeb_data(src[(x*(height/8))+y]); -+ NT7506_writeb_data(0x00); -+ } -+ NT7506_writeb_data((unsigned char)0); -+ } -+} -+ -+static void NT7506_init_lcd(char ael) -+{ -+ /* this resets the lcd*/ -+ iowrite16(LCD_RSTN | LCD_ERD | LCD_BCKLIGH); -+ udelay(100); -+ iowrite16(LCD_RST| LCD_ERD | LCD_BCKLIGH); -+ udelay(200); -+ /* Soft reset*/ -+ NT7506_writeb_ctl(NT_RESET); -+ /* Disable ICON display*/ -+ NT7506_writeb_ctl(NT_ICON|OFF); -+ /* Sets the duty ratio 1/128*/ -+ NT7506_writeb_ctl(NT_DUTY); NT7506_writeb_ctl(DUTY_1_128); -+ /* Sets reverse direction between RAM column address and segment driver*/ -+ NT7506_writeb_ctl(NT_ADC_REV); -+ NT7506_writeb_ctl(NT_SHL_NOR); -+ /* Enales the built in Oscillator circuit.*/ -+ NT7506_writeb_ctl(NT_OSC); -+ /* Set Initial row to 0*/ -+ NT7506_writeb_ctl(NT_COM0); NT7506_writeb_ctl(0); -+ /* Sets DC-DC*/ -+ NT7506_writeb_ctl(NT_DCDC|TIME6); -+ /* Selects resistance ratio of the internal resistor*/ -+ NT7506_writeb_ctl(NT_REG_RES|RES_7_2); -+ /* set Reference Voltage mode*/ -+ NT7506_writeb_ctl(NT_ELEC_VOL); NT7506_writeb_ctl(ael); -+ /* Selects LCD bias ratio*/ -+ NT7506_writeb_ctl(NT_BIAS|BIAS_1_11); -+ -+ NT7506_writeb_ctl(NT_DATA_DIR); NT7506_writeb_ctl(0); -+ NT7506_writeb_ctl(NT_FRC_PWM|PWM15); -+ /* Select power circuit functions */ -+ NT7506_writeb_ctl(NT_POWER|VC); -+ udelay(5000); -+ NT7506_writeb_ctl(NT_POWER|VC|VR); -+ udelay(5000); -+ NT7506_writeb_ctl(NT_POWER|VC|VR|VF); -+ udelay(5000); -+ /* Reverses the display status on LCD panel */ -+ NT7506_writeb_ctl(NT_REV_DISP|OFF); -+ /* Forces the whole LCD points to be turned on regardless of the contents of the display data RAM*/ -+ NT7506_writeb_ctl(NT_DISP|ON); -+ /* Set Initial Start Line Address */ -+ NT7506_writeb_ctl(NT_START_LINE); NT7506_writeb_ctl(0x00); -+} -+ -+ -+/**************************************************/ -+int do_lcd(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ char lcd_ael=AEL; -+ if(argc>1) -+ lcd_ael = simple_strtoul (argv[1], NULL, 10); -+ -+ if(lcd_ael>63) -+ lcd_ael=0x63; -+ -+ NT7506_init_lcd(lcd_ael); -+ NT7506_print_splash(Bollore_bits,Bollore_width,Bollore_height); -+ -+ return 0; -+} -+ -+U_BOOT_CMD( -+ lcd, 2, 1, do_lcd, -+ "lcd - Display splash screen on LCD\n", -+ "lcd\n" -+); -+ -+int do_backlight(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ if (!strncmp(argv[1], "on", 7)) -+ { -+ iowrite16(LCD_RSN | LCD_RST | LCD_ERD | LCD_BCKLIGH); -+ } -+ else -+ { -+ if (!strncmp(argv[1], "off", 7)) -+ { -+ iowrite16(LCD_RSN | LCD_RST | LCD_ERD | LCD_BCKLIGHN); -+ } -+ else -+ { -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+ } -+ } -+ return 0; -+} -+ -+U_BOOT_CMD( -+ backlight, 2, 1, do_backlight, -+ "backlight - Switch LCD backlight on/off\n", -+ "backlight on|off\n" -+); -+ -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -94,6 +94,7 @@ COBJS-$(CONFIG_CMD_STRINGS) += cmd_strin - COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o - COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o - COBJS-$(CONFIG_CMD_USB) += cmd_usb.o -+COBJS-$(CONFIG_CMD_LCD) +=cmd_lcd.o - COBJS-y += cmd_vfd.o - COBJS-y += command.o - COBJS-y += console.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -215,13 +215,13 @@ - #define CFG_LBLAWBAR1_PRELIM CFG_NAND_BASE - #define CFG_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ - --#define CFG_VSC7385_BASE 0xF0000000 -+#define CFG_LCD_BASE 0xF0000000 - --#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */ --#define CFG_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */ --#define CFG_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/ --#define CFG_LBLAWBAR2_PRELIM CFG_VSC7385_BASE/* Access window base at VSC7385 base */ --#define CFG_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */ -+//#define CONFIG_LCD /* LCD support */ -+#define CFG_BR2_PRELIM 0xf0001001 /* LCD Base address 16bits */ -+#define CFG_OR2_PRELIM 0xFFFF8FF7 /* LCD, 32kB bytes*/ -+#define CFG_LBLAWBAR2_PRELIM CFG_LCD_BASE/* Access window base at lcd base */ -+#define CFG_LBLAWAR2_PRELIM 0x8000000E /* Access window size 32k */ - - /* local bus read write buffer mapping */ - #define CFG_BR3_PRELIM 0xFA000801 /* map at 0xFA000000 */ -@@ -375,6 +375,7 @@ - #define CONFIG_CMD_DTT - #define CONFIG_CMD_GPIO - #define CONFIG_CMD_EXIO -+#define CONFIG_CMD_LCD - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -Index: u-boot-1.3.2/include/NT7506.h -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/include/NT7506.h -@@ -0,0 +1,71 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+ -+ -+//NT7506 Instructions -+#define NT_ICON 0xA2 -+#define NT_PAGE_ADDR 0xB0 -+#define NT_COL_MSB 0x10 -+#define NT_COL_LSB 0x00 -+#define NT_DISP 0xAE -+#define NT_START_LINE 0x40 -+#define NT_COM0 0x44 -+#define NT_DUTY 0x48 -+#define DUTY_1_128 0x80 -+#define NT_REV_DISP 0xA6 -+#define NT_POWER 0x28 -+#define VC 0x04 -+#define VR 0x02 -+#define VF 0x01 -+#define NT_DCDC 0x64 -+#define TIME6 0x03 -+#define NT_REG_RES 0x20 -+#define RES_7_2 0x07 -+#define NT_ELEC_VOL 0x81 -+#define NT_BIAS 0x50 -+#define BIAS_1_11 0x06 -+#define NT_ADC_NOR 0xA0 -+#define NT_ADC_REV 0xA1 -+#define NT_SHL_NOR 0xC0 -+#define NT_SHL_REV 0xC8 -+#define NT_OSC 0xAB -+#define NT_RESET 0xE2 -+#define NT_DATA_DIR 0xe8 -+#define NT_FRC_PWM 0x90 -+#define PWM15 0x03 -+ -+#define ON 0x01 -+#define OFF 0x00 -+ -+ -+//NT7506 Hardware -+#define LCD_RST 0x08 -+#define LCD_RSTN 0x00 -+#define LCD_BCKLIGH 0x04 -+#define LCD_BCKLIGHN 0x00 -+#define LCD_RS 0x02 -+#define LCD_RSN 0x00 -+#define LCD_ERD 0x01 -+#define LCD_ERDN 0x00 diff --git a/packages/u-boot/u-boot-1.3.2/boc01/011-081211-CMD_TEST.patch b/packages/u-boot/u-boot-1.3.2/boc01/011-081211-CMD_TEST.patch deleted file mode 100644 index f8a30faccf..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/011-081211-CMD_TEST.patch +++ /dev/null @@ -1,454 +0,0 @@ -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -95,6 +95,8 @@ COBJS-$(CONFIG_CMD_TERMINAL) += cmd_term - COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o - COBJS-$(CONFIG_CMD_USB) += cmd_usb.o - COBJS-$(CONFIG_CMD_LCD) +=cmd_lcd.o -+COBJS-$(CONFIG_CMD_FLTEST) += cmd_fltest.o -+COBJS-$(CONFIG_CMD_NANDTEST) += cmd_nandtest.o - COBJS-y += cmd_vfd.o - COBJS-y += command.o - COBJS-y += console.o -Index: u-boot-1.3.2/common/cmd_fltest.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_fltest.c -@@ -0,0 +1,198 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include <common.h> -+#include <command.h> -+ -+#define DEFAULT_RAM_ADDR 0x200000 -+static const ulong bitpattern[] = { -+ 0x11111111, /* single bit */ -+ 0x33333333, /* two adjacent bits */ -+ 0x77777777, /* three adjacent bits */ -+ 0x0F0F0F0F, /* four adjacent bits */ -+ 0x05050505, /* two non-adjacent bits */ -+ 0x15151515, /* three non-adjacent bits */ -+ 0x00550055, /* four non-adjacent bits */ -+ 0xaaaaaaaa, /* alternating 1/0 */ -+ }; -+ -+#define SECTOR_SIZE 0x10000 -+extern int cmd_get_data_size (char *arg, int default_size); -+extern flash_info_t flash_info[]; /* info for FLASH chips */ -+static void fill_ram(ulong pattern) -+{ -+ //fill ram with patern -+ ulong size=SECTOR_SIZE/4; -+ ulong ram, writeval; -+ char *s; -+ if ((s = getenv("loadaddr")) != NULL) -+ { -+ ram = simple_strtoul(s, NULL, 16); -+ } -+ else -+ { -+ ram=DEFAULT_RAM_ADDR; -+ } -+ writeval = pattern; -+ while (size-- > 0) -+ { -+ *((ulong *)ram) = (ulong )writeval; -+ ram += 4; -+ } -+ size=SECTOR_SIZE/4; -+ while (size-- > 0) -+ { -+ *((ulong *)ram) = (ulong )0xFFFFFFFF; -+ ram += 4; -+ } -+} -+ -+static int test_sector(ulong start,ulong patern) -+{ -+ int rc; -+ ulong addr1, addr2, count; -+ char *s; -+ if ((s = getenv("loadaddr")) != NULL) -+ { -+ addr1 = simple_strtoul(s, NULL, 16); -+ } -+ else -+ { -+ addr1=DEFAULT_RAM_ADDR; -+ } -+ rc = flash_write ((char *)addr1, start, SECTOR_SIZE); -+ if (rc != 0) -+ { -+ flash_perror (rc); -+ } -+ addr2 = start; -+ count=(SECTOR_SIZE/4); -+ while (count-- > 0) -+ { -+ ulong word1 = *(ulong *)addr1; -+ ulong word2 = *(ulong *)addr2; -+ if (word1 != word2) -+ { -+ printf("word at 0x%08lx (0x%08lx)!=patern (0x%08lx) count = %ld \n",addr2, word2,word1,count); -+ break; -+ } -+ addr1 += 4; -+ addr2 += 4; -+ } -+ return (0); -+} -+ -+int do_fltest ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+{ -+ ulong start, patern, nb_sector; -+ int i,prot=0; -+ flash_info_t *info = flash_info; -+ int idxtstptrn=0; -+ char forever=0; -+ -+ switch(argc) -+ { -+ case 1 : -+ start = 0; -+ nb_sector = info->sector_count-1; -+ patern=bitpattern[0]; -+ break; -+ case 2 : -+ start = 0; -+ nb_sector = info->sector_count-1; -+ patern=bitpattern[idxtstptrn]; -+ if (!strncmp(argv[1], "forever", 7)) -+ { -+ printf("Test nor flash forever\n"); -+ forever =1; -+ } -+ else -+ { -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+ } -+ break; -+ case 4 : -+ start = simple_strtoul(argv[1], NULL, 16); -+ nb_sector = simple_strtoul(argv[2], NULL, 16); -+ patern = simple_strtoul(argv[3], NULL, 16); -+ break; -+ -+ default : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+ break; -+ } -+ -+ if((info->sector_count-1)<(start+nb_sector)) -+ { -+ printf ("Usage:\n%s\nnot enought sector on this flash\n", cmdtp->usage); -+ return 1; -+ } -+ -+ for (i = start; i < (start+nb_sector); ++i) -+ { -+ if (info->protect[i]) -+ { -+ prot++; -+ } -+ } -+ if (prot) -+ { -+ printf ("- Warning: %d protected sectors will not be tested!\n", prot); -+ } -+ do -+ { -+ printf("Test start at sector[%d]=%08lX end at sector[%d]=%08lX with patern=%08lX\n",start,info->start[start],start+nb_sector,info->start[start+nb_sector],patern); -+ //Erasing flash -+ flash_erase (info, start, start+nb_sector); -+ for (i = start; i < (start+nb_sector); ++i) -+ { -+ if(!info->protect[i]) -+ { -+ printf("\rtest at sector[%d]=%08lX with patern=%08lX\t",i,info->start[i],patern); -+ //fill ram with patern -+ fill_ram(patern); -+ //test flash sector -+ test_sector(info->start[i],patern); -+ } -+ } -+ printf("\r \n"); -+ //change patern if test forever -+ idxtstptrn++; -+ if(idxtstptrn>7) -+ { -+ idxtstptrn=0; -+ } -+ patern=bitpattern[idxtstptrn]; -+ prot=0; -+ }while(forever); -+ return 0; -+} -+U_BOOT_CMD( -+ fltest, 4, 1, do_fltest, -+ "fltest - flash memory test\n", -+ "fltest start end patern\n - test flash memory from sector start to sector end with partern patern \n" -+ "fltest\n - test entire flash memory\n" -+ "fltest forever\n - loop test entire flash memory\n" -+); -Index: u-boot-1.3.2/common/cmd_nandtest.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_nandtest.c -@@ -0,0 +1,219 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+#include <common.h> -+#include <command.h> -+#include <nand.h> -+#define DEFAULT_RAM_ADDR 0x200000 -+static const ulong bitpattern[] = { -+ 0x11111111, /* single bit */ -+ 0x33333333, /* two adjacent bits */ -+ 0x77777777, /* three adjacent bits */ -+ 0x0F0F0F0F, /* four adjacent bits */ -+ 0x05050505, /* two non-adjacent bits */ -+ 0x15151515, /* three non-adjacent bits */ -+ 0x00550055, /* four non-adjacent bits */ -+ 0xaaaaaaaa, /* alternating 1/0 */ -+ }; -+ -+static void fill_ram(nand_info_t *nand,ulong pattern) -+{ -+ //fill ram with patern -+ ulong size=nand->erasesize/4; -+ ulong ram, writeval; -+ char *s; -+ if ((s = getenv("loadaddr")) != NULL) -+ { -+ ram = simple_strtoul(s, NULL, 16); -+ } -+ else -+ { -+ ram=DEFAULT_RAM_ADDR; -+ } -+ -+ writeval = pattern; -+ -+ while (size-- > 0) -+ { -+ *((ulong *)ram) = (ulong )writeval; -+ ram += 4; -+ } -+ size=nand->erasesize/4; -+ while (size-- > 0) -+ { -+ *((ulong *)ram) = (ulong )0xFFFFFFFF; -+ ram += 4; -+ } -+} -+ -+static int test_sector(nand_info_t *nand,ulong start,ulong patern) -+{ -+ int rc; -+ ulong addr1, addr2, count; -+ char *s; -+ if ((s = getenv("loadaddr")) != NULL) -+ { -+ addr1 = simple_strtoul(s, NULL, 16); -+ } -+ else -+ { -+ addr1=DEFAULT_RAM_ADDR; -+ } -+ nand_write_options_t opts; -+ memset(&opts, 0, sizeof(opts)); -+ opts.buffer = (u_char*) addr1; -+ opts.length = nand->erasesize-sizeof(long); -+ opts.offset = start; -+ opts.pad = 1; -+ opts.blockalign = 1; -+ opts.quiet = 1; -+ rc = nand_write_opts(nand, &opts); -+ if (rc != 0) -+ { -+ printf(" %d bytes written:ERROR \n", nand->erasesize); -+ } -+ /* read */ -+ nand_read_options_t optsr; -+ memset(&optsr, 0, sizeof(optsr)); -+ optsr.buffer = (u_char*) (addr1+nand->erasesize); -+ optsr.length = nand->erasesize-sizeof(long); -+ optsr.offset = start; -+ optsr.quiet = 1; -+ rc = nand_read_opts(nand, &optsr); -+ if (rc != 0) -+ { -+ printf(" %d bytes read :ERROR \n", nand->erasesize); -+ } -+ addr2 = addr1+nand->erasesize; -+ count=((nand->erasesize-sizeof(long))/4); -+ while (count-- > 0) -+ { -+ ulong word1 = *(ulong *)addr1; -+ ulong word2 = *(ulong *)addr2; -+ if (word1 != word2) -+ { -+ printf("word at 0x%08lx (0x%08lx)!=patern (0x%08lx) count = %ld \n",addr2, word2,word1,count); -+ break; -+ } -+ addr1 += 4; -+ addr2 += 4; -+ } -+ return (0); -+} -+ -+int do_nandtest ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -+{ -+ ulong start, patern, nb_sector,sector; -+ int prot=0; -+ int idxtstptrn=0; -+ char forever=0; -+ int ret; -+ nand_info_t *nand; -+ nand = &nand_info[nand_curr_device]; -+ switch(argc) -+ { -+ case 1 : -+ start = 0; -+ nb_sector = (nand->size/nand->erasesize); -+ patern=bitpattern[0]; -+ break; -+ -+ case 2 : -+ start = 0; -+ nb_sector = (nand->size/nand->erasesize); -+ patern=bitpattern[idxtstptrn]; -+ if (!strncmp(argv[1], "forever", 7)) -+ { -+ printf("Test nor flash forever\n"); -+ forever =1; -+ } -+ else -+ { -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+ } -+ break; -+ case 4 : -+ start = simple_strtoul(argv[1], NULL, 16); -+ nb_sector = simple_strtoul(argv[2], NULL, 16); -+ patern = simple_strtoul(argv[3], NULL, 16); -+ break; -+ -+ default : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+ break; -+ } -+ -+ -+ if((nb_sector+start) > (nand->size/nand->erasesize)) -+ { -+ printf ("Not enought sector on this nand flash\n"); -+ nb_sector=(nand->size/nand->erasesize)-start; -+ } -+ do -+ { -+ printf("Test start at sector[%d]=%08lX end at sector[%d]=%08lX with patern=%08lX\n",start,start*nand->erasesize ,start+nb_sector,(start+nb_sector)*nand->erasesize ,patern); -+ for (sector = start; sector < nb_sector; sector ++ ) -+ { -+ printk("\rtest sector %d end at %d with patern=%08lX\t",sector,nb_sector-1,patern); -+ //fill ram with patern -+ fill_ram(nand,patern); -+ //test flash sector -+ if(nand_block_isbad(nand, sector*nand->erasesize)) -+ { -+ printf("Bad block\n", nand); -+ } -+ else -+ { -+ //Erasing nand flash -+ nand_erase_options_t opts; -+ memset(&opts, 0, sizeof(opts)); -+ opts.offset = sector*nand->erasesize; -+ opts.length = nand->erasesize; -+ opts.quiet = 1; -+ ret = nand_erase_opts(nand, &opts); -+ //Test nand sector -+ test_sector(nand,sector*nand->erasesize,patern); -+ } -+ } -+ printf("\r \n"); -+ //change patern if test forever -+ idxtstptrn++; -+ if(idxtstptrn>7) -+ { -+ idxtstptrn=0; -+ } -+ patern=bitpattern[idxtstptrn]; -+ prot=0; -+ }while(forever); -+ return 0; -+} -+U_BOOT_CMD( -+ nandtest, 4, 1, do_nandtest, -+ "nandtest- nand flash memory test\n", -+ "nandtest start nb_sector patern\n - test nbsector sector(s) nand flash memory at sector start with partern patern \n" -+ "nandtest\n - test entire nand flash memory\n" -+ "nandtest forever\n - loop test entire nand flash memory\n" -+); -+ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -376,6 +376,9 @@ - #define CONFIG_CMD_GPIO - #define CONFIG_CMD_EXIO - #define CONFIG_CMD_LCD -+#define CONFIG_CMD_FLTEST -+#define CONFIG_CMD_NANDTEST -+ - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV diff --git a/packages/u-boot/u-boot-1.3.2/boc01/012-081209-BUG_SETENV.patch b/packages/u-boot/u-boot-1.3.2/boc01/012-081209-BUG_SETENV.patch deleted file mode 100644 index 7c5b2e2123..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/012-081209-BUG_SETENV.patch +++ /dev/null @@ -1,26 +0,0 @@ -Index: u-boot-1.3.2/common/cmd_nvedit.c -=================================================================== ---- u-boot-1.3.2.orig/common/cmd_nvedit.c 2008-12-09 16:40:17.000000000 +0100 -+++ u-boot-1.3.2/common/cmd_nvedit.c 2008-12-09 16:40:49.000000000 +0100 -@@ -353,6 +353,21 @@ - return 0; - } - -+#if defined(CONFIG_HAS_ETH1) -+ if (strcmp(argv[1],"eth1addr") == 0) { -+ char *s = argv[2]; /* always use only one arg */ -+ char *e; -+ for (i=0; i<6; ++i) { -+ bd->bi_enet1addr[i] = s ? simple_strtoul(s, &e, 16) : 0; -+ if (s) s = (*e) ? e+1 : e; -+ } -+#ifdef CONFIG_NET_MULTI -+ eth_set_enetaddr(1, argv[2]); -+#endif -+ return 0; -+ } -+#endif -+ - if (strcmp(argv[1],"ipaddr") == 0) { - char *s = argv[2]; /* always use only one arg */ - char *e; diff --git a/packages/u-boot/u-boot-1.3.2/boc01/013-090206-FIX_OOB_8BITS_LARGEPAGE_NAND.patch b/packages/u-boot/u-boot-1.3.2/boc01/013-090206-FIX_OOB_8BITS_LARGEPAGE_NAND.patch deleted file mode 100644 index 803b46d8e9..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/013-090206-FIX_OOB_8BITS_LARGEPAGE_NAND.patch +++ /dev/null @@ -1,29 +0,0 @@ -Index: u-boot-1.3.2/drivers/mtd/nand/nand_bbt.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/mtd/nand/nand_bbt.c 2008-03-09 16:20:02.000000000 +0100 -+++ u-boot-1.3.2/drivers/mtd/nand/nand_bbt.c 2009-02-06 14:50:35.000000000 +0100 -@@ -914,10 +914,11 @@ - .pattern = scan_ff_pattern - }; - -+//Samsung makes sure that either the 1st or 2nd page of every initial invalid block has non-FFh data at the column address of 2048. - static struct nand_bbt_descr largepage_memorybased = { - .options = 0, - .offs = 0, -- .len = 2, -+ .len = 1, - .pattern = scan_ff_pattern - }; - -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2009-02-06 15:42:07.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2009-02-06 15:42:45.000000000 +0100 -@@ -205,6 +205,7 @@ - | BR_MS_FCM /* MSEL = FCM */ \ - | BR_V ) /* valid */ - #define CFG_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \ -+ | OR_FCM_PGS \ - | OR_FCM_CSCT \ - | OR_FCM_CST \ - | OR_FCM_CHT \ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/014-081211-BOOT_RESCUE.patch b/packages/u-boot/u-boot-1.3.2/boc01/014-081211-BOOT_RESCUE.patch deleted file mode 100644 index d2ebdef772..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/014-081211-BOOT_RESCUE.patch +++ /dev/null @@ -1,48 +0,0 @@ -Index: u-boot-1.3.2/common/main.c -=================================================================== ---- u-boot-1.3.2.orig/common/main.c -+++ u-boot-1.3.2/common/main.c -@@ -39,6 +39,7 @@ - #endif - - #include <post.h> -+#include <gpio.h> - - #ifdef CONFIG_SILENT_CONSOLE - DECLARE_GLOBAL_DATA_PTR; -@@ -377,6 +378,15 @@ void main_loop (void) - } - else - #endif /* CONFIG_BOOTCOUNT_LIMIT */ -+#ifdef CONFIG_ENV_BOOTRESCUE -+ if ( gpio_get(GPIO_RED_BUTTON) ) { -+ printf ("Red button pressed: booting in rescue mode.\n"); -+ s = getenv (CONFIG_ENV_BOOTRESCUE); -+ if ( !s ) -+ printf ("Warning: environment variable '" CONFIG_ENV_BOOTRESCUE "' not set. Giving up rescue boot.\n"); -+ } -+ else -+#endif - s = getenv ("bootcmd"); - - debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>"); -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -406,6 +406,7 @@ - #define PRE_INIT_GPIO 0x28 - #define INIT_GPIO 0x08 - #define MAX_GPIO_OUT 7 -+#define GPIO_RED_BUTTON 7 - - /* Digital Thermometer and Thermostat */ - #define CONFIG_DTT_LM73 1 -@@ -559,6 +560,7 @@ - * Environment Configuration - */ - #define CONFIG_ENV_OVERWRITE -+#define CONFIG_ENV_BOOTRESCUE "bootrescue" - - #define CONFIG_ETHADDR 00:E0:0C:00:95:01 - #define CONFIG_HAS_ETH1 diff --git a/packages/u-boot/u-boot-1.3.2/boc01/015-090205-EMC.patch b/packages/u-boot/u-boot-1.3.2/boc01/015-090205-EMC.patch deleted file mode 100644 index afc43c47ed..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/015-090205-EMC.patch +++ /dev/null @@ -1,31 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -135,8 +135,9 @@ void pci_init_board(void) - struct pci_region *reg[] = { pci_regions }; - int warmboot; - -- /* Enable all 3 PCI_CLK_OUTPUTs. */ -- clk->occr |= 0xe0000000; -+ /* Enable PCI_CLK_OUTPUT 1 only. -+ Disable others for better EMC footprint. */ -+ clk->occr = (clk->occr & 0x1fffffff) | OCCR_PCICOE1; - - /* - * Configure PCI Local Access Windows -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -133,8 +133,8 @@ - #define CFG_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 - /*0x02000000*/ - #define CFG_DDRCDR_VALUE ( DDRCDR_EN \ -- | DDRCDR_PZ_NOMZ \ -- | DDRCDR_NZ_NOMZ \ -+ | DDRCDR_PZ_MAXZ \ -+ | DDRCDR_NZ_MAXZ \ - | DDRCDR_M_ODR ) - - /* diff --git a/packages/u-boot/u-boot-1.3.2/boc01/016-090209-PM.patch b/packages/u-boot/u-boot-1.3.2/boc01/016-090209-PM.patch deleted file mode 100644 index 940e4ae40c..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/016-090209-PM.patch +++ /dev/null @@ -1,56 +0,0 @@ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -60,7 +60,7 @@ - * to access the PMC registers, unless a JTAG debugger is - * connected, or some resistor modifications are made. - */ --#define CFG_8313ERDB_BROKEN_PMC 1 -+#undef CFG_8313ERDB_BROKEN_PMC - - #define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ - #define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -30,6 +30,7 @@ - #include <mpc83xx.h> - #include <spi.h> - #include <gpio.h> -+#include <asm/processor.h> - - DECLARE_GLOBAL_DATA_PTR; - -@@ -39,7 +40,29 @@ int board_early_init_f(void) - volatile immap_t *im = (immap_t *)CFG_IMMR; - - if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) -- gd->flags |= GD_FLG_SILENT; -+ { -+ volatile immap_t *immap = (immap_t *) CFG_IMMR; -+ ulong msr; -+ /* Interrupts and MMU off */ -+ __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); -+ -+ msr &= ~( MSR_EE | MSR_IR | MSR_DR); -+ __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); -+ -+ /* enable Reset Control Reg */ -+ immap->reset.rpr = 0x52535445; -+ __asm__ __volatile__ ("sync"); -+ __asm__ __volatile__ ("isync"); -+ -+ /* confirm Reset Control Reg is enabled */ -+ while(!((immap->reset.rcer) & RCER_CRE)); -+ -+ udelay(200); -+ -+ /* perform reset, only one bit */ -+ immap->reset.rcr = RCR_SWHR; -+ } -+ - #endif - - return 0; |