diff options
author | Michael Lauer <mickey@vanille-media.de> | 2007-12-28 13:10:28 +0000 |
---|---|---|
committer | Michael Lauer <mickey@vanille-media.de> | 2007-12-28 13:10:28 +0000 |
commit | be3e650d031916b132b4cef9d19e7844cca3440b (patch) | |
tree | 96dea5f2866a9c43bee966b9d01753467f19a9a3 /packages/u-boot/u-boot-1.1.4 | |
parent | 518fac47b16e548ace1e23d1bc6f4a38b44670bb (diff) |
rename uboot directory for more consistency
Diffstat (limited to 'packages/u-boot/u-boot-1.1.4')
16 files changed, 1741 insertions, 0 deletions
diff --git a/packages/u-boot/u-boot-1.1.4/.mtn2git_empty b/packages/u-boot/u-boot-1.1.4/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/.mtn2git_empty diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-autoscript.patch b/packages/u-boot/u-boot-1.1.4/u-boot-autoscript.patch new file mode 100644 index 0000000000..1864b4494e --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-autoscript.patch @@ -0,0 +1,12 @@ +--- u-boot-1.1.2/common/cmd_autoscript.c ++++ u-boot-1.1.2/common/cmd_autoscript.c +@@ -110,8 +110,8 @@ + return 1; + } + +- while (*len_ptr++); ++ do { len_ptr++; } while (!(*len_ptr)); + + /* make sure cmd is null terminated */ + memmove (cmd, (char *)len_ptr, len); + *(cmd + len) = 0; diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-base.patch b/packages/u-boot/u-boot-1.1.4/u-boot-base.patch new file mode 100644 index 0000000000..d866c1c26e --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-base.patch @@ -0,0 +1,913 @@ +--- a/MAKEALL ++++ a/MAKEALL +@@ -146,8 +146,8 @@ + + LIST_pxa=" \ + adsvix cerf250 cradle csb226 \ +- innokom lubbock pxa255_idp wepep250 \ +- xaeniax xm250 xsengine \ ++ gumstix innokom lubbock pxa255_idp \ ++ wepep250 xaeniax xm250 xsengine \ + " + + LIST_ixp="ixdp425" +--- a/Makefile ++++ a/Makefile +@@ -121,7 +121,6 @@ + # The "tools" are needed early, so put this first + # Don't include stuff already done in $(LIBS) + SUBDIRS = tools \ +- examples \ + post \ + post/cpu + .PHONY : $(SUBDIRS) +@@ -1078,6 +1077,9 @@ + csb226_config : unconfig + @./mkconfig $(@:_config=) arm pxa csb226 + ++gumstix_config : unconfig ++ @./mkconfig $(@:_config=) arm pxa gumstix ++ + innokom_config : unconfig + @./mkconfig $(@:_config=) arm pxa innokom + +--- a/board/gumstix/Makefile ++++ a/board/gumstix/Makefile +@@ -0,0 +1,47 @@ ++# ++# (C) Copyright 2004 ++# Craig Hughes, Gumstix Inc, <craig@gumstix.com> ++# ++# See file CREDITS for list of people who contributed to this ++# project. ++# ++# This program is free software; you can redistribute it and/or ++# modify it under the terms of the GNU General Public License as ++# published by the Free Software Foundation; either version 2 of ++# the License, or (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++# MA 02111-1307 USA ++# ++ ++include $(TOPDIR)/config.mk ++ ++LIB = lib$(BOARD).a ++ ++OBJS := gumstix.o ++SOBJS := memsetup.o ++ ++$(LIB): $(OBJS) $(SOBJS) ++ $(AR) crv $@ $^ ++ ++clean: ++ rm -f $(SOBJS) $(OBJS) ++ ++distclean: clean ++ rm -f $(LIB) core *.bak .depend ++ ++######################################################################### ++ ++.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) ++ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ ++ ++-include .depend ++ ++######################################################################### +--- a/board/gumstix/config.mk ++++ a/board/gumstix/config.mk +@@ -0,0 +1,13 @@ ++# ++# This is config used for compilation of Gumstix sources ++# ++# You might change location of U-Boot in memory by setting right TEXT_BASE. ++# This allows for example having one copy located at the end of ram and stored ++# in flash device and later on while developing use other location to test ++# the code in RAM device only. ++# ++ ++TEXT_BASE = 0xA3F00000 ++ifeq ($(GUMSTIX_400MHZ),y) ++ PLATFORM_CPPFLAGS += -DCONFIG_GUMSTIX_CPUSPEED_400 ++endif +--- a/board/gumstix/early_refresh.S ++++ a/board/gumstix/early_refresh.S +@@ -0,0 +1,50 @@ ++#define COTULLA_CP15_B1_VAL 0x69052903 ++ /* Workaround for early termination of SDRAM autorefresh on exit from ++ processor's sleep state in B1 stepping of XPA250/210. (sighting 27004) ++ Need first forced refresh within 8 usec. ++ ++ - Code snippet received from validation team, slightly modified ++ ++ Notes: - MMU assumed to be inactive at this time, so use physical addresses ++ - Eboot didn't boot on A1 stepping without the leading exclusion, ++ so the core code must be restricted to B1 only. ++ */ ++ ++ mrc p15, 0, r9, c0, c0, 0 @ Grab CPU ID ++ ldr r3, =COTULLA_CP15_B1_VAL @ Load the B1 CPU ID value ++ cmp r9, r3 ++ bne EARLY_REFRESH_DONE ++ ++ @ Eboot loads BIN image into RAM, ++ @ turns off the MMU and then jumps here. ++ @ If we're already executing from RAM, don't mess with it ++ ++ mov r0, #0x400000 @ Just at the end of boot device addressing space ++ cmp r0, pc @ Are we executing from boot flash space? ++ bls EARLY_REFRESH_DONE @ if outside that space, skip this. ++ ++ ++ /* ++ Need to set MDREFR:DRI field to 0 for this to work. Side effect is ++ picking the MEMCLK:SDCLK ratio. The specified value (0x038FF000) ++ sets that ratio as 2:1. ++ This corresponds to the defaults after reset, including sleep reset. ++ 0x038ff000 == MDREFR_K2FREE | MDREFR_K1FREE | MDREFR_K0FREE | ++ MDREFR_K2DB2 | MDREFR_K2RUN | ++ MDREFR_K1DB2 | MDREFR_K1RUN | MDREFR_E1PIN | ++ MDREFR_K0DB2 | MDREFR_K0RUN | MDREFR_E0PIN ++ */ ++ ++ ldr r0, =0X48000004 @ Memory controller base physical addr+ REFR Offset. ++ mov r1, #0x03800000 ++ orr r1, r1, #0x000FF000 ++ str r1, [r0] ++ ++ mov r0, #CFG_DRAM_BASE ++ ldr r1, [r0] @ CAUSES the 1st row refresh to all partitions ++ mov r2, #0x2000 @ 8k loo ++1: ++ ldr r1, [r0] @ CAUSES a row refresh to all partitions ++ subs r2, r2, #0x1 ++ bpl 1b @ while >= 0 ++EARLY_REFRESH_DONE: +--- a/board/gumstix/gumstix.c ++++ a/board/gumstix/gumstix.c +@@ -0,0 +1,134 @@ ++/* ++ * Copyright (C) 2004 Gumstix, Inc. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * Written by Craig Hughes <craig@gumstix.com> ++ * ++ */ ++ ++#include <common.h> ++#include <asm/arch/pxa-regs.h> ++ ++int board_init( void ){ ++ DECLARE_GLOBAL_DATA_PTR; ++ ++ gd->bd->bi_arch_number = 373; ++ gd->bd->bi_boot_params = 0xa0000100; ++ ++ PSSR = 0x20; ++ ++ GPDR1 = CFG_GPDR1_VAL; ++ GAFR1_L = CFG_GAFR1_L_VAL; ++ ++ return 0; ++} ++ ++int dram_init( void ){ ++ DECLARE_GLOBAL_DATA_PTR; ++ ++#if ( CONFIG_NR_DRAM_BANKS > 0 ) ++ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; ++ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; ++#endif ++#if ( CONFIG_NR_DRAM_BANKS > 1 ) ++ gd->bd->bi_dram[1].start = PHYS_SDRAM_2; ++ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; ++#endif ++#if ( CONFIG_NR_DRAM_BANKS > 2 ) ++ gd->bd->bi_dram[2].start = PHYS_SDRAM_3; ++ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; ++#endif ++#if ( CONFIG_NR_DRAM_BANKS > 3 ) ++ gd->bd->bi_dram[3].start = PHYS_SDRAM_4; ++ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; ++#endif ++ ++ return 0; ++} ++ ++extern flash_info_t flash_info[]; /* info for FLASH chips */ ++ ++static u8 system_serial[8]; ++ ++void get_board_serial(struct tag_serialnr *serialnr) ++{ ++ serialnr->high = (system_serial[0]<<24) + (system_serial[1]<<16) + (system_serial[2]<<8) + system_serial[3]; ++ serialnr->low = (system_serial[4]<<24) + (system_serial[5]<<16) + (system_serial[6]<<8) + system_serial[7]; ++} ++ ++/* ++ * This hash function converts a structured 64-bit number to an unstructured, more bit-random 64-bit number. ++ * The purpose is to provide more randomness for each bit of the system serial number, since we're going to ++ * be using some of its bits (by extraction) as the varying part of an ethernet MAC. So more random bits = ++ * less chance of collision ++ * ++ * The has algorithm is basically going to work by looping through each bit in the incoming number. If that bit ++ * is set, then we'll XOR our result with a bitmask; if not, then we leave the result and continue the loop. ++ * Each time through the loop, we rotate the bitmask by one bit position, so that each bit of the incoming number ++ * will affect half of the bits of the result, but which bits it modifies are unique to that incoming bit position ++ */ ++void gumstix_serial_hash(u8 *buf) ++{ ++ unsigned int bit_number,byte; ++ // Starting bitmask is 0b0101001100001111000000001111111100000000000000001111111111111111 ++ u8 xor_mask[] = { 0x53, 0x0F, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0xFF }; ++ ++ u8 result[8]; ++ ++ // Loop through all 64 bits ++ for(bit_number=0; bit_number<64; bit_number++) ++ { ++ // If the given bit is set in the incoming buffer ++ if(buf[bit_number/8] & (1 << (bit_number % 8))) ++ { ++ // XOR the masked bits of the result ++ for(byte=0;byte<8;byte++) result[byte] ^= xor_mask[byte]; ++ } ++ ++ // Now rotate the bitmask ++ for(byte=0;byte<8;byte++) ++ { ++ // Shift the byte up by one bit ++ xor_mask[byte] = xor_mask[byte]<<1; ++ // Take the most significant bit of the previous byte and tack that on the bottom ++ // Special case for byte==0 when we take the MSB of the top byte instead ++ xor_mask[byte] |= xor_mask[(byte == 0 ? 7 : byte-1)]>>7; ++ } ++ } ++ ++ // Copy result out ++ for(byte=0;byte<8;byte++) buf[byte]=result[byte]; ++} ++ ++int misc_init_r(void) ++{ ++ unsigned char serial[17]; ++ ++ flash_read_user_serial(flash_info, (void *)system_serial, 0, 8); ++ if(0xff == (system_serial[0] & system_serial[1] & system_serial[2] & system_serial[3] & ++ system_serial[4] & system_serial[5] & system_serial[6] & system_serial[7])) ++ { ++ // User serial number is all ones, so use the factory serial number ++ flash_read_factory_serial(flash_info, (void *)system_serial, 0, 8); ++ gumstix_serial_hash(system_serial); ++ } ++ ++ sprintf(serial,"%02lX%02lX%02lX%02lX%02lX%02lX%02lX%02lX",system_serial[0],system_serial[1],system_serial[2],system_serial[3], ++ system_serial[4],system_serial[5],system_serial[6],system_serial[7]); ++ ++ setenv("serial#",serial); ++} +--- a/board/gumstix/memsetup.S ++++ a/board/gumstix/memsetup.S +@@ -0,0 +1,229 @@ ++#include <config.h> ++#include <version.h> ++#include <asm/arch/pxa-regs.h> ++ ++ ++.macro CPWAIT ++ mrc p15,0,r0,c2,c0,0 ++ mov r0,r0 ++ sub pc,pc,#4 ++.endm ++ ++ ++.globl lowlevel_init ++lowlevel_init: ++ ++ ++ cmp pc, #0xa0000000 /** test if we're in SDRAM **/ ++ bhi end_of_memsetup /** if we are, then jump **/ ++ ++ /* First, setup GPIOs */ ++ ++ ldr r0, =GPSR0 ++ ldr r1, =CFG_GPSR0_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPSR1 ++ ldr r1, =CFG_GPSR1_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPSR2 ++ ldr r1, =CFG_GPSR2_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPCR0 ++ ldr r1, =CFG_GPCR0_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPCR1 ++ ldr r1, =CFG_GPCR1_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPCR2 ++ ldr r1, =CFG_GPCR2_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPDR0 ++ ldr r1, =CFG_GPDR0_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPDR1 ++ ldr r1, =CFG_GPDR1_VAL ++ str r1, [r0] ++ ++ ldr r0, =GPDR2 ++ ldr r1, =CFG_GPDR2_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR0_L ++ ldr r1, =CFG_GAFR0_L_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR0_U ++ ldr r1, =CFG_GAFR0_U_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR1_L ++ ldr r1, =CFG_GAFR1_L_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR1_U ++ ldr r1, =CFG_GAFR1_U_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR2_L ++ ldr r1, =CFG_GAFR2_L_VAL ++ str r1, [r0] ++ ++ ldr r0, =GAFR2_U ++ ldr r1, =CFG_GAFR2_U_VAL ++ str r1, [r0] ++ ++ ldr r0, =PSSR ++ ldr r1, =CFG_PSSR_VAL ++ str r1, [r0] ++ ++ ++ /* The procedure below uses sample code generated by the Intel PXA250 Memory ++ * Configuration Tool [http://appzone.intel.com/pcg/pxa250/memory/] which has ++ * then been modified manually while following the documentation in ++ * "Intel PXA255 Process Developer's Manual" [order #278693-002] ++ * Chapter 6.11 - Hardware, Watchdog, or Sleep Reset Operation */ ++ ++ /* Step 1: After hardware reset, complete a power-on wait of 200us to allow clocks to stabilize */ ++ ++ ldr r3, =OSCR /* reset the OS Timer Count to zero */ ++ mov r2, #0 ++ str r2, [r3] ++ ldr r4, =0x300 /* really 0x2E1 is about 200usec, so 0x300 should be plenty */ ++10: ++ ldr r2, [r3] ++ cmp r4, r2 ++ bgt 10b ++ ++ /* Step 1a: Write MSC0, MSC1, MSC2 */ ++ ldr r3, =MSC0 /* Configures /CS0 and /CS1 */ ++ ldr r2, =0x128C26AB /* Generated value */ ++ str r2, [r3] ++ ldr r2, [r3] /* the MSC register should be read after it is written with */ ++ /* a new value before an access to the memory is attempted. */ ++ /* (see MSC section of manual) */ ++ ldr r3, =MSC1 /* /CS2 and /CS3 */ ++ ldr r2, =0x0000128C /* Generated value */ ++ str r2, [r3] ++ ldr r2, [r3] ++ ++ /* Step 1b: Write MECR, MCMEM0, MCMEM1, MCATT0, MCATT1, MCIO0, MCIO1 (Skip on gumstix) */ ++ /* Step 1c: Write MDREFR:K0RUN and MDREFR:E0PIN. Configure MDREFR:K0DB2. Retain ++ * the current values of MDREFR:APD and MDREFR:SLFRSH. MDREFR:DRI must ++ * contain a valid value. Deassert MDREFR:KxFREE. (Skip on gumstix) */ ++ ++ ldr r3, =MDREFR ++ ldr r2, [r3] /* read MDREFR value */ ++ ++ ldr r1, =0xfff ++ bic r2, r2, r1 /* Clear DRI -- INTEL TOOL LEAVES THIS STEP OUT!! */ ++ orr r2, r2, #0x018 /* configure a valid SDRAM Refresh Interval (DRI) */ ++ str r2, [r3] ++ ++ /* Step 2: Configure Synchronous Static memory (Skip on gumstix) */ ++ ++ /* Step 4: In systems that contain SDRAM, transition the SDRAM controller through the following state sequence: ++ * a. self-refresh ++ * b. power-down ++ * c. PWRDNX ++ * d. NOP */ ++ ++ orr r2, r2, #0x00010000 /* assert K1RUN for SDCLK1 */ ++ bic r2, r2, #0x000A4000 /* clear K0DB2, K1DB2 and K2DB2 */ ++ str r2, [r3] /* change from "self-refresh and clock-stop" to "self-refresh" state */ ++ ++ bic r2, r2, #0x00400000 /* clear SLFRSH bit field */ ++ str r2, [r3] /* change from "self-refresh" to "Power-down" state */ ++ ++ orr r2, r2, #0x00008000 /* set the E1PIN bit field */ ++ str r2, [r3] /* change from "Power-down" to "PWRDNX" state */ ++ ++ nop /* no action is required to change from "PWRDNX" to "NOP" state */ ++ ++ /* Step 4f: Write MDCNFG (with enable bits deasserted), MDCNFG:DE3:2,1:0 set to 0. */ ++ ++ ldr r3, =MDCNFG /* Load the SDRAM Configuration register. Must not be enabled yet. */ ++ ldr r2, =0x000019C8 /* Value from Intel tool */ ++ str r2, [r3] /* Write to MDCNFG register */ ++ ++ /* Step 5: For systems that contain SDRAM, wait a specified NOP power-up waiting period required by ++ * the SDRAMs to ensure the SDRAMs receive a stable clock with a NOP condition */ ++ ++ ldr r3, =OSCR /* reset the OS Timer Count to zero */ ++ mov r2, #0 ++ str r2, [r3] ++ ldr r4, =0x300 /* really 0x2E1 is about 200usec, so 0x300 should be plenty */ ++20: ++ ldr r2, [r3] ++ cmp r4, r2 ++ bgt 20b ++ ++ /* Step 6: Ensure the data cache is disabled -- should not be needed out of reset, but best to be safe*/ ++ ++ mov r0, #0x78 /* turn everything off */ ++ mcr p15, 0, r0, c1, c0, 0 /* caches off, MMU off, etc. */ ++ ++ CPWAIT /* wait for co-processor */ ++ ++ /* Step 7: On a hardware reset in systems that contain SDRAM, trigger the specified number (typically ++ eight) of refresh cycles by attempting non-burst read or write accesses to any disabled ++ SDRAM bank. Each such access causes a simultaneous CBR refresh cycles for all four banks, ++ which causes a pass through the CBR state and back to NOP. On the first pass, the PALL state ++ occurs before the CBR state. */ ++ ++ ldr r3, =PHYS_SDRAM_1 ++ mov r2, #9 /* now must do 9 (!) refresh or CBR commands before the first access */ ++CBR_refresh1: ++ str r2, [r3] ++ subs r2, r2, #1 ++ bne CBR_refresh1 ++ ++ /* Step 8: Can re-enable DCACHE if it was disabled above (Skip on gumstix) */ ++ ++ /* Step 9: Enable SDRAM partitions */ ++ ++ ldr r3, =MDCNFG /* sdram config -- sdram enable */ ++ ldr r2, [r3] ++ orr r2, r2, #0x00000001 /* enable partition 0 only */ ++ str r2, [r3] /* write to MDCNFG */ ++ ++ /* Step 10: In systems containing SDRAM, write the MDMRS register to trigger an MRS command to all ++ * enabled banks of SDRAM. For each SDRAM partition pair that has one or both partitions ++ * enabled, this forces a pass through the MRS state and back to NOP. The CAS latency must be ++ * the only variable option and is derived from the value programmed in the ++ * MDCNFG:MDTC0,2 fields. The burst type is programmed to sequential and the length is set ++ * to four. */ ++ ++ ldr r3, =MDMRS /* write the MDMRS */ ++ ldr r2, =0x00020022 /* the writable bits will be written as a 0 */ ++ str r2, [r3] ++ ++ /* Step 11: (optional) Enable auto-power-down */ ++ ++ ldr r3, =MDREFR /* enable auto-power-down */ ++ ldr r2, [r3] ++ orr r2, r2, #0x00100000 /* set the APD bit */ ++ str r2, [r3] /* write to MDREFR */ ++ ++ /* enable the 32Khz oscillator for RTC and PowerManager */ ++ ++ ldr r1, =OSCC ++ mov r2, #OSCC_OON ++ str r2, [r1] ++ ++ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ ++ /* has settled. */ ++/*60: ++ ldr r2, [r1] ++ ands r2, r2, #1 ++ beq 60b */ ++ ++end_of_memsetup: ++ mov pc, lr ++ +--- a/board/gumstix/u-boot.lds ++++ a/board/gumstix/u-boot.lds +@@ -0,0 +1,55 @@ ++/* ++ * (C) Copyright 2004 ++ * Craig Hughes, Gumstix Inc, <craig@gumstix.com> ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") ++OUTPUT_ARCH(arm) ++ENTRY(_start) ++SECTIONS ++{ ++ . = 0x00000000; ++ ++ . = ALIGN(4); ++ .text : ++ { ++ cpu/pxa/start.o (.text) ++ board/gumstix/memsetup.o (.text) ++ *(.text) ++ } ++ . = ALIGN(4); ++ .rodata : { *(.rodata) } ++ ++ . = ALIGN(4); ++ .data : { *(.data) } ++ ++ . = ALIGN(4); ++ .got : { *(.got) } ++ ++ __u_boot_cmd_start = .; ++ .u_boot_cmd : { *(.u_boot_cmd) } ++ __u_boot_cmd_end = .; ++ ++ . = ALIGN(4); ++ __bss_start = .; ++ .bss : { *(.bss) } ++ _end = .; ++} +--- a/cpu/pxa/start.S ++++ a/cpu/pxa/start.S +@@ -91,6 +91,7 @@ + .word 0x0badc0de + #endif + ++.space 0x800 /* JTAG install interrupt vectors over low memory in instruction cache */ + + /****************************************************************************/ + /* */ +@@ -104,6 +105,37 @@ + orr r0,r0,#0x13 + msr cpsr,r0 + ++/* This special code just unprotects all of flash, then erases it */ ++// mov r0, #0x1f /* Loop over all blocks 0x1f-0x00*/ ++//flash_wipe_main_loop: ++// mov r1, r0, LSL #0x11 /* Convert bank number to start address */ ++// mov r2, #0x60 /* Clear lock bit setup */ ++// strh r2, [r1] ++// nop ++// mov r2, #0xd0 /* Clear lock bits confirm */ ++// strh r2, [r1] ++// nop ++//flash_clear_wait_loop: ++// ldrh r2, [r1] ++// tst r2, #0x80 /* Check SR.7 */ ++// bne flash_clear_wait_loop ++// ++// mov r2, #0x20 /* Block erase command */ ++// strh r2, [r1] ++// nop ++// mov r2, #0xd0 /* Block erase confirm */ ++// strh r2, [r1] ++// nop ++//flash_erase_wait_loop: ++// ldrh r2, [r1] ++// tst r2, #0x80 ++// bne flash_clear_wait_loop ++// ++// teq r0, #0 ++// subne r0, r0, #1 ++// bne flash_wipe_main_loop ++/* End of flash-nuking code */ ++ + /* + * we do sys-critical inits only at reboot, + * not when booting from ram! +@@ -113,7 +145,7 @@ + #endif + + relocate: /* relocate U-Boot to RAM */ +- adr r0, _start /* r0 <- current position of code */ ++ adrl r0, _start /* r0 <- current position of code */ + ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ + cmp r0, r1 /* don't reloc during debug */ + beq stack_setup +--- a/include/configs/gumstix.h ++++ a/include/configs/gumstix.h +@@ -0,0 +1,259 @@ ++/* ++ * Copyright (C) 2004 Gumstix, Inc. ++** ++** Gumstix u-boot 1.1.1 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * Written by Craig Hughes <craig@gumstix.com> 2004 ++ * ++ */ ++ ++#ifndef __CONFIG_H ++#define __CONFIG_H ++ ++#define CONFIG_PXA250 /* this is an PXA250 CPU */ ++#define CONFIG_GUMSTIX /* config for gumstix board */ ++#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */ ++#ifndef __LITTLE_ENDIAN ++#define __LITTLE_ENDIAN 1234 /* For some reason this is not defined */ ++#endif ++ ++/* ++ * Select serial console configuration FFUART is default on G dev board ++ */ ++ ++#define CONFIG_FFUART ++#define CONFIG_BAUDRATE 115200 ++#define CONFIG_SILENT_CONSOLE ++ ++/* ++ * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if ++ * neccessary in include/cmd_confdefs.h file. (Un)comment for getting ++ * functionality or size of u-boot code. ++ */ ++ ++#define CONFIG_COMMANDS ( CONFIG_CMD_DFL \ ++ & ~CFG_CMD_CDP \ ++ & ~CFG_CMD_IDE \ ++ & ~CFG_CMD_IMLS \ ++ & ~CFG_CMD_IRQ \ ++ & ~CFG_CMD_PCMCIA \ ++ & ~CFG_CMD_SETGETDCR \ ++ | CFG_CMD_AUTOSCRIPT \ ++ | CFG_CMD_BDI \ ++ | CFG_CMD_BOOTD \ ++ | CFG_CMD_CACHE \ ++ | CFG_CMD_CONSOLE \ ++ | CFG_CMD_DHCP \ ++ | CFG_CMD_DIAG \ ++ | CFG_CMD_ECHO \ ++ | CFG_CMD_ELF \ ++ | CFG_CMD_ENV \ ++ | CFG_CMD_FAT \ ++ | CFG_CMD_FLASH \ ++ | CFG_CMD_IMI \ ++ | CFG_CMD_ITEST \ ++ | CFG_CMD_JFFS2 \ ++ | CFG_CMD_LOADB \ ++ | CFG_CMD_LOADS \ ++ | CFG_CMD_MEMORY \ ++ | CFG_CMD_MISC \ ++ | CFG_CMD_MMC \ ++ | CFG_CMD_NET \ ++ | CFG_CMD_NFS \ ++ | CFG_CMD_PING \ ++ | CFG_CMD_REGINFO \ ++ | CFG_CMD_RUN \ ++ | CFG_CMD_SAVES \ ++ | CFG_CMD_SDRAM \ ++ ) ++ ++ ++#define CONFIG_NETCONSOLE ++#define CONFIG_NET_MULTI ++ ++#define CFG_DEVICE_NULLDEV ++ ++#include <cmd_confdefs.h> ++ ++/* ++ * Boot options. Setting delay to -1 stops autostart count down. ++ * NOTE: Sending parameters to kernel depends on kernel version and ++ * 2.4.19-rmk6-pxa1 patch used while my u-boot coding didn't accept ++ * parameters at all! Do not get confused by them so. ++*/ ++ ++#define CONFIG_IDENT_STRING "\n\n*** Welcome to Gumstix ***" ++#define CONFIG_MISC_INIT_R /* misc_init_r function in gumstix sets board serial number */ ++ ++#define CONFIG_BOOTFILE boot/uImage ++#define CONFIG_BOOTARGS "console=ttyS0,115200n8 root=1f01 rootfstype=jffs2 reboot=cold,hard" ++#define CONFIG_BOOTCOMMAND "icache on;setenv stderr nulldev; setenv stdout nulldev; if mmcinit && fatload mmc 0 a2000000 gumstix-factory.script; then setenv stdout serial; setenv stderr serial; echo Found gumstix-factory script...; autoscr; else setenv stdout serial;setenv stderr serial;fsload && bootm; fi" ++#define CONFIG_BOOTDELAY 2 /* in seconds */ ++#define CONFIG_EXTRA_ENV_SETTINGS "verify=no" ++#define CFG_HUSH_PARSER ++#define CFG_AUTO_COMPLETE ++#define CFG_PROMPT_HUSH_PS2 "> " ++ ++/* ++ * General options for u-boot. Modify to save memory foot print ++ */ ++ ++#define CFG_LONGHELP /* undef saves memory */ ++#define CFG_PROMPT "GUM> " /* prompt string */ ++#define CFG_CBSIZE 512 /* console I/O buffer */ ++#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* print buffer size */ ++#define CFG_MAXARGS 16 /* max command args */ ++#define CFG_BARGSIZE CFG_CBSIZE /* boot args buf size */ ++ ++#define CONFIG_CRC32_VERIFY ++#define CONFIG_LOOPW ++#define CONFIG_MX_CYCLIC ++ ++/* ++ * * SMSC91C111 Network Card ++ * */ ++#define CONFIG_DRIVER_SMC91111 1 ++#define CONFIG_SMC91111_BASE 0x04000300 /* chip select 1 */ ++#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ ++#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ ++#undef CONFIG_SHOW_ACTIVITY ++#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ ++#define CONFIG_ETHPRIME "SMC91C1111-0" ++#define CONFIG_ETHADDR 00:0A:95:A5:47:3A ++ ++ ++#define CFG_MEMTEST_START 0xa1000000 /* memtest test area */ ++#define CFG_MEMTEST_END 0xa2000000 ++ ++ ++#undef CFG_CLKS_IN_HZ /* use HZ for freq. display */ ++#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ ++#ifdef CONFIG_GUMSTIX_CPUSPEED_400 ++#define CFG_CPUSPEED 0x161 /* 0x161 == 400MHz, 0x141 ==200MHz */ ++#else ++#define CFG_CPUSPEED 0x141 ++#endif ++#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } ++ ++#define CFG_CONSOLE_INFO_QUIET ++ ++/* ++ * Definitions related to passing arguments to kernel. ++ */ ++#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ ++#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ ++#define CONFIG_INITRD_TAG /* send initrd params */ ++#define CONFIG_SERIAL_TAG /* send serialnr from flash */ ++#undef CONFIG_VFD /* do not send framebuffer setup */ ++ ++/* ++ * SDRAM Memory Map ++ */ ++#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ ++#define PHYS_SDRAM_1 0xa0000000 /* SDRAM bank #1 */ ++#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB ( 2 chip ) */ ++ ++#define CFG_DRAM_BASE PHYS_SDRAM_1 ++#define CFG_DRAM_SIZE PHYS_SDRAM_1_SIZE ++ ++/* ++ * Configuration for FLASH memory ++ */ ++#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ ++#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ ++ ++#define CFG_FLASH_BASE PHYS_FLASH_1 ++#define CFG_FLASH_CFI /* flash is CFI conformant */ ++#define CFG_FLASH_CFI_DRIVER /* use common cfi driver */ ++#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ ++#define CFG_MAX_FLASH_BANKS 1 /* max # of memory banks */ ++#define CFG_MAX_FLASH_SECT 256 /* max # of sectors on one chip */ ++#define CFG_FLASH_PROTECTION /* use hardware flash protection */ ++ ++#define CFG_ENV_IS_IN_FLASH ++#define CFG_ENV_SIZE 0x1000 /* 4kB */ ++#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE ++#define CFG_ENV_ADDR ((CFG_FLASH_BASE + CFG_ENV_SECT_SIZE*2) - CFG_ENV_SIZE) ++ ++/* ++ * Malloc pool need to host env + 128 Kb reserve for other allocations. ++ */ ++#define CFG_MALLOC_LEN (CFG_ENV_SIZE + (128<<10) ) ++#define CONFIG_STACKSIZE (120<<10) /* stack size */ ++#define CFG_GBL_DATA_SIZE 512 /* num bytes initial data */ ++ ++/* ++ * This is setting for JFFS2 support in u-boot. ++ * Right now there is no gain for user, but later on booting kernel might be ++ * possible. Consider using XIP kernel running from flash to save RAM ++ * footprint. ++ * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support. ++ */ ++ ++#define CFG_JFFS2_FIRST_BANK 0 ++#define CFG_JFFS2_FIRST_SECTOR 2 ++#define CFG_JFFS2_NUM_BANKS 1 ++ ++#define CONFIG_MMC 1 ++#define CFG_MMC_BASE 0xF0000000 ++#define CONFIG_DOS_PARTITION ++ ++/* ++ * Environment setup. Definitions of monitor location and size with ++ * definition of environment setup ends up in 2 possibilities. ++ * 1. Embedded environment - in u-boot code is space for environment ++ * 2. Environment is read from predefined sector of flash ++ * Right now we support 2. possiblity, but expecting no env placed ++ * on mentioned address right now. This also needs to provide whole ++ * sector for it - for us 256Kb is really waste of memory. U-boot uses ++ * default env. and until kernel parameters could be sent to kernel ++ * env. has no sense to us. ++ */ ++ ++#define CFG_MONITOR_BASE CFG_FLASH_BASE ++#define CFG_MONITOR_LEN (PHYS_FLASH_SECT_SIZE*2 - CFG_ENV_SIZE) ++ ++#define CFG_GPSR0_VAL 0xFFFFFFFF ++#define CFG_GPSR1_VAL 0xFFEFFFFF ++#define CFG_GPSR2_VAL 0xFFFEFFFF ++ ++#define CFG_GPCR0_VAL 0x08022080 ++#define CFG_GPCR1_VAL 0x00100000 ++#define CFG_GPCR2_VAL 0x00010000 ++ ++#define CFG_GPDR0_VAL 0xC182B9F8 ++#define CFG_GPDR1_VAL 0x0012AA80 ++#define CFG_GPDR2_VAL 0x0001FFFF ++ ++#define CFG_GAFR0_L_VAL 0x81011000 ++#define CFG_GAFR0_U_VAL 0xA5254010 ++#define CFG_GAFR1_L_VAL 0x69908010 ++#define CFG_GAFR1_U_VAL 0xAAA5A8AA ++#define CFG_GAFR2_L_VAL 0xAAAAAAAA ++#define CFG_GAFR2_U_VAL 0x00000000 ++ ++#define CFG_PSSR_VAL 0x20 ++ ++/* ++ * Well this has to be defined, but on the other hand it is used differently ++ * one may expect. For instance loadb command do not cares :-) ++ * So advice is - do not rely on this... ++ */ ++ ++#define CFG_LOAD_ADDR 0xA2000000 ++#endif /* __CONFIG_H */ +--- a/lib_arm/board.c ++++ a/lib_arm/board.c +@@ -200,10 +200,10 @@ + NULL, + }; + ++DECLARE_GLOBAL_DATA_PTR; ++ + void start_armboot (void) + { +- DECLARE_GLOBAL_DATA_PTR; +- + ulong size; + init_fnc_t **init_fnc_ptr; + char *s; diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-crc-warning-not-so-scary.patch b/packages/u-boot/u-boot-1.1.4/u-boot-crc-warning-not-so-scary.patch new file mode 100644 index 0000000000..b5736894c6 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-crc-warning-not-so-scary.patch @@ -0,0 +1,11 @@ +--- u-boot-1.1.2/common/env_common.c 2005-06-15 12:38:53.632219409 -0700 ++++ u-boot-1.1.2/common/env_common.c 2005-06-15 12:39:41.469052324 -0700 +@@ -237,7 +237,7 @@ + #if defined(CONFIG_GTH) || defined(CFG_ENV_IS_NOWHERE) /* Environment not changable */ + puts ("Using default environment\n\n"); + #else ++ puts ("Using default environment\n\n"); +- puts ("*** Warning - bad CRC, using default environment\n\n"); + SHOW_BOOT_PROGRESS (-1); + #endif + diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch b/packages/u-boot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch new file mode 100644 index 0000000000..d919ea504e --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-dht-walnut-df2.patch @@ -0,0 +1,186 @@ +diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c +index f1a96a6..86bcc65 100644 +--- a/board/amcc/walnut/walnut.c ++++ b/board/amcc/walnut/walnut.c +@@ -73,7 +73,11 @@ int checkboard(void) + if (pvr == PVR_405GPR_RB) { + puts("Board: Sycamore - AMCC PPC405GPr Evaluation Board"); + } else { ++#ifdef CONFIG_DHT_WALNUT ++ puts("Board: DHT Walnut"); ++#else + puts("Board: Walnut - AMCC PPC405GP Evaluation Board"); ++#endif + } + + if (s != NULL) { +diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c +index ebd5f39..1c4c4b1 100644 +--- a/cpu/ppc4xx/spd_sdram.c ++++ b/cpu/ppc4xx/spd_sdram.c +@@ -398,19 +398,24 @@ long int spd_sdram(int(read_spd)(uint ad + + tmp = SDRAM0_BXCR_SZ(bank_code) | SDRAM0_BXCR_AM(mode) | 1; + sdram0_b0cr = (bank_size * 0) | tmp; +-#ifndef CONFIG_405EP /* not on PPC405EP */ ++#if defined(CONFIG_405EP) ++ /* PPC405EP chip only supports two SDRAM banks */ ++ if (bank_cnt > 1) ++ sdram0_b1cr = (bank_size * 1) | tmp; ++ if (bank_cnt > 2) ++ total_size = 2 * bank_size; ++#elif defined(CONFIG_DHT_WALNUT) ++ if (bank_cnt > 1) { ++ sdram0_b2cr = (bank_size * 1) | tmp; ++ total_size = 2 * bank_size; ++ } ++#else + if (bank_cnt > 1) + sdram0_b2cr = (bank_size * 1) | tmp; + if (bank_cnt > 2) + sdram0_b1cr = (bank_size * 2) | tmp; + if (bank_cnt > 3) + sdram0_b3cr = (bank_size * 3) | tmp; +-#else +- /* PPC405EP chip only supports two SDRAM banks */ +- if (bank_cnt > 1) +- sdram0_b1cr = (bank_size * 1) | tmp; +- if (bank_cnt > 2) +- total_size = 2 * bank_size; + #endif + + /* +diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c +index 3302457..7f6d33a 100644 +--- a/drivers/pci_auto.c ++++ b/drivers/pci_auto.c +@@ -296,10 +296,12 @@ int pciauto_config_device(struct pci_con + + case PCI_CLASS_STORAGE_IDE: + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface); ++#ifndef CONFIG_DHT_WALNUT + if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { + DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n"); + return sub_bus; + } ++#endif + + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + break; +diff --git a/include/configs/walnut.h b/include/configs/walnut.h +index 1171ee5..df9e8ac 100644 +--- a/include/configs/walnut.h ++++ b/include/configs/walnut.h +@@ -37,6 +37,7 @@ + #define CONFIG_4xx 1 /* ...member of PPC4xx family */ + #define CONFIG_WALNUT 1 /* ...on a WALNUT board */ + /* ...and on a SYCAMORE board */ ++#define CONFIG_DHT_WALNUT 1 /* Just like a walnut, but .... */ + + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ + +@@ -88,10 +89,36 @@ + #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + + #define CONFIG_MII 1 /* MII PHY management */ ++#ifdef CONFIG_DHT_WALNUT ++#define CONFIG_ETHADDR de:ad:be:ef:00:00 ++#define CONFIG_ENV_OVERWRITE 1 ++#define CONFIG_PHY_ADDR 9 /* PHY address */ ++#else + #define CONFIG_PHY_ADDR 1 /* PHY address */ ++#endif + + #define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */ + ++#ifdef CONFIG_DHT_WALNUT ++#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ ++ CFG_CMD_ASKENV | \ ++ CFG_CMD_DATE | \ ++ CFG_CMD_DHCP | \ ++ CFG_CMD_DIAG | \ ++ CFG_CMD_ELF | \ ++ CFG_CMD_I2C | \ ++ CFG_CMD_IRQ | \ ++ CFG_CMD_MII | \ ++ CFG_CMD_NET | \ ++ CFG_CMD_NFS | \ ++ CFG_CMD_PCI | \ ++ CFG_CMD_PING | \ ++ CFG_CMD_REGINFO | \ ++ CFG_CMD_SDRAM | \ ++ CFG_CMD_IDE | \ ++ CFG_CMD_BEDBUG | \ ++ CFG_CMD_SNTP ) ++#else + #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ + CFG_CMD_ASKENV | \ + CFG_CMD_DATE | \ +@@ -108,6 +135,7 @@ + CFG_CMD_REGINFO | \ + CFG_CMD_SDRAM | \ + CFG_CMD_SNTP ) ++#endif + + /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ + #include <cmd_confdefs.h> +@@ -151,7 +179,7 @@ + #define CFG_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +-#define CFG_LOAD_ADDR 0x100000 /* default load address */ ++#define CFG_LOAD_ADDR 0x200000 /* default load address */ + #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ + + #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +@@ -198,6 +226,50 @@ + #define CFG_PCI_PTM2MS 0x00000000 /* disabled */ + #define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ + ++#ifdef CONFIG_DHT_WALNUT ++/*********************************************************************** ++ * External peripheral base address ++ ***********************************************************************/ ++#define CFG_ISA_IO_BASE_ADDRESS 0xE8000000 ++ ++/************************************************************ ++ * IDE/ATA stuff ++ ************************************************************/ ++#define CFG_IDE_MAXBUS 1 /* max. 2 IDE busses */ ++#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 per IDE bus */ ++ ++#define CFG_ATA_BASE_ADDR CFG_ISA_IO_BASE_ADDRESS /* base address */ ++#define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offset */ ++#define CFG_ATA_DATA_OFFSET 0 /* data reg offset */ ++#define CFG_ATA_REG_OFFSET 0 /* reg offset */ ++#define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */ ++ ++#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ ++#undef CONFIG_IDE_LED /* no led for ide supported */ ++#undef CONFIG_IDE_RESET /* no reset for ide supported */ ++ ++#define CONFIG_LBA48 1 ++#define CONFIG_MAC_PARTITION 1 ++#define CONFIG_DOS_PARTITION 1 ++#define CONFIG_ISO_PARTITION 1 ++ ++#define CONFIG_SUPPORT_VFAT ++ ++/************************************************************ ++ * ATAPI support (experimental) ++ ************************************************************/ ++#define CONFIG_ATAPI /* enable ATAPI Support */ ++ ++/************************************************************ ++ * SCSI support (experimental) only SYM53C8xx supported ++ ************************************************************/ ++#define CONFIG_SCSI_SYM53C8XX ++#define CFG_SCSI_MAX_LUN 8 /* number of supported LUNs */ ++#define CFG_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */ ++#define CFG_SCSI_MAX_DEVICE CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN /* maximum Target devices */ ++#define CFG_SCSI_SPIN_UP_TIME 2 ++#endif ++ + /*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-flash-protect-fixup.patch b/packages/u-boot/u-boot-1.1.4/u-boot-flash-protect-fixup.patch new file mode 100644 index 0000000000..1bbbbcb32d --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-flash-protect-fixup.patch @@ -0,0 +1,11 @@ +--- a/drivers/cfi_flash.c ++++ a/drivers/cfi_flash.c +@@ -345,7 +345,7 @@ + #endif + + /* Environment protection ON by default */ +-#ifdef CFG_ENV_IS_IN_FLASH ++#if defined(CFG_ENV_IS_IN_FLASH) && (CFG_MONITOR_BASE + CFG_MONITOR_LEN < CFG_ENV_ADDR) + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-fw_printenv.patch b/packages/u-boot/u-boot-1.1.4/u-boot-fw_printenv.patch new file mode 100644 index 0000000000..5e33452d11 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-fw_printenv.patch @@ -0,0 +1,139 @@ +--- u-boot/tools/env/fw_env.c 2006-03-17 17:21:00.000000000 -0800 ++++ u-boot/tools/env/fw_env.c 2006-03-17 17:53:41.000000000 -0800 +@@ -31,8 +31,9 @@ + #include <sys/ioctl.h> + #include <sys/stat.h> + #include <unistd.h> +-#include <linux/mtd/mtd.h> ++#include <mtd/mtd-user.h> + #include "fw_env.h" ++#include "config.h" + + typedef unsigned char uchar; + +@@ -54,8 +55,6 @@ + #define ENVSIZE(i) envdevices[(i)].env_size + #define DEVESIZE(i) envdevices[(i)].erase_size + +-#define CFG_ENV_SIZE ENVSIZE(curdev) +- + #define ENV_SIZE getenvsize() + + typedef struct environment_s { +@@ -418,8 +417,8 @@ + fdr = fd; + } + printf ("Unlocking flash...\n"); +- erase.length = DEVESIZE (otherdev); +- erase.start = DEVOFFSET (otherdev); ++ erase.length = DEVESIZE (otherdev)*2; ++ erase.start = 0; + ioctl (fdr, MEMUNLOCK, &erase); + + if (HaveRedundEnv) { +@@ -439,7 +438,7 @@ + strerror (errno)); + return (-1); + } +- if (lseek (fdr, DEVOFFSET (otherdev) + CFG_ENV_SIZE, SEEK_SET) ++ if (lseek (fdr, DEVESIZE(otherdev), SEEK_SET) + == -1) { + fprintf (stderr, "seek error on %s: %s\n", + DEVNAME (otherdev), +@@ -458,7 +457,7 @@ + printf ("Erasing old environment...\n"); + + erase.length = DEVESIZE (otherdev); +- erase.start = DEVOFFSET (otherdev); ++ erase.start = DEVESIZE (otherdev); + if (ioctl (fdr, MEMERASE, &erase) != 0) { + fprintf (stderr, "MTD erase error on %s: %s\n", + DEVNAME (otherdev), +@@ -469,6 +468,22 @@ + printf ("Done\n"); + + printf ("Writing environment to %s...\n", DEVNAME (otherdev)); ++ if (resid) { ++ if (lseek(fdr, DEVESIZE(otherdev), SEEK_SET) ++ == -1) { ++ fprintf(stderr, "seek error on %s: %s\n", ++ DEVNAME(otherdev), ++ strerror(errno)); ++ return -1; ++ } ++ if (write (fdr, data, resid) != resid) { ++ fprintf (stderr, ++ "write error on %s: %s\n", ++ DEVNAME (curdev), strerror (errno)); ++ return (-1); ++ } ++ free (data); ++ } + if (lseek (fdr, DEVOFFSET (otherdev), SEEK_SET) == -1) { + fprintf (stderr, + "seek error on %s: %s\n", +@@ -487,15 +502,6 @@ + DEVNAME (otherdev), strerror (errno)); + return (-1); + } +- if (resid) { +- if (write (fdr, data, resid) != resid) { +- fprintf (stderr, +- "write error on %s: %s\n", +- DEVNAME (curdev), strerror (errno)); +- return (-1); +- } +- free (data); +- } + if (HaveRedundEnv) { + /* change flag on current active env partition */ + if (lseek (fd, DEVOFFSET (curdev) + sizeof (ulong), SEEK_SET) +@@ -514,8 +520,8 @@ + } + printf ("Done\n"); + printf ("Locking ...\n"); +- erase.length = DEVESIZE (otherdev); +- erase.start = DEVOFFSET (otherdev); ++ erase.length = DEVESIZE (otherdev)*2; ++ erase.start = 0; + ioctl (fdr, MEMLOCK, &erase); + if (HaveRedundEnv) { + erase.length = DEVESIZE (curdev); +--- u-boot/tools/env/fw_env.h 2006-03-17 17:16:37.000000000 -0800 ++++ u-boot/tools/env/fw_env.h 2006-03-17 17:53:41.000000000 -0800 +@@ -27,25 +27,17 @@ + * See included "fw_env.config" sample file (TRAB board) + * for notes on configuration. + */ +-#define CONFIG_FILE "/etc/fw_env.config" ++//#define CONFIG_FILE "/etc/fw_env.config" + +-#define HAVE_REDUND /* For systems with 2 env sectors */ +-#define DEVICE1_NAME "/dev/mtd1" +-#define DEVICE2_NAME "/dev/mtd2" +-#define DEVICE1_OFFSET 0x0000 +-#define ENV1_SIZE 0x4000 +-#define DEVICE1_ESIZE 0x4000 +-#define DEVICE2_OFFSET 0x0000 +-#define ENV2_SIZE 0x4000 +-#define DEVICE2_ESIZE 0x4000 +- +-#define CONFIG_BAUDRATE 115200 +-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +-#define CONFIG_BOOTCOMMAND \ +- "bootp; " \ +- "setenv bootargs root=/dev/nfs nfsroot=${serverip}:${rootpath} " \ +- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ +- "bootm" ++//#define HAVE_REDUND /* For systems with 2 env sectors */ ++#define DEVICE1_NAME "/dev/mtd0" ++//#define DEVICE2_NAME "/dev/mtd2" ++#define DEVICE1_OFFSET CFG_ENV_ADDR ++#define ENV1_SIZE CFG_ENV_SIZE ++#define DEVICE1_ESIZE CFG_ENV_SECT_SIZE ++//#define DEVICE2_OFFSET 0x0000 ++//#define ENV2_SIZE 0x4000 ++//#define DEVICE2_ESIZE 0x4000 + + extern void fw_printenv(int argc, char *argv[]); + extern unsigned char *fw_getenv (unsigned char *name); diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-install.patch b/packages/u-boot/u-boot-1.1.4/u-boot-install.patch new file mode 100644 index 0000000000..50c149c0a1 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-install.patch @@ -0,0 +1,102 @@ +--- u-boot-1.1.2/common/Makefile 2004-12-16 09:35:57.000000000 -0800 ++++ u-boot-install/common/Makefile 2005-04-12 07:00:25.000000000 -0700 +@@ -34,7 +34,7 @@ + cmd_date.o cmd_dcr.o cmd_diag.o cmd_doc.o cmd_dtt.o \ + cmd_eeprom.o cmd_elf.o cmd_ext2.o \ + cmd_fat.o cmd_fdc.o cmd_fdos.o cmd_flash.o cmd_fpga.o \ +- cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \ ++ cmd_i2c.o cmd_ide.o cmd_immap.o cmd_install.o cmd_itest.o cmd_jffs2.o \ + cmd_load.o cmd_log.o \ + cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ + cmd_nand.o cmd_net.o cmd_nvedit.o \ +--- u-boot-1.1.2/common/cmd_install.c 1969-12-31 16:00:00.000000000 -0800 ++++ u-boot-install/common/cmd_install.c 2005-04-12 07:43:10.000000000 -0700 +@@ -0,0 +1,70 @@ ++/* ++ * (C) Copyright 2005 ++ * Craig Hughes, Gumstix Inc. <craig@gumstix.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++/* ++ * Install command to copy compiled-in binary to flash ++ * ++ */ ++ ++#include <common.h> ++#include <command.h> ++#if (CONFIG_COMMANDS & CFG_CMD_INSTALL) ++ ++#ifdef CONFIG_GUMSTIX_CPUSPEED_400 ++#include <u-boot-400.h> ++#else ++#include <u-boot-200.h> ++#endif ++ ++int do_install ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ++{ ++ int rc; ++ size_t sect_top; ++ ++ if (argc != 1) { ++ printf ("Usage:\n%s\n", cmdtp->usage); ++ return 1; ++ } ++ ++ for(sect_top=0; sect_top<sizeof(u_boot_bin_data); sect_top+=PHYS_FLASH_SECT_SIZE) continue; ++ sect_top--; ++ flash_sect_protect(0, CFG_FLASH_BASE, sect_top); ++ flash_sect_erase(CFG_FLASH_BASE, sect_top); ++ ++ puts ("Copying to Flash... "); ++ ++ rc = flash_write ((uchar *)u_boot_bin_data, CFG_FLASH_BASE, sizeof(u_boot_bin_data)); ++ if (rc != 0) { ++ flash_perror (rc); ++ return (1); ++ } ++ puts ("done\n"); ++ return 0; ++} ++ ++ ++/**************************************************/ ++U_BOOT_CMD( ++ install, 1, 1, do_install, ++ "install - install u-boot to flash\n", ++ "copies a u-boot image to begining of flash\n" ++); ++ ++#endif /* CFG_CMD_INSTALL */ +--- u-boot-1.1.2/include/cmd_confdefs.h 2004-12-16 09:59:53.000000000 -0800 ++++ u-boot-install/include/cmd_confdefs.h 2005-04-12 07:02:59.000000000 -0700 +@@ -94,6 +94,7 @@ + #define CFG_CMD_EXT2 0x1000000000000000ULL /* EXT2 Support */ + #define CFG_CMD_SNTP 0x2000000000000000ULL /* SNTP support */ + #define CFG_CMD_DISPLAY 0x4000000000000000ULL /* Display support */ ++#define CFG_CMD_INSTALL 0x2000000000000000ULL /* Install u-boot binary */ + + #define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFULL /* ALL commands */ + +@@ -121,6 +121,7 @@ + CFG_CMD_I2C | \ + CFG_CMD_IDE | \ + CFG_CMD_IMMAP | \ ++ CFG_CMD_INSTALL | \ + CFG_CMD_IRQ | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_KGDB | \ diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-jerase-cmd.patch b/packages/u-boot/u-boot-1.1.4/u-boot-jerase-cmd.patch new file mode 100644 index 0000000000..698f7a2d78 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-jerase-cmd.patch @@ -0,0 +1,107 @@ +--- u-boot-orig/common/cmd_flash.c 2004-12-31 01:32:50.000000000 -0800 ++++ u-boot-1.1.2/common/cmd_flash.c 2005-09-13 23:00:14.000000000 -0700 +@@ -36,6 +36,11 @@ + + extern flash_info_t flash_info[]; /* info for FLASH chips */ + ++static const unsigned int JFFS2_CLEAN_HEADER[] = { 0x20031985, ++ 0x0000000c, ++ 0xe41eb0b1 ++ }; ++ + /* + * The user interface starts numbering for Flash banks with 1 + * for historical reasons. +@@ -206,29 +211,46 @@ + flash_print_info (&flash_info[bank-1]); + return 0; + } + ++void jffs2_write_header(flash_info_t *info, unsigned int first, unsigned int last) ++{ ++ unsigned int i; ++ for(i=first; i<=last; i++) ++ { ++ flash_write(JFFS2_CLEAN_HEADER, info->start[i], 12); ++ } ++} ++ + int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) + { + flash_info_t *info; + ulong bank, addr_first, addr_last; + int n, sect_first, sect_last; + #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE) + struct mtd_device *dev; + struct part_info *part; + u8 dev_type, dev_num, pnum; + #endif + int rcode = 0; ++ int jffs2erase = 0; + + if (argc < 2) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + ++ // Special JFFS2 erase which will write a JFFS2 "clean" header after the erase ++ if('j' == argv[0][0]) ++ { ++ jffs2erase = 1; ++ } ++ + if (strcmp(argv[1], "all") == 0) { + for (bank=1; bank<=CFG_MAX_FLASH_BANKS; ++bank) { + printf ("Erase Flash Bank # %ld ", bank); + info = &flash_info[bank-1]; + rcode = flash_erase (info, 0, info->sector_count-1); ++ if(jffs2erase) jffs2_write_header(info, 0, info->sector_count-1); + } + return rcode; + } +@@ -235,6 +257,7 @@ + printf ("Erase Flash Sectors %d-%d in Bank # %d ", + sect_first, sect_last, (info-flash_info)+1); + rcode = flash_erase(info, sect_first, sect_last); ++ if(jffs2erase) jffs2_write_header(info, sect_first, sect_last); + return rcode; + } + +@@ -253,6 +276,7 @@ + printf ("Erase Flash Bank # %ld ", bank); + info = &flash_info[bank-1]; + rcode = flash_erase (info, 0, info->sector_count-1); ++ if(jffs2erase) jffs2_write_header(info, 0, info->sector_count-1); + return rcode; + } + +@@ -264,6 +288,12 @@ + return 1; + } + ++ if (jffs2erase) ++ { ++ printf ("Usage:\n%s\n", cmdtp->usage); ++ return 1; ++ } ++ + rcode = flash_sect_erase(addr_first, addr_last); + return rcode; + } +@@ -517,6 +547,16 @@ + ); + + U_BOOT_CMD( ++ jerase, 3, 1, do_flerase, ++ "jerase - erase FLASH memory for JFFS2\n", ++ "jerase N:SF[-SL]\n - erase sectors SF-SL in FLASH bank # N\n" ++ "jerase bank N\n - erase FLASH bank # N\n" ++ "jerase all\n - erase all FLASH banks\n" ++ " in each case, after erasing a flash sector, that sector\n" ++ " has a JFFS2 'clean' marker written to it\n" ++); ++ ++U_BOOT_CMD( + protect, 4, 1, do_protect, + "protect - enable or disable FLASH write protection\n", + "on start end\n" diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-jffs2-new-nodetypes.patch b/packages/u-boot/u-boot-1.1.4/u-boot-jffs2-new-nodetypes.patch new file mode 100644 index 0000000000..cce41aca18 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-jffs2-new-nodetypes.patch @@ -0,0 +1,25 @@ +--- u-boot-1.1.4/fs/jffs2/jffs2_1pass.c-orig 2006-03-17 07:46:53.000000000 -0800 ++++ u-boot-1.1.4/fs/jffs2/jffs2_1pass.c 2006-03-17 07:59:37.000000000 -0800 +@@ -1194,6 +1194,10 @@ + printf("OOPS Padding has bad size " + "%d < %d\n", node->totlen, + sizeof(struct jffs2_unknown_node)); ++ } else if (node->nodetype == JFFS2_NODETYPE_ERASEBLOCK_HEADER) { ++ // Could check offset here to ensure we're at start of erase block ++ } else if (node->nodetype == JFFS2_NODETYPE_SUMMARY) { ++ // Ignore summary blocks for now + } else { + printf("Unknown node type: %x len %d " + "offset 0x%x\n", node->nodetype, +--- u-boot-1.1.4/include/jffs2/jffs2.h-orig 2006-03-17 08:20:01.000000000 -0800 ++++ u-boot-1.1.4/include/jffs2/jffs2.h 2006-03-17 08:20:20.000000000 -0800 +@@ -90,6 +90,9 @@ + #define JFFS2_NODETYPE_CLEANMARKER (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) + #define JFFS2_NODETYPE_PADDING (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 4) + ++#define JFFS2_NODETYPE_ERASEBLOCK_HEADER (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 5) ++#define JFFS2_NODETYPE_SUMMARY (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 6) ++ + /* Maybe later... */ + /*#define JFFS2_NODETYPE_CHECKPOINT (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) */ + /*#define JFFS2_NODETYPE_OPTIONS (JFFS2_FEATURE_RWCOMPAT_COPY | JFFS2_NODE_ACCURATE | 4) */ diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-loadb-safe.patch b/packages/u-boot/u-boot-1.1.4/u-boot-loadb-safe.patch new file mode 100644 index 0000000000..d4b8ef3935 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-loadb-safe.patch @@ -0,0 +1,16 @@ +diff -bBdurNP u-boot-1.1.1/common/cmd_load.c u-boot/common/cmd_load.c +--- u-boot-1.1.1/common/cmd_load.c 2004-03-11 16:14:10.000000000 -0800 ++++ u-boot/common/cmd_load.c 2004-09-30 00:19:43.656640004 -0700 +@@ -454,6 +454,12 @@ + if (argc >= 2) { + offset = simple_strtoul(argv[1], NULL, 16); + } ++ ++ if(offset < CFG_DRAM_BASE || offset > (CFG_DRAM_BASE+CFG_DRAM_SIZE)) { ++ printf("Cannot load to 0x%08lX -- address not in RAM\n",offset); ++ return 1; ++ } ++ + if (argc == 3) { + load_baudrate = (int)simple_strtoul(argv[2], NULL, 10); + diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-make381-fix.patch b/packages/u-boot/u-boot-1.1.4/u-boot-make381-fix.patch new file mode 100644 index 0000000000..89555ac027 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-make381-fix.patch @@ -0,0 +1,15 @@ +--- /examples/orig-Makefile 2005-12-16 18:39:27.000000000 +0200 ++++ /examples/Makefile 2006-12-02 14:58:59.000000000 +0200 +@@ -123,10 +123,10 @@ + $(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \ + -o $@ -e $(<:.o=) $< $(LIB) \ + -L$(gcclibdir) -lgcc +-%.srec: % ++%.srec: %.o + $(OBJCOPY) -O srec $< $@ 2>/dev/null + +-%.bin: % ++%.bin: %.o + $(OBJCOPY) -O binary $< $@ 2>/dev/null + + ######################################################################### diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-mmc-init.patch b/packages/u-boot/u-boot-1.1.4/u-boot-mmc-init.patch new file mode 100644 index 0000000000..a18d4d3609 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-mmc-init.patch @@ -0,0 +1,24 @@ +--- a/cpu/pxa/mmc.c ++++ a/cpu/pxa/mmc.c +@@ -401,16 +401,17 @@ + + /* reset */ + retries = 10; +- resp = mmc_cmd(0, 0, 0, 0); +- resp = mmc_cmd(1, 0x00ff, 0xc000, MMC_CMDAT_INIT|MMC_CMDAT_BUSY|MMC_CMDAT_R3); ++ resp = mmc_cmd(0, 0, 0, MMC_CMDAT_INIT|MMC_CMDAT_BUSY|MMC_CMDAT_R1); ++ udelay(200000); ++ resp = mmc_cmd(1, 0x00ff, 0x8000, MMC_CMDAT_BUSY|MMC_CMDAT_R3); + while (retries-- && resp && !(resp[4] & 0x80)) { + debug("resp %x %x\n", resp[0], resp[1]); + #ifdef CONFIG_PXA27X + udelay(10000); + #else +- udelay(50); ++ udelay(200000); + #endif +- resp = mmc_cmd(1, 0x00ff, 0xff00, MMC_CMDAT_BUSY|MMC_CMDAT_R3); ++ resp = mmc_cmd(1, 0x00ff, 0x8000, MMC_CMDAT_BUSY|MMC_CMDAT_R3); + } + + /* try to get card id */ diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-mmcclk-alternate.patch b/packages/u-boot/u-boot-1.1.4/u-boot-mmcclk-alternate.patch new file mode 100644 index 0000000000..5eb8324630 --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-mmcclk-alternate.patch @@ -0,0 +1,14 @@ +--- a/cpu/pxa/mmc.c 2005-05-31 14:58:43.090949787 -0700 ++++ a/cpu/pxa/mmc.c 2005-04-14 16:02:22.000000000 -0700 +@@ -546,9 +546,10 @@ + int retries, rc = -ENODEV; + uchar *resp; + +-#ifdef CONFIG_LUBBOCK ++#if defined(CONFIG_LUBBOCK) || defined(CONFIG_GUMSTIX) + set_GPIO_mode( GPIO6_MMCCLK_MD ); + set_GPIO_mode( GPIO8_MMCCS0_MD ); ++ set_GPIO_mode( GPIO53_MMCCLK_MD ); + #endif + CKEN |= CKEN12_MMC; /* enable MMC unit clock */ + #if defined(CONFIG_ADSVIX) diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-smc91x-multi.patch b/packages/u-boot/u-boot-1.1.4/u-boot-smc91x-multi.patch new file mode 100644 index 0000000000..3f285e34dc --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-smc91x-multi.patch @@ -0,0 +1,125 @@ +diff -u a/drivers/smc91111.c a/drivers/smc91111.c +--- a/drivers/smc91111.c 2005-03-31 15:43:10.000000000 -0800 ++++ a/drivers/smc91111.c 2005-04-13 13:48:41.000000000 -0700 +@@ -155,10 +155,14 @@ + . + .------------------------------------------------------------------ */ + ++#ifndef CONFIG_NET_MULTI + extern int eth_init(bd_t *bd); + extern void eth_halt(void); + extern int eth_rx(void); + extern int eth_send(volatile void *packet, int length); ++#else ++extern int smc_initialize(bd_t *); ++#endif + + + /* +@@ -797,6 +801,56 @@ + } + + ++#ifdef CONFIG_NET_MULTI ++static int smc_multi_init(struct eth_device *, bd_t *); ++static void smc_multi_halt(struct eth_device *); ++static int smc_multi_send(struct eth_device *,volatile void *,int); ++static int smc_multi_recv(struct eth_device *); ++ ++extern int smc_initialize(bd_t *bd) ++{ ++ struct eth_device *dev; ++ ++ dev = (struct eth_device *)malloc(sizeof(struct eth_device)); ++ sprintf(dev->name, "SMC91C1111-%d",0); ++ dev->priv = NULL; ++ dev->iobase = SMC_BASE_ADDRESS; ++ dev->init = smc_multi_init; ++ dev->halt = smc_multi_halt; ++ dev->send = smc_multi_send; ++ dev->recv = smc_multi_recv; ++ eth_register(dev); ++ ++ return 1; // number of cards detected ++} ++ ++static int smc_multi_init(struct eth_device *dev, bd_t *bis) ++{ ++ if(dev->priv == NULL) ++ { ++ smc_open(bis); ++ dev->priv = (void *)1; ++ } ++ return 1; ++} ++ ++static void smc_multi_halt(struct eth_device *dev) ++{ ++ // Not sure when we should actually close... ++ //smc_close(); ++} ++ ++static int smc_multi_send(struct eth_device *dev, volatile void *packet, int length) ++{ ++ return smc_send_packet(packet, length); ++} ++ ++static int smc_multi_recv(struct eth_device *dev) ++{ ++ return smc_rcv(); ++} ++#endif ++ + /* + * Open and Initialize the board + * +@@ -1505,6 +1559,7 @@ + } + #endif + ++#ifndef CONFIG_NET_MULTI + int eth_init(bd_t *bd) { + return (smc_open(bd)); + } +@@ -1520,6 +1575,7 @@ + int eth_send(volatile void *packet, int length) { + return smc_send_packet(packet, length); + } ++#endif //CONFIG_NET_MULTI + + int smc_get_ethaddr (bd_t * bd) + { +--- a/lib_arm/board.c 2005-03-30 16:39:47.000000000 -0800 ++++ a/lib_arm/board.c 2005-03-30 14:26:08.000000000 -0800 +@@ -278,6 +278,11 @@ + /* initialize environment */ + env_relocate (); + ++#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) ++ /* must do after the environment variables are set up */ ++ eth_initialize (NULL); ++#endif ++ + #ifdef CONFIG_VFD + /* must do this after the framebuffer is allocated */ + drv_vfd_init(); +--- a/net/eth.c 2004-12-16 09:49:38.000000000 -0800 ++++ a/net/eth.c 2005-03-30 17:06:49.000000000 -0800 +@@ -53,6 +53,7 @@ + extern int scc_initialize(bd_t*); + extern int skge_initialize(bd_t*); + extern int tsec_initialize(bd_t*, int, char *); ++extern int smc_initialize(bd_t*); + + static struct eth_device *eth_devices, *eth_current; + +@@ -196,6 +197,9 @@ + #if defined(CONFIG_RTL8169) + rtl8169_initialize(bis); + #endif ++#if defined(CONFIG_DRIVER_SMC91111) ++ smc_initialize(bis); ++#endif + + if (!eth_devices) { + puts ("No ethernet found.\n"); diff --git a/packages/u-boot/u-boot-1.1.4/u-boot-zzz-osx.patch b/packages/u-boot/u-boot-1.1.4/u-boot-zzz-osx.patch new file mode 100644 index 0000000000..f9d52c7dfe --- /dev/null +++ b/packages/u-boot/u-boot-1.1.4/u-boot-zzz-osx.patch @@ -0,0 +1,41 @@ +--- u-boot-1.1.1/tools/Makefile Mon Sep 27 03:34:12 2004 ++++ u-boot-1.1.1/tools/Makefile Mon Sep 27 03:34:52 2004 +@@ -70,26 +70,26 @@ + # multiple symbol definitions are treated as errors, hence the + # -multiply_defined suppress option to turn off this error. + # +-ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc) +-HOST_CFLAGS = -traditional-cpp -Wall +-HOST_LDFLAGS =-multiply_defined suppress +-HOST_ENVIRO_CFLAGS = -traditional-cpp ++#ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc) ++#HOST_CFLAGS = -traditional-cpp -Wall ++#HOST_LDFLAGS =-multiply_defined suppress ++#HOST_ENVIRO_CFLAGS = -traditional-cpp + +-else +-ifeq ($(HOSTOS)-$(HOSTARCH),netbsd-ppc) +-HOST_CFLAGS = -Wall -pedantic +-HOST_LDFLAGS = +-HOST_ENVIRO_CFLAGS = ++#else ++#ifeq ($(HOSTOS)-$(HOSTARCH),netbsd-ppc) ++#HOST_CFLAGS = -Wall -pedantic ++#HOST_LDFLAGS = ++#HOST_ENVIRO_CFLAGS = + + # + # Everyone else + # +-else ++#else + HOST_CFLAGS = -Wall -pedantic + HOST_LDFLAGS = + HOST_ENVIRO_CFLAGS = +-endif +-endif ++#endif ++#endif + + # + # Cygwin needs .exe files :-( |