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authorJohn Bowler <jbowler@nslu2-linux.org>2005-09-23 00:58:31 +0000
committerOpenEmbedded Project <openembedded-devel@lists.openembedded.org>2005-09-23 00:58:31 +0000
commit91406f103cfb290cdb61cb5bff580876c3c4bc38 (patch)
treef1f2ee80c81d06d6f9fabb838c012825bbe0b30d /packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch
parent883b71600a2b3b456c73c644c8d5f3bba21e0d01 (diff)
nslu2-kernel: working copies of patches to push upstream
Diffstat (limited to 'packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch')
-rw-r--r--packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch b/packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch
new file mode 100644
index 0000000000..c69e69c53e
--- /dev/null
+++ b/packages/linux/nslu2-kernel/2.6/50-nslu2-include.patch
@@ -0,0 +1,47 @@
+diff -urN linux-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h nslu2-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h
+--- linux-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h 1970-01-01 01:00:00.000000000 +0100
++++ nslu2-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h 2005-09-16 18:58:05.000000000 +0200
+@@ -0,0 +1,43 @@
++/*
++ * include/asm-arm/arch-ixp4xx/nslu2.h
++ *
++ * NSLU2 platform specific definitions
++ *
++ * Author: Mark Rakes <mrakes AT mac.com>
++ * Maintainers: http://www.nslu2-linux.org
++ *
++ * based on ixdp425.h:
++ * Copyright 2004 (c) MontaVista, Software, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++// GPIO 8 is used as the power input so is not free for use as a PCI IRQ
++// kas11 11-2-04
++
++#ifndef __ASM_ARCH_HARDWARE_H__
++#error "Do not include this directly, instead #include <asm/hardware.h>"
++#endif
++
++#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
++#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
++
++#define NSLU2_SDA_PIN 7
++#define NSLU2_SCL_PIN 6
++
++/*
++ * NSLU2 PCI IRQs
++ */
++#define NSLU2_PCI_MAX_DEV 3
++#define NSLU2_PCI_IRQ_LINES 3
++
++
++/* PCI controller GPIO to IRQ pin mappings */
++#define NSLU2_PCI_INTA_PIN 11
++#define NSLU2_PCI_INTB_PIN 10
++#define NSLU2_PCI_INTC_PIN 9
++//#define NSLU2_PCI_INTD_PIN 8
++
++