diff options
| author | John Bowler <jbowler@nslu2-linux.org> | 2005-09-26 23:18:06 +0000 |
|---|---|---|
| committer | OpenEmbedded Project <openembedded-devel@lists.openembedded.org> | 2005-09-26 23:18:06 +0000 |
| commit | 0df2d2a4a3caac37a2f1a2b2d795170ad01b0a42 (patch) | |
| tree | cc390b16dacbf3827e0ccc37cd77391d493d5186 /packages/linux/nslu2-kernel/2.6.14 | |
| parent | 3c93f6b58e4ffc15fe8aa4390cea8f7d054f5035 (diff) | |
ucslugc: move to kernel 2.6.14-rc2 and ucslugc-3
Diffstat (limited to 'packages/linux/nslu2-kernel/2.6.14')
| -rw-r--r-- | packages/linux/nslu2-kernel/2.6.14/25-nslu2-arch-reset.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/packages/linux/nslu2-kernel/2.6.14/25-nslu2-arch-reset.patch b/packages/linux/nslu2-kernel/2.6.14/25-nslu2-arch-reset.patch new file mode 100644 index 0000000000..2fa828cf48 --- /dev/null +++ b/packages/linux/nslu2-kernel/2.6.14/25-nslu2-arch-reset.patch @@ -0,0 +1,39 @@ +# Work round problems with the flash being unreadable on boot. +# +--- linux-2.6.13/.pc/25-nslu2-arch-reset.patch/include/asm-arm/arch-ixp4xx/system.h 2005-08-28 16:41:01.000000000 -0700 ++++ linux-2.6.13/include/asm-arm/arch-ixp4xx/system.h 2005-09-25 23:34:14.762872391 -0700 +@@ -10,6 +10,7 @@ + */ + + #include <asm/hardware.h> ++#include <asm/mach-types.h> + + static inline void arch_idle(void) + { +@@ -22,6 +23,21 @@ + + static inline void arch_reset(char mode) + { ++ /* On NSLU2 machines the flash is sometimes left in a non-read ++ * mode, such that attempting a read will cause problems - such as ++ * a hang. This will prevent both hard and soft reboot since the ++ * first thing done is to read the first instruction from the flash! ++ * Therefore issue a flash reset command here. ++ */ ++ if ( machine_is_nslu2()) { ++ /* Use the physical address here and write the reset command ++ * to the command address (not technically necessary). See ++ * <linux/mtd/cfi.h> for how to calculate this for other ++ * systems. The NSLU2 has one bank of 16 bit flash. ++ */ ++ *(__u16*)(NSLU2_FLASH_BASE+0xAA/*command*/) = 0x00ff/*reset*/; ++ } ++ + if ( 1 && mode == 's') { + /* Jump into ROM at address 0 */ + cpu_reset(0); +@@ -39,4 +55,3 @@ + *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; + } + } +- |