linux-omap2 git: add DPLL patches for beagleboard

2 files changed, 209 insertions, 0 deletions

diff --git a/packages/linux/linux-omap2-git/beagleboard/omap3-dppl-divider.patch b/packages/linux/linux-omap2-git/beagleboard/omap3-dppl-divider.patch
new file mode 100644
index 0000000000..25e5aad9c9
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/omap3-dppl-divider.patch
@@ -0,0 +1,114 @@
+From linux-omap-owner@vger.kernel.org Tue Jun 24 09:24:30 2008
+Received: from localhost
+	([127.0.0.1] helo=dominion ident=koen)
+	by dominion.dominion.void with esmtp (Exim 4.63)
+	(envelope-from <linux-omap-owner@vger.kernel.org>)
+	id 1KB2tB-0005XT-FQ
+	for koen@localhost; Tue, 24 Jun 2008 09:24:30 +0200
+Received: from xs.service.utwente.nl [130.89.5.250]
+	by dominion with POP3 (fetchmail-6.3.6)
+	for <koen@localhost> (single-drop); Tue, 24 Jun 2008 09:24:29 +0200 (CEST)
+Received: from mail.service.utwente.nl ([130.89.5.254]) by exchange.service.utwente.nl with Microsoft SMTPSVC(6.0.3790.3959);
+	 Tue, 24 Jun 2008 09:13:04 +0200
+Received: from mx.utwente.nl ([130.89.2.13]) by mail.service.utwente.nl with Microsoft SMTPSVC(6.0.3790.3959);
+	 Tue, 24 Jun 2008 09:13:03 +0200
+Received: from vger.kernel.org (vger.kernel.org [209.132.176.167])
+          by mx.utwente.nl (8.12.10/SuSE Linux 0.7) with ESMTP id m5O7CcD7008917
+          for <k.kooi@student.utwente.nl>; Tue, 24 Jun 2008 09:12:38 +0200
+Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
+	id S1751623AbYFXHMh (ORCPT <rfc822;k.kooi@student.utwente.nl>);
+	Tue, 24 Jun 2008 03:12:37 -0400
+Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751670AbYFXHMh
+	(ORCPT <rfc822;linux-omap-outgoing>);
+	Tue, 24 Jun 2008 03:12:37 -0400
+Received: from utopia.booyaka.com ([72.9.107.138]:47392 "EHLO
+	utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
+	with ESMTP id S1751623AbYFXHMg (ORCPT
+	<rfc822;linux-omap@vger.kernel.org>); Tue, 24 Jun 2008 03:12:36 -0400
+Received: (qmail 1797 invoked by uid 526); 24 Jun 2008 07:12:35 -0000
+Date: 	Tue, 24 Jun 2008 01:12:35 -0600 (MDT)
+From: Paul Walmsley <paul@pwsan.com>
+To: linux-omap@vger.kernel.org
+Subject: [PATCH] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4
+Message-ID: <alpine.DEB.1.00.0806240111320.9741@utopia.booyaka.com>
+User-Agent: Alpine 1.00 (DEB 882 2007-12-20)
+MIME-Version: 1.0
+Content-Type: TEXT/PLAIN; charset=US-ASCII
+Sender: linux-omap-owner@vger.kernel.org
+Precedence: bulk
+List-ID: <linux-omap.vger.kernel.org>
+X-Mailing-List: 	linux-omap@vger.kernel.org
+X-UTwente-MailScanner-Information: Scanned by MailScanner. Contact servicedesk@icts.utwente.nl for more information.
+X-UTwente-MailScanner: Found to be clean
+X-UTwente-MailScanner-From: linux-omap-owner@vger.kernel.org
+X-Spam-Status: No
+X-OriginalArrivalTime: 24 Jun 2008 07:13:04.0264 (UTC) FILETIME=[BE950880:01C8D5C9]
+
+
+OMAP34xx ES2 TRM Delta G to H states that the divider for DPLL1_FCLK and 
+DPLL2_FCLK can divide by 4 in addition to dividing by 1 and 2. Encode this 
+into the OMAP3 clock framework.
+
+Signed-off-by: Paul Walmsley <paul@pwsan.com>
+---
+
+ arch/arm/mach-omap2/clock34xx.h |   20 ++++++++++++++++----
+ 1 files changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
+index b4dceea..9605744 100644
+--- a/arch/arm/mach-omap2/clock34xx.h
++++ b/arch/arm/mach-omap2/clock34xx.h
+@@ -1029,8 +1029,15 @@ static struct clk corex2_fck = {
+ 
+ /* DPLL power domain clock controls */
+ 
+-static const struct clksel div2_core_clksel[] = {
+-	{ .parent = &core_ck, .rates = div2_rates },
++static const struct clksel_rate div4_rates[] = {
++	{ .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE },
++	{ .div = 2, .val = 2, .flags = RATE_IN_343X },
++	{ .div = 4, .val = 4, .flags = RATE_IN_343X },
++	{ .div = 0 }
++};
++
++static const struct clksel div4_core_clksel[] = {
++	{ .parent = &core_ck, .rates = div4_rates },
+ 	{ .parent = NULL }
+ };
+ 
+@@ -1044,7 +1051,7 @@ static struct clk dpll1_fck = {
+ 	.init		= &omap2_init_clksel_parent,
+ 	.clksel_reg	= _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
+ 	.clksel_mask	= OMAP3430_MPU_CLK_SRC_MASK,
+-	.clksel		= div2_core_clksel,
++	.clksel		= div4_core_clksel,
+ 	.flags		= CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ 				PARENT_CONTROLS_CLOCK,
+ 	.recalc		= &omap2_clksel_recalc,
+@@ -1119,7 +1126,7 @@ static struct clk dpll2_fck = {
+ 	.init		= &omap2_init_clksel_parent,
+ 	.clksel_reg	= _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
+ 	.clksel_mask	= OMAP3430_IVA2_CLK_SRC_MASK,
+-	.clksel		= div2_core_clksel,
++	.clksel		= div4_core_clksel,
+ 	.flags		= CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ 				PARENT_CONTROLS_CLOCK,
+ 	.recalc		= &omap2_clksel_recalc,
+@@ -1155,6 +1162,11 @@ static struct clk iva2_ck = {
+ 
+ /* Common interface clocks */
+ 
++static const struct clksel div2_core_clksel[] = {
++	{ .parent = &core_ck, .rates = div2_rates },
++	{ .parent = NULL }
++};
++
+ static struct clk l3_ick = {
+ 	.name		= "l3_ick",
+ 	.parent		= &core_ck,
+--
+To unsubscribe from this list: send the line "unsubscribe linux-omap" in
+the body of a message to majordomo@vger.kernel.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
+
diff --git a/packages/linux/linux-omap2-git/beagleboard/omap3-jitter.patch b/packages/linux/linux-omap2-git/beagleboard/omap3-jitter.patch
new file mode 100644
index 0000000000..2e0dfd9f13
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/omap3-jitter.patch
@@ -0,0 +1,95 @@
+From linux-omap-owner@vger.kernel.org Tue Jun 24 09:24:30 2008
+Received: from localhost
+	([127.0.0.1] helo=dominion ident=koen)
+	by dominion.dominion.void with esmtp (Exim 4.63)
+	(envelope-from <linux-omap-owner@vger.kernel.org>)
+	id 1KB2tC-0005XT-Mj
+	for koen@localhost; Tue, 24 Jun 2008 09:24:30 +0200
+Received: from xs.service.utwente.nl [130.89.5.250]
+	by dominion with POP3 (fetchmail-6.3.6)
+	for <koen@localhost> (single-drop); Tue, 24 Jun 2008 09:24:30 +0200 (CEST)
+Received: from mail.service.utwente.nl ([130.89.5.253]) by exchange.service.utwente.nl with Microsoft SMTPSVC(6.0.3790.3959);
+	 Tue, 24 Jun 2008 09:20:48 +0200
+Received: from smtp.utwente.nl ([130.89.2.8]) by mail.service.utwente.nl with Microsoft SMTPSVC(6.0.3790.3959);
+	 Tue, 24 Jun 2008 09:20:47 +0200
+Received: from vger.kernel.org (vger.kernel.org [209.132.176.167])
+          by smtp.utwente.nl (8.12.10/SuSE Linux 0.7) with ESMTP id m5O7BPWU031214
+          for <k.kooi@student.utwente.nl>; Tue, 24 Jun 2008 09:11:25 +0200
+Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
+	id S1751128AbYFXHLY (ORCPT <rfc822;k.kooi@student.utwente.nl>);
+	Tue, 24 Jun 2008 03:11:24 -0400
+Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751405AbYFXHLX
+	(ORCPT <rfc822;linux-omap-outgoing>);
+	Tue, 24 Jun 2008 03:11:23 -0400
+Received: from utopia.booyaka.com ([72.9.107.138]:44580 "EHLO
+	utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
+	with ESMTP id S1751128AbYFXHLX (ORCPT
+	<rfc822;linux-omap@vger.kernel.org>); Tue, 24 Jun 2008 03:11:23 -0400
+Received: (qmail 1744 invoked by uid 526); 24 Jun 2008 07:11:21 -0000
+Date: 	Tue, 24 Jun 2008 01:11:21 -0600 (MDT)
+From: Paul Walmsley <paul@pwsan.com>
+To: linux-omap@vger.kernel.org
+Subject: [PATCH] OMAP3 clock: fix DPLL jitter correction and rate
+ programming
+Message-ID: <alpine.DEB.1.00.0806240109440.9741@utopia.booyaka.com>
+User-Agent: Alpine 1.00 (DEB 882 2007-12-20)
+MIME-Version: 1.0
+Content-Type: TEXT/PLAIN; charset=US-ASCII
+Sender: linux-omap-owner@vger.kernel.org
+Precedence: bulk
+List-ID: <linux-omap.vger.kernel.org>
+X-Mailing-List: 	linux-omap@vger.kernel.org
+X-UTwente-MailScanner-Information: Scanned by MailScanner. Contact servicedesk@icts.utwente.nl for more information.
+X-UTwente-MailScanner: Found to be clean
+X-UTwente-MailScanner-From: linux-omap-owner@vger.kernel.org
+X-Spam-Status: No
+X-OriginalArrivalTime: 24 Jun 2008 07:20:48.0265 (UTC) FILETIME=[D325F790:01C8D5CA]
+
+
+Fix DPLL jitter correction programming.  Previously, 
+omap3_noncore_dpll_program() stored the FREQSEL jitter correction 
+parameter to the wrong register.  This caused jitter correction to be set 
+incorrectly and also caused the DPLL divider to be programmed incorrectly.
+
+Also, fix DPLL divider programming.  An off-by-one error existed in 
+omap3_noncore_dpll_program(), causing DPLLs to be programmed with a higher 
+divider than intended.
+
+Signed-off-by: Paul Walmsley <paul@pwsan.com>
+---
+
+ arch/arm/mach-omap2/clock34xx.c |   13 ++++++++-----
+ 1 files changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
+index 408b51a..8fdf8f3 100644
+--- a/arch/arm/mach-omap2/clock34xx.c
++++ b/arch/arm/mach-omap2/clock34xx.c
+@@ -346,14 +346,17 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
+ 	/* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
+ 	_omap3_noncore_dpll_bypass(clk);
+ 
++	/* Set jitter correction */
++	v = __raw_readl(dd->control_reg);
++	v &= ~dd->freqsel_mask;
++	v |= freqsel << __ffs(dd->freqsel_mask);
++	__raw_writel(v, dd->control_reg);
++
++	/* Set DPLL multiplier, divider */
+ 	v = __raw_readl(dd->mult_div1_reg);
+ 	v &= ~(dd->mult_mask | dd->div1_mask);
+-
+-	/* Set mult (M), div1 (N), freqsel */
+ 	v |= m << __ffs(dd->mult_mask);
+-	v |= n << __ffs(dd->div1_mask);
+-	v |= freqsel << __ffs(dd->freqsel_mask);
+-
++	v |= (n - 1) << __ffs(dd->div1_mask);
+ 	__raw_writel(v, dd->mult_div1_reg);
+ 
+ 	/* We let the clock framework set the other output dividers later */
+--
+To unsubscribe from this list: send the line "unsubscribe linux-omap" in
+the body of a message to majordomo@vger.kernel.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
+