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authorKoen Kooi <koen@openembedded.org>2009-01-30 13:25:14 +0100
committerKoen Kooi <koen@openembedded.org>2009-01-30 13:25:14 +0100
commitc74e1d46b68f67f059050263ebb434a3d7344657 (patch)
tree0e913a2f32296da798ba6cd4a9f3dcea26da43c4 /packages/linux/linux-2.6.28/stb225/ebase-fix.patch
parent2466a29b608e4725de8e71e4c38618b0b9bfe088 (diff)
parentc49f410e88a5828c198ebbe3f781bc9e5ab1a347 (diff)
Merge branch 'org.openembedded.dev' of git@git.openembedded.net:openembedded into org.openembedded.dev
Diffstat (limited to 'packages/linux/linux-2.6.28/stb225/ebase-fix.patch')
-rw-r--r--packages/linux/linux-2.6.28/stb225/ebase-fix.patch37
1 files changed, 37 insertions, 0 deletions
diff --git a/packages/linux/linux-2.6.28/stb225/ebase-fix.patch b/packages/linux/linux-2.6.28/stb225/ebase-fix.patch
new file mode 100644
index 0000000000..bdd82ac1d5
--- /dev/null
+++ b/packages/linux/linux-2.6.28/stb225/ebase-fix.patch
@@ -0,0 +1,37 @@
+diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
+index f6083c6..b3bcd3a 100644
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -1592,8 +1592,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
+ #ifdef CONFIG_64BIT
+ unsigned long uncached_ebase = TO_UNCAC(ebase);
+ #endif
+- if (cpu_has_mips_r2)
+- ebase += (read_c0_ebase() & 0x3ffff000);
+
+ if (!addr)
+ panic(panic_null_cerr);
+@@ -1629,8 +1627,6 @@ void __init trap_init(void)
+ ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
+ else {
+ ebase = CAC_BASE;
+- if (cpu_has_mips_r2)
+- ebase += (read_c0_ebase() & 0x3ffff000);
+ }
+
+ per_cpu_trap_init();
+@@ -1739,11 +1735,11 @@ void __init trap_init(void)
+
+ if (cpu_has_vce)
+ /* Special exception: R4[04]00 uses also the divec space. */
+- memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100);
++ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
+ else if (cpu_has_4kex)
+- memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
++ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
+ else
+- memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
++ memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
+
+ signal_init();
+ #ifdef CONFIG_MIPS32_COMPAT