diff options
author | Rod Whitby <rod@whitby.id.au> | 2006-06-20 11:16:41 +0000 |
---|---|---|
committer | OpenEmbedded Project <openembedded-devel@lists.openembedded.org> | 2006-06-20 11:16:41 +0000 |
commit | 9d22c00dd63f99a2db8731905f96233cef7949f6 (patch) | |
tree | 50e6705ecb997280d7c915abef0c0e2ec8851167 /packages/ixp4xx | |
parent | 63685be96ca10cfe0fab542c7a3750efbbc4aa28 (diff) |
ixp4xx: version 2.1.1 of the access library added - compiles, untested, requires microcode loading support to be written before use.
Diffstat (limited to 'packages/ixp4xx')
21 files changed, 990 insertions, 0 deletions
diff --git a/packages/ixp4xx/ixp-osal-2.1.1/.mtn2git_empty b/packages/ixp4xx/ixp-osal-2.1.1/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/.mtn2git_empty diff --git a/packages/ixp4xx/ixp-osal-2.1.1/2.6.patch b/packages/ixp4xx/ixp-osal-2.1.1/2.6.patch new file mode 100644 index 0000000000..9725b447c8 --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/2.6.patch @@ -0,0 +1,143 @@ + os/linux/src/core/IxOsalOsMsgQ.c | 2 +- + os/linux/src/core/IxOsalOsSemaphore.c | 6 +++--- + os/linux/src/core/IxOsalOsServices.c | 20 ++++++++++++++++---- + os/linux/src/core/IxOsalOsThread.c | 7 +------ + 4 files changed, 21 insertions(+), 14 deletions(-) + +--- ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c 1970-01-01 00:00:00.000000000 +0000 +@@ -45,9 +45,9 @@ + * -- End Intel Copyright Notice -- + */ + #include <linux/linkage.h> ++#include <linux/spinlock.h> + #include <linux/ipc.h> + #include <linux/msg.h> +-#include <linux/spinlock.h> + #include <linux/interrupt.h> + + #include "IxOsal.h" +--- ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c 1970-01-01 00:00:00.000000000 +0000 +@@ -46,7 +46,7 @@ + */ + + #include <linux/slab.h> +-#include <asm-arm/hardirq.h> ++#include <linux/hardirq.h> + #include "IxOsal.h" + + /* Define a large number */ +@@ -93,7 +93,7 @@ ixOsalSemaphoreWait (IxOsalOsSemaphore * + { + + IX_STATUS ixStatus = IX_SUCCESS; +- UINT32 timeoutTime; ++ unsigned long timeoutTime; + + if (sid == NULL) + { +@@ -261,7 +261,7 @@ ixOsalMutexInit (IxOsalMutex * mutex) + PUBLIC IX_STATUS + ixOsalMutexLock (IxOsalMutex * mutex, INT32 timeout) + { +- UINT32 timeoutTime; ++ unsigned long timeoutTime; + + if (in_irq ()) + { +--- ixp_osal/os/linux/src/core/IxOsalOsServices.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsServices.c 1970-01-01 00:00:00.000000000 +0000 +@@ -54,6 +54,7 @@ + #include <linux/time.h> + #include <linux/sched.h> + #include <linux/slab.h> ++#include <linux/interrupt.h> + + #include "IxOsal.h" + +@@ -89,7 +90,7 @@ static IxOsalInfoType IxOsalInfo[NR_IRQS + /* + * General interrupt handler + */ +-static void ++static irqreturn_t + ixOsalOsIsrProxy (int irq, void *dev_id, struct pt_regs *regs) + { + IxOsalInfoType *isr_proxy_info = (IxOsalInfoType *) dev_id; +@@ -98,6 +99,7 @@ ixOsalOsIsrProxy (int irq, void *dev_id, + "ixOsalOsIsrProxy: Interrupt used before ixOsalIrqBind was invoked"); + + isr_proxy_info->routine (isr_proxy_info->parameter); ++ return IRQ_HANDLED; + } + + /* +@@ -105,11 +107,12 @@ ixOsalOsIsrProxy (int irq, void *dev_id, + * This handler saves the interrupted Program Counter (PC) + * into a global variable + */ +-static void ++static irqreturn_t + ixOsalOsIsrProxyWithPC (int irq, void *dev_id, struct pt_regs *regs) + { + ixOsalLinuxInterruptedPc = regs->ARM_pc; + ixOsalOsIsrProxy(irq, dev_id, regs); ++ return IRQ_HANDLED; + } + + /************************************** +@@ -191,10 +194,15 @@ ixOsalIrqUnbind (UINT32 vector) + PUBLIC UINT32 + ixOsalIrqLock () + { ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++ unsigned long flags; ++ local_irq_save(flags); ++#else + UINT32 flags; + save_flags (flags); + cli (); +- return flags; ++#endif ++ return (UINT32)flags; + } + + /* Enable interrupts and task scheduling, +@@ -204,7 +212,11 @@ ixOsalIrqLock () + PUBLIC void + ixOsalIrqUnlock (UINT32 lockKey) + { ++# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++ local_irq_restore((unsigned long)lockKey); ++# else + restore_flags (lockKey); ++# endif + } + + PUBLIC UINT32 +@@ -329,7 +341,7 @@ ixOsalBusySleep (UINT32 microseconds) + PUBLIC void + ixOsalSleep (UINT32 milliseconds) + { +- if (milliseconds != 0) ++ if (milliseconds*HZ >= 1000) + { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout ((milliseconds * HZ) / 1000); +--- ixp_osal/os/linux/src/core/IxOsalOsThread.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsThread.c 1970-01-01 00:00:00.000000000 +0000 +@@ -65,12 +65,7 @@ thread_internal (void *unused) + void *arg = IxOsalOsThreadData.arg; + static int seq = 0; + +- daemonize (); +- reparent_to_init (); +- +- exit_files (current); +- +- snprintf(current->comm, sizeof(current->comm), "IxOsal %d", ++seq); ++ daemonize ("IxOsal %d", ++seq); + + up (&IxOsalThreadMutex); + diff --git a/packages/ixp4xx/ixp-osal-2.1.1/Makefile.patch b/packages/ixp4xx/ixp-osal-2.1.1/Makefile.patch new file mode 100644 index 0000000000..1558e9cdb3 --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/Makefile.patch @@ -0,0 +1,30 @@ + Makefile | 2 +- + os/linux/make/macros.mk | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +--- ixp_osal/Makefile 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/Makefile 1970-01-01 00:00:00.000000000 +0000 +@@ -185,7 +185,7 @@ endif + INCLUDE_DIRS = include $(OSAL_DIRS:%=$(MAIN_INC_PREFIX)/%) $(OSAL_DIRS:%=$(OS_INC_PREFIX)/%) + + ifeq ($(IX_OSAL_MK_HOST_OS), linux) +-INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp425/ ++INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp4xx/ + endif + + CFLAGS += $(INCLUDE_DIRS:%=-I%) +--- ixp_osal/os/linux/make/macros.mk 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/make/macros.mk 1970-01-01 00:00:00.000000000 +0000 +@@ -88,10 +88,10 @@ AR := $(LINUX_CROSS_COMPILE)ar + # Compiler & linker options + + # Compiler flags +-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale ++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale + + CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common \ +- -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE \ ++ -pipe -msoft-float -DMODULE \ + -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS) -DEXPORT_SYMTAB + + # Linux linker flags diff --git a/packages/ixp4xx/ixp-osal-2.1.1/assert.patch b/packages/ixp4xx/ixp-osal-2.1.1/assert.patch new file mode 100644 index 0000000000..a03113dcc2 --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/assert.patch @@ -0,0 +1,41 @@ +# Unnecessary patch - reduces the code size slightly, gives clearer +# messages if IX_OSAL_ENSURE_ON is set +# include/IxOsalAssert.h | 4 ++-- +# os/linux/include/core/IxOsalOsAssert.h | 9 ++++++++- +# 2 files changed, 10 insertions(+), 3 deletions(-) +# +--- ixp_osal/include/IxOsalAssert.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/include/IxOsalAssert.h 1970-01-01 00:00:00.000000000 +0000 +@@ -72,8 +72,8 @@ + */ + #ifdef IX_OSAL_ENSURE_ON + #define IX_OSAL_ENSURE(c, str) do { \ +-if (!(c)) ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, str, \ +-0, 0, 0, 0, 0, 0); } while (0) ++if (!(c)) ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, __FILE__ ": line %d: " str, \ ++__LINE__, 0, 0, 0, 0, 0); } while (0) + + #else + #define IX_OSAL_ENSURE(c, str) +--- ixp_osal/os/linux/include/core/IxOsalOsAssert.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/core/IxOsalOsAssert.h 1970-01-01 00:00:00.000000000 +0000 +@@ -47,11 +47,18 @@ + + #ifndef IxOsalOsAssert_H + #define IxOsalOsAssert_H ++#ifdef IX_OSAL_ENSURE_ON + #define IX_OSAL_OS_ASSERT(c) if(!(c)) \ + { \ +- ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, "Assertion failure \n", 0, 0, 0, 0, 0, 0);\ ++ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, "%s line %d: Assertion failure: %s\n", (int)__FILE__, __LINE__, (int)#c, 0, 0, 0);\ + BUG(); \ + } ++#else ++#define IX_OSAL_OS_ASSERT(c) if(!(c)) \ ++ { \ ++ BUG(); \ ++ } ++#endif + + /* + * Place holder. diff --git a/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch b/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch new file mode 100644 index 0000000000..33c1d132db --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch @@ -0,0 +1,115 @@ + os/linux/include/core/IxOsalOs.h | 17 ++++++++++ + os/linux/src/core/IxOsalOsCacheMMU.c | 56 +++++++++++++++++++++++++++++++++++ + os/linux/src/core/IxOsalOsSymbols.c | 4 ++ + 3 files changed, 76 insertions(+), 1 deletion(-) + +--- ixp_osal/os/linux/include/core/IxOsalOs.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/core/IxOsalOs.h 1970-01-01 00:00:00.000000000 +0000 +@@ -56,6 +56,7 @@ + #include <linux/cache.h> + #include <linux/mm.h> + #include <linux/config.h> ++#include <linux/version.h> + #include <asm/pgalloc.h> + + /** +@@ -66,9 +67,23 @@ + + #define IX_OSAL_OS_MMU_PHYS_TO_VIRT(addr) ((addr) ? phys_to_virt((unsigned int)(addr)) : 0) + +-#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++/* ++ * 2.6 kernels do not export the required cache functions. ++ */ ++extern void ixOsalCacheInvalidateRange(unsigned long start, unsigned long size); ++extern void ixOsalCacheFlushRange(unsigned long start, unsigned long size); ++ ++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) \ ++ixOsalCacheInvalidateRange((unsigned long)addr, (unsigned long)addr + size) ++#define IX_OSAL_OS_CACHE_FLUSH(addr, size) \ ++ixOsalCacheFlushRange((unsigned long)addr, (unsigned long)addr + size ) + ++#else ++ ++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) + #define IX_OSAL_OS_CACHE_FLUSH(addr, size) ( clean_dcache_range((__u32)addr, (__u32)addr + size )) ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */ + + /* Cache preload not available*/ + #define IX_OSAL_OS_CACHE_PRELOAD(addr,size) {} +--- ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 1970-01-01 00:00:00.000000000 +0000 +@@ -210,3 +210,59 @@ ixOsalCacheDmaFree (void *ptr) + free_pages ((unsigned int) memptr, order); + } + } ++ ++ ++/* ++ * 2.6 kernels do not export the required cache functions. ++ */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++ ++#define _IX_STR(x) #x ++#define IX_STR(x) _IX_STR(x) ++#define IX_CLM IX_STR(IX_OSAL_CACHE_LINE_SIZE-1) ++ ++/* ++ * reimplementation of kernel's invalidate_dcache_range() ++ */ ++void ++ixOsalCacheInvalidateRange(unsigned long start, unsigned long size) ++{ ++ __asm__ ++ (" tst %0, #" IX_CLM "\n" ++ " mcrne p15, 0, %0, c7, c10, 1 @ clean D cache line\n" ++ " bic %0, %0, #" IX_CLM "\n" ++ " tst %1, #" IX_CLM "\n" ++ " mcrne p15, 0, %1, c7, c10, 1 @ clean D cache line\n" ++ "1: mcr p15, 0, %0, c7, c6, 1 @ invalidate D cache line\n" ++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n" ++ " cmp %0, %1\n" ++ " blo 1b\n" ++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n" ++ : /* no output */ ++ : "r"(start), "r"(size) ++ : "cc"); ++} ++ ++/* ++ * reimplementation of kernel's invalidate_dcache_range() ++ */ ++void ++ixOsalCacheFlushRange(unsigned long start, unsigned long size) ++{ ++ __asm__ ++ (" bic %0, %0, #" IX_CLM "\n" ++ "1: mcr p15, 0, %0, c7, c10, 1 @ clean D cache line\n" ++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n" ++ " cmp %0, %1\n" ++ " blo 1b\n" ++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n" ++ : /* no output */ ++ : "r"(start), "r"(size) ++ : "cc"); ++} ++ ++#undef _IX_STR ++#undef IX_STR ++#undef IX_CLM ++ ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */ +--- ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 1970-01-01 00:00:00.000000000 +0000 +@@ -64,6 +64,10 @@ EXPORT_SYMBOL (ixOsalMemSet); + + EXPORT_SYMBOL (ixOsalCacheDmaMalloc); + EXPORT_SYMBOL (ixOsalCacheDmaFree); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++EXPORT_SYMBOL (ixOsalCacheInvalidateRange); ++EXPORT_SYMBOL (ixOsalCacheFlushRange); ++#endif + + EXPORT_SYMBOL (ixOsalThreadCreate); + EXPORT_SYMBOL (ixOsalThreadStart); diff --git a/packages/ixp4xx/ixp-osal-2.1.1/ixp4xx-header.patch b/packages/ixp4xx/ixp-osal-2.1.1/ixp4xx-header.patch new file mode 100644 index 0000000000..a9d87d4b56 --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/ixp4xx-header.patch @@ -0,0 +1,115 @@ + os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Base.h | 72 ++++++++++ + os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h | 10 - + 2 files changed, 78 insertions(+), 4 deletions(-) + +--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 1970-01-01 00:00:00.000000000 +0000 +@@ -53,6 +53,8 @@ + #error "Error: IxOsalOsIxp425Sys.h cannot be included directly before IxOsalOsIxp400.h" + #endif + ++#include "IxOsalOsIxp425Base.h" ++ + /* Memory Base Address */ + #define IX_OSAL_IXP400_EXP_BUS_PHYS_BASE IXP425_EXP_BUS_BASE2_PHYS + #define IX_OSAL_IXP400_EXP_BUS_BOOT_PHYS_BASE IXP425_EXP_BUS_BASE1_PHYS +@@ -98,12 +100,12 @@ IxOsalMemoryMap ixOsalGlobalMemoryMap[] + * Queue Manager + */ + { +- IX_OSAL_STATIC_MAP, /* type */ ++ IX_OSAL_DYNAMIC_MAP, /* type */ + IX_OSAL_IXP400_QMGR_PHYS_BASE, /* physicalAddress */ + IX_OSAL_IXP400_QMGR_MAP_SIZE, /* size */ +- IX_OSAL_IXP400_QMGR_VIRT_BASE, /* virtualAddress */ +- NULL, /* mapFunction */ +- NULL, /* unmapFunction */ ++ 0, /* virtualAddress */ ++ ixOsalLinuxMemMap, /* mapFunction */ ++ ixOsalLinuxMemUnmap, /* unmapFunction */ + 0, /* refCount */ + IX_OSAL_BE | IX_OSAL_LE_DC, /* endianType */ + "qMgr" /* name */ +--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Base.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Base.h 1970-01-01 00:00:00.000000000 +0000 +@@ -0,0 +1,80 @@ ++/* ++ * Glue for the current linux definitons of this stuff. ++ */ ++#ifndef IxOsalOsIxp425Base_H ++#define IxOsalOsIxp425Base_H 1 ++#include <asm-arm/arch-ixp4xx/ixp4xx-regs.h> ++#include <linux/version.h> ++ ++/* Force Address Coherent (the default) mapping on LE - Linux 2.6 ++ * does not have a way of changing it. ++ */ ++#if defined IX_OSAL_LINUX_LE ++# if !defined IX_OSAL_ENFORCED_LE_AC_MAPPING ++# define IX_OSAL_ENFORCED_LE_AC_MAPPING ++# endif ++# if defined IX_OSAL_LE_DC_MAPPING ++# error Little Endian Data Coherent mapping not supported on this platform ++# endif ++ ++/* This doesn't matter on a BE build because it will never be used, ++ * however it will be selected and will fail on an LE build. ++ */ ++# undef IX_OSAL_LE_DC ++# define IX_OSAL_LE_DC IX_OSAL_LE_DC_IS_INVALID_ON_THIS_PLATFORM ++#endif ++ ++/* Physical addresses. */ ++#define IXP425_PERIPHERAL_BASE_PHYS IXP4XX_PERIPHERAL_BASE_PHYS ++#define IXP425_EXP_CFG_BASE_PHYS IXP4XX_EXP_CFG_BASE_PHYS ++#define IXP425_PCI_CFG_BASE_PHYS IXP4XX_PCI_CFG_BASE_PHYS ++ ++//#define IXP425_EXP_BUS_BASE1_PHYS ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) ++#define IXP425_EXP_BUS_BASE2_PHYS IXP4XX_EXP_BUS_CS2_BASE_PHYS ++#else ++/* The following definition should be IXP4XX_EXP_BUS_BASE(2), but that is not ++ static and causes compilation problems later. So we need to hard-code it. ++ Note that this hard-coded value is only correct for IXP42X. */ ++#define IXP425_EXP_BUS_BASE2_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + (2 * SZ_16M)) ++#endif ++//#define IXP425_EXP_BUS_CS0_BASE_PHYS ++//#define IXP425_EXP_BUS_CS1_BASE_PHYS ++//#define IXP425_EXP_BUS_CS4_BASE_PHYS ++#define IXP425_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) ++#define IXP425_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) ++//#define IXP425_GPIO_BASE_PHYS ++#define IXP425_INTC_BASE_PHYS IXP4XX_INTC_BASE_PHYS ++//#define IXP425_NPEA_BASE_PHYS ++//#define IXP425_NPEB_BASE_PHYS ++//#define IXP425_NPEC_BASE_PHYS ++//#define IXP425_PMU_BASE_PHYS ++#define IXP425_QMGR_BASE_PHYS IXP4XX_QMGR_BASE_PHYS ++#define IXP425_TIMER_BASE_PHYS IXP4XX_TIMER_BASE_PHYS ++//#define IXP425_UART1_BASE_PHYS ++//#define IXP425_UART2_BASE_PHYS ++#define IXP425_USB_BASE_PHYS IXP4XX_USB_BASE_PHYS ++ ++/* Virtual addresses. */ ++#define IXP425_PERIPHERAL_BASE_VIRT IXP4XX_PERIPHERAL_BASE_VIRT ++#define IXP425_PERIPHERAL_REGION_SIZE IXP4XX_PERIPHERAL_REGION_SIZE ++#define IXP425_EXP_CFG_BASE_VIRT IXP4XX_EXP_CFG_BASE_VIRT ++#define IXP425_PCI_CFG_BASE_VIRT IXP4XX_PCI_CFG_BASE_VIRT ++ ++//#define IXP425_EthA_BASE_VIRT ++//#define IXP425_EthB_BASE_VIRT ++//#define IXP425_GPIO_BASE_VIRT ++//#define IXP425_NPEA_BASE_VIRT ++//#define IXP425_NPEB_BASE_VIRT ++//#define IXP425_NPEC_BASE_VIRT ++//#define IXP425_QMGR_BASE_VIRT /* must be ioremapped on Linux 2.6 */ ++//#define IXP425_TIMER_BASE_VIRT ++//#define IXP425_UART1_BASE_VIRT ++//#define IXP425_UART2_BASE_VIRT ++//#define IXP425_USB_BASE_VIRT ++ ++/* Miscellaneous stuff. */ ++#define IRQ_IXP425_XSCALE_PMU IRQ_IXP4XX_XSCALE_PMU ++#define IXP425_ICMR IXP4XX_ICMR ++#define IRQ_IXP425_USB IRQ_IXP4XX_USB ++#endif diff --git a/packages/ixp4xx/ixp-osal-2.1.1/le.patch b/packages/ixp4xx/ixp-osal-2.1.1/le.patch new file mode 100644 index 0000000000..a6936ea33b --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/le.patch @@ -0,0 +1,72 @@ + include/modules/ioMem/IxOsalIoMem.h | 4 ++-- + include/modules/ioMem/IxOsalMemAccess.h | 2 +- + os/linux/include/platforms/ixp400/IxOsalOsIxp400CustomizedMapping.h | 2 +- + os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h | 2 +- + os/linux/src/modules/ioMem/IxOsalOsIoMem.c | 3 +++ + 5 files changed, 8 insertions(+), 5 deletions(-) + +--- ixp_osal/include/modules/ioMem/IxOsalIoMem.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/include/modules/ioMem/IxOsalIoMem.h 1970-01-01 00:00:00.000000000 +0000 +@@ -117,8 +117,8 @@ ixOsalCoreWordSwap (UINT32 wordIn) + #endif /* ndef __wince */ + + #define IX_OSAL_SWAP_SHORT(sData) ((sData >> 8) | ((sData & 0xFF) << 8)) +-#define IX_OSAL_SWAP_SHORT_ADDRESS(sAddr) ((sAddr) ^ 0x2) +-#define IX_OSAL_SWAP_BYTE_ADDRESS(bAddr) ((bAddr) ^ 0x3) ++#define IX_OSAL_SWAP_SHORT_ADDRESS(sAddr) ((UINT16*)((UINT32)(sAddr) ^ 0x2)) ++#define IX_OSAL_SWAP_BYTE_ADDRESS(bAddr) ((UINT8*)((UINT32)(bAddr) ^ 0x3)) + + #define IX_OSAL_BE_XSTOBUSL(wData) (wData) + #define IX_OSAL_BE_XSTOBUSS(sData) (sData) +--- ixp_osal/include/modules/ioMem/IxOsalMemAccess.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/include/modules/ioMem/IxOsalMemAccess.h 1970-01-01 00:00:00.000000000 +0000 +@@ -84,7 +84,7 @@ + + #elif defined (IX_OSAL_LINUX_LE) + +-#define IX_SDRAM_LE_DATA_COHERENT ++#define IX_SDRAM_LE_ADDRESS_COHERENT + + #elif defined (IX_OSAL_WINCE_LE) + +--- ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400CustomizedMapping.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400CustomizedMapping.h 1970-01-01 00:00:00.000000000 +0000 +@@ -171,7 +171,7 @@ + ***************************/ + #if (IX_COMPONENT_NAME == ix_qmgr) + +-#define IX_OSAL_LE_DC_MAPPING ++#define IX_OSAL_LE_AC_MAPPING + + #endif /* qmgr */ + +--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 1970-01-01 00:00:00.000000000 +0000 +@@ -107,7 +107,7 @@ IxOsalMemoryMap ixOsalGlobalMemoryMap[] + ixOsalLinuxMemMap, /* mapFunction */ + ixOsalLinuxMemUnmap, /* unmapFunction */ + 0, /* refCount */ +- IX_OSAL_BE | IX_OSAL_LE_DC, /* endianType */ ++ IX_OSAL_BE | IX_OSAL_LE_AC, /* endianType */ + "qMgr" /* name */ + }, + +--- ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c 1970-01-01 00:00:00.000000000 +0000 +@@ -45,6 +45,7 @@ + * -- End Intel Copyright Notice -- + */ + ++#include <asm/page.h> + #include <asm/io.h> + #include <linux/ioport.h> + +@@ -54,6 +55,8 @@ + PUBLIC void + ixOsalLinuxMemMap (IxOsalMemoryMap * map) + { ++ /* Linux requires LE mappings to use address coherency */ ++ IX_OSAL_ENSURE((map->mapEndianType & IX_OSAL_LE_DC) == 0, "LE Data Coherency not supported"); + map->virtualAddress = (UINT32) ioremap (map->physicalAddress, map->size); + } + diff --git a/packages/ixp4xx/ixp-osal_2.1.1.bb b/packages/ixp4xx/ixp-osal_2.1.1.bb new file mode 100644 index 0000000000..926d720f3a --- /dev/null +++ b/packages/ixp4xx/ixp-osal_2.1.1.bb @@ -0,0 +1,101 @@ +DEFAULT_PREFERENCE = "-1" +# Intel ixp4xx access library software. Note that this has an Intel +# license which restricts its use. +MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>" +HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm" +LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm" +LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm" +# You must download the following software to your OpenEmbedded downloads +# directory before using this package: +# +# BSD_ixp400AccessLibrary-2_1.zip +# BSD_ixp400AccessLibrary-2_1_1.zip +# +# To do this go to the LICENSE_HOMEPAGE above, register/login (using a +# web browser which is supported by the login page), this will give you +# access to the web page from which you can download the software - you +# need the: "IntelĀ® IXP400 Software and RedBoot* Boot Loader" and, from +# this the "Intel Hardware Access Software" (versions 2.1 encryption is +# not required.) +# +# Store the file with the name given below in your downloads directory +# and store the 32 character md5sum of the file in a file of the same +# name with the additional extension .md5: +# +# BSD_ixp400AccessLibrary-2_1.zip.md5 +# BSD_ixp400AccessLibrary-2_1_1.zip.md5 +# +SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/BSD_ixp400AccessLibrary-2_1.zip" +SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/BSD_ixp400AccessLibrary-2_1_1.zip" +SRC_URI += "file://Makefile.patch;patch=1" +SRC_URI += "file://2.6.patch;patch=1" +SRC_URI += "file://invalidate-cache.patch;patch=1" +SRC_URI += "file://ixp4xx-header.patch;patch=1" +SRC_URI += "file://le.patch;patch=1" +SRC_URI += "file://assert.patch;patch=1" + +S = "${WORKDIR}/ixp_osal" +PR = "r0" + +COMPATIBLE_HOST = "^arm.*-linux.*" + +inherit module + +do_pre_patch () { + ( cd ${WORKDIR} ; mkdir patches ; mv BSD_ixp400AccessLibrary-2_1_1.patch patches/ ; \ + echo "BSD_ixp400AccessLibrary-2_1_1.patch -p0" >> patches/series ; \ + quilt push ) +} + +addtask pre_patch before do_patch + +IX_TARGET = "linux${ARCH_BYTE_SEX}" +IX_ENSURE = "" +#IX_ENSURE = "IX_OSAL_ENSURE_ON=1" + +EXTRA_OEMAKE = "'CC=${KERNEL_CC}' \ + 'LD=${KERNEL_LD}' \ + 'AR=${AR}' \ + 'IX_XSCALE_SW=${S}' \ + 'IX_TARGET=${IX_TARGET}' \ + 'IX_DEVICE=ixp42X' \ + ${IX_ENSURE} \ + 'LINUX_SRC=${STAGING_KERNEL_DIR}' \ + 'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \ + " + +OSAL_PATH = "lib/ixp425/linux/${IX_TARGET}" +# This is a somewhat arbitrary choice: +OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal" + +do_compile () { + oe_runmake ${OSAL_PATH}/libosal.a ${OSAL_PATH}/ixp_osal.o +} + +do_stage () { + # Clean the directory first, this ensures incremental builds have + # a slightly better chance of working + rm -rf ${OSAL_DIR} + install -d ${OSAL_DIR} + + # First the include files, maintain the tree structure (ixp4xx-csr + # expects the exact same tree) + cp -rf --dereference include ${OSAL_DIR} + install -d ${OSAL_DIR}/os/linux + cp -rf --dereference os/linux/include ${OSAL_DIR}/os/linux + + # Install the library/object + install -d ${OSAL_DIR}/${OSAL_PATH} + rm -f ${OSAL_DIR}/libosal + install -m 0644 ${OSAL_PATH}/libosal.a ${OSAL_DIR}/${OSAL_PATH} + touch ${OSAL_DIR}/libosal + rm -f ${OSAL_DIR}/module + install -m 0644 ${OSAL_PATH}/ixp_osal.o ${OSAL_DIR}/${OSAL_PATH} + touch ${OSAL_DIR}/module +} + +# This stuff doesn't install anything... +PACKAGES = "" + +do_install () { +} diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/.mtn2git_empty b/packages/ixp4xx/ixp4xx-csr-2.1.1/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/.mtn2git_empty diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/Makefile.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/Makefile.patch new file mode 100644 index 0000000000..f082b713f0 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/Makefile.patch @@ -0,0 +1,26 @@ +--- ixp400_xscale_sw/Makefile 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/Makefile 1970-01-01 00:00:00.000000000 +0000 +@@ -297,9 +297,9 @@ endif + else # IX_TARGET_OS == vxworks + # linux compiler flags + MAKE_DEP_FLAG := -M +-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale ++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale + +-CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS) ++CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS) + ifndef IX_INCLUDE_MICROCODE + CFLAGS += -DIX_NPEDL_READ_MICROCODE_FROM_FILE + endif +@@ -867,9 +867,11 @@ $(NPE_DAT) : $(NPE_CONVERTER) + + ifeq ($(IX_HOST_OS),linux) + ifndef IX_INCLUDE_MICROCODE ++ifdef IX_BUILD_MICROCODE + Makefile: $(NPE_CONVERTER) $(NPE_DAT) + endif + endif ++endif + + ################################################################ + # Rules to check that macros are defined. diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/bit-macro.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/bit-macro.patch new file mode 100644 index 0000000000..6efdba5c1e --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/bit-macro.patch @@ -0,0 +1,14 @@ +--- ixp400_xscale_sw/src/include/IxTypes.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/include/IxTypes.h 1970-01-01 00:00:00.000000000 +0000 +@@ -79,6 +79,10 @@ + #endif + #endif + ++#ifndef BIT ++#define BIT(x) ((1)<<(x)) ++#endif ++ + #include "IxOsalBackward.h" + + #endif /* IxTypes_H */ + diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/gcc4.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/gcc4.patch new file mode 100644 index 0000000000..a701328dd1 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/gcc4.patch @@ -0,0 +1,23 @@ +--- ixp400/src/npeMh/IxNpeMhSymbols.c~ 2006-01-08 03:13:28.000000000 +1030 ++++ ixp400/src/npeMh/IxNpeMhSymbols.c 2006-01-09 00:56:57.000000000 +1030 +@@ -52,6 +52,7 @@ + + #include <linux/module.h> + #include <IxNpeMh.h> ++#include <IxNpeMhConfig_p.h> + + EXPORT_SYMBOL(ixNpeMhInitialize); + EXPORT_SYMBOL(ixNpeMhUnload); +@@ -67,9 +68,9 @@ extern BOOL ixNpeMhConfigInFifoIsFull(Ix + extern BOOL ixNpeMhConfigOutFifoIsEmpty (IxNpeMhNpeId npeId); + extern void ixNpeMhConfigLockRelease (IxNpeMhNpeId npeId); + extern void ixNpeMhConfigLockGet (IxNpeMhNpeId npeId); +-extern void ixNpeMhConfigOutFifoRead (IxNpeMhNpeId npeId,IxNpeMhMessage *message); +-extern void ixNpeMhConfigInFifoWrite (IxNpeMhNpeId npeId,IxNpeMhMessage message); +-extern struct ixNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES]; ++extern IX_STATUS ixNpeMhConfigOutFifoRead (IxNpeMhNpeId npeId,IxNpeMhMessage *message); ++extern IX_STATUS ixNpeMhConfigInFifoWrite (IxNpeMhNpeId npeId,IxNpeMhMessage message); ++extern IxNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES]; + + EXPORT_SYMBOL(ixNpeMhConfigInFifoIsFull); + EXPORT_SYMBOL(ixNpeMhConfigOutFifoIsEmpty); diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/ixethdb-header.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/ixethdb-header.patch new file mode 100644 index 0000000000..8ab22bee89 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/ixethdb-header.patch @@ -0,0 +1,11 @@ +--- ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h 1970-01-01 00:00:00.000000000 +0000 +@@ -693,7 +693,7 @@ IX_ETH_DB_PUBLIC UINT32 ixEthDBEntryXORH + IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyXORHash(void *macAddress); + + /* Port updates */ +-IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBFeature type); ++IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBRecordType type); + IX_ETH_DB_PUBLIC void ixEthDBUpdatePortLearningTrees(IxEthDBPortMap triggerPorts); + IX_ETH_DB_PUBLIC void ixEthDBNPEAccessRequest(IxEthDBPortId portID); + IX_ETH_DB_PUBLIC void ixEthDBUpdateLock(void); diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/ixnpemhconfigisr-is-private.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/ixnpemhconfigisr-is-private.patch new file mode 100644 index 0000000000..54faadf34a --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/ixnpemhconfigisr-is-private.patch @@ -0,0 +1,18 @@ +--- ixp400_xscale_sw/src/npeMh/IxNpeMhSymbols.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/npeMh/IxNpeMhSymbols.c 1970-01-01 00:00:00.000000000 +0000 +@@ -63,7 +63,6 @@ EXPORT_SYMBOL(ixNpeMhMessagesReceive); + EXPORT_SYMBOL(ixNpeMhShow); + EXPORT_SYMBOL(ixNpeMhShowReset); + +-extern void ixNpeMhConfigIsr (void *parameter); + extern BOOL ixNpeMhConfigInFifoIsFull(IxNpeMhNpeId npeId); + extern BOOL ixNpeMhConfigOutFifoIsEmpty (IxNpeMhNpeId npeId); + extern void ixNpeMhConfigLockRelease (IxNpeMhNpeId npeId); +@@ -72,7 +71,6 @@ extern void ixNpeMhConfigOutFifoRead (Ix + extern void ixNpeMhConfigInFifoWrite (IxNpeMhNpeId npeId,IxNpeMhMessage message); + extern struct ixNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES]; + +-EXPORT_SYMBOL(ixNpeMhConfigIsr); + EXPORT_SYMBOL(ixNpeMhConfigInFifoIsFull); + EXPORT_SYMBOL(ixNpeMhConfigOutFifoIsEmpty); + EXPORT_SYMBOL(ixNpeMhConfigLockRelease); diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/le.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/le.patch new file mode 100644 index 0000000000..c308493a08 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/le.patch @@ -0,0 +1,13 @@ +--- ixp400_xscale_sw/src/include/IxQMgr.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/include/IxQMgr.h 1970-01-01 00:00:00.000000000 +0000 +@@ -96,8 +98,8 @@ + + #else + +-#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_LE_DC +-#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_LE_DC ++#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_LE_AC ++#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_LE_AC + + #endif + diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/livelock.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/livelock.patch new file mode 100644 index 0000000000..0b4e4ba026 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/livelock.patch @@ -0,0 +1,19 @@ +*** ixp400_xscale_sw/src/oslinux/IxLinuxInit.c.orig Sun Sep 25 05:59:03 2005 +--- ixp400_xscale_sw/src/oslinux/IxLinuxInit.c Fri Jun 9 14:07:06 2006 +*************** +*** 91,97 **** + + + /* Module parameters */ +! static int livelock_dispatcher = 0;/* default: don't use livelock dispatcher*/ + + MODULE_PARM(livelock_dispatcher, "i"); + MODULE_PARM_DESC(livelock_dispatcher, "If non-zero, use the livelock prevention qmgr dispatcher"); +--- 91,97 ---- + + + /* Module parameters */ +! int livelock_dispatcher = 0;/* default: don't use livelock dispatcher*/ + + MODULE_PARM(livelock_dispatcher, "i"); + MODULE_PARM_DESC(livelock_dispatcher, "If non-zero, use the livelock prevention qmgr dispatcher"); diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/mii-debug.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/mii-debug.patch new file mode 100644 index 0000000000..762743cef5 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/mii-debug.patch @@ -0,0 +1,26 @@ +debug only patch to add information about MII id problems + +--- ixp400_xscale_sw/src/ethMii/IxEthMii.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/ethMii/IxEthMii.c 1970-01-01 00:00:00.000000000 +0000 +@@ -122,6 +122,10 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT3 + ) + { + /* supported phy */ ++ ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, ++ IX_OSAL_LOG_DEV_STDOUT, ++ "ixEthMiiPhyScan, Mii %d: Mii PHY ID %8.8x\n", ++ i, ixEthMiiPhyId[i], 3, 4, 5, 6); + phyPresent[i] = TRUE; + } /* end of if(ixEthMiiPhyId) */ + else +@@ -131,8 +135,8 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT3 + /* unsupported phy */ + ixOsalLog (IX_OSAL_LOG_LVL_ERROR, + IX_OSAL_LOG_DEV_STDOUT, +- "ixEthMiiPhyScan : unexpected Mii PHY ID %8.8x\n", +- ixEthMiiPhyId[i], 2, 3, 4, 5, 6); ++ "ixEthMiiPhyScan, Mii %d: unexpected Mii PHY ID %8.8x\n", ++ i, ixEthMiiPhyId[i], 3, 4, 5, 6); + ixEthMiiPhyId[i] = IX_ETH_MII_UNKNOWN_PHY_ID; + phyPresent[i] = TRUE; + } diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/module-param.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/module-param.patch new file mode 100644 index 0000000000..c61fcc00d3 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/module-param.patch @@ -0,0 +1,19 @@ + src/oslinux/IxLinuxInit.c | 4 ++++ + 1 files changed, 4 insertions(+) + +Index: ixp400_xscale_sw/src/oslinux/IxLinuxInit.c +=================================================================== +--- ixp400_xscale_sw.orig/src/oslinux/IxLinuxInit.c ++++ ixp400_xscale_sw/src/oslinux/IxLinuxInit.c +@@ -93,7 +93,11 @@ + /* Module parameters */ + static int livelock_dispatcher = 0;/* default: don't use livelock dispatcher*/ + ++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,16) + MODULE_PARM(livelock_dispatcher, "i"); ++#else ++module_param(livelock_dispatcher, int, 0644); ++#endif + MODULE_PARM_DESC(livelock_dispatcher, "If non-zero, use the livelock prevention qmgr dispatcher"); + + /* Init and cleanup functions for module */ diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/oe-makefile.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/oe-makefile.patch new file mode 100644 index 0000000000..492b1eab03 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/oe-makefile.patch @@ -0,0 +1,49 @@ +changes to Makefile required only on OE + +--- ixp400_xscale_sw/Makefile 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/Makefile 1970-01-01 00:00:00.000000000 +0000 +@@ -1321,10 +1323,26 @@ ixp400.o : $(OBJ_DIR)/ixp400.o + + ifndef IX_INCLUDE_MICROCODE + $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(OSAL_MODULE) ++ rm -f $(OBJ_DIR)/ixp400.c ++ touch $(OBJ_DIR)/ixp400.c ++ cp Makefile.kmod26 $(OBJ_DIR)/Makefile ++ make -C $(OBJ_DIR) ++ rm -f $(OBJ_DIR)/ixp400.c ++ cp ixp400.c $(OBJ_DIR)/ixp400.c + $(LD) $(LDFLAGS) $^ -o $@ ++ rm -f $(OBJ_DIR)/ixp400.ko $(OBJ_DIR)/ixp400.mod.o ++ make -C $(OBJ_DIR) + else + $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(NPE_PRODUCTION_HEADER_OBJ) $(OSAL_MODULE) ++ rm -f $(OBJ_DIR)/ixp400.c ++ touch $(OBJ_DIR)/ixp400.c ++ cp Makefile.kmod26 $(OBJ_DIR)/Makefile ++ make -C $(OBJ_DIR) ++ rm -f $(OBJ_DIR)/ixp400.c ++ cp ixp400.c $(OBJ_DIR)/ixp400.c + $(LD) $(LDFLAGS) $^ -o $@ ++ rm -f $(OBJ_DIR)/ixp400.ko $(OBJ_DIR)/ixp400.mod.o ++ make -C $(OBJ_DIR) + endif + + +--- ixp400_xscale_sw/ixp400.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/ixp400.c 1970-01-01 00:00:00.000000000 +0000 +@@ -0,0 +1,1 @@ ++#error this file must never be compiled +--- ixp400_xscale_sw/Makefile.kmod26 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/Makefile.kmod26 1970-01-01 00:00:00.000000000 +0000 +@@ -0,0 +1,11 @@ ++obj-m := ixp400.o ++ ++PWD := $(shell pwd) ++ ++LINUX_SRC := $($(IX_TARGET)_KERNEL_DIR) ++ ++default: ++ $(MAKE) ARCH=arm CROSS_COMPILE=$(LINUX_CROSS_COMPILE) $(KERNEL_VERBOSE) -C $(LINUX_SRC) SUBDIRS=$(PWD) modules ++ ++clean: ++ rm -f ixp400.ko diff --git a/packages/ixp4xx/ixp4xx-csr-2.1.1/rtl8201-support.patch b/packages/ixp4xx/ixp4xx-csr-2.1.1/rtl8201-support.patch new file mode 100644 index 0000000000..150dc27016 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr-2.1.1/rtl8201-support.patch @@ -0,0 +1,30 @@ +this patch adds support for the RTL8201CP PHY + +--- ixp400_xscale_sw/src/ethMii/IxEthMii.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/ethMii/IxEthMii.c 1970-01-01 00:00:00.000000000 +0000 +@@ -119,6 +119,7 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT3 + || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973_PHY_ID) + || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973A3_PHY_ID) + || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT9785_PHY_ID) ++ || (ixEthMiiPhyId[i] == IX_ETH_MII_RTL8201_PHY_ID) + ) + { + /* supported phy */ +@@ -287,6 +288,7 @@ ixEthMiiPhyReset(UINT32 phyAddr) + (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT972_PHY_ID) || + (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973_PHY_ID) || + (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973A3_PHY_ID) || ++ (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_RTL8201_PHY_ID) || + (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT9785_PHY_ID) + ) + { +--- ixp400_xscale_sw/src/ethMii/IxEthMii_p.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp400_xscale_sw/src/ethMii/IxEthMii_p.h 1970-01-01 00:00:00.000000000 +0000 +@@ -179,6 +179,7 @@ + #define IX_ETH_MII_LXT973A3_PHY_ID 0x00137A11 + #define IX_ETH_MII_KS8995_PHY_ID 0x00221450 + #define IX_ETH_MII_LXT9785_PHY_ID 0x001378FF ++#define IX_ETH_MII_RTL8201_PHY_ID 0x00008201 + #define IX_ETH_MII_RTL8305_FAKE_PHY_ID 0x83058305 + + #define IX_ETH_MII_INVALID_PHY_ID 0x00000000 diff --git a/packages/ixp4xx/ixp4xx-csr_2.1.1.bb b/packages/ixp4xx/ixp4xx-csr_2.1.1.bb new file mode 100644 index 0000000000..c97a54bb74 --- /dev/null +++ b/packages/ixp4xx/ixp4xx-csr_2.1.1.bb @@ -0,0 +1,125 @@ +DEFAULT_PREFERENCE = "-1" +# Intel ixp4xx access library software. Note that this has an Intel +# license which restricts its use. +MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>" +HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm" +LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm" +LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm" +# You must download the following software to your OpenEmbedded downloads +# directory before using this package: +# +# BSD_ixp400AccessLibrary-2_1.zip +# BSD_ixp400AccessLibrary-2_1_1.zip +# IPL_ixp400NpeLibrary-2_1.zip +# +# To do this go to the LICENSE_HOMEPAGE above, register/login (using a +# web browser which is supported by the login page), this will give you +# access to the web page from which you can download the software - you +# need the: "IntelĀ® IXP400 Software and RedBoot* Boot Loader" and, from +# this the "Intel Hardware Access Software" and "NPE Microcode" (both +# versions 2.1, encryption is not required.) +# +# Store the files with the names given below in your downloads directory +# and store the 32 character md5sum of the file in a file of the same +# name with the additional extension .md5: +# +# BSD_ixp400AccessLibrary-2_1.zip.md5 +# BSD_ixp400AccessLibrary-2_1_1.zip.md5 +# IPL_ixp400NpeLibrary-2_1.zip.md5 +# +SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/BSD_ixp400AccessLibrary-2_1.zip" +SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/BSD_ixp400AccessLibrary-2_1_1.zip" +SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_1.zip" +SRC_URI += "file://Makefile.patch;patch=1" +SRC_URI += "file://ixethdb-header.patch;patch=1" +SRC_URI += "file://bit-macro.patch;patch=1" +SRC_URI += "file://ixnpemhconfigisr-is-private.patch;patch=1" +SRC_URI += "file://le.patch;patch=1" +SRC_URI += "file://mii-debug.patch;patch=1" +SRC_URI += "file://rtl8201-support.patch;patch=1" +SRC_URI += "file://gcc4.patch;patch=1" +SRC_URI += "file://oe-makefile.patch;patch=1" +SRC_URI += "file://livelock.patch;patch=1" +SRC_URI += "file://module-param.patch;patch=1" + +DEPENDS = "ixp-osal" +S = "${WORKDIR}/ixp400_xscale_sw" +PR = "r0" + +COMPATIBLE_HOST = "^arm.*-linux.*" + +inherit module + +do_pre_patch () { + ( cd ${WORKDIR} ; mkdir patches ; mv BSD_ixp400AccessLibrary-2_1_1.patch patches/ ; \ + echo "BSD_ixp400AccessLibrary-2_1_1.patch -p0" >> patches/series ; \ + quilt push ) +} + +addtask pre_patch before do_patch + +IX_TARGET = "linux${ARCH_BYTE_SEX}" +IX_ENSURE = "" +#IX_ENSURE = "IX_OSAL_ENSURE_ON=1" + +OSAL_PATH = "lib/ixp425/linux/${IX_TARGET}" +# This is a somewhat arbitrary choice: +OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal" + +# COMPONENTS: do not build all the components, this just creates a +# ridiculously large module which duplicates functionality in the +# available Linux drivers. +COMPONENTS = "qmgr npeMh npeDl ethAcc ethDB ethMii featureCtrl osServices oslinux" +CODELETS_COMPONENTS = "" + +# NOTE: IX_INCLUDE_MICROCODE causes the microcode to be included in +# the ixp4xx-csr module, this *requires* the IPL_ixp400NpeLibrary-2_1.zip +# to be added to the SRC_URI - see above. +EXTRA_OEMAKE = "'AR=${AR}' \ + 'IX_XSCALE_SW=${S}' \ + 'IX_TARGET=${IX_TARGET}' \ + '${IX_TARGET}_COMPONENTS=${COMPONENTS}' \ + '${IX_TARGET}_CODELETS_COMPONENTS=${CODELETS_COMPONENTS}' \ + 'IX_DEVICE=ixp42X' \ + 'IX_INCLUDE_MICROCODE=1' \ + 'IX_UTOPIAMODE=0' \ + 'IX_MPHYSINGLEPORT=1' \ + ${IX_ENSURE} \ + 'LINUX_SRC=${STAGING_KERNEL_DIR}' \ + 'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \ + 'OSAL_DIR=${OSAL_DIR}' \ + 'OSAL_IMAGE=${OSAL_DIR}/${OSAL_PATH}/libosal.a' \ + 'OSAL_MODULE=${OSAL_DIR}/${OSAL_PATH}/ixp_osal.o' \ + " + +MAKE_TARGETS = "lib/${IX_TARGET}/ixp400.o" + +KCONFIG_FILE = "${STAGING_KERNEL_DIR}/kernel-config" +do_stage () { + install -d ${STAGING_INCDIR}/linux/ixp4xx-csr + install -m 0644 src/include/*.h ${STAGING_INCDIR}/linux/ixp4xx-csr/ + # Since Module.symvers in the kernel staging directory doesn't include + # the symbols from ixp400.o we need to add them to another file for + # the ixp400-eth build + rm -f '${STAGING_KERNEL_DIR}/ixp400-csr.symvers' + . '${KCONFIG_FILE}' + if '${STAGING_KERNEL_DIR}/scripts/mod/modpost' \ + ${CONFIG_MODVERSIONS:+-m} \ + ${CONFIG_MODULE_SRCVERSION_ALL:+-a} \ + -i '${STAGING_KERNEL_DIR}/Module.symvers' \ + -o '${STAGING_KERNEL_DIR}/ixp400-csr.symvers' \ + ${MAKE_TARGETS} 2>&1 | egrep . + then + echo "MODPOST errors - see above" + return 1 + else + return 0 + fi +} + +PACKAGES = "${PN}" + +do_install () { + install -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/kernel/drivers/ixp400 + install -m 0644 lib/${IX_TARGET}/ixp400.ko ${D}${base_libdir}/modules/${KERNEL_VERSION}/kernel/drivers/ixp400/ +} |