ixp4xx, ixp425-eth: add Intel Access Library 2.0, ethernet driver 1.4

NOTE: to use these you must pin ixp4xx-csr, ixp-oxal and ixp400-eth.
The name of the ethernet driver changes with this commit - it is now
ixp400-eth, not ixp425-eth - changes are required in systems which need
to use the ethernet driver and these changes are *not* in this commit.
The things to change are the image (which must now depend on ixp400-eth)
and any modprobe.conf (which, at least in NSLU2 - openslug-init - aliases
eth0 as ixp4??-eth).

9 files changed, 798 insertions, 0 deletions

diff --git a/packages/ixp4xx/ixp-osal-2.0/.mtn2git_empty b/packages/ixp4xx/ixp-osal-2.0/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/ixp4xx/ixp-osal-2.0/.mtn2git_empty
diff --git a/packages/ixp4xx/ixp-osal-2.0/2.6.patch b/packages/ixp4xx/ixp-osal-2.0/2.6.patch
new file mode 100644
index 0000000000..8dc31d48df
--- /dev/null
+++ b/packages/ixp4xx/ixp-osal-2.0/2.6.patch
@@ -0,0 +1,363 @@
+diff -Naur ixp_osal.orig/include/linux-2.6.h ixp_osal/include/linux-2.6.h
+--- ixp_osal.orig/include/linux-2.6.h	1970-01-01 01:00:00.000000000 +0100
++++ ixp_osal/include/linux-2.6.h	2005-08-26 15:20:23.000000000 +0200
+@@ -0,0 +1,52 @@
++/* */
++
++#include "asm/page.h"
++
++#if !defined (IXP425_TIMER_BASE_PHYS)
++# define IXP425_TIMER_BASE_PHYS 	IXP4XX_TIMER_BASE_PHYS
++#endif
++#if !defined (IRQ_IXP425_XSCALE_PMU)
++# define IRQ_IXP425_XSCALE_PMU		IRQ_IXP4XX_XSCALE_PMU
++#endif
++#if !defined (IXP425_QMGR_BASE_PHYS)
++# define IXP425_QMGR_BASE_PHYS		IXP4XX_QMGR_BASE_PHYS
++#endif
++#if !defined (IXP425_PERIPHERAL_BASE_PHYS)
++# define IXP425_PERIPHERAL_BASE_PHYS	IXP4XX_PERIPHERAL_BASE_PHYS
++#endif
++#if !defined (IXP425_PERIPHERAL_BASE_VIRT)
++# define IXP425_PERIPHERAL_BASE_VIRT	IXP4XX_PERIPHERAL_BASE_VIRT
++#endif
++#if !defined (IXP425_EXP_CFG_BASE_PHYS)
++# define IXP425_EXP_CFG_BASE_PHYS	IXP4XX_EXP_CFG_BASE_PHYS
++#endif
++#if !defined (IXP425_EXP_CFG_BASE_VIRT)
++# define IXP425_EXP_CFG_BASE_VIRT	IXP4XX_EXP_CFG_BASE_VIRT
++#endif
++#if !defined (IXP425_PCI_CFG_BASE_PHYS)
++# define IXP425_PCI_CFG_BASE_PHYS	IXP4XX_PCI_CFG_BASE_PHYS
++#endif
++#if !defined (IXP425_PCI_CFG_BASE_VIRT)
++# define IXP425_PCI_CFG_BASE_VIRT	IXP4XX_PCI_CFG_BASE_VIRT
++#endif
++#if !defined (IXP425_EXP_BUS_BASE2_PHYS)
++# define IXP425_EXP_BUS_BASE2_PHYS	IXP4XX_EXP_BUS_CS2_BASE_PHYS
++#endif
++#if !defined (IXP425_EthA_BASE_PHYS)
++# define IXP425_EthA_BASE_PHYS		IXP4XX_EthA_BASE_PHYS
++#endif
++#if !defined (IXP425_EthB_BASE_PHYS)
++# define IXP425_EthB_BASE_PHYS		IXP4XX_EthB_BASE_PHYS
++#endif
++#if !defined (IXP425_ICMR)
++# define IXP425_ICMR			IXP4XX_ICMR
++#endif
++#if !defined (IXP425_USB_BASE_PHYS)
++# define IXP425_USB_BASE_PHYS		IXP4XX_USB_BASE_PHYS
++#endif
++#if !defined (IXP425_INTC_BASE_PHYS)
++# define IXP425_INTC_BASE_PHYS		IXP4XX_INTC_BASE_PHYS
++#endif
++#if !defined (IRQ_IXP425_USB)
++# define IRQ_IXP425_USB			IRQ_IXP4XX_USB
++#endif
+diff -Naur ixp_osal.orig/os/linux/include/core/IxOsalOs.h ixp_osal/os/linux/include/core/IxOsalOs.h
+--- ixp_osal.orig/os/linux/include/core/IxOsalOs.h	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/include/core/IxOsalOs.h	2005-08-26 01:56:22.000000000 +0200
+@@ -56,6 +56,7 @@
+ #include <linux/cache.h>
+ #include <linux/mm.h>
+ #include <linux/config.h>
++#include <linux/version.h>
+ #include <asm/pgalloc.h>
+ 
+ /**
+@@ -66,9 +67,23 @@
+ 
+ #define IX_OSAL_OS_MMU_PHYS_TO_VIRT(addr)  ((addr) ? phys_to_virt((unsigned int)(addr)) : 0)
+ 
+-#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size)  ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) 
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++/*
++ * 2.6 kernels do not export the required cache functions.
++ */
++extern void ixOsalCacheInvalidateRange(unsigned long start, unsigned long size);
++extern void ixOsalCacheFlushRange(unsigned long start, unsigned long size);
++
++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) \
++ixOsalCacheInvalidateRange((unsigned long)addr, (unsigned long)addr + size)
++#define IX_OSAL_OS_CACHE_FLUSH(addr, size) \
++ixOsalCacheFlushRange((unsigned long)addr, (unsigned long)addr + size )
+ 
++#else
++
++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size)  ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) 
+ #define IX_OSAL_OS_CACHE_FLUSH(addr, size) ( clean_dcache_range((__u32)addr, (__u32)addr + size ))
++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */
+ 
+ #define printf	printk /* For backword compatibility, needs to move to better location */
+ 
+diff -Naur ixp_osal.orig/os/linux/src/core/IxOsalOsCacheMMU.c ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c
+--- ixp_osal.orig/os/linux/src/core/IxOsalOsCacheMMU.c	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c	2005-08-26 01:56:22.000000000 +0200
+@@ -210,3 +210,59 @@
+ 	free_pages ((unsigned int) memptr, order);
+     }
+ }
++
++
++/*
++ * 2.6 kernels do not export the required cache functions.
++ */
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++
++#define _IX_STR(x) #x
++#define IX_STR(x) _IX_STR(x)
++#define IX_CLM IX_STR(IX_OSAL_CACHE_LINE_SIZE-1)
++
++/*
++ * reimplementation of kernel's invalidate_dcache_range()
++ */
++void
++ixOsalCacheInvalidateRange(unsigned long start, unsigned long size)
++{
++  __asm__
++    ("    tst    %0, #" IX_CLM "\n"
++     "    mcrne  p15, 0, %0, c7, c10, 1      @ clean D cache line\n"
++     "    bic    %0, %0, #" IX_CLM "\n"
++     "    tst    %1, #" IX_CLM "\n"
++     "    mcrne  p15, 0, %1, c7, c10, 1      @ clean D cache line\n"
++     "1:  mcr    p15, 0, %0, c7, c6, 1       @ invalidate D cache line\n"
++     "    add    %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n"
++     "    cmp    %0, %1\n"
++     "    blo    1b\n"
++     "    mcr    p15, 0, %0, c7, c10, 4      @ drain write & fill buffer\n"
++     : /* no output */
++     : "r"(start), "r"(size)
++     : "cc");
++}
++
++/*
++ * reimplementation of kernel's invalidate_dcache_range()
++ */
++void
++ixOsalCacheFlushRange(unsigned long start, unsigned long size)
++{
++  __asm__
++    ("    bic    %0, %0, #" IX_CLM "\n"
++     "1:  mcr    p15, 0, %0, c7, c10, 1      @ clean D cache line\n"
++     "    add    %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n"
++     "    cmp    %0, %1\n"
++     "    blo    1b\n"
++     "    mcr    p15, 0, %0, c7, c10, 4      @ drain write & fill buffer\n"
++     : /* no output */
++     : "r"(start), "r"(size)
++     : "cc");
++}
++
++#undef _IX_STR
++#undef IX_STR
++#undef IX_CLM
++
++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */
+diff -Naur ixp_osal.orig/os/linux/src/core/IxOsalOsMsgQ.c ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c
+--- ixp_osal.orig/os/linux/src/core/IxOsalOsMsgQ.c	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c	2005-08-24 00:18:02.000000000 +0200
+@@ -45,9 +45,9 @@
+  * -- End Intel Copyright Notice --
+  */
+ #include <linux/linkage.h>
++#include <linux/spinlock.h>
+ #include <linux/ipc.h>
+ #include <linux/msg.h>
+-#include <linux/spinlock.h>
+ #include <linux/interrupt.h>
+ 
+ #include "IxOsal.h"
+diff -Naur ixp_osal.orig/os/linux/src/core/IxOsalOsSemaphore.c ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c
+--- ixp_osal.orig/os/linux/src/core/IxOsalOsSemaphore.c	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c	2005-08-26 15:58:16.000000000 +0200
+@@ -46,7 +46,7 @@
+  */
+ 
+ #include <linux/slab.h>
+-#include <asm-arm/hardirq.h>
++#include <linux/hardirq.h>
+ #include "IxOsal.h"
+ 
+ /* Define a large number */
+@@ -93,7 +93,7 @@
+ {
+ 
+     IX_STATUS ixStatus = IX_SUCCESS;
+-    UINT32 timeoutTime;
++    unsigned long timeoutTime;
+ 
+     if (sid == NULL)
+     {
+diff -Naur ixp_osal.orig/os/linux/src/core/IxOsalOsSymbols.c ixp_osal/os/linux/src/core/IxOsalOsSymbols.c
+--- ixp_osal.orig/os/linux/src/core/IxOsalOsSymbols.c	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsSymbols.c	2005-08-30 19:19:33.000000000 +0200
+@@ -64,6 +64,10 @@
+ 
+ EXPORT_SYMBOL (ixOsalCacheDmaMalloc);
+ EXPORT_SYMBOL (ixOsalCacheDmaFree);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++EXPORT_SYMBOL (ixOsalCacheInvalidateRange);
++EXPORT_SYMBOL (ixOsalCacheFlushRange);
++#endif
+ 
+ EXPORT_SYMBOL (ixOsalThreadCreate);
+ EXPORT_SYMBOL (ixOsalThreadStart);
+diff -Naur ixp_osal.orig/os/linux/src/modules/ioMem/IxOsalOsIoMem.c ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c
+--- ixp_osal.orig/os/linux/src/modules/ioMem/IxOsalOsIoMem.c	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c	2005-08-24 00:18:02.000000000 +0200
+@@ -45,6 +45,7 @@
+  * -- End Intel Copyright Notice --
+  */
+ 
++#include <asm/page.h>
+ #include <asm/io.h>
+ #include <linux/ioport.h>
+ 
+--- ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400.h.orig	2005-04-17 20:56:27.000000000 -0700
++++ ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400.h	2005-10-01 16:27:05.566984144 -0700
+@@ -53,6 +53,8 @@
+ #include "asm/hardware.h"
+ #include "asm/arch/irqs.h"
+ 
++#include <linux-2.6.h>		/* Glue */
++
+ /* physical addresses to be used when requesting memory with IX_OSAL_MEM_MAP */
+ #define IX_OSAL_IXP400_INTC_PHYS_BASE          IXP425_INTC_BASE_PHYS
+ #define IX_OSAL_IXP400_GPIO_PHYS_BASE          IXP425_GPIO_BASE_PHYS
+@@ -108,7 +110,6 @@
+ #define IX_OSAL_IXP400_NPEB_VIRT_BASE          IXP425_NPEB_BASE_VIRT
+ #define IX_OSAL_IXP400_NPEC_VIRT_BASE          IXP425_NPEC_BASE_VIRT
+ #define IX_OSAL_IXP400_PERIPHERAL_VIRT_BASE    IXP425_PERIPHERAL_BASE_VIRT
+-#define IX_OSAL_IXP400_QMGR_VIRT_BASE          IXP425_QMGR_BASE_VIRT
+ #define IX_OSAL_IXP400_OSTS_VIRT_BASE          IXP425_TIMER_BASE_VIRT
+ #define IX_OSAL_IXP400_USB_VIRT_BASE           IXP425_USB_BASE_VIRT
+ #define IX_OSAL_IXP400_EXP_CFG_VIRT_BASE       IXP425_EXP_CFG_BASE_VIRT
+--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h.orig	2005-04-17 20:56:27.000000000 -0700
++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h	2005-10-01 16:31:05.670092880 -0700
+@@ -85,12 +85,21 @@
+      * Queue Manager 
+      */
+     {
++#ifdef IXP425_QMGR_BASE_VIRT
+      IX_OSAL_STATIC_MAP,	/* type            */
+      IX_OSAL_IXP400_QMGR_PHYS_BASE,	/* physicalAddress */
+      IX_OSAL_IXP400_QMGR_MAP_SIZE,	/* size            */
+      IX_OSAL_IXP400_QMGR_VIRT_BASE,	/* virtualAddress  */
+      NULL,			/* mapFunction     */
+      NULL,			/* unmapFunction   */
++#else
++     IX_OSAL_DYNAMIC_MAP,                  /* type            */
++     IX_OSAL_IXP400_QMGR_PHYS_BASE,   /* physicalAddress */
++     IX_OSAL_IXP400_QMGR_MAP_SIZE,    /* size            */
++     0,                               /* virtualAddress  */
++     ixOsalLinuxMemMap,		/* mapFunction     */
++     ixOsalLinuxMemUnmap,	/* unmapFunction   */
++#endif
+      0,				/* refCount        */
+      IX_OSAL_BE | IX_OSAL_LE_DC,	/* endianType      */   
+      "qMgr"			/* name            */
+--- ixp_osal/os/linux/src/core/IxOsalOsServices.c.orig	2005-04-17 20:56:28.000000000 -0700
++++ ixp_osal/os/linux/src/core/IxOsalOsServices.c	2005-10-01 16:37:00.876444607 -0700
+@@ -54,6 +54,7 @@
+ #include <linux/time.h>
+ #include <linux/sched.h>
+ #include <linux/slab.h>
++#include <linux/interrupt.h>
+ 
+ #include "IxOsal.h"
+ 
+@@ -89,7 +90,7 @@
+ /*
+  * General interrupt handler
+  */
+-static void
++static irqreturn_t
+ ixOsalOsIsrProxy (int irq, void *dev_id, struct pt_regs *regs)
+ {
+     IxOsalInfoType *isr_proxy_info = (IxOsalInfoType *) dev_id;
+@@ -98,6 +99,7 @@
+ 		   "ixOsalOsIsrProxy: Interrupt used before ixOsalIrqBind was invoked");
+ 
+     isr_proxy_info->routine (isr_proxy_info->parameter);
++    return IRQ_HANDLED;
+ }
+ 
+ /*
+@@ -105,11 +107,12 @@
+  * This handler saves the interrupted Program Counter (PC)
+  * into a global variable
+  */
+-static void
++static irqreturn_t
+ ixOsalOsIsrProxyWithPC (int irq, void *dev_id, struct pt_regs *regs)
+ {
+     ixOsalLinuxInterruptedPc = regs->ARM_pc;
+     ixOsalOsIsrProxy(irq, dev_id, regs);
++    return IRQ_HANDLED;
+ }
+ 
+ /**************************************
+@@ -191,10 +194,15 @@
+ PUBLIC UINT32
+ ixOsalIrqLock ()
+ {
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++    unsigned long flags;
++    local_irq_save(flags);
++#else
+     UINT32 flags;
+     save_flags (flags);
+     cli ();
+-    return flags;
++#endif
++    return (UINT32)flags;
+ }
+ 
+ /* Enable interrupts and task scheduling,
+@@ -204,7 +212,11 @@
+ PUBLIC void
+ ixOsalIrqUnlock (UINT32 lockKey)
+ {
++# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++    local_irq_restore((unsigned long)lockKey);
++# else
+     restore_flags (lockKey);
++# endif
+ }
+ 
+ PUBLIC UINT32
+@@ -329,7 +341,7 @@
+ PUBLIC void
+ ixOsalSleep (UINT32 milliseconds)
+ {
+-    if (milliseconds != 0)
++    if (milliseconds*HZ >= 1000)
+     {
+         set_current_state(TASK_INTERRUPTIBLE); 
+         schedule_timeout ((milliseconds * HZ) / 1000);
+--- ixp_osal/os/linux/src/core/IxOsalOsThread.c.orig	2005-04-17 20:56:28.000000000 -0700
++++ ixp_osal/os/linux/src/core/IxOsalOsThread.c	2005-10-01 16:38:58.227829064 -0700
+@@ -46,6 +46,7 @@
+  */
+ 
+ #include <linux/sched.h>
++#include <linux/version.h>
+ 
+ #include "IxOsal.h"
+ 
+@@ -65,12 +66,12 @@
+     void *arg = IxOsalOsThreadData.arg;
+     static int seq = 0;
+ 
+-    daemonize ();
++    daemonize ("IxOsal %d", ++seq);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
+     reparent_to_init ();
+ 
+     exit_files (current);
+-
+-    snprintf(current->comm, sizeof(current->comm), "IxOsal %d", ++seq);
++#endif
+ 
+     up (&IxOsalThreadMutex);
+ 
diff --git a/packages/ixp4xx/ixp-osal-2.0/Makefile.patch b/packages/ixp4xx/ixp-osal-2.0/Makefile.patch
new file mode 100644
index 0000000000..f852ea2b26
--- /dev/null
+++ b/packages/ixp4xx/ixp-osal-2.0/Makefile.patch
@@ -0,0 +1,27 @@
+diff -Naur ixp_osal.orig/Makefile ixp_osal/Makefile
+--- ixp_osal.orig/Makefile	2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/Makefile	2005-08-24 00:18:02.000000000 +0200
+@@ -172,7 +172,7 @@
+ 
+ # TODO push this to linux make
+ ifeq ($(IX_OSAL_MK_HOST_OS), linux)
+-INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp425/
++INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp4xx/
+ endif
+ 
+ CFLAGS += $(INCLUDE_DIRS:%=-I%)
+--- ixp_osal/os/linux/make/macros.mk.orig	2005-10-01 15:50:19.544167880 -0700
++++ ixp_osal/os/linux/make/macros.mk	2005-10-01 15:50:43.053647239 -0700
+@@ -88,10 +88,10 @@
+ # Compiler & linker options
+ 
+ # Compiler flags
+-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale
++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale
+ 
+ CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common \
+-          -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE \
++          -pipe -mapcs-32 -msoft-float -DMODULE \
+           -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS) -DEXPORT_SYMTAB
+ 
+ # Linux linker flags
diff --git a/packages/ixp4xx/ixp-osal_2.0.bb b/packages/ixp4xx/ixp-osal_2.0.bb
new file mode 100644
index 0000000000..7028b76b71
--- /dev/null
+++ b/packages/ixp4xx/ixp-osal_2.0.bb
@@ -0,0 +1,81 @@
+# Intel ixp4xx access library software.  Note that this has an Intel
+# license which restricts its use.
+MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>"
+HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm"
+LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm"
+LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm"
+# You must download the following software to your OpenEmbedded downloads
+# directory before using this package:
+#
+#	IPL_ixp400AccessLibrary-2_0.zip
+#
+# To do this go to the LICENSE_HOMEPAGE above, register/login (using a
+# web browser which is supported by the login page), this will give you
+# access to the web page from which you can download the software - you
+# need the: "Intel® IXP400 Software and RedBoot* Boot Loader" and, from
+# this the "Intel Hardware Access Software" (versions 1.5 encryption is
+# not required.)
+#
+# Store the file with the name given below in your downloads directory
+#
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_0.zip"
+SRC_URI += "file://Makefile.patch;patch=1"
+SRC_URI += "file://2.6.patch;patch=1"
+S = "${WORKDIR}/ixp_osal"
+PR = "r0"
+
+COMPATIBLE_HOST = "^armeb-linux.*"
+
+inherit module
+
+# Add the architecture compiler flags to KERNEL_CC and KERNEL_LD as
+# required.  Notice that this has to be done for each separately built
+# module as well!
+KERNEL_CC += "${TARGET_CC_KERNEL_ARCH}"
+KERNEL_LD += "${TARGET_LD_KERNEL_ARCH}"
+
+EXTRA_OEMAKE = "'CC=${KERNEL_CC}' \
+		'LD=${KERNEL_LD}' \
+		'AR=${AR}' \
+		'IX_XSCALE_SW=${S}' \
+		'IX_TARGET=linuxbe' \
+		'IX_DEVICE=ixp42X' \
+		'LINUX_SRC=${STAGING_KERNEL_DIR}' \
+		'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \
+		"
+
+OSAL_PATH = "lib/ixp425/linux/linuxbe"
+# This is a somewhat arbitrary choice:
+OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal"
+
+do_compile () {
+	oe_runmake ${OSAL_PATH}/libosal.a ${OSAL_PATH}/ixp_osal.o
+}
+
+do_stage () {
+	# Clean the directory first, this ensures incremental builds have
+	# a slightly better chance of working
+	rm -rf ${OSAL_DIR}
+	install -d ${OSAL_DIR}
+
+	# First the include files, maintain the tree structure (ixp4xx-csr
+	# expects the exact same tree)
+	cp -rf --dereference include ${OSAL_DIR}
+	install -d ${OSAL_DIR}/os/linux
+	cp -rf --dereference os/linux/include ${OSAL_DIR}/os/linux
+
+	# Install the library/object
+	install -d ${OSAL_DIR}/${OSAL_PATH}
+	rm -f ${OSAL_DIR}/libosal
+	install -m 0644 ${OSAL_PATH}/libosal.a ${OSAL_DIR}/${OSAL_PATH}
+	touch ${OSAL_DIR}/libosal
+	rm -f ${OSAL_DIR}/module
+	install -m 0644 ${OSAL_PATH}/ixp_osal.o ${OSAL_DIR}/${OSAL_PATH}
+	touch ${OSAL_DIR}/module
+}
+
+# This stuff doesn't install anything...
+PACKAGES = ""
+
+do_install () {
+}
diff --git a/packages/ixp4xx/ixp4xx-csr-2.0/.mtn2git_empty b/packages/ixp4xx/ixp4xx-csr-2.0/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.0/.mtn2git_empty
diff --git a/packages/ixp4xx/ixp4xx-csr-2.0/2.6.14.patch b/packages/ixp4xx/ixp4xx-csr-2.0/2.6.14.patch
new file mode 100644
index 0000000000..9630e6cd4a
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.0/2.6.14.patch
@@ -0,0 +1,20 @@
+# Additional patches for v2.0 on 2.6.14
+--- ixp400_xscale_sw/src/oslinux/IxLinuxInit.c.orig	2005-10-01 18:21:34.731233399 -0700
++++ ixp400_xscale_sw/src/oslinux/IxLinuxInit.c	2005-10-01 18:21:45.811930663 -0700
+@@ -160,7 +160,6 @@
+ 	return -EEXIST;
+     }
+ 
+-    MOD_INC_USE_COUNT;   /* Increment use count to prevent premature rmmod-ing */
+     ixNpeDlSegmentedListHead = NULL;  /* Reset linked list which keeps track of Microcode fragments */
+     ixNpeDlSegmentedListTail = NULL;
+     ixNpeDlTotalBytesReadIn = 0;
+@@ -225,8 +224,6 @@
+ 	kfree (temp);
+     }
+ 
+-    MOD_DEC_USE_COUNT;
+-
+     return 0;
+ }
+ 
diff --git a/packages/ixp4xx/ixp4xx-csr-2.0/2.6.patch b/packages/ixp4xx/ixp4xx-csr-2.0/2.6.patch
new file mode 100644
index 0000000000..37d390bf71
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.0/2.6.patch
@@ -0,0 +1,148 @@
+diff -Naur ixp400_xscale_sw.orig/Readme-Kernel-2_6-Patch.txt ixp400_xscale_sw/Readme-Kernel-2_6-Patch.txt
+--- ixp400_xscale_sw.orig/Readme-Kernel-2_6-Patch.txt	1970-01-01 01:00:00.000000000 +0100
++++ ixp400_xscale_sw/Readme-Kernel-2_6-Patch.txt	2005-09-28 19:50:30.000000000 +0200
+@@ -0,0 +1,49 @@
++This file describes a patch to use version 1.5 of the Intel Ixp4XX
++Access Library with Linux 2.6 kernels.
++
++Authors/History
++---------------
++
++This patch consists of the changes made by Marc Singer for use of
++version 1.5 of the library with the APEX bootloader, and a patch made
++by Robin Farine and Tom Winkler for use of version 1.4 of the library
++with Linux-2.6 kernels. These changes were merged together by Hannes
++Reich.
++
++Both patches are incorporated in their entirety, with the exception of
++some tweaks to sleep times in the ethAcc code and modifications to
++the code in src/codelets/usb/ from the Robin Farine / Tom Winkler
++patch.
++
++Status
++------
++
++This code has been tested on a Linksys NSLU2. It works in big-endian
++mode, performance seems around 10% faster than 1.4.
++
++The code does not work in little-endian mode. It appears as though the
++hardware is initialised correctly, but packet receive / transmit done
++callbacks are never called.
++
++Licence Information
++-------------------
++
++The patch is licenced under the same conditions as the original Access
++Library 1.5 (INTEL SOFTWARE LICENSE AGREEMENT). The full text of the
++licence can be downloaded from:
++http://www.intel.com/design/network/swsup/np_sla/ixp400.htm
++
++The patch is free, unsupported and the authors make no warranties.
++Use it at your own risk, do with it as you see fit so long as you do
++not violate the original licence agreement.
++
++The authors permit derivative works based upon the patch.
++
++References
++----------
++
++The version 1.4 patch by Robin Farine and Tom Winkler is available from
++http://www.wnk.at/ixp400_accesslib_kernel26/data/patch_accesslib_kernel26_20040811.diff
++
++The version 1.5 patch by Marc Singer is at
++http://wiki.buici.com/bin/view/Main/IXPAccessLibrary
+diff -Naur ixp400_xscale_sw.orig/src/codelets/dmaAcc/IxDmaAccCodelet_p.h ixp400_xscale_sw/src/codelets/dmaAcc/IxDmaAccCodelet_p.h
+--- ixp400_xscale_sw.orig/src/codelets/dmaAcc/IxDmaAccCodelet_p.h	2005-08-24 00:16:36.000000000 +0200
++++ ixp400_xscale_sw/src/codelets/dmaAcc/IxDmaAccCodelet_p.h	2005-08-24 00:18:02.000000000 +0200
+@@ -113,7 +113,7 @@
+  * @return IX_FAIL - Error initialising codelet
+  */
+ IX_STATUS
+-ixDmaAccCodeletInit(IxDmaNpeId npeId);
++ixDmaAccCodeletInit(IxNpeDlNpeId npeId);
+ 
+ /**
+  * @fn ixDmaAccCodeletTestPerform( UINT16 transferLength, 
+diff -Naur ixp400_xscale_sw.orig/src/ethDB/include/IxEthDB_p.h ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h
+--- ixp400_xscale_sw.orig/src/ethDB/include/IxEthDB_p.h	2005-08-24 00:16:36.000000000 +0200
++++ ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h	2005-08-24 00:18:02.000000000 +0200
+@@ -633,7 +633,7 @@
+ IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyXORHash(void *macAddress);
+ 
+ /* Port updates */
+-IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBFeature type);
++IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBRecordType type);
+ IX_ETH_DB_PUBLIC void ixEthDBUpdatePortLearningTrees(IxEthDBPortMap triggerPorts);
+ IX_ETH_DB_PUBLIC void ixEthDBNPEAccessRequest(IxEthDBPortId portID);
+ IX_ETH_DB_PUBLIC void ixEthDBUpdateLock(void);
+diff -Naur ixp400_xscale_sw.orig/src/include/IxTypes.h ixp400_xscale_sw/src/include/IxTypes.h
+--- ixp400_xscale_sw.orig/src/include/IxTypes.h	2005-08-24 00:16:36.000000000 +0200
++++ ixp400_xscale_sw/src/include/IxTypes.h	2005-08-26 01:19:15.000000000 +0200
+@@ -79,6 +79,10 @@
+ #endif
+ #endif
+ 
++#ifndef BIT
++#define BIT(x)  ((1)<<(x))
++#endif
++
+ #include "IxOsalBackward.h"
+ 
+ #endif /* IxTypes_H */
+diff -Naur ixp400_xscale_sw.orig/src/usb/include/usbprivatetypes.h ixp400_xscale_sw/src/usb/include/usbprivatetypes.h
+--- ixp400_xscale_sw.orig/src/usb/include/usbprivatetypes.h	2005-08-24 00:16:36.000000000 +0200
++++ ixp400_xscale_sw/src/usb/include/usbprivatetypes.h	2005-08-24 00:18:02.000000000 +0200
+@@ -164,6 +164,53 @@
+ } USBEventProcessor;
+ 
+ /*  UDC Registers */
++
++#undef UDCCR
++#undef UDCCS0
++#undef UDCCS1
++#undef UDCCS2
++#undef UDCCS3
++#undef UDCCS4
++#undef UDCCS5
++#undef UDCCS6
++#undef UDCCS7
++#undef UDCCS8
++#undef UDCCS9
++#undef UDCCS10
++#undef UDCCS11
++#undef UDCCS12
++#undef UDCCS13
++#undef UDCCS14
++#undef UDCCS15
++#undef UICR0
++#undef UICR1
++#undef USIR0
++#undef USIR1
++#undef UFNHR
++#undef UFNLR
++#undef UBCR2
++#undef UBCR4
++#undef UBCR7
++#undef UBCR9
++#undef UBCR12
++#undef UBCR14
++#undef UDDR0
++#undef UDDR5
++#undef UDDR10
++#undef UDDR15
++#undef UDDR1
++#undef UDDR2
++#undef UDDR3
++#undef UDDR4
++#undef UDDR6
++#undef UDDR7
++#undef UDDR8
++#undef UDDR9
++#undef UDDR11
++#undef UDDR12
++#undef UDDR13
++#undef UDDR14
++
+ typedef struct  /* UDCRegisters */
+ {
+     volatile UINT32 UDCCR;
diff --git a/packages/ixp4xx/ixp4xx-csr-2.0/Makefile.patch b/packages/ixp4xx/ixp4xx-csr-2.0/Makefile.patch
new file mode 100644
index 0000000000..585320c7ec
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.0/Makefile.patch
@@ -0,0 +1,81 @@
+diff -Naur ixp400_xscale_sw.orig/Makefile ixp400_xscale_sw/Makefile
+--- ixp400_xscale_sw/.pc/Makefile.patch/Makefile	2005-04-17 20:54:58.000000000 -0700
++++ ixp400_xscale_sw/Makefile	2005-10-01 18:15:08.422924549 -0700
+@@ -104,8 +104,8 @@
+ vxbe_COMPONENTS := $(BI_ENDIAN_COMPONENTS) perfProfAcc dmaAcc
+ vxle_COMPONENTS := $(BI_ENDIAN_COMPONENTS) perfProfAcc
+ vxsim_COMPONENTS := $(BI_ENDIAN_COMPONENTS) dmaAcc
+-linuxbe_COMPONENTS := $(BI_ENDIAN_COMPONENTS) perfProfAcc dmaAcc oslinux
+-linuxle_COMPONENTS := $(BI_ENDIAN_COMPONENTS) perfProfAcc oslinux
++linuxbe_COMPONENTS := $(BI_ENDIAN_COMPONENTS) dmaAcc oslinux
++linuxle_COMPONENTS := $(BI_ENDIAN_COMPONENTS) oslinux
+ 
+ #The lists below contain the set of components available for each target platform
+ # specific to the ixp46X device
+@@ -132,7 +132,7 @@
+ # Codelet components
+ # Codeletes listed in BI_ENDIAN_CODELETS_COMPONENTS must work for both
+ # big and little endian OSs.
+-BI_ENDIAN_CODELETS_COMPONENTS := hssAcc ethAcc perfProfAcc atm
++BI_ENDIAN_CODELETS_COMPONENTS := hssAcc ethAcc atm
+ 
+ #Codelet components only applicable to ixp46x
+ ixp46X_BI_ENDIAN_CODELETS_COMPONENTS := timeSyncAcc parityENAcc
+@@ -312,9 +312,9 @@
+ else
+ # linux compiler flags 
+ 
+-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale
++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale
+ 
+-CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS)
++CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -mapcs-32 -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS)
+ ifndef IX_INCLUDE_MICROCODE
+ CFLAGS += -DIX_NPEDL_READ_MICROCODE_FROM_FILE
+ endif
+@@ -806,9 +806,11 @@
+ 
+ ifeq ($(IX_HOST_OS),linux)
+ ifndef IX_INCLUDE_MICROCODE
++ifdef IX_BUILD_MICROCODE
+ Makefile: $(NPE_CONVERTER) $(NPE_DAT)
+ endif
+ endif
++endif
+ 
+ ################################################################
+ # Rules to check that macros are defined.
+@@ -1253,10 +1255,18 @@
+ 
+ ifndef IX_INCLUDE_MICROCODE
+ $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(OSAL_MODULE)
++	touch $(OBJ_DIR)/ixp400.c
++	cp Makefile.kmod26 $(OBJ_DIR)/Makefile
++	make -C $(OBJ_DIR)
+ 	$(LD) $(LDFLAGS) $^ -o $@
++	make -C $(OBJ_DIR)
+ else
+ $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(NPE_PRODUCTION_HEADER_OBJ) $(OSAL_MODULE)
++	touch $(OBJ_DIR)/ixp400.c
++	cp Makefile.kmod26 $(OBJ_DIR)/Makefile
++	make -C $(OBJ_DIR)
+ 	$(LD) $(LDFLAGS) $^ -o $@
++	make -C $(OBJ_DIR)
+ endif
+ 
+ 
+diff -Naur ixp400_xscale_sw.orig/Makefile.kmod26 ixp400_xscale_sw/Makefile.kmod26
+--- ixp400_xscale_sw.orig/Makefile.kmod26	1970-01-01 01:00:00.000000000 +0100
++++ ixp400_xscale_sw/Makefile.kmod26	2005-08-24 22:33:12.000000000 +0200
+@@ -0,0 +1,11 @@
++obj-m := ixp400.o
++
++PWD         := $(shell pwd)
++
++LINUX_SRC := $($(IX_TARGET)_KERNEL_DIR)
++
++default:
++	$(MAKE) ARCH=arm CROSS_COMPILE=$(LINUX_CROSS_COMPILE) V=1 -C $(LINUX_SRC) SUBDIRS=$(PWD) modules
++
++clean:
++	rm -f ixp400.ko
diff --git a/packages/ixp4xx/ixp4xx-csr_2.0.bb b/packages/ixp4xx/ixp4xx-csr_2.0.bb
new file mode 100644
index 0000000000..290bbeb897
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr_2.0.bb
@@ -0,0 +1,78 @@
+# Intel ixp4xx access library software.  Note that this has an Intel
+# license which restricts its use.
+MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>"
+HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm"
+LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm"
+LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm"
+# You must download the following software to your OpenEmbedded downloads
+# directory before using this package:
+#
+#	IPL_ixp400AccessLibrary-2_0.zip
+#	IPL_ixp400NpeLibrary-2_0.zip
+#
+# To do this go to the LICENSE_HOMEPAGE above, register/login (using a
+# web browser which is supported by the login page), this will give you
+# access to the web page from which you can download the software - you
+# need the: "Intel® IXP400 Software and RedBoot* Boot Loader" and, from
+# this the "Intel Hardware Access Software" and "NPE Microcode" (both
+# versions 1.5, encryption is not required.)
+#
+# Store the files with the names given below in your downloads directory
+#
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_0.zip"
+SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_0.zip"
+SRC_URI += "file://Makefile.patch;patch=1"
+SRC_URI += "file://2.6.patch;patch=1"
+SRC_URI += "file://2.6.14.patch;patch=1"
+DEPENDS = "ixp-osal"
+S = "${WORKDIR}/ixp400_xscale_sw"
+PR = "r0"
+
+COMPATIBLE_HOST = "^armeb-linux.*"
+
+inherit module
+
+# Add the architecture compiler flags to KERNEL_CC and KERNEL_LD as
+# required.  Notice that this has to be done for each separately built
+# module as well!
+KERNEL_CC += "${TARGET_CC_KERNEL_ARCH}"
+KERNEL_LD += "${TARGET_LD_KERNEL_ARCH}"
+
+OSAL_PATH = "lib/ixp425/linux/linuxbe"
+# This is a somewhat arbitrary choice:
+OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal"
+
+# NOTE: IX_INCLUDE_MICROCODE causes the microcode to be included in
+# the ixp4xx-csr module, this *requires* the IPL_ixp400NpeLibrary-2_0.zip
+# to be added to the SRC_URI - see above.
+EXTRA_OEMAKE = "'CC=${KERNEL_CC}' \
+		'LD=${KERNEL_LD}' \
+		'AR=${AR}' \
+		'IX_XSCALE_SW=${S}' \
+		'IX_TARGET=linuxbe' \
+		'IX_DEVICE=ixp42X' \
+		'IX_MPHY=1' \
+		'IX_MPHYSINGLEPORT=1' \
+		'IX_INCLUDE_MICROCODE=1' \
+		'LINUX_SRC=${STAGING_KERNEL_DIR}' \
+		'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \
+		'OSAL_DIR=${OSAL_DIR}' \
+		'OSAL_IMAGE=${OSAL_DIR}/${OSAL_PATH}/libosal.a' \
+		'OSAL_MODULE=${OSAL_DIR}/${OSAL_PATH}/ixp_osal.o' \
+		"
+
+do_compile () {
+	# The target makes the .ko as a side effect, as a result of the
+	# Makefile.patch
+	oe_runmake lib/linuxbe/ixp400.o
+}
+
+do_stage () {
+	install -d ${STAGING_INCDIR}/linux/ixp4xx-csr
+	install -m 0644 src/include/*.h ${STAGING_INCDIR}/linux/ixp4xx-csr/
+}
+
+do_install () {
+	install -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/drivers/ixp400
+	install -m 0644 lib/linuxbe/ixp400.ko ${D}${base_libdir}/modules/${KERNEL_VERSION}/drivers/ixp400/
+}