diff options
author | Rod Whitby <rod@whitby.id.au> | 2006-06-20 11:16:41 +0000 |
---|---|---|
committer | OpenEmbedded Project <openembedded-devel@lists.openembedded.org> | 2006-06-20 11:16:41 +0000 |
commit | 9d22c00dd63f99a2db8731905f96233cef7949f6 (patch) | |
tree | 50e6705ecb997280d7c915abef0c0e2ec8851167 /packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch | |
parent | 63685be96ca10cfe0fab542c7a3750efbbc4aa28 (diff) |
ixp4xx: version 2.1.1 of the access library added - compiles, untested, requires microcode loading support to be written before use.
Diffstat (limited to 'packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch')
-rw-r--r-- | packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch b/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch new file mode 100644 index 0000000000..33c1d132db --- /dev/null +++ b/packages/ixp4xx/ixp-osal-2.1.1/invalidate-cache.patch @@ -0,0 +1,115 @@ + os/linux/include/core/IxOsalOs.h | 17 ++++++++++ + os/linux/src/core/IxOsalOsCacheMMU.c | 56 +++++++++++++++++++++++++++++++++++ + os/linux/src/core/IxOsalOsSymbols.c | 4 ++ + 3 files changed, 76 insertions(+), 1 deletion(-) + +--- ixp_osal/os/linux/include/core/IxOsalOs.h 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/include/core/IxOsalOs.h 1970-01-01 00:00:00.000000000 +0000 +@@ -56,6 +56,7 @@ + #include <linux/cache.h> + #include <linux/mm.h> + #include <linux/config.h> ++#include <linux/version.h> + #include <asm/pgalloc.h> + + /** +@@ -66,9 +67,23 @@ + + #define IX_OSAL_OS_MMU_PHYS_TO_VIRT(addr) ((addr) ? phys_to_virt((unsigned int)(addr)) : 0) + +-#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++/* ++ * 2.6 kernels do not export the required cache functions. ++ */ ++extern void ixOsalCacheInvalidateRange(unsigned long start, unsigned long size); ++extern void ixOsalCacheFlushRange(unsigned long start, unsigned long size); ++ ++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) \ ++ixOsalCacheInvalidateRange((unsigned long)addr, (unsigned long)addr + size) ++#define IX_OSAL_OS_CACHE_FLUSH(addr, size) \ ++ixOsalCacheFlushRange((unsigned long)addr, (unsigned long)addr + size ) + ++#else ++ ++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size )) + #define IX_OSAL_OS_CACHE_FLUSH(addr, size) ( clean_dcache_range((__u32)addr, (__u32)addr + size )) ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */ + + /* Cache preload not available*/ + #define IX_OSAL_OS_CACHE_PRELOAD(addr,size) {} +--- ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 1970-01-01 00:00:00.000000000 +0000 +@@ -210,3 +210,59 @@ ixOsalCacheDmaFree (void *ptr) + free_pages ((unsigned int) memptr, order); + } + } ++ ++ ++/* ++ * 2.6 kernels do not export the required cache functions. ++ */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++ ++#define _IX_STR(x) #x ++#define IX_STR(x) _IX_STR(x) ++#define IX_CLM IX_STR(IX_OSAL_CACHE_LINE_SIZE-1) ++ ++/* ++ * reimplementation of kernel's invalidate_dcache_range() ++ */ ++void ++ixOsalCacheInvalidateRange(unsigned long start, unsigned long size) ++{ ++ __asm__ ++ (" tst %0, #" IX_CLM "\n" ++ " mcrne p15, 0, %0, c7, c10, 1 @ clean D cache line\n" ++ " bic %0, %0, #" IX_CLM "\n" ++ " tst %1, #" IX_CLM "\n" ++ " mcrne p15, 0, %1, c7, c10, 1 @ clean D cache line\n" ++ "1: mcr p15, 0, %0, c7, c6, 1 @ invalidate D cache line\n" ++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n" ++ " cmp %0, %1\n" ++ " blo 1b\n" ++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n" ++ : /* no output */ ++ : "r"(start), "r"(size) ++ : "cc"); ++} ++ ++/* ++ * reimplementation of kernel's invalidate_dcache_range() ++ */ ++void ++ixOsalCacheFlushRange(unsigned long start, unsigned long size) ++{ ++ __asm__ ++ (" bic %0, %0, #" IX_CLM "\n" ++ "1: mcr p15, 0, %0, c7, c10, 1 @ clean D cache line\n" ++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n" ++ " cmp %0, %1\n" ++ " blo 1b\n" ++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n" ++ : /* no output */ ++ : "r"(start), "r"(size) ++ : "cc"); ++} ++ ++#undef _IX_STR ++#undef IX_STR ++#undef IX_CLM ++ ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */ +--- ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 1970-01-01 00:00:00.000000000 +0000 ++++ ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 1970-01-01 00:00:00.000000000 +0000 +@@ -64,6 +64,10 @@ EXPORT_SYMBOL (ixOsalMemSet); + + EXPORT_SYMBOL (ixOsalCacheDmaMalloc); + EXPORT_SYMBOL (ixOsalCacheDmaFree); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) ++EXPORT_SYMBOL (ixOsalCacheInvalidateRange); ++EXPORT_SYMBOL (ixOsalCacheFlushRange); ++#endif + + EXPORT_SYMBOL (ixOsalThreadCreate); + EXPORT_SYMBOL (ixOsalThreadStart); |