diff options
author | Koen Kooi <koen@openembedded.org> | 2006-12-03 22:24:03 +0000 |
---|---|---|
committer | Koen Kooi <koen@openembedded.org> | 2006-12-03 22:24:03 +0000 |
commit | 3346e39d48ec06841f58bff4db62fe97973139b6 (patch) | |
tree | 3ad8e3582c13a22b824dc6dee77971b7c7acfaa8 /packages/gcc | |
parent | 67e57a6c42edb0efeca765cb913748f292732457 (diff) |
gcc 4.1.1: add patch to fix an ICE with building glibc with certain CFLAGS, if you get the ICE, you should update to binutils 2.17.50.0.5 as well
Diffstat (limited to 'packages/gcc')
-rw-r--r-- | packages/gcc/gcc-4.1.1/fix-ICE-in-arm_unwind_emit_set.diff | 18 | ||||
-rw-r--r-- | packages/gcc/gcc_4.1.1.bb | 6 |
2 files changed, 22 insertions, 2 deletions
diff --git a/packages/gcc/gcc-4.1.1/fix-ICE-in-arm_unwind_emit_set.diff b/packages/gcc/gcc-4.1.1/fix-ICE-in-arm_unwind_emit_set.diff new file mode 100644 index 0000000000..568e15abff --- /dev/null +++ b/packages/gcc/gcc-4.1.1/fix-ICE-in-arm_unwind_emit_set.diff @@ -0,0 +1,18 @@ +--- trunk/gcc/config/arm/arm.c 2006/09/19 13:18:27 117055 ++++ trunk/gcc/config/arm/arm.c 2006/09/19 13:19:24 117056 +@@ -15415,6 +15415,15 @@ + /* Move from sp to reg. */ + asm_fprintf (asm_out_file, "\t.movsp %r\n", REGNO (e0)); + } ++ else if (GET_CODE (e1) == PLUS ++ && GET_CODE (XEXP (e1, 0)) == REG ++ && REGNO (XEXP (e1, 0)) == SP_REGNUM ++ && GET_CODE (XEXP (e1, 1)) == CONST_INT) ++ { ++ /* Set reg to offset from sp. */ ++ asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n", ++ REGNO (e0), (int)INTVAL(XEXP (e1, 1))); ++ } + else + abort (); + break; diff --git a/packages/gcc/gcc_4.1.1.bb b/packages/gcc/gcc_4.1.1.bb index 9c0bd7baac..81b81eebcd 100644 --- a/packages/gcc/gcc_4.1.1.bb +++ b/packages/gcc/gcc_4.1.1.bb @@ -1,4 +1,4 @@ -PR = "r7" +PR = "r8" DESCRIPTION = "The GNU cc and gcc C compilers." HOMEPAGE = "http://www.gnu.org/software/gcc/" SECTION = "devel" @@ -29,7 +29,8 @@ SRC_URI = "http://ftp.gnu.org/pub/gnu/gcc/gcc-4.1.1/gcc-4.1.1.tar.bz2 \ file://cse.patch;patch=1 \ file://zecke-xgcc-cpp.patch;patch=1 \ file://unbreak-armv4t.patch;patch=1 \ - " + file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \ + " SRC_URI_append_fail-fast = " file://zecke-no-host-includes.patch;patch=1 " @@ -41,6 +42,7 @@ HAS_G2C = "no" #Set the java bits JAVA_arm = "" +JAVA = "" LANGUAGES = "c,c++${FORTRAN}${JAVA}" require gcc3-build.inc |