diff options
author | Michael Lauer <mickey@vanille-media.de> | 2008-06-01 12:23:21 +0000 |
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committer | Michael Lauer <mickey@vanille-media.de> | 2008-06-01 12:23:21 +0000 |
commit | d69fd172c6e48679d54aa3e6767fb0cd357fc416 (patch) | |
tree | 88e74daad4385eb303a38b2c422ca5bd2d8ee208 /packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch | |
parent | b3b724b8114f74dabea8d6f6f8c31339841cef32 (diff) | |
parent | effad2723e7a4e7f306e3090ec8e4791020f554c (diff) |
merge of '1ba4060144f3549b5ec4424715ddde5fd9d0ad61'
and 'a66740dc82701e8bcaf09d803b69b8601b7efb2d'
Diffstat (limited to 'packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch')
-rw-r--r-- | packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch b/packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch new file mode 100644 index 0000000000..cdd52244a6 --- /dev/null +++ b/packages/gcc/gcc-4.2.4/arm-crunch-floatsi-disable-single.patch @@ -0,0 +1,38 @@ +--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-25 12:12:39.000000000 +1000 ++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-25 12:16:13.000000000 +1000 +@@ -301,13 +301,14 @@ + ) + + ;; Convert Cirrus-SI to Cirrus-SF ++; appears to be buggy + (define_insn "cirrus_floatsisf2" + [(set (match_operand:SF 0 "cirrus_fp_register" "=v") + (float:SF (match_operand:SI 1 "s_register_operand" "r"))) + (clobber (match_scratch:DF 2 "=v"))] +- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" ++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0" + "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2" + [(set_attr "length" "8") + (set_attr "cirrus" "move")] + ) + +--- gcc-4.1.2/gcc/config/arm/arm.md-cfcvt 2007-06-25 12:16:53.000000000 +1000 ++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-25 12:18:20.000000000 +1000 +@@ -3125,14 +3125,15 @@ + + ;; Fixed <--> Floating conversion insns + ++;; Maverick Crunch floatsisf2 is buggy - see cirrus.md + (define_expand "floatsisf2" + [(set (match_operand:SF 0 "s_register_operand" "") + (float:SF (match_operand:SI 1 "s_register_operand" "")))] +- "TARGET_ARM && TARGET_HARD_FLOAT" ++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" + " +- if (TARGET_MAVERICK) ++ if (TARGET_MAVERICK && 0) + { + emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1])); + DONE; + } + ") |