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authorKoen Kooi <koen@openembedded.org>2007-10-12 11:37:45 +0000
committerKoen Kooi <koen@openembedded.org>2007-10-12 11:37:45 +0000
commit1c5df3f485ba9992931e06d07f28c57a29d89e5e (patch)
treef1f786842f479fcdef015d6bfb430f8ea599fac1 /packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq
parentd6fd6d24ea9cef7d661bed9424f54a7719bea5dc (diff)
parent276e2ad3fd901d3fca0291979abc9c10455232ee (diff)
propagate from branch 'org.openembedded.dev' (head 7c2dfd8725acfc6de0286a17d58cccbfa6c141f8)
to branch 'org.openembedded.dev.avr32' (head 6a2246abf3d894c89fc60280e99b73072b879e02)
Diffstat (limited to 'packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq')
-rw-r--r--packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq98
1 files changed, 98 insertions, 0 deletions
diff --git a/packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq b/packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq
new file mode 100644
index 0000000000..715fb95086
--- /dev/null
+++ b/packages/gcc/gcc-4.2.2/arm-crunch-compare-unordered.patch-z-eq
@@ -0,0 +1,98 @@
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-07 14:45:22.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-07 15:13:58.000000000 +1000
+@@ -7001,16 +7001,16 @@
+ (if_then_else (unordered (match_dup 1) (const_int 0))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0,
+ arm_compare_op1);"
+ )
+
+ (define_expand "bordered"
+ [(set (pc)
+ (if_then_else (ordered (match_dup 1) (const_int 0))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
+ "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0,
+ arm_compare_op1);"
+@@ -7141,6 +7141,38 @@
+ (set_attr "length" "8")]
+ )
+
++; Special pattern to match UNORDERED for MAVERICK - UGLY since we need to test for C=0 && N=0
++(define_insn "*arm_bunordered"
++ [(set (pc)
++ (if_then_else (unordered (match_operand 1 "cc_register" "") (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_MAVERICK)"
++ "*
++ gcc_assert (!arm_ccfsm_state);
++
++ return \"bcs\\t.+12\;bmi\\t.+8\;b\\t%l0\";
++ "
++ [(set_attr "conds" "jump_clob")
++ (set_attr "length" "12")]
++)
++
++; Special pattern to match ORDERED for MAVERICK.
++(define_insn "*arm_bordered"
++ [(set (pc)
++ (if_then_else (ordered (match_operand 1 "cc_register" "") (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_MAVERICK)"
++ "*
++ gcc_assert (!arm_ccfsm_state);
++
++ return \"bcs\\t%l0\;bmi\\t%l0\";
++ "
++ [(set_attr "conds" "jump_clob")
++ (set_attr "length" "8")]
++)
++
+ (define_insn "*arm_cond_branch"
+ [(set (pc)
+ (if_then_else (match_operator 1 "arm_comparison_operator"
+@@ -7224,6 +7256,37 @@
+ (set_attr "length" "8")]
+ )
+
++; Special pattern to match reversed UNORDERED for MAVERICK.
++(define_insn "*arm_bunordered_reversed"
++ [(set (pc)
++ (if_then_else (unordered (match_operand 1 "cc_register" "") (const_int 0))
++ (pc)
++ (label_ref (match_operand 0 "" ""))))]
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_MAVERICK)"
++ "*
++ gcc_assert (!arm_ccfsm_state);
++
++ return \"bcs\\t%l0\;bmi\\t%l0\";
++ "
++ [(set_attr "conds" "jump_clob")
++ (set_attr "length" "8")]
++)
++
++; Special pattern to match reversed ORDERED for MAVERICK - UGLY since we need to test for C=0 && N=0
++(define_insn "*arm_bordered_reversed"
++ [(set (pc)
++ (if_then_else (ordered (match_operand 1 "cc_register" "") (const_int 0))
++ (pc)
++ (label_ref (match_operand 0 "" ""))))]
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_MAVERICK)"
++ "*
++ gcc_assert (!arm_ccfsm_state);
++
++ return \"bcs\\t.+12\;bmi\\t.+8\;b\\t%l0\";
++ "
++ [(set_attr "conds" "jump_clob")
++ (set_attr "length" "12")]
++)
+
+ (define_insn "*arm_cond_branch_reversed"
+ [(set (pc)