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authorKoen Kooi <koen@openembedded.org>2007-10-10 08:55:35 +0000
committerKoen Kooi <koen@openembedded.org>2007-10-10 08:55:35 +0000
commit7cd1f1a619ec4e88523e2ed850495ef1b616e415 (patch)
tree01beb57731afdd26b85100196f8736224df5baaf /packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch
parent2b562cb2c7e5c6520d2d0cf972cec1e2d10610eb (diff)
gcc: add 4.2.2
Diffstat (limited to 'packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch')
-rw-r--r--packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch85
1 files changed, 85 insertions, 0 deletions
diff --git a/packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch b/packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch
new file mode 100644
index 0000000000..88eaee322d
--- /dev/null
+++ b/packages/gcc/gcc-4.2.2/arm-crunch-32bit-disable.patch
@@ -0,0 +1,85 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-integer 2007-06-15 09:01:37.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 09:04:45.000000000 +1000
+@@ -149,7 +149,7 @@
+ (match_operand:SI 1 "cirrus_fp_register" "0")
+ (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v")
+ (match_operand:SI 3 "cirrus_fp_register" "v"))))]
+- "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "0 && TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmsc32%?\\t%V0, %V2, %V3"
+ [(set_attr "type" "mav_farith")
+ (set_attr "cirrus" "normal")]
+@@ -305,7 +305,7 @@
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float:SF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -315,7 +315,7 @@
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (float:DF (match_operand:SI 1 "s_register_operand" "r")))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "move")]
+@@ -339,7 +339,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+@@ -349,7 +349,7 @@
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v"))))
+ (clobber (match_scratch:DF 2 "=v"))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2"
+ [(set_attr "length" "8")
+ (set_attr "cirrus" "normal")]
+--- gcc-4.1.2/gcc/config/arm/arm.md-trunc 2007-06-15 10:56:13.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 11:01:22.000000000 +1000
+@@ -3130,7 +3130,7 @@
+ (float:SF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsisf2 (operands[0], operands[1]));
+ DONE;
+@@ -3142,7 +3142,7 @@
+ (float:DF (match_operand:SI 1 "s_register_operand" "")))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ emit_insn (gen_cirrus_floatsidf2 (operands[0], operands[1]));
+ DONE;
+@@ -3154,7 +3154,7 @@
+ (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[0], SImode))
+ operands[0] = force_reg (SImode, operands[0]);
+@@ -3170,7 +3170,7 @@
+ (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" ""))))]
+ "TARGET_ARM && TARGET_HARD_FLOAT"
+ "
+- if (TARGET_MAVERICK)
++ if (TARGET_MAVERICK && 0)
+ {
+ if (!cirrus_fp_register (operands[1], DFmode))
+ operands[1] = force_reg (DFmode, operands[0]);