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authorMichael Lauer <mickey@vanille-media.de>2007-08-30 22:36:16 +0000
committerMichael Lauer <mickey@vanille-media.de>2007-08-30 22:36:16 +0000
commit295f0eb481ce73f976bc46031fa33551375d77cf (patch)
tree05128354e9e08c744377763a48f95398c5dfa8fd /packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch
parent328141d34f35516a988d7525f704064c6c55737d (diff)
parentd7d57f3e05feab6e49a2264f6e81902c28682049 (diff)
merge of '16ddc63cc58ab4f6ac83a2e1d653c740ffdd6f87'
and '76b3eaaf78af7bef8ae185d70ad72a4c8f9a3af7'
Diffstat (limited to 'packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch')
-rw-r--r--packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch b/packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch
new file mode 100644
index 0000000000..ec09ea16a1
--- /dev/null
+++ b/packages/gcc/gcc-4.1.2/arm-crunch-cfcvtds-disable.patch
@@ -0,0 +1,32 @@
+--- gcc-4.1.2/gcc/config/arm/cirrus.md-cfcvt 2007-06-15 10:06:24.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/cirrus.md 2007-06-15 10:07:21.000000000 +1000
+@@ -355,11 +355,12 @@
+ (set_attr "cirrus" "normal")]
+ )
+
++; appears to be buggy - causes 20000320-1.c to fail in execute/ieee
+ (define_insn "*cirrus_truncdfsf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (float_truncate:SF
+ (match_operand:DF 1 "cirrus_fp_register" "v")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK && 0"
+ "cfcvtds%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+--- gcc-4.1.2/gcc/config/arm/arm.md-truncdfsf2 2007-06-15 10:25:43.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-15 10:27:01.000000000 +1000
+@@ -3181,11 +3181,12 @@
+
+ ;; Truncation insns
+
++;; Maverick Crunch truncdfsf2 is buggy - see cirrus.md
+ (define_expand "truncdfsf2"
+ [(set (match_operand:SF 0 "s_register_operand" "")
+ (float_truncate:SF
+ (match_operand:DF 1 "s_register_operand" "")))]
+- "TARGET_ARM && TARGET_HARD_FLOAT"
++ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ ""
+ )
+