dsplink : Commit work in progress.

          * Add support for SFFSDR board with 128M of ram
          * Build more DSP/ARM transfer methods
          * Install dsp samples in /usr/share/dsplink

4 files changed, 135 insertions, 10 deletions

diff --git a/packages/dsplink/dsplink.inc b/packages/dsplink/dsplink.inc
index 9e9dff888f..2347068379 100644
--- a/packages/dsplink/dsplink.inc
+++ b/packages/dsplink/dsplink.inc
@@ -116,8 +116,24 @@ do_install () {
 	cp ${S}/gpp/BUILD/EXPORT/RELEASE/dsplinkk.ko ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/dsp/
 
 	install -d ${D}/${bindir}
-	install ${S}/gpp/BUILD/EXPORT/RELEASE/mpcsxfergpp ${D}/${bindir}
-	install ${S}/gpp/BUILD/EXPORT/RELEASE/ringiogpp   ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/loopgpp           ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/messagegpp        ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/messagemultigpp   ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/mpcsxfergpp       ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/mplistgpp         ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/readwritegpp      ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/ringiogpp         ${D}/${bindir}
+	install ${S}/gpp/BUILD/EXPORT/RELEASE/scalegpp          ${D}/${bindir}
+
+	install -d ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/loop.out          ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/messagemulti.out  ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/message.out       ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/mpcsxfer.out      ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/mplist.out        ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/readwrite.out     ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/ringio.out        ${D}/${datadir}/dsplink
+	install ${S}/dsp/BUILD/EXPORT/RELEASE/scale.out         ${D}/${datadir}/dsplink
 
 	install -d ${D}/${libdir}
 	install -m 0755 ${S}/gpp/BUILD/EXPORT/RELEASE/dsplink.lib  ${D}/${libdir}
@@ -143,7 +159,8 @@ pkg_postrm_${PN}-module () {
 
 PACKAGES =+ "${PN}-module"
 FILES_${PN}-module  = "${sysconfdir} /lib/modules"
-FILES_${PN} = "${bindir}/mpcsxfergpp ${bindir}/ringiogpp"
+FILES_${PN} = "${bindir}/* ${datadir}/dsplink/*"
+
 INHIBIT_PACKAGE_STRIP = "1"
 
 PACKAGE_ARCH = "${MACHINE_ARCH}" 
diff --git a/packages/dsplink/dsplink_1.50.bb b/packages/dsplink/dsplink_1.50.bb
index 9132389923..965c735798 100644
--- a/packages/dsplink/dsplink_1.50.bb
+++ b/packages/dsplink/dsplink_1.50.bb
@@ -15,6 +15,10 @@ SRC_URI = "http://install.tarball.in.source.dir/dsplink_1_50.tar.gz \
 	   file://prcs-fix-include.patch;patch=1;pnum=2 \
 "
 
+SRC_URI_append_davinci-sffsdr = " \
+           file://dsplink-128M.patch;patch=1;pnum=2 \
+"
+
 S = "${WORKDIR}/dsplink_1_50/dsplink"
 
 
diff --git a/packages/dsplink/files/CURRENTCFG.MK b/packages/dsplink/files/CURRENTCFG.MK
index 55959854e1..9e23bafe12 100644
--- a/packages/dsplink/files/CURRENTCFG.MK
+++ b/packages/dsplink/files/CURRENTCFG.MK
@@ -59,30 +59,30 @@ export USE_POOL            := 1
 export USE_NOTIFY          := 1
 export USE_MPCS            := 1
 export USE_RINGIO          := 1
-export USE_MPLIST          := 0
-export USE_MSGQ            := 0
-export USE_CHNL            := 0
+export USE_MPLIST          := 1
+export USE_MSGQ            := 1
+export USE_CHNL            := 1
 
 
 #   =========================================================
 #   Compile time physical link scalability options for device
 #   =========================================================
-export USE_CHNL_ZCPY_LINK  := 0
+export USE_CHNL_ZCPY_LINK  := 1
 export USE_CHNL_PCPY_LINK  := 0
-export USE_MSGQ_ZCPY_LINK  := 0
+export USE_MSGQ_ZCPY_LINK  := 1
 export USE_MSGQ_PCPY_LINK  := 0
 
 
 #   =========================================================
 #   Enable/ Disable trace
 #   =========================================================
-export TRACE               := 1
+export TRACE               := 0
 
 
 #   =========================================================
 #   Enable/ Disable profiling
 #   =========================================================
-export PROFILE             := 1
+export PROFILE             := 0
 
 
 #   =========================================================
diff --git a/packages/dsplink/files/dsplink-128M.patch b/packages/dsplink/files/dsplink-128M.patch
new file mode 100644
index 0000000000..ff5902bf50
--- /dev/null
+++ b/packages/dsplink/files/dsplink-128M.patch
@@ -0,0 +1,104 @@
+diff -Nurd dsplink_1_50/dsplink/config/all/CFG_Davinci_DM6446.c dsplink_1_50.work/dsplink/config/all/CFG_Davinci_DM6446.c
+--- dsplink_1_50/dsplink/config/all/CFG_Davinci_DM6446.c	2007-12-03 08:11:41.000000000 -0500
++++ dsplink_1_50.work/dsplink/config/all/CFG_Davinci_DM6446.c	2008-07-29 16:52:28.000000000 -0400
+@@ -69,8 +69,8 @@
+         FALSE,                 /* AUTOSTART      : Autostart the DSP (Not supported) */
+         "DEFAULT.OUT",         /* EXECUTABLE     : Executable for autostart */
+         TRUE,                  /* DOPOWERCTRL    : Link does the Power Ctrl of DSP. */
+-        0x8FF00020,            /* RESUMEADDR     : Resume address */
+-        0x8FF00000,            /* RESETVECTOR    : Reset Vector for the DSP */
++        0x87000020,            /* RESUMEADDR     : Resume address */
++        0x87000000,            /* RESETVECTOR    : Reset Vector for the DSP */
+         0x80,                  /* RESETCODESIZE  : Size of code at DSP Reset Vector */
+         1,                     /* MADUSIZE       : DSP Minimum Addressable Data Unit */
+         (Uint32) -1,           /* CPUFREQ        : DSP Frequency (in KHz), -1 if default setting is to be used */
+@@ -93,8 +93,8 @@
+     {
+         0,                     /* ENTRY          : Entry number */
+         "DSPLINKMEM",          /* NAME           : Name of the memory region */
+-        0x8FE00000,            /* ADDRPHYS       : Physical address */
+-        0x8FE00000,            /* ADDRDSPVIRT    : DSP virtual address */
++        0x87000000,            /* ADDRPHYS       : Physical address */
++        0x87000000,            /* ADDRDSPVIRT    : DSP virtual address */
+         (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
+         0x5000,                /* SIZE           : Size of the memory region */
+         TRUE                   /* SHARED         : Shared access memory? */
+@@ -102,8 +102,8 @@
+     {
+         1,                     /* ENTRY          : Entry number */
+         "DSPLINKMEM1",         /* NAME           : Name of the memory region */
+-        0x8FE05000,            /* ADDRPHYS       : Physical address */
+-        0x8FE05000,            /* ADDRDSPVIRT    : DSP virtual address */
++        0x87005000,            /* ADDRPHYS       : Physical address */
++        0x87005000,            /* ADDRDSPVIRT    : DSP virtual address */
+         (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
+         0xFB000,               /* SIZE           : Size of the memory region */
+         TRUE                   /* SHARED         : Shared access memory? */
+@@ -111,8 +111,8 @@
+     {
+         2,                     /* ENTRY          : Entry number */
+         "RESETCTRL",           /* NAME           : Name of the memory region */
+-        0x8FF00000,            /* ADDRPHYS       : Physical address */
+-        0x8FF00000,            /* ADDRDSPVIRT    : DSP virtual address */
++        0x87100000,            /* ADDRPHYS       : Physical address */
++        0x87100000,            /* ADDRDSPVIRT    : DSP virtual address */
+         (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
+         0x00000080,            /* SIZE           : Size of the memory region */
+         FALSE                  /* SHARED         : Shared access memory? */
+@@ -120,10 +120,10 @@
+     {
+         3,                     /* ENTRY          : Entry number */
+         "DDR",                 /* NAME           : Name of the memory region */
+-        0x8FF00080,            /* ADDRPHYS       : Physical address */
+-        0x8FF00080,            /* ADDRDSPVIRT    : DSP virtual address */
++        0x87100080,            /* ADDRPHYS       : Physical address */
++        0x87100080,            /* ADDRDSPVIRT    : DSP virtual address */
+         (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
+-        0xFFF80,               /* SIZE           : Size of the memory region */
++        0xEFFF80,               /* SIZE           : Size of the memory region */
+         FALSE                  /* SHARED         : Shared access memory? */
+     },
+     {
+diff -Nurd dsplink_1_50/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci dsplink_1_50.work/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci
+--- dsplink_1_50/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci	2007-12-03 08:11:55.000000000 -0500
++++ dsplink_1_50.work/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci	2008-07-29 16:56:03.000000000 -0400
+@@ -54,7 +54,10 @@
+ prog.module("GBL").C64PLUSCONFIGURE   = true ;
+ prog.module("GBL").C64PLUSL2CFG       = "32k" ;
+ prog.module("GBL").C64PLUSL1DCFG      = "32k" ;
++prog.module("GBL").C64PLUSMAR128to159 = 0xFFFFFFFF ;
++/*
+ prog.module("GBL").C64PLUSMAR128to159 = 0x00008000 ;
++*/
+ 
+ /*  ============================================================================
+  *  MEM
+@@ -67,7 +70,7 @@
+  *  ============================================================================
+  */
+ var DSPLINKMEM = prog.module("MEM").create("DSPLINKMEM");
+-DSPLINKMEM.base             = 0x8FE00000;
++DSPLINKMEM.base             = 0x87000000;
+ DSPLINKMEM.len              = 0x100000;
+ DSPLINKMEM.createHeap       = false;
+ DSPLINKMEM.comment          = "DSPLINKMEM";
+@@ -77,7 +80,7 @@
+  *  ============================================================================
+  */
+ var RESET_VECTOR = prog.module("MEM").create("RESET_VECTOR");
+-RESET_VECTOR.base        = 0x8FF00000;
++RESET_VECTOR.base        = 0x87100000;
+ RESET_VECTOR.len         = 0x00000080;
+ RESET_VECTOR.space       = "code/data";
+ RESET_VECTOR.createHeap  = false;
+@@ -88,8 +91,8 @@
+  *  ============================================================================
+  */
+ var DDR = prog.module("MEM").create("DDR");
+-DDR.base             = 0x8FF00080;
+-DDR.len              = 0x000FFF80;
++DDR.base             = 0x87100080;
++DDR.len              = 0xEFFF80;
+ DDR.space            = "code/data";
+ DDR.createHeap       = true;
+ DDR.heapSize         = 0x10000;