diff options
| author | Michael 'Mickey' Lauer <mickey@vanille-media.de> | 2009-11-24 16:33:51 +0000 |
|---|---|---|
| committer | Michael 'Mickey' Lauer <mickey@vanille-media.de> | 2009-11-24 16:33:51 +0000 |
| commit | 9a681a2affece3d2a9230c4939450d9392c33bf9 (patch) | |
| tree | 15f0a38d8bdee1eb0e9bae2e6277b03c28bd3fe8 | |
| parent | 880e00d3b7ccf66d9421a06bc28e553e07842b59 (diff) | |
| parent | a12117346588829898e6a041a4432fb0370c0c76 (diff) | |
Merge branch 'org.openembedded.dev' of git@git.openembedded.org:openembedded
435 files changed, 57604 insertions, 949 deletions
diff --git a/.gitignore b/.gitignore index 45d62d8696..6fe8a9d457 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1,2 @@ *.sw? +*~ diff --git a/MAINTAINERS b/MAINTAINERS index 150d4edbb3..9b15080612 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -161,20 +161,20 @@ Recipes: gnumeric, gobby, obby, imposter, inkscape Recipes: *moko*, telepathy, tilibs, xchat, xournal. Person: Kristoffer Ericson -Mail: Kristoffer_e1@hotmail.com -Website: www.jlime.com -Machines: spitz, jornada 680, jornada 720 -Distros: JLime, Openzaurus -Interests: wifi, kernels, emulation, qemu, git +Mail: Kristoffer.ericson@gmail.com +Website: http://www.jlime.com +Machines: jornada 680, jornada 720, NEC Mobilepro 900/c, Ben Nanonote +Distros: JLime +Interests: Kernels, emulation, superh/arm/mips Recipes: linux-jlime*, scummvm, blackbox Person: Leon Woestenberg Mail: leon@sidebranch.com Website: http://www.sidebranch.com/ -Interests: Real-time and/or embedded Linux for industrial applications. +Interests: Real-time and embedded Linux for industrial applications. Interests: Small read-only Linux based firmware, deterministic builds. Recipes: lighttpd, fastcgi, squashfs-tools, rt-tests, linux-rt, linux -Machines: mpc8313e-rdb, mpc8315e-rdb, efika, ixp4xxbe, x86, canyonlands +Machines: mpc8313e-rdb, mpc8315e-rdb, canyonlands, calamari, openrd-base Person: Liam Girdwoord Mail: liam.girdwood@wolfsonmicro.com diff --git a/recipes/glibc/glibc-package.bbclass b/classes/glibc-package.bbclass index f1e38e7c71..413ed14931 100644 --- a/recipes/glibc/glibc-package.bbclass +++ b/classes/glibc-package.bbclass @@ -1,33 +1,13 @@ # -# For now, we will skip building of a gcc package if it is a uclibc one -# and our build is not a uclibc one, and we skip a glibc one if our build -# is a uclibc build. +# This class knows how to package up glibc. Its shared since prebuild binary toolchains +# may need packaging and its pointless to duplicate this code. # -# See the note in gcc/gcc_3.4.0.oe -# - -python __anonymous () { - import bb, re - uc_os = (re.match('.*uclibc*', bb.data.getVar('TARGET_OS', d, 1)) != None) - if uc_os: - raise bb.parse.SkipPackage("incompatible with target %s" % - bb.data.getVar('TARGET_OS', d, 1)) -} - - -# Binary locales are generated at build time if ENABLE_BINARY_LOCALE_GENERATION -# is set. The idea is to avoid running localedef on the target (at first boot) -# to decrease initial boot time and avoid localedef being killed by the OOM -# killer which used to effectively break i18n on machines with < 128MB RAM. +# Caller should set GLIBC_INTERNAL_USE_BINARY_LOCALE to one of: +# "compile" - Use QEMU to generate the binary locale files +# "precompiled" - The binary locale files are pregenerated and already present +# "ondevice" - The device will build the locale files upon first boot through the postinst -# default to disabled until qemu works for everyone -ENABLE_BINARY_LOCALE_GENERATION ?= "0" - -# BINARY_LOCALE_ARCHES is a space separated list of regular expressions -BINARY_LOCALE_ARCHES ?= "arm.* i[3-6]86 x86_64 powerpc" - -# Set this to zero if you don't want ldconfig in the output package -USE_LDCONFIG ?= "1" +GLIBC_INTERNAL_USE_BINARY_LOCALE ?= "ondevice" PACKAGES = "glibc-dbg glibc catchsegv sln nscd ldd localedef glibc-utils glibc-dev glibc-static glibc-doc glibc-locale libcidn libmemusage libsegfault glibc-extra-nss glibc-thread-db glibc-pcprofile" PACKAGES_DYNAMIC = "glibc-gconv-* glibc-charmap-* glibc-localedata-* locale-base-* glibc-binary-localedata-*" @@ -36,18 +16,32 @@ INSANE_SKIP_glibc-dbg = True libc_baselibs = "${base_libdir}/libcrypt*.so.* ${base_libdir}/libcrypt-*.so ${base_libdir}/libc*.so.* ${base_libdir}/libc-*.so ${base_libdir}/libm*.so.* ${base_libdir}/libm-*.so ${base_libdir}/ld*.so.* ${base_libdir}/ld-*.so ${base_libdir}/libpthread*.so.* ${base_libdir}/libpthread-*.so ${base_libdir}/libresolv*.so.* ${base_libdir}/libresolv-*.so ${base_libdir}/librt*.so.* ${base_libdir}/librt-*.so ${base_libdir}/libutil*.so.* ${base_libdir}/libutil-*.so ${base_libdir}/libnsl*.so.* ${base_libdir}/libnsl-*.so ${base_libdir}/libnss_files*.so.* ${base_libdir}/libnss_files-*.so ${base_libdir}/libnss_compat*.so.* ${base_libdir}/libnss_compat-*.so ${base_libdir}/libnss_dns*.so.* ${base_libdir}/libnss_dns-*.so ${base_libdir}/libdl*.so.* ${base_libdir}/libdl-*.so ${base_libdir}/libanl*.so.* ${base_libdir}/libanl-*.so ${base_libdir}/libBrokenLocale*.so.* ${base_libdir}/libBrokenLocale-*.so" -FILES_${PN} = "${libc_baselibs} ${libexecdir}/* ${datadir}/zoneinfo ${@base_conditional('USE_LDCONFIG', '1', '${base_sbindir}/ldconfig', '', d)}" +# The problem is that if PN = "glibc", FILES_${PN} will overwrite FILES_glibc +# Solution: Make them both the same thing, then it doesn't matter + +glibcfiles = "${libc_baselibs} ${libexecdir}/* ${datadir}/zoneinfo ${@base_conditional('USE_LDCONFIG', '1', '${base_sbindir}/ldconfig', '', d)}" +glibcdbgfiles = "${bindir}/.debug ${sbindir}/.debug ${libdir}/.debug \ + ${base_bindir}/.debug ${base_sbindir}/.debug ${base_libdir}/.debug \ + ${libdir}/gconv/.debug ${libexecdir}/*/.debug" +glibcdevfiles = "${bindir}/rpcgen ${includedir} ${libdir}/lib*${SOLIBSDEV} ${libdir}/*.la \ + ${libdir}/*.a ${libdir}/*.o ${libdir}/pkgconfig ${libdir}/*nonshared.a \ + ${base_libdir}/*.a ${base_libdir}/*.o ${datadir}/aclocal" + +FILES_glibc = "${glibcfiles}" +FILES_${PN} = "${glibcfiles}" FILES_ldd = "${bindir}/ldd" FILES_libsegfault = "${base_libdir}/libSegFault*" FILES_libcidn = "${base_libdir}/libcidn*.so" FILES_libmemusage = "${base_libdir}/libmemusage.so" FILES_glibc-extra-nss = "${base_libdir}/libnss*" FILES_sln = "${base_sbindir}/sln" -FILES_glibc-dev_append = " ${libdir}/*.o ${bindir}/rpcgen ${libdir}/*nonshared.a" +FILES_glibc-dev = "${glibcdevfiles}" +FILES_${PN}-dev = "${glibcdevfiles}" +FILES_glibc-dbg = "${glibcdbgfiles}" +FILES_${PN}-dbg = "${glibcdbgfiles}" FILES_nscd = "${sbindir}/nscd* ${sysconfdir}/nscd* ${sysconfdir}/init.d/nscd*" FILES_glibc-utils = "${bindir}/* ${sbindir}/*" FILES_glibc-gconv = "${libdir}/gconv/*" -FILES_${PN}-dbg += " ${libdir}/gconv/.debug ${libexecdir}/*/.debug" FILES_catchsegv = "${bindir}/catchsegv" RDEPENDS_catchsegv = "libsegfault" FILES_glibc-pcprofile = "${base_libdir}/libpcprofile.so" @@ -62,40 +56,6 @@ DESCRIPTION_ldd = "glibc: print shared library dependencies" DESCRIPTION_localedef = "glibc: compile locale definition files" DESCRIPTION_glibc-utils = "glibc: misc utilities like iconf, local, gencat, tzselect, rpcinfo, ..." -INITSCRIPT_NAME = "nscd" -INITSCRIPT_PACKAGES = "nscd" -INITSCRIPT_PARAMS = "start 40 S . stop 40 0 6 1 ." -inherit update-rc.d - -def get_glibc_fpu_setting(bb, d): - if bb.data.getVar('TARGET_FPU', d, 1) in [ 'soft' ]: - return "--without-fp" - return "" - -EXTRA_OECONF += "${@get_glibc_fpu_setting(bb, d)}" -EXTRA_OEMAKE += "rootsbindir=${base_sbindir}" - -OVERRIDES_append = ":${TARGET_ARCH}-${TARGET_OS}" - -do_install() { - oe_runmake install_root=${D} install - for r in ${rpcsvc}; do - h=`echo $r|sed -e's,\.x$,.h,'` - install -m 0644 ${S}/sunrpc/rpcsvc/$h ${D}/${includedir}/rpcsvc/ - done - install -d ${D}${libdir}/locale - make -f ${WORKDIR}/generate-supported.mk IN="${S}/localedata/SUPPORTED" OUT="${WORKDIR}/SUPPORTED" - # get rid of some broken files... - for i in ${GLIBC_BROKEN_LOCALES}; do - grep -v $i ${WORKDIR}/SUPPORTED > ${WORKDIR}/SUPPORTED.tmp - mv ${WORKDIR}/SUPPORTED.tmp ${WORKDIR}/SUPPORTED - done - rm -f ${D}{sysconfdir}/rpc - install -d ${D}${sysconfdir}/init.d - install -m 0644 ${S}/nscd/nscd.conf ${D}${sysconfdir}/ - install ${S}/nscd/nscd.init ${D}${sysconfdir}/init.d/nscd -} - TMP_LOCALE="/tmp/locale${libdir}/locale" locale_base_postinst() { @@ -129,26 +89,6 @@ mv ${TMP_LOCALE}/locale-archive ${libdir}/locale/ rm -rf ${TMP_LOCALE} } -python __anonymous () { - enabled = bb.data.getVar("ENABLE_BINARY_LOCALE_GENERATION", d, 1) - - if enabled and int(enabled): - import re - - target_arch = bb.data.getVar("TARGET_ARCH", d, 1) - binary_arches = bb.data.getVar("BINARY_LOCALE_ARCHES", d, 1) or "" - - for regexp in binary_arches.split(" "): - r = re.compile(regexp) - - if r.match(target_arch): - depends = bb.data.getVar("DEPENDS", d, 1) - depends = "%s qemu-native" % depends - bb.data.setVar("DEPENDS", depends, d) - bb.data.setVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", "1", d) - break -} - do_prep_locale_tree() { treedir=${WORKDIR}/locale-tree rm -rf $treedir @@ -220,17 +160,29 @@ python package_do_split_gconvs () { do_split_packages(d, locales_dir, file_regex='(.*)', output_pattern='glibc-localedata-%s', description='locale definition for %s', hook=calc_locale_deps, extra_depends='') bb.data.setVar('PACKAGES', bb.data.getVar('PACKAGES', d) + ' glibc-gconv', d) - supported = bb.data.getVar('GLIBC_GENERATE_LOCALES', d, 1) - if not supported or supported == "all": - f = open(base_path_join(bb.data.getVar('WORKDIR', d, 1), "SUPPORTED"), "r") - supported = f.readlines() - f.close() - else: - supported = supported.split() - supported = map(lambda s:s.replace(".", " ") + "\n", supported) + use_bin = bb.data.getVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", d, 1) dot_re = re.compile("(.*)\.(.*)") + if use_bin != "precompiled": + supported = bb.data.getVar('GLIBC_GENERATE_LOCALES', d, 1) + if not supported or supported == "all": + f = open(base_path_join(bb.data.getVar('WORKDIR', d, 1), "SUPPORTED"), "r") + supported = f.readlines() + f.close() + else: + supported = supported.split() + supported = map(lambda s:s.replace(".", " ") + "\n", supported) + else: + supported = [] + full_bin_path = bb.data.getVar('PKGD', d, True) + binary_locales_dir + for dir in os.listdir(full_bin_path): + dbase = dir.split(".") + d2 = " " + if len(dbase) > 1: + d2 = "." + dbase[1].upper() + " " + supported.append(dbase[0] + d2) + # Collate the locales by base and encoding utf8_only = int(bb.data.getVar('LOCALE_UTF8_ONLY', d, 1) or 0) encodings = {} @@ -246,21 +198,20 @@ python package_do_split_gconvs () { encodings[locale] = [] encodings[locale].append(charset) - def output_locale_source(name, locale, encoding): - pkgname = 'locale-base-' + legitimize_package_name(name) - + def output_locale_source(name, pkgname, locale, encoding): bb.data.setVar('RDEPENDS_%s' % pkgname, 'localedef glibc-localedata-%s glibc-charmap-%s' % (legitimize_package_name(locale), legitimize_package_name(encoding)), d) - rprovides = 'virtual-locale-%s' % legitimize_package_name(name) - m = re.match("(.*)_(.*)", name) - if m: - rprovides += ' virtual-locale-%s' % m.group(1) - bb.data.setVar('RPROVIDES_%s' % pkgname, rprovides, d) - bb.data.setVar('PACKAGES', '%s %s' % (pkgname, bb.data.getVar('PACKAGES', d, 1)), d) - bb.data.setVar('ALLOW_EMPTY_%s' % pkgname, '1', d) bb.data.setVar('pkg_postinst_%s' % pkgname, bb.data.getVar('locale_base_postinst', d, 1) % (locale, encoding, locale), d) bb.data.setVar('pkg_postrm_%s' % pkgname, bb.data.getVar('locale_base_postrm', d, 1) % (locale, encoding, locale), d) - def output_locale_binary(name, locale, encoding): + def output_locale_binary_rdepends(name, pkgname, locale, encoding): + m = re.match("(.*)\.(.*)", name) + if m: + glibc_name = "%s.%s" % (m.group(1), m.group(2).lower().replace("-","")) + else: + glibc_name = name + bb.data.setVar('RDEPENDS_%s' % pkgname, legitimize_package_name('glibc-binary-localedata-%s' % glibc_name), d) + + def output_locale_binary(name, pkgname, locale, encoding): target_arch = bb.data.getVar("TARGET_ARCH", d, 1) if target_arch in ("i486", "i586", "i686"): target_arch = "i386" @@ -280,19 +231,6 @@ python package_do_split_gconvs () { else: qemu = "qemu-%s -s 1048576 -r %s" % (target_arch, kernel_ver) pkgname = 'locale-base-' + legitimize_package_name(name) - m = re.match("(.*)\.(.*)", name) - if m: - glibc_name = "%s.%s" % (m.group(1), m.group(2).lower().replace("-","")) - else: - glibc_name = name - bb.data.setVar('RDEPENDS_%s' % pkgname, legitimize_package_name('glibc-binary-localedata-%s' % glibc_name), d) - rprovides = 'virtual-locale-%s' % legitimize_package_name(name) - m = re.match("(.*)_(.*)", name) - if m: - rprovides += ' virtual-locale-%s' % m.group(1) - bb.data.setVar('RPROVIDES_%s' % pkgname, rprovides, d) - bb.data.setVar('ALLOW_EMPTY_%s' % pkgname, '1', d) - bb.data.setVar('PACKAGES', '%s %s' % (pkgname, bb.data.getVar('PACKAGES', d, 1)), d) treedir = base_path_join(bb.data.getVar("WORKDIR", d, 1), "locale-tree") ldlibdir = "%s/lib" % treedir @@ -311,14 +249,23 @@ python package_do_split_gconvs () { raise bb.build.FuncFailed("localedef returned an error (command was %s)." % cmd) def output_locale(name, locale, encoding): - use_bin = bb.data.getVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", d, 1) - if use_bin: - output_locale_binary(name, locale, encoding) + pkgname = 'locale-base-' + legitimize_package_name(name) + bb.data.setVar('ALLOW_EMPTY_%s' % pkgname, '1', d) + bb.data.setVar('PACKAGES', '%s %s' % (pkgname, bb.data.getVar('PACKAGES', d, 1)), d) + rprovides = 'virtual-locale-%s' % legitimize_package_name(name) + m = re.match("(.*)_(.*)", name) + if m: + rprovides += ' virtual-locale-%s' % m.group(1) + bb.data.setVar('RPROVIDES_%s' % pkgname, rprovides, d) + if use_bin == "compile": + output_locale_binary_rdepends(name, pkgname, locale, encoding) + output_locale_binary(name, pkgname, locale, encoding) + elif use_bin == "precompiled": + output_locale_binary_rdepends(name, pkgname, locale, encoding) else: - output_locale_source(name, locale, encoding) + output_locale_source(name, pkgname, locale, encoding) - use_bin = bb.data.getVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", d, 1) - if use_bin: + if use_bin == "compile": bb.note("preparing tree for binary locale generation") bb.build.exec_func("do_prep_locale_tree", d) @@ -338,15 +285,16 @@ python package_do_split_gconvs () { for e in encodings[l]: output_locale('%s.%s' % (l, e), l, e) - if non_utf8 != []: + if non_utf8 != [] and use_bin != "precompiled": bb.note("the following locales are supported only in legacy encodings:") bb.note(" " + " ".join(non_utf8)) - use_bin = bb.data.getVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", d, 1) - if use_bin: + if use_bin == "compile": bb.note("collecting binary locales from locale tree") bb.build.exec_func("do_collect_bins_from_locale_tree", d) do_split_packages(d, binary_locales_dir, file_regex='(.*)', output_pattern='glibc-binary-localedata-%s', description='binary locale definition for %s', extra_depends='', allow_dirs=True) + elif use_bin == "precompiled": + do_split_packages(d, binary_locales_dir, file_regex='(.*)', output_pattern='glibc-binary-localedata-%s', description='binary locale definition for %s', extra_depends='', allow_dirs=True) else: bb.note("generation of binary locales disabled. this may break i18n!") diff --git a/classes/kernel.bbclass b/classes/kernel.bbclass index fe611ab087..edeaa660bb 100644 --- a/classes/kernel.bbclass +++ b/classes/kernel.bbclass @@ -215,7 +215,7 @@ do_menuconfig() { fi } do_menuconfig[nostamp] = "1" -addtask menuconfig after do_patch +addtask menuconfig after do_configure pkg_postinst_kernel () { cd /${KERNEL_IMAGEDEST}; update-alternatives --install /${KERNEL_IMAGEDEST}/${KERNEL_IMAGETYPE} ${KERNEL_IMAGETYPE} ${KERNEL_IMAGETYPE}-${KERNEL_VERSION} ${KERNEL_PRIORITY} || true @@ -527,8 +527,8 @@ do_deploy() { install -m 0644 ${KERNEL_OUTPUT} ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGE_BASE_NAME}.bin package_stagefile_shell ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGE_BASE_NAME}.bin - if [ -d "${D}/lib" ]; then - fakeroot tar -cvzf ${DEPLOY_DIR_IMAGE}/${MODULES_IMAGE_BASE_NAME}.tgz -C ${D} lib + if [ -d "${PKGD}/lib" ]; then + fakeroot tar -cvzf ${DEPLOY_DIR_IMAGE}/${MODULES_IMAGE_BASE_NAME}.tgz -C ${PKGD} lib fi cd ${DEPLOY_DIR_IMAGE} @@ -540,4 +540,4 @@ do_deploy() { do_deploy[dirs] = "${S}" do_deploy[depends] += "fakeroot-native:do_populate_staging" -addtask deploy before do_package after do_install +addtask deploy before do_build after do_package diff --git a/classes/module_strip.bbclass b/classes/module_strip.bbclass index 3316e20c80..2650f71d50 100644 --- a/classes/module_strip.bbclass +++ b/classes/module_strip.bbclass @@ -1,26 +1,20 @@ -#DEPENDS_append = " module-strip" +PACKAGESTRIPFUNCS += "do_strip_modules" do_strip_modules () { - for p in ${PACKAGES}; do - if test -e ${WORKDIR}/install/$p/lib/modules; then - if [ "${KERNEL_MAJOR_VERSION}" == "2.6" ]; then - modules="`find ${WORKDIR}/install/$p/lib/modules -name \*.ko`" - else - modules="`find ${WORKDIR}/install/$p/lib/modules -name \*.o`" - fi - if [ -n "$modules" ]; then - for module in $modules ; do - if ! [ -d "$module" ] ; then - ${STRIP} -v -g $module - fi - done -# NM="${CROSS_DIR}/bin/${HOST_PREFIX}nm" OBJCOPY="${CROSS_DIR}/bin/${HOST_PREFIX}objcopy" strip_module $modules - fi + if test -e ${PKGD}/lib/modules; then + if [ "${KERNEL_MAJOR_VERSION}" == "2.6" ]; then + modules="`find ${PKGD}/lib/modules -name \*.ko`" + else + modules="`find ${PKGD}/lib/modules -name \*.o`" fi - done + if [ -n "$modules" ]; then + for module in $modules ; do + if ! [ -d "$module" ] ; then + ${STRIP} -v -g $module + fi + done + fi + fi } -python do_package_append () { - if (bb.data.getVar('INHIBIT_PACKAGE_STRIP', d, 1) != '1'): - bb.build.exec_func('do_strip_modules', d) -} + diff --git a/classes/package.bbclass b/classes/package.bbclass index 246ecd4ecc..4196135710 100644 --- a/classes/package.bbclass +++ b/classes/package.bbclass @@ -201,6 +201,26 @@ def runstrip(file, d): return 1 +PACKAGESTRIPFUNCS += "do_runstrip" +python do_runstrip() { + import stat + + dvar = bb.data.getVar('PKGD', d, True) + def isexec(path): + try: + s = os.stat(path) + except (os.error, AttributeError): + return 0 + return (s[stat.ST_MODE] & stat.S_IEXEC) + + for root, dirs, files in os.walk(dvar): + for f in files: + file = os.path.join(root, f) + if not os.path.islink(file) and not os.path.isdir(file) and isexec(file): + runstrip(file, d) +} + + def write_package_md5sums (root, outfile, ignorepaths): # For each regular file under root, writes an md5sum to outfile. # With thanks to patch.bbclass. @@ -334,11 +354,12 @@ python perform_packagecopy () { # Start by package population by taking a copy of the installed # files to operate on + os.system('rm -rf %s/*' % (dvar)) os.system('cp -pPR %s/* %s/' % (dest, dvar)) } python populate_packages () { - import glob, stat, errno, re,os + import glob, errno, re,os workdir = bb.data.getVar('WORKDIR', d, True) outdir = bb.data.getVar('DEPLOY_DIR', d, True) @@ -349,13 +370,6 @@ python populate_packages () { bb.mkdirhier(outdir) os.chdir(dvar) - def isexec(path): - try: - s = os.stat(path) - except (os.error, AttributeError): - return 0 - return (s[stat.ST_MODE] & stat.S_IEXEC) - # Sanity check PACKAGES for duplicates - should be moved to # sanity.bbclass once we have the infrastucture package_list = [] @@ -368,12 +382,10 @@ python populate_packages () { else: package_list.append(pkg) + if (bb.data.getVar('INHIBIT_PACKAGE_STRIP', d, True) != '1'): - for root, dirs, files in os.walk(dvar): - for f in files: - file = os.path.join(root, f) - if not os.path.islink(file) and not os.path.isdir(file) and isexec(file): - runstrip(file, d) + for f in (bb.data.getVar('PACKAGESTRIPFUNCS', d, True) or '').split(): + bb.build.exec_func(f, d) pkgdest = bb.data.getVar('PKGDEST', d, True) os.system('rm -rf %s' % pkgdest) @@ -427,8 +439,8 @@ python populate_packages () { dpath = os.path.dirname(fpath) bb.mkdirhier(dpath) ret = bb.copyfile(file, fpath) - if ret is False or ret == 0: - raise bb.build.FuncFailed("File population failed") + if ret is False: + raise bb.build.FuncFailed("File population failed when copying %s to %s" % (file, fpath)) if pkg == main_pkg and main_is_empty: main_is_empty = 0 del localdata diff --git a/classes/packaged-staging.bbclass b/classes/packaged-staging.bbclass index 3b99e39ed9..1c5c4cd531 100644 --- a/classes/packaged-staging.bbclass +++ b/classes/packaged-staging.bbclass @@ -48,6 +48,9 @@ python () { if bb.data.inherits_class('image', d): pstage_allowed = False + if bb.data.getVar('PSTAGING_DISABLED', d, True) == "1": + pstage_allowed = False + # Add task dependencies if we're active, otherwise mark packaged staging # as inactive. if pstage_allowed: diff --git a/classes/palmtop.bbclass b/classes/palmtop.bbclass index b4ee62c2a3..1420089692 100644 --- a/classes/palmtop.bbclass +++ b/classes/palmtop.bbclass @@ -21,6 +21,10 @@ EXTRA_QMAKEVARS_POST += " DEFINES+=OPIE_BINDIR='\"${bindir}\"' DEFINES+=OPIE_LIB PACKAGES = "${PN}-dbg ${PN}-dev ${PN} ${PN}-doc ${PN}-locale" FILES_${PN} += " ${palmtopdir} " +FILES_${PN}-dev += " ${palmtopdir}/plugins/*/lib*.so \ + ${palmtopdir}/plugins/*/*.la \ + ${palmtopdir}/plugins/*/*.a \ + ${palmtopdir}/plugins/*/*.o " FILES_${PN}-dbg += " ${palmtopdir}/lib/.debug \ ${palmtopdir}/bin/.debug \ ${palmtopdir}/plugins/*/.debug " diff --git a/classes/tinderclient.bbclass b/classes/tinderclient.bbclass index 6c86d44a21..a45c1e679b 100644 --- a/classes/tinderclient.bbclass +++ b/classes/tinderclient.bbclass @@ -80,7 +80,6 @@ def tinder_format_http_post(d,status,log): "TARGETOS" : data.getVar('TARGET_OS', d, True) or "Unknown", "MACHINE" : data.getVar('MACHINE', d, True) or "Unknown", "DISTRO" : data.getVar('DISTRO', d, True) or "Unknown", - "zecke-rocks" : "sure", } # optionally add the status diff --git a/conf/bitbake.conf b/conf/bitbake.conf index ae3ff25f9d..b69b6757db 100644 --- a/conf/bitbake.conf +++ b/conf/bitbake.conf @@ -367,7 +367,7 @@ IMAGE_CMD_ext2.gz = "install -d ${DEPLOY_DIR_IMAGE}/tmp.gz ; genext2fs -b ${ROOT IMAGE_CMD_ext3 = "genext2fs -b ${ROOTFS_SIZE} -d ${IMAGE_ROOTFS} ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3 ${EXTRA_IMAGECMD}; tune2fs -j ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3" IMAGE_CMD_ext3.gz = "install -d ${DEPLOY_DIR_IMAGE}/tmp.gz ; genext2fs -b ${ROOTFS_SIZE} -d ${IMAGE_ROOTFS} ${DEPLOY_DIR_IMAGE}/tmp.gz/${IMAGE_NAME}.rootfs.ext3 ${EXTRA_IMAGECMD}; tune2fs -j ${DEPLOY_DIR_IMAGE}/tmp.gz/${IMAGE_NAME}.rootfs.ext3; gzip -f -9 ${DEPLOY_DIR_IMAGE}/tmp.gz/${IMAGE_NAME}.rootfs.ext3; mv ${DEPLOY_DIR_IMAGE}/tmp.gz/${IMAGE_NAME}.rootfs.ext3.gz ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3.gz" IMAGE_CMD_squashfs = "mksquashfs ${IMAGE_ROOTFS} ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.squashfs ${EXTRA_IMAGECMD} -noappend" -IMAGE_CMD_squashfs-lzma = "mksquashfs ${IMAGE_ROOTFS} ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.squashfs-lzma ${EXTRA_IMAGECMD} -noappend -lzma" +IMAGE_CMD_squashfs-lzma = "mksquashfs ${IMAGE_ROOTFS} ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.squashfs-lzma ${EXTRA_IMAGECMD} -noappend -comp lzma" IMAGE_CMD_tar = "cd ${IMAGE_ROOTFS} && tar -cvf ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.tar ." IMAGE_CMD_tar.gz = "cd ${IMAGE_ROOTFS} && tar -zcvf ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.tar.gz ." IMAGE_CMD_tar.bz2 = "cd ${IMAGE_ROOTFS} && tar -jcvf ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.tar.bz2 ." @@ -651,10 +651,16 @@ BUILDCFG_NEEDEDVARS ?= "TARGET_ARCH TARGET_OS" ### Config file processing ### +# Overrides are processed left to right, so the ones that are named later take precedence. +# You generally want them to go from least to most specific. +# # This means that an envionment variable named '<foo>_arm' overrides an -# environment variable '<foo>' (when ${TARGET_ARCH} is arm). And the same: an -# environment variable '<foo>_ramses' overrides both '<foo>' and '<foo>_arm -# when ${MACHINE} is 'ramses'. And finally '<foo>_local' overrides anything. +# environment variable '<foo>' (when ${TARGET_ARCH} is arm). +# an environment variable '<foo>_ramses' overrides '<foo>' but doesn't override +# '<foo>_arm' when ${MACHINE} is 'ramses'. +# If you use combination ie '<foo>_arm_ramses', then '<foo>_arm_ramses' will override +# '<foo>_arm' and then '<foo>' will be overriden with that value from '<foo>_arm'. +# And finally '<foo>_local' overrides anything, but with lowest priority. # # This works for functions as well, they are really just environment variables. # Default OVERRIDES to make compilation fail fast in case of build system misconfiguration. diff --git a/conf/checksums.ini b/conf/checksums.ini index 8252329fd5..10ce619046 100644 --- a/conf/checksums.ini +++ b/conf/checksums.ini @@ -82,6 +82,10 @@ sha256=02f10b35508cb11908bb908156daad1ea5e653840440d62482231efeb4cbe178 md5=24b0e5bbfe21ea9c5a5c589bcc79c0f2 sha256=ab877846c6caaff32efbf5be6fc5c63b7dec97a2e78c57c525da7705d2052bfc +[http://monto.homelinux.org/89notifier] +md5=6a197a3216abfd21ce2ae37b2be8da38 +sha256=7795a3c6339c35d172ced0e43785ff657c1430f9fab7e2e553411529e177e501 + [ftp://download.dre.vanderbilt.edu/previous_versions/ACE-5.6.8.tar.bz2] md5=81c1ff761c3431cd12c81337aa80d558 sha256=96b70582d931a7e83c3ca31b3bc7e23957391e16dee4ae6ddf938c9574d50b27 @@ -614,6 +618,10 @@ sha256=3d73988ad3e87f6084a4593cc6b3aac63aca3e893d3e9409d892a6f51558e4c4 md5=02816f10f30b1dc5e069e0f68c177c98 sha256=c3de74d62f925e32030adb3d0edcfb3c7a4129fc92c48181a389eeed8f14b897 +[ftp://ftp.freedesktop.org/pub/mesa/7.6/MesaDemos-7.6.tar.bz2] +md5=0ede7adf217951acd90dbe4551210c07 +sha256=2fdf09fd7967fb1946e7f6af07d39c9fb695c373e1bad3855d3c3fbece5badd0 + [http://downloads.sourceforge.net/mesa3d/MesaGLUT-7.0.2.tar.bz2] md5=3a33f8efc8c58a592a854cfc7a643286 sha256=fa31ca39f00ff92c7da59d9993d0eefb8d901eb8a519743942e523fde120eb6c @@ -678,6 +686,10 @@ sha256=a9cc62ab760afeebcb1319a193508734a2d470cab8effab2776a2d3c65bd9cd2 md5=7ecddb341a2691e0dfdb02f697109834 sha256=6e945389add4e5b41f2c403ced13c343767565f2eacde4b16de2d0f9f8a6aac4 +[ftp://ftp.freedesktop.org/pub/mesa/7.6/MesaLib-7.6.tar.bz2] +md5=8c75f90cd0303cfac9e4b6d54f6759ca +sha256=782a7b2810b1c466b3a994eba96485b59b47cc1120c0caa24de1aecf1e013830 + [http://search.cpan.org/CPAN/authors/id/K/KW/KWILLIAMS/Module-Build-0.2805.tar.gz] md5=598bb59b86c2c4842eeffb03392fab5b sha256=8fd609d1e6b460b5c95ad5612cb823aa863d51360ed55caea987909a9bab50f5 @@ -818,6 +830,18 @@ sha256=4e44eb7be990cb62e57840f4b01b6c9af06c4655869d0cb565fc45749c20b82e md5=955082ee50358b1cc3eddcb438b7fae4 sha256=70e7fb5e8cc3a35a04213230e1e4340ddc8766a2615318086da7d51ec930f6f2 +[http://www.packagekit.org/releases/PackageKit-0.5.1.tar.gz] +md5=8575a23e406fffa8d11ba2ad4b5d99f3 +sha256=d6ccb149de52c76993f0ed9a31f44690fa27254f91fe8b69bbd2f99b714aee29 + +[http://www.packagekit.org/releases/PackageKit-0.5.2.tar.gz] +md5=e406ad5e776e31c99e70c7cf6e7bcdc4 +sha256=8defbfdfe6937fd1d4320f2c2e599b5579fec14404a4e920ff2e5ac68516744b + +[http://www.packagekit.org/releases/PackageKit-0.5.4.tar.gz] +md5=330f52c7576e78b270cd78016bb32dc3 +sha256=9d13f59594f00a1f1d67ab1b34208daadac67f7eba59a2bede35eecc287f7542 + [http://search.cpan.org/CPAN/authors/id/A/AD/ADAMK/Params-Util-0.20.tar.gz] md5=33c4466239c97cc3e1063eff0577206c sha256=29f7e05045a5699b211d2a8332d36113c22f9c2e96174f40939e79dbc356905d @@ -874,6 +898,10 @@ sha256=ad82569b809e29c19b8223feaa12923f97bb4bbc942ff985857f9d853db489cf md5=104ad743d4bc999796ceff4f39d1003a sha256=593912fdf122d9a1499767bc305ca7b3b688ace7edcb93f53e07202aa1242c58 +[http://pybluez.googlecode.com/files/PyBluez-0.16.tar.gz] +md5=2ce8ff0dbb94c6be14e92e9968f4c914 +sha256=cbe1f076a4947e29ded08ba9dd6dbbb86b25939fb4e50f508dd02f41681554e2 + [http://www.vanille.de/mirror/PyMP3-0.3.4.tar.gz] md5=28e884057750aa4f0da368678e5b20bd sha256=e534ea5505e2d0a571ca8baa4b34260953e796f6c762013756373f13411ebd6e @@ -982,6 +1010,14 @@ sha256=5318946df77937e0b601c95a198790f9ba52d4afb4eb153480289350182bb739 md5=b3db3d60b0ee83f5f23101d2c3bb99e0 sha256=ea1d3a8141654781a0df31e6607c4722436fa33eb2e9934492770b3b61be8122 +[http://downloads.sourceforge.net/project/pythonwebdavlib/pythonwebdavlib/Python%20WebDAV%20Library%20-%200.1.2/Python_WebDAV_Library-0.1.2.zip] +md5=8e49e0ecc5b4327c4f752a544ee10e1a +sha256=72c029ad1e25de950f59c2f1812d009d2c1691b70e4b5b09f1af9006e8fd5f23 + +[http://downloads.sourceforge.net/pythonwebdavlib/Python%20WebDAV%20Library%20-%200.1.2/Python_WebDAV_Library-0.1.2.zip] +md5=8e49e0ecc5b4327c4f752a544ee10e1a +sha256=72c029ad1e25de950f59c2f1812d009d2c1691b70e4b5b09f1af9006e8fd5f23 + [http://www.stats.bris.ac.uk/R/src/base/R-2/R-2.0.0.tar.gz] md5=3900bca37cabb4b76b8d736d51cc9251 sha256=a06c3546400503e6d4ca4505c3f838b9bbd03fab6a3cbab7993f6d9115b68b64 @@ -1050,6 +1086,10 @@ sha256=88fcb1dbf934af33163667a6677312065c7d0a7f01cd764e3374c4c19b386ec4 md5=a357558552436b0b5ea0333b3e2327df sha256=75c4520cde3b1d10ae7846983bde66d114fea9479f6acef352850dae92a1100c +[http://www.libsdl.org/projects/SDL_mixer/release/SDL_mixer-1.2.11.tar.gz] +md5=65ada3d997fe85109191a5fb083f248c +sha256=86145ac39cac6d2c6169c226f937648dca5e89dcd828751763dd174fa9af9cf9 + [http://www.libsdl.org/projects/SDL_mixer/release/SDL_mixer-1.2.6.tar.gz] md5=2b8beffad9179d80e598c22c80efb135 sha256=89f94840b1b42ddfe53a8aee415331516f1bbdd942b42d25e74906a332cdf22a @@ -1490,6 +1530,14 @@ sha256=bda8a3c42733853444e1d4bee16e85990b78c2eaafc4b26e0769be2e14dab931 md5=9703f591801c5bbded35c9739d04f81c sha256=68b1d0acd1a6e17d91412635cd4f65ba58d293e62a01475a43f3712c49a46e7d +[http://www.delorie.com/store/ace/ace-1.2.tar.gz] +md5=03e5e7ab8ac3acc59661c6e9c09089b7 +sha256=fcda8bca508490bea642c83fcf718565bf4ed4c50f2d7b34761da61fe2e6bc9d + +[http://downloads.vdm-design.de/aceofpenguins-launcher-0.3.tar.gz] +md5=2fe7dcdbbdbf3b2821f627e02c406caa +sha256=13013cd19cb165825f4ef5cc790b0e103705f68ece470fd12012db97e3e60839 + [http://downloads.sourceforge.net/acpid/acpid-1.0.10.tar.gz] md5=61156ef32015c56dc0f2e3317f4ae09e sha256=22703ce0dd7305aca01bc9ac741659c32b1593f1d6fde492df7f01067a534760 @@ -3034,6 +3082,14 @@ sha256=b1e6d5912546d2a4b704ec65c2b9664aa3b4663e7d800e06803330335a2cb764 md5=62edc09c9908107e69391c87f4f3fd40 sha256=b1e6d5912546d2a4b704ec65c2b9664aa3b4663e7d800e06803330335a2cb764 +[http://download.tuxfamily.org/blueman/blueman-1.10.tar.gz] +md5=f9058305c42038678d5023fcabba22a4 +sha256=f4a92834a538dc9dbb93fde76933e849b24639faa1721b24549f209b8b590f71 + +[http://download.tuxfamily.org/blueman/blueman-1.21.tar.gz] +md5=26b70341b3d3da28da62c917c8b20377 +sha256=86200dab50b1595c9a9537586c07de90ccfa084b954bb74f3e8732cc000fe3af + [http://gpe.linuxtogo.org/download/source/blueprobe-0.13.tar.gz] md5=33745b0e86603124654773c1361df33e sha256=b4318d0e1ba7422ba4415838448718e037efe4d8236cf12132075ccf36d1803d @@ -3450,6 +3506,10 @@ sha256=5ab58cf5738c144f4d85a4a442c2f33be2c4c502dca6e29e0c570c2a51ae6ae9 md5=41d6a2dfe88693b5ec999d9ae4e97aac sha256=e3ff9a7f6dead90d55f1a4a2b1277e3bf5f0ec44ccb6ba8f375acbbedb1263c1 +[http://handheldshell.com/software/fso/btgps.tgz] +md5=6e0443d09448a5cfdb1d560cfd699a6b +sha256=ca567348c1f8d904f50fe06de83959dcc5b840e12e336251ab216ca5304e3bf0 + [http://www.pentest.co.uk/src/btscanner-1.0.tar.gz] md5=6bfaaad5a3730f10d07500fb3ec8c797 sha256=ca7349c3621c929f9fda0345991b35f8a0d38d4a88b6c89b7ca50a7dbcc08832 @@ -3530,6 +3590,10 @@ sha256=9427fa9b45f3c322bf4fe2463c99c972e6ae03df630899b38be4f29133708a0e md5=aeb526108f13b91c02b115c8d86f9659 sha256=03fc9dbdc6f44afd2da55c0ab36646d2d063708cc35f3f4569b913b064f11d83 +[http://www.busybox.net/downloads/busybox-1.14.3.tar.gz] +md5=dfb197b8de260ff284f7222ed23614fe +sha256=b5a0c76d414cca97fb21622a5d09fa5a58f59890f5c9ce4f8b851c4e8b73a163 + [http://www.busybox.net/downloads/busybox-1.2.0.tar.gz] md5=6af69ebbbf8adc874ccb6d67dca95df5 sha256=df6e3b0079194251a2ff68d7be7b06025c79f4fe62f4a73158ee52ff4bc515a0 @@ -3650,6 +3714,10 @@ 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md5=ebb5fc927d73cd63737a9114481e8957 sha256=8cb892ef36321069eff7826aa732f1481715fe54bf96346fae1d25565b44c536 @@ -3846,6 +3918,10 @@ sha256=548b5b402ee5fff34fe428eb69de560b56709337cd70c600ad21686c1321dd66 md5=7b19b6f68d2c648296378b784d5f7681 sha256=73de81ea2de2eae64b888e1b2739ef643ccea13c79790569f8e6278369976a21 +[http://ch.omoco.de/cellhunter/files/cellhunter-0.5.0.tar.gz] +md5=1ac5c56a85fb12bea0bf0a4a2ea664de +sha256=1210dab4e3b23c2a5083d12e9c1527bf099a89f06867e1210b7d9992204c24f8 + [http://pub.risujin.org/cellwriter/cellwriter-1.3.3.tar.gz] md5=09b2019e926d5ef42d52edb2dd33ceae sha256=3fb7c11ec5d802338a0bf522b11702c37820597c9a2c36f89b52872c6571e602 @@ -5230,6 +5306,10 @@ sha256=c5d49b39c5998bcecd124c05cc6f096d22ccdc378ad455214611ae41a2f4b7d9 md5=8ce5945be0660bd3152bd9eb0827f945 sha256=e3968765ed916b348fce5e309029d25d068a61e1d422a69a506d0fc80ee6e976 +[http://home.htw-berlin.de/~s0526295/dictator-0.2.tar.gz] +md5=8f5cb1d0b7c7d5437b260d9ba5362c74 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sha256=7182ad6f03bfe16ccdbac4a3efb9e765ea7c51afc33c3a7fefb053122aa6da2c +[ftp://elsie.nci.nih.gov/pub/tzdata2009r.tar.gz] +md5=c38d977a3f9f4d4646cab902554c519e +sha256=684d23e3ebe825c9db90732534446f4e33f5ad4455980b15fd9eb2e4ba5a6731 + +[ftp://elsie.nci.nih.gov/pub/tzdata2009s.tar.gz] +md5=3cd8038d7bbfb3a4ac544aceef724853 +sha256=ee9000a0276675ed697f8d404edf80104fd338c3fb979907e4ee63ca83d65e5e + [ftp://ftp.pl.debian.org/pub/debian/pool/main/t/tzdata/tzdata_2007h.orig.tar.gz] md5=8b766bb807c1f7c0c02ff798ea5db80e sha256=b4c6367ab85de8f148c903bb25dc69de7a7d7d05f204f58880a16a8b81bf93de @@ -26234,6 +26494,10 @@ sha256=c4bf829816c3e53b0807bb12cfdc8b1f0e0c1eae14a5be2ffb1a59ad71bbb188 md5=261038b0a6890207b68a26be10a37822 sha256=1d645fa76a9482a6630b9a7257d11eabfa94ef4337493ef7075e25cbb8820491 +[http://www.techiem2.net/files/usbmode.tar.gz] +md5=1af56936129a4cf59487f8825cce44b6 +sha256=368b06259170e7e960c8ba4e344e6df45c85ac23476554e84fe9e53667dcfc0e + [http://downloads.sourceforge.net/linux-usb/usbutils-0.70.tar.gz] md5=05276dc307a0297904bc892e9998bf59 sha256=98d29c0c013debc32f1a17fd66f5e9248025959b07d13f1faba91aa5a1a9ba6b @@ -26642,6 +26906,10 @@ sha256=bca8b0073d9527c0293b831c9b8d8f89fc3dc7b5ab30898e7b748843af07a978 md5=511ffbc8ed8d9df82e7c67852164728c sha256=ee1faf72ef745a7d96e44cb4797d92a8cd2c9e290dfe602fae0fd955a11d4f3a +[http://vobject.skyhouseconsulting.com/vobject-0.8.1c.tar.gz] +md5=c9686dd74d39fdae140890d9c694c076 +sha256=594113117f2017ed837c8f3ce727616f9053baa5a5463a7420c8249b8fc556f5 + [http://gpephone.linuxtogo.org/download/gpephone/voicecall-0.1/voicecall-0.1.tar.gz] md5=7fa731310c2f5e334ca4eba9c5482965 sha256=f6ddc993d4890b9500a63345f76acd3eb4a04a9190fcd055f323319627bf104e @@ -26922,6 +27190,10 @@ sha256=e9152e09ff174fc4c4cd5ce00e52a15005c738c2a4c0de87f5ff24ca325f9b85 md5=1fe3c7a2caa6071e071ba34f587e1555 sha256=d78a1efdb62f18674298ad039c5cbdb1edb6e8e149bb3a8e3a01a4750aa3cca9 +[http://trac.hackable1.org/trac/raw-attachment/wiki/WooshBrowser/woosh-0.1.tar.gz] +md5=3a9639e077c3d8f85bb59333ef14015b +sha256=1e8d7eb70f349bfee9eb3f3cb2464c19a4229d0f7faa0a6962a3cd15a460b99f + [http://hostap.epitest.fi/releases/wpa_supplicant-0.2.6.tar.gz] md5=7f83c74bf5e6db7dc564c391a44a9fe7 sha256=f32c5e7607312d3650684977e6d1888a4a53cdb4ba16746225fab66cf345d55a @@ -29642,6 +29914,10 @@ sha256=86b176b6efc52557b1c7631bfdd5c17e7060a438e1e85ce15ec9657be356c50b md5=11080456822146ebc0118b15f4b911d9 sha256=6b5b3ef58e6646f004a5f1cbc6be8f32b824cfbf78a30bf242e4f07083668770 +[ftp://ftp.x.org/R5contrib/xloadimage.4.1.tar.gz] +md5=7331850fc04056ab8ae6b5725d1fb3d2 +sha256=400bc7d84dcfb3265a7a1ce51819679dc3adaeda231514bd89b0f932b78ff5c4 + [http://xorg.freedesktop.org/releases/individual/app/xlogo-1.0.1.tar.bz2] md5=4c5482552f38a7d42398a694cc9b2ee6 sha256=de59f9be3d45fe93f445f39bec3cea09753a671e56863ce77e3a797d2df526b2 @@ -29962,6 +30238,10 @@ sha256=bb797a384b9acb8209fea572934d1b1484c5de41f062fe152ae99962f52f98ea md5=b3d352d08e71606383c31da5790b8d60 sha256=dff617ca33dc263caecb6afc5d42c109166ef2a1c0fe0afa070ff6691ea0e8d7 +[http://xournal.sourceforge.net/xournal-0.4.5.tar.gz] +md5=795e4396ded2b67766eb2926be1fb4a9 +sha256=a7d7c2cb544451939779276e6e5ee5acc756bd0efb5253de15dc00bfe07755d1 + [http://xournal.sourceforge.net/xournal-0.4.tar.gz] md5=139ef3045c99dc5c07118b47ff9257e1 sha256=4de076c38b4b64188d23821e7d7a0f6a26b1d6707e768dadda14eb69dcc84598 @@ -30642,6 +30922,10 @@ sha256=78b013e2e0bb4c1af1adbd7acca4299cd3d83e96d8da2731f629f562b5f153a6 md5=791e8986c6e16dcd1c9878126725e06b sha256=eba57692dadd21df8d4afaea4daf8db5179c7398e11cd019fd462aa6947f4119 +[ftp://ftp.gnome.org/pub/gnome/sources/zenity/2.20/zenity-2.20.1.tar.bz2] +md5=b9989582ea43f8fd58819d85ef9c9bc5 +sha256=cc3b203acbd745a7c3b6ea3d8e74d7fb07cf8f8aa92bcaa3b2edb023dee02a36 + [http://ftp.gnome.org/pub/GNOME/sources/zenity/2.20/zenity-2.20.1.tar.bz2] md5=b9989582ea43f8fd58819d85ef9c9bc5 sha256=cc3b203acbd745a7c3b6ea3d8e74d7fb07cf8f8aa92bcaa3b2edb023dee02a36 diff --git a/conf/distro/angstrom-2008.1.conf b/conf/distro/angstrom-2008.1.conf index 5f6ef768ad..0e1f39a7a6 100644 --- a/conf/distro/angstrom-2008.1.conf +++ b/conf/distro/angstrom-2008.1.conf @@ -204,7 +204,7 @@ require conf/distro/include/angstrom${ARM_ABI}.inc # If we're using an .ipk based rootfs, we want to have opkg-nogpg installed so postinst script can run # We also take this opportunity to inject angstrom-version and the feed configs into the rootfs -IPKG_VARIANT = "opkg-nogpg angstrom-version ${ANGSTROM_FEED_CONFIGS}" +IPKG_VARIANT = "opkg-nogpg-nocurl angstrom-version ${ANGSTROM_FEED_CONFIGS}" # Select xserver-xorg as default, since kdrive has been EOL'ed XSERVER ?= "xserver-xorg xf86-input-evdev xf86-input-keyboard xf86-input-mouse xf86-video-fbdev" diff --git a/conf/distro/include/angstrom.inc b/conf/distro/include/angstrom.inc index 669c8ada3c..6e65285e99 100644 --- a/conf/distro/include/angstrom.inc +++ b/conf/distro/include/angstrom.inc @@ -202,7 +202,5 @@ SEPPUKU_COMPONENT = "org.openembedded.dev" OESTATS_SERVER ?= "tinderbox.openembedded.org" - - # We want images supporting the following features (for task-base) -DISTRO_FEATURES = "nfs smbfs wifi ppp alsa bluetooth ext2 vfat irda pcmcia usbgadget usbhost pci" +DISTRO_FEATURES = "nfs smbfs wifi ppp alsa bluetooth ext2 vfat irda pcmcia usbgadget usbhost pci pam" diff --git a/conf/distro/include/preferred-shr-versions.inc b/conf/distro/include/preferred-shr-versions.inc index 769ec7c4c7..d4a787235e 100644 --- a/conf/distro/include/preferred-shr-versions.inc +++ b/conf/distro/include/preferred-shr-versions.inc @@ -1,5 +1,6 @@ # Upgraded # use newer version then preferred by default +PREFERRED_VERSION_boost ?= "1.40.0" PREFERRED_VERSION_dbus ?= "1.3.0" PREFERRED_VERSION_autoconf = "2.63" PREFERRED_VERSION_autoconf-native = "2.63" @@ -10,6 +11,9 @@ PREFERRED_VERSION_strace ?= "4.5.15" # we need new headers for libc, now OLDEST_KERNEL_linux-gnueabi = "2.6.24" PREFERRED_VERSION_linux-libc-headers = "2.6.29" +# override EFL_SRCREV from sane-srcrevs.inc +EFL_SRCREV ?= "43898" + # upgrades used in Angstrom PREFERRED_VERSION_gtk+ = "2.18.3" PREFERRED_VERSION_hal = "0.5.13" @@ -25,8 +29,3 @@ UDEV_GE_141 = "1" # Downgraded # python-pygtk_2.16.0 is accessing non-existent /usr/share/pygobject/2.0/codegen/codegen.py PREFERRED_VERSION_python-pygtk ?= "2.10.4" -PREFERRED_VERSION_gpe-gallery ?= "0.97" -PREFERRED_VERSION_boost ?= "1.33.1" -PREFERRED_VERSION_man-pages ?= "2.41" -PREFERRED_VERSION_xchat ?= "2.8.4" -PREFERRED_VERSION_x11vnc ?= "0.9.3" diff --git a/conf/distro/include/sane-srcdates.inc b/conf/distro/include/sane-srcdates.inc index 422145c8c2..4ea318fdbb 100644 --- a/conf/distro/include/sane-srcdates.inc +++ b/conf/distro/include/sane-srcdates.inc @@ -41,6 +41,7 @@ SRCDATE_rdesktop ?= "20080917" SRCDATE_roadster ?= "20060814" SRCDATE_rosetta ?= "20090514" SRCDATE_sctzap ?= "20060814" +SRCDATE_squashfs ?= "20091110" SRCDATE_tslib ?= "20051101" SRCDATE_waimea ?= "20060814" SRCDATE_xcompmgr ?= "20060814" diff --git a/conf/distro/include/sane-srcrevs-fso.inc b/conf/distro/include/sane-srcrevs-fso.inc index 88c9f9a883..b012df1cea 100644 --- a/conf/distro/include/sane-srcrevs-fso.inc +++ b/conf/distro/include/sane-srcrevs-fso.inc @@ -1,44 +1,44 @@ # To be included from sane-srcrevs.inc # FSO Projects -- Cornucopia -FSO_CORNUCOPIA_SRCREV ?= "a41cae9df1af4fc710c701ac01016d3668dd5fba" +FSO_CORNUCOPIA_SRCREV ?= "1dcf546fb0423930f938129a51f538874c172226" SRCREV_pn-fso-apm ?= "${FSO_CORNUCOPIA_SRCREV}" -SRCREV_pn-fsodeviced ?= "${FSO_CORNUCOPIA_SRCREV}" +SRCREV_pn-fsodeviced ?= "34fe2fb88cceac6f8d40374b170c226b213b7d4a" SRCREV_pn-fsogsmd ?= "${FSO_CORNUCOPIA_SRCREV}" SRCREV_pn-fsogpsd ?= "${FSO_CORNUCOPIA_SRCREV}" SRCREV_pn-fsonetworkd ?= "${FSO_CORNUCOPIA_SRCREV}" SRCREV_pn-fsotimed ?= "${FSO_CORNUCOPIA_SRCREV}" -SRCREV_pn-fsousaged ?= "${FSO_CORNUCOPIA_SRCREV}" -SRCREV_pn-libfsobasics ?= "${FSO_CORNUCOPIA_SRCREV}" +SRCREV_pn-fsousaged ?= "fe2ec3260b73233c414de584aa1b4a5e49c24a0d" +SRCREV_pn-libfsobasics ?= "18d4114d295617c6fb611f3c804e1980b896fc14" SRCREV_pn-libfsoframework ?= "${FSO_CORNUCOPIA_SRCREV}" SRCREV_pn-libfsotransport ?= "${FSO_CORNUCOPIA_SRCREV}" SRCREV_pn-libfsoresource ?= "${FSO_CORNUCOPIA_SRCREV}" # FSO Projects -- Misc -SRCREV_pn-dbus-hlid ?= "39e804f28808247df2573788cb99897d4d765e69" -SRCREV_pn-frameworkd ?= "a2dfde0fb46a745f5c07e6a1ab44e4b95b7dde80" +SRCREV_pn-dbus-hlid ?= "5df7f49fe8881804aaab544a569fd164c3e93afb" +SRCREV_pn-frameworkd ?= "d48bd43c430322b26744e31829f9c76e9b725819" SRCREV_pn-frameworkd-config-shr_FSO_REV = ${SRCREV_pn-frameworkd} -SRCREV_pn-fso-abyss ?= "8ce3c6e40c4852de7dcca502f65784f6b18ca6bf" -SRCREV_pn-fso-term ?= "e0d92222e3e5a62025089c60a625f1836c510915" -SRCREV_pn-fso-gpsd ?= "78fe48dffb923175bde9f0aabc3500a9264a57e0" +SRCREV_pn-fso-abyss ?= "7f271311e2e0b63235139859169bd248920ade30" +SRCREV_pn-fso-term ?= "aa0b9c26dee3918a5e9d2809bb36335bda276a0d" +SRCREV_pn-fso-gpsd ?= "39e810899110a9bb302cf2064e1c0f73541fb4e6" SRCREV_pn-fso-gsm0710muxd ?= "abcbcd7cc532a8834906de3fc24c8f8fe7643cd4" -SRCREV_pn-fso-monitord ?= "eb8fb32d52d19c5aa9284c6cc540dd40bb924c9d" -SRCREV_pn-fso-sounds ?= "cc46b55131fc07a415bf1bd62ce98f73344489cb" -SRCREV_pn-fso-specs ?= "66c992afd6c551ffd8fc63d7201c5cce269a4d77" +SRCREV_pn-fso-monitord ?= "b4ae1e9b10e710042624c2cf1a15b91a7d5b1d44" +SRCREV_pn-fso-sounds ?= "3a4767ec01988bd0fd8f72f0c35d6d36e5fbc815" +SRCREV_pn-fso-specs ?= "60eaf17a53d410c564417b226db1e6ea8ca9a2a3" SRCREV_pn-gsmd2 ?= "c16883a079aeff8780e5d461ec4e8348537ab4d8" -SRCREV_pn-libeflvala ?= "c566847e000fad132225aefd854b81ae713eaa82" -SRCREV_pn-libfso-glib ?= "b855b0297ff68bb505a02d9b4b13914ca558cd59" -SRCREV_pn-libframeworkd-glib ?= "680276e4cddabeb1edd088ddd421f363dd106a50" -SRCREV_pn-libgsm0710 ?= "3bb80ba6cc9f86ed3996f88bfa2986cc572489d6" -SRCREV_pn-libgsm0710mux ?= "b74d4615374abb856441e4a416726fb3e8d7835b" +SRCREV_pn-libeflvala ?= "d07db4fbd24c9d5dfc9b1fd5024fd651b02f123e" +SRCREV_pn-libfso-glib ?= "3630315a498f91106b4187e41608613520d63090" +SRCREV_pn-libframeworkd-glib ?= "f7ea17bc2a33d6f0989a71f86ccc6ed3e8051e77" +SRCREV_pn-libgsm0710 ?= "cd564c8782f018e0d65fb8716c99a6040b5bd166" +SRCREV_pn-libgsm0710mux ?= "e81ed512ec86e31d0d0119826afa9d1302651693" SRCREV_pn-libpersistence ?= "26180fd3c0fe4eb6abb7440f10e51d997719b97a" -FSO_PYTHONHELPERS_SRCREV ?= "6d7f51b5189a00a07d9b88100a565f46fcb62644" +FSO_PYTHONHELPERS_SRCREV ?= "63b1dff1bc8ac22efabcee8a90e957c3b2423317" SRCREV_pn-mickeydbus ?= "${FSO_PYTHONHELPERS_SRCREV}" SRCREV_pn-mickeyterm ?= "${FSO_PYTHONHELPERS_SRCREV}" SRCREV_pn-multicat ?= "${FSO_PYTHONHELPERS_SRCREV}" SRCREV_pn-python-pyrtc ?= "${FSO_PYTHONHELPERS_SRCREV}" SRCREV_pn-pycd ?= "${FSO_PYTHONHELPERS_SRCREV}" -SRCREV_pn-vala-dbus-binding-tool-native ?= "0d221b688bfb51e0607b7f4e6e03bf96d13d5d44" -SRCREV_pn-vala-terminal ?= "2f849c5690d834a69f6c0693cc159573b3aa78d" -SRCREV_pn-vala-native ?= "6cf030120cd7f6a76a5d766d7420aea847e02cfd" +SRCREV_pn-vala-dbus-binding-tool-native ?= "324a78c0cab484535ce5a7a33436e9c62311297d" +SRCREV_pn-vala-terminal ?= "932285d72e26b965c488f8aa99fe51f7a34231ad" +SRCREV_pn-vala-native ?= "2f14aed36765c842fe7b4035ba564d2c023ef0b0" SRCREV_pn-zhone ?= "d654b3d15500a56c8e987e4d2cc2f8eef70b78c0" diff --git a/conf/distro/include/sane-srcrevs.inc b/conf/distro/include/sane-srcrevs.inc index bca98f1139..10f943b540 100644 --- a/conf/distro/include/sane-srcrevs.inc +++ b/conf/distro/include/sane-srcrevs.inc @@ -42,13 +42,14 @@ SRCREV_pn-dbus-c++ ?= "13131" SRCREV_pn-dbus-c++-native ?= "13131" SRCREV_pn-dfu-util ?= "4160" SRCREV_pn-dfu-util-native ?= "4160" +SRCREV_pn-disko ?= "f52597b8d5d584811cbe8f9e0bf25ea372526953" SRCREV_pn-diversity-daemon ?= "571" SRCREV_pn-diversity-radar ?= "453" SRCREV_pn-e-tasks ?= "14" -SRCREV_pn-e-wm-config-illume-shr ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" +SRCREV_pn-e-wm-config-illume-shr ?= "bbcec18f0ebd47e4f6eea88b9b774edf7400e752" SRCREV_pn-e-wm-illume-dict-pl ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" SRCREV_pn-e-wm-menu-shr ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" -SRCREV_pn-e-wm-sysactions-shr ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" +SRCREV_pn-e-wm-sysactions-shr ?= "bbcec18f0ebd47e4f6eea88b9b774edf7400e752" SRCREV_pn-e-wm-theme-illume-gry ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" SRCREV_pn-e-wm-theme-illume-neo ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" SRCREV_pn-e-wm-theme-illume-niebiee ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" @@ -76,7 +77,8 @@ SRCREV_pn-ezxd ?= "2074" SRCREV_pn-fbgrab-viewer-native ?= "1943" SRCREV_pn-ffalarms ?= "67" SRCREV_pn-flashrom ?= "3682" -SRCREV_pn-frameworkd-config-shr ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" +SRCREV_pn-fltk2 ?= "6671" +SRCREV_pn-frameworkd-config-shr ?= "cb4159e653d770da8e8f9fc9a65135839533d4c5" SRCREV_pn-frameworkd-config-shr_SHR_REV = ${SRCREV_pn-frameworkd-config-shr} SRCREV_pn-fsod ?= "2a33e5ffe96c611e6a6b8b6c33d2a83ba656f55b" SRCREV_pn-fsoraw ?= "20" @@ -90,7 +92,7 @@ SRCREV_pn-gcc-cross-initial ?= ${GCCREV} SRCREV_pn-gcc-cross-intermediate ?= ${GCCREV} SRCREV_pn-gcc-cross-sdk ?= ${GCCREV} SRCREV_pn-gconf-dbus ?= "641" -SRCREV_pn-glamo-dri-tests ?= "445f370be5bd76643efb65d8ff7414b133753cfa" +SRCREV_pn-glamo-dri-tests ?= "080b8db3d9dbfae38ebb00439887b5535ab1d380" SRCREV_pn-gnet ?= "495" SRCREV_pn-gpe-conf ?= "9900" SRCREV_pn-gpe-contacts ?= "9312" @@ -133,16 +135,16 @@ SRCREV_pn-libframeworkd-phonegui-efl ?= "9d7ca1cecb93022e5b890cd87756ac6f072710c SRCREV_pn-libframeworkd-phonegui-efl2 ?= "917226025c67b75def91e98ea923c2e550474a5b" SRCREV_pn-libframeworkd-phonegui-efl-theme-neo ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" SRCREV_pn-libgdbus ?= "aeab6e3c0185b271ca343b439470491b99cc587f" -SRCREV_pn-libgee ?= "0bddeeefb3bd5b003d77301705dbad181cddcaf6" -SRCREV_pn-libgee-native ?= "0bddeeefb3bd5b003d77301705dbad181cddcaf6" +SRCREV_pn-libgee ?= "c21925bf1b714a2aa395192f7adbaeecf7a0e146" +SRCREV_pn-libgee-native ?= "c21925bf1b714a2aa395192f7adbaeecf7a0e146" SRCREV_pn-libgsmd ?= "4505" SRCREV_pn-libiac ?= "1590" -SRCREV_pn-libjana = "749" -SRCREV_pn-libmodulo = "7d2f657d248bd86377e66c329aa6826459d406da" +SRCREV_pn-libjana ?= "749" +SRCREV_pn-libmodulo ?= "7d2f657d248bd86377e66c329aa6826459d406da" SRCREV_pn-libmokogsmd2 ?= "4334" SRCREV_pn-libmokojournal2 ?= "3473" SRCREV_pn-libmokopanelui2 ?= "4568" -SRCREV_pn-libmokoui2 ?= "4342" +SRCREV_pn-libmokoui2 ?= "4695" SRCREV_pn-libnl2 ?= "dc273a12da9f0116e80fa81d63beb820e632dd17" SRCREV_pn-libowl ?= "277" SRCREV_pn-libphone-ui ?= "4455bce1643fcfba0538b17242f47935b869b159" @@ -163,7 +165,8 @@ SRCREV_pn-linux-openmoko-2.6.28 ?= "8aa6cdde17381dd8865d10ba15ee62c092ec2ba5" SRCREV_pn-linux-openmoko-2.6.31 ?= "4331f6c95fadc37ea89359d6afb915be838790f9" SRCREV_pn-linux-openmoko-devel ?= "b9aa5bf345a0b802af0d10b6cf1079738fe4fd12" SRCREV_pn-linux-openmoko-shr-devel ?= "8c65792a5c83c76d662a617a7c4e1ae8104bb6a5" -SRCREV_pn-linux-openmoko-shr-drm-devel ?= "c848d00bd43c47e7f11724330380e0c68ec7ae5e" +SRCREV_pn-linux-openmoko-shr-drm-devel ?= "dd6196f5cc0cd707e7f694f52d7e847e066a1967" +SRCREV_pn-linux-sgh-i900 ?= "7e5f8bd3864485e5fc66cb946e09f18b5a32cebc" SRCREV_pn-llvm-gcc4 ?= "374" SRCREV_pn-llvm-gcc4-cross ?= "374" SRCREV_pn-madbutterfly ?= "ecd1842714b5e982f3138cbdd358517d57be6aa3" @@ -186,10 +189,10 @@ SRCREV_pn-mobile-broadband-provider-info ?= "bc536218490377ccbd09c4e5858d37c91c2 SRCREV_pn-moblin-proto ?= "8f2cb524fe06555182c25b4ba3202d7b368ac0ce" SRCREV_pn-moko-gtk-engine ?= "4734" SRCREV_pn-mokoko ?= "127" -SRCREV_pn-mokonnect ?= "110" +SRCREV_pn-mokonnect ?= "111" SRCREV_pn-mpd-alsa ?= "6952" SRCREV_pn-mplayer-maemo ?= "342" -SRCREV_pn-msn-pecan = "e795b33b29d792f19fcf699275eb966dc68be257" +SRCREV_pn-msn-pecan ?= "e795b33b29d792f19fcf699275eb966dc68be257" SRCREV_pn-multitap-pad ?= "373" SRCREV_pn-mux ?= "72460e890dbb15edbf7dc193116be0dcf9794a8b" SRCREV_pn-navit ?= "1096" @@ -199,7 +202,7 @@ SRCREV_pn-netsurf ?= "3859" SRCREV_pn-numptyphysics ?= "109" SRCREV_pn-oh-puzzles ?= "22" SRCREV_pn-ohm ?= "edfe25d49d67884bf004de7ae0724c162bb5e65e" -SRCREV_pn-ologicd = "4a32af91a9479ebd4d1d39057354ac9904d74cbb" +SRCREV_pn-ologicd ?= "4a32af91a9479ebd4d1d39057354ac9904d74cbb" SRCREV_pn-om-locations ?= "942e88a1b689ffe3f11a2d982cce389cc965b2ec" SRCREV_pn-om-neon ?= "68" SRCREV_pn-om-settings ?= "74" @@ -252,9 +255,9 @@ SRCREV_pn-openmoocow ?= "39648419825cddfea1cb1321e552a12b71fede14" SRCREV_pn-openocd ?= "517" SRCREV_pn-openocd-native ?= "517" SRCREV_pn-opimd-utils ?= "0e7007fff120c8cc4c579c0c7e57883798e6d23e" -SRCREV_pn-opkg ?= "240" +SRCREV_pn-opkg ?= "363" SRCREV_pn-opkg-native ?= "240" -SRCREV_pn-opkg-sdk ?= "240" +SRCREV_pn-opkg-sdk ?= "363" SRCREV_pn-opkg-utils ?= "4578" SRCREV_pn-opkg-utils-native ?= "4595" SRCREV_pn-oprofileui ?= "173" @@ -263,7 +266,7 @@ SRCREV_pn-osb-jscore ?= "117" SRCREV_pn-osb-nrcit ?= "125" SRCREV_pn-osb-nrcore ?= "126" SRCREV_pn-packagekit ?= "96823118e98515dd41748e8c7bdb9cf7b1d4a95f" -SRCREV_pn-paroli ?= "9279b50ed72a94100d7f0f49090043134302f2eb" +SRCREV_pn-paroli ?= "bb9fb1969acdfbaa48b55902675a6d8949014c6d" SRCREV_pn-phonefsod ?= "beb2fe989bfbf6b180a58d247db302082504fa01" SRCREV_pn-phoneui-apps ?= "c27e620302d0ea956da777f76a4aa217ae8366c6" SRCREV_pn-phoneuid ?= "19f40dcc6fdb442ea9f4d7521c60d68f4042977c" @@ -272,7 +275,7 @@ SRCREV_pn-psplash ?= "249" SRCREV_pn-pty-forward-native ?= "a41cae9df1af4fc710c701ac01016d3668dd5fba" SRCREV_pn-pyefl-sudoku ?= "49" SRCREV_pn-pygsm ?= "976477f6b403f422b4ea730f71ebf409f6671141" -SRCREV_pn-pyphonelog ?= "0355bf623b31d695e53cc3cf77fb992e58b449a5" +SRCREV_pn-pyphonelog ?= "45783c7fd5ec274421bf87a5cdb372c122370fda" SRCREV_pn-pythm ?= "19" SRCREV_pn-python-coherence ?= "1161" SRCREV_pn-python-connexion ?= "1439" @@ -298,7 +301,7 @@ SRCREV_pn-shr-dialer ?= "9d7ca1cecb93022e5b890cd87756ac6f072710ca" SRCREV_pn-shr-installer ?= "f17fa104639113fb0d3212b6bba366c092854cde" SRCREV_pn-shr-launcher ?= "87" SRCREV_pn-shr-messages ?= "9d7ca1cecb93022e5b890cd87756ac6f072710ca" -SRCREV_pn-shr-settings ?= "4177f9d7ef34e3be7796585ca8c94cc2dea3f253" +SRCREV_pn-shr-settings ?= "b92390148cf0e979fd4c678a6633bb5e436d5763" SRCREV_pn-shr-specs ?= "a881cd133439737708d4d4d150500246ceff7c7d" SRCREV_pn-shr-splash ?= "9d7ca1cecb93022e5b890cd87756ac6f072710ca" SRCREV_pn-shr-splash-theme-dontpanic ?= "1cc80e26a4558dfc2268b349d9a1f468e515bcfb" @@ -326,10 +329,11 @@ SRCREV_pn-u-boot-openmoko-devel ?= "ba029a1426bfca169572bf80d50a8b190a6b0e19" SRCREV_pn-usbpath ?= "3172" SRCREV_pn-usbpath-native ?= "3172" SRCREV_pn-webkit-efl ?= "3a5ee77664c898ed51a2b2d5759822f8c0a06472" +SRCREV_pn-wesnoth ?= "39828" SRCREV_pn-wlan-ng-modules ?= "1859" SRCREV_pn-wlan-ng-utils ?= "1859" SRCREV_pn-wmiconfig ?= "5394" -SRCREV_pn-xf86-video-glamo ?= "25c4b0e80e93e04e6f7d4b8bca6d007fb9de6da8" +SRCREV_pn-xf86-video-glamo ?= "9918e082104340da42eb92b6bdefce4d9266a6a4" SRCREV_pn-xoo ?= "1971" SRCREV_pn-xserver-kdrive-glamo ?= "9b28d998424c77fbc057dd3a022ccbb122793a52" diff --git a/conf/distro/jlime-2009.1.conf b/conf/distro/jlime-2009.1.conf index 7488ddec3e..9d84d1b8c8 100644 --- a/conf/distro/jlime-2009.1.conf +++ b/conf/distro/jlime-2009.1.conf @@ -1,8 +1,9 @@ #----------------------------------------------------------------------------- #@TYPE: Distribution -#@NAME: Jlime 2009.1 <jlime.com> +#@NAME: Jlime 2009.1 <http://jlime.com> #@DESCRIPTION: Jlime Mobility Embedded Linux Distribution for the -# HP Jornada 620/660/680/690/720/728 handheld pc + Nec MP900c. +# HP Jornada 620/660/680/690/720/728 handheld pc + Nec MP900c, +# Ben Nanonote. #@MAINTAINER: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> #----------------------------------------------------------------------------- @@ -11,9 +12,7 @@ # DISTRO_NAME = "Jlime" DISTRO_VERSION = "2009.1" -#DISTRO_TYPE = "release" -#DISTRO_TYPE = "debug" - +DISTRO_TYPE = "release" export FEED_URLS_jlime = "http://repository.jlime.com/" #<>------------------------------------------------------------------> @@ -30,22 +29,16 @@ DISTRO_EXTRA_RDEPENDS = "wireless-tools nano keymaps tslib-calibrate \ IMAGE_NAME = "${IMAGE_BASENAME}-2009.1-${MACHINE}" # -# Naming schemes +# Naming schemes + packages # -INHERIT += "debian" - -# -# Packaging and output format -# -INHERIT += "package_ipk" -INHERIT += "package_tar" -IMAGE_FSTYPES = "tar.bz2" +INHERIT += "debian package_tar package_ipk src_distribute_local src_distribute" +IMAGE_FSTYPES = "tar.gz tar.bz2 jffs2" # # Kernel # KERNEL = "kernel26" -MACHINE_KERNEL_VERSION = "2.6" +MACHINE_KERNEL_VERSION = "git" # # Binutils & Compiler @@ -54,6 +47,15 @@ PREFERRED_PROVIDERS += " virtual/${TARGET_PREFIX}gcc-initial:gcc-cross-initial" PREFERRED_PROVIDERS += " virtual/${TARGET_PREFIX}gcc-intermediate:gcc-cross-intermediate" PREFERRED_PROVIDERS += " virtual/${TARGET_PREFIX}gcc:gcc-cross" PREFERRED_PROVIDERS += " virtual/${TARGET_PREFIX}g++:gcc-cross" +PREFERRED_PROVIDERS += " virtual/${TARGET_PREFIX}binutils:binutils-cross" +PREFERRED_PROVIDER_linux-libc-headers = "linux-libc-headers" +PREFERRED_PROVIDER_virtual/libusb0 = "libusb" +PREFERRED_PROVIDER_virtual/db = "db" +PREFERRED_PROVIDER_virtual/db-native = "db-native" +PREFERRED_PROVIDER_virtual/gtk+ = "gtk+" +PREFERRED_PROVIDER_gconf = "gconf" +PREFERRED_PROVIDER_avahi = "avahi" +PREFERRED_PROVIDER_gtk+ = "gtk+" PREFERRED_VERSION_gcc = "4.2.2" PREFERRED_VERSION_gcc-cross = "4.2.2" @@ -61,19 +63,24 @@ PREFERRED_VERSION_gcc-cross-initial = "4.2.2" PREFERRED_VERSION_gcc-cross-intermediate = "4.2.2" PREFERRED_VERSION_binutils = "2.18" PREFERRED_VERSION_binutils-cross = "2.18" +PREFERRED_VERSION_coreutils-native = "6.0" # # Target OS & FPU system # TARGET_OS = "linux" +TARGET_FPU_sh = "soft" TARGET_FPU_arm = "soft" TARGET_FPU_armeb = "soft" +TARGET_FPU_mipsel = "soft" +TARGET_FPU_mips = "soft" LIBC = "glibc" require conf/distro/include/${LIBC}.inc -PREFERRED_VERSION_linux-libc-headers = "2.6.18" -PREFERRED_VERSION_glibc = "2.5" +PREFERRED_VERSION_linux-libc-headers = "2.6.25" +PREFERRED_VERSION_glibc-initial = "2.6.1" +PREFERRED_VERSION_glibc = "2.6.1" # # Bootstrap & Init @@ -91,15 +98,3 @@ PREFERRED_PROVIDER_virtual/libsdl = "libsdl-x11" PREFERRED_PROVIDER_xserver = "xserver-kdrive" require conf/distro/include/preferred-xorg-versions-X11R7.4.inc -# -# GPE -# -require conf/distro/include/preferred-gpe-versions-2.8.inc - -# -# Opie -# -QTE_VERSION = "2.3.10" -PALMTOP_USE_MULTITHREADED_QTE = "yes" -OPIE_VERSION = "1.2.3" -require conf/distro/include/preferred-opie-versions.inc diff --git a/conf/distro/micro.conf b/conf/distro/micro.conf index a1220ee592..25880dff9d 100644 --- a/conf/distro/micro.conf +++ b/conf/distro/micro.conf @@ -76,11 +76,13 @@ ${TARGET_ARCH}:build-${BUILD_OS}:fail-fast:pn-${PN}" ############################################################################# PREFERRED_PROVIDER_task-bootstrap = "task-bootstrap" PREFERRED_PROVIDER_virtual/libx11 = "libx11" +PREFERRED_PROVIDER_virtual/gail ?= "gtk+" ############################################################################# # PREFERRED VERSIONS ############################################################################# require conf/distro/include/sane-srcdates.inc require conf/distro/include/sane-srcrevs.inc +require conf/distro/include/preferred-xorg-versions-X11R7.5.inc ############################################################################# # NLS @@ -99,6 +101,8 @@ PACKAGE_SNAP_LIB_SYMLINKS = "1" # Collapse /usr into / prefix = "" exec_prefix = "" +prefix_native = "" +exec_prefix_native = "" # Don't install ldconfig and associated gubbins USE_LDCONFIG = "0" diff --git a/conf/distro/shr.conf b/conf/distro/shr.conf index e45fc07334..6740e24feb 100644 --- a/conf/distro/shr.conf +++ b/conf/distro/shr.conf @@ -15,12 +15,9 @@ TOOLCHAIN_BRAND ?= "" #LIBC = "glibc" -require conf/distro/include/preferred-xorg-versions-X11R7.5.inc require conf/distro/include/preferred-shr-versions.inc require conf/distro/include/shr-autorev.inc -include conf/distro/minimal.conf - # # Header # @@ -33,14 +30,21 @@ DISTRO_TYPE = "debug" DISTRO = "shr" #Generate locales on the buildsystem instead of on the target. Speeds up first boot, set to "1" to enable -PREFERRED_PROVIDER_qemu-native = "qemu-native" ENABLE_BINARY_LOCALE_GENERATION ?= "1" # We only want to build UTF8 locales LOCALE_UTF8_ONLY = "1" +#save statistical info on images INHERIT += "testlab" +#activate the angstrom blacklister +INHERIT += "angstrom" + +ANGSTROM_BLACKLIST_pn-bluez-libs = "bluez-libs 3.x has been replaced by bluez4" +ANGSTROM_BLACKLIST_pn-bluez-utils = "bluez-utils 3.x has been replaced by bluez4" +ANGSTROM_BLACKLIST_pn-atd = "atd has been replaced by atd-over-fso" + CVS_TARBALL_STASH += "http://build.shr-project.org/sources/" PREMIRRORS = "(ftp|https?)$://.*/.* http://build.shr-project.org/sources/" @@ -67,6 +71,89 @@ PACKAGE_ARCH_pn-keymaps_om-gta02 = "armv4t" PACKAGE_ARCH_pn-neod_om-gta01 = "armv4t" PACKAGE_ARCH_pn-neod_om-gta02 = "armv4t" +# Helper to say what image we built +SHR_VERSION_FILE = "${IMAGE_ROOTFS}/${sysconfdir}/shr-version" +ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo Tag Name: `git tag|tail -n 1`> ${SHR_VERSION_FILE};cd $OLD_PWD;" +ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo VERSION: `git-log -n1 --pretty=oneline|awk '{print $1}'` >> ${SHR_VERSION_FILE}; cd $OLD_PWD;" +ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo Branch: ` git branch |awk '/*/{print $2}'` >> ${SHR_VERSION_FILE}; cd $OLD_PWD;" +ROOTFS_POSTPROCESS_COMMAND += "echo Build Host: `cat /etc/hostname` >> ${SHR_VERSION_FILE};" +ROOTFS_POSTPROCESS_COMMAND += "echo Time Stamp: `date -R` >> ${SHR_VERSION_FILE};" + +#Package customization +EXTRA_OECONF-pn_qemu += " --target-list=arm-linux-user,arm-softmmu" + +#Illume settings +ILLUME_CONFIG = "e-wm-config-illume-shr" +ILLUME_THEME = "e-wm-theme-illume-gry" + +# From minimal.conf + +############################################################################# +# FEATURE SELECTION +############################################################################# +# Use bluetooth 4.0 +DISTRO_BLUETOOTH_MANAGER = "bluez4" +# We want images supporting the following features (for task-base) +DISTRO_FEATURES = "nfs smbfs wifi ppp alsa ext2 vfat pcmcia usbgadget usbhost pci" +# Following features are for ARM and E500 based machines +DISTRO_FEATURES += "eabi" + +############################################################################# +# LIBRARY NAMES +############################################################################# +# libfoo -> libfoo0-2 (etc) +INHERIT += "debian" + +############################################################################# +# STAGING AREA +############################################################################# +# Controlled by packaging system +INHERIT += "packaged-staging" + +############################################################################# +# PACKAGING & FEEDS +############################################################################# +# Chose the packaging system +INHERIT += "package_ipk" +IMAGE_FSTYPES ?= "tar.gz jffs2" + +require conf/distro/include/sane-feed.inc +PREFERRED_PKG_FORMAT ?= "ipk" +require conf/distro/include/sane-feed-${PREFERRED_PKG_FORMAT}.inc + +############################################################################# +# IMAGES +############################################################################# +# Name the generated images in a sane way +IMAGE_NAME = "${DISTRO_NAME}-${IMAGE_BASENAME}-${LIBC}-${PREFERRED_PKG_FORMAT}-${DISTRO_VERSION}-${MACHINE}" +CACHE ?= "${TMPDIR}/cache/${LIBC}/${MACHINE}" +DEPLOY_DIR ?= "${TMPDIR}/deploy/${LIBC}" +DEPLOY_DIR_IMAGE = "${DEPLOY_DIR}/images/${MACHINE}" + +# increase inode/block ratio for ext2 filesystem +EXTRA_IMAGECMD_ext2 = "-i 8192" + +############################################################################# +# KERNEL +############################################################################# +KERNEL = "kernel26" +MACHINE_KERNEL_VERSION = "2.6" + +############################################################################# +# OVERWRITES adjusted from bitbake.conf to feature the MACHINE_CLASS +############################################################################# +OVERRIDES = "local:${MACHINE}:${MACHINE_CLASS}:${DISTRO}:${TARGET_OS}:${TARGET_ARCH}:build-${BUILD_OS}:fail-fast:pn-${PN}" + +############################################################################# +# TOOLCHAIN +############################################################################# +LIBC ?= "eglibc" +require conf/distro/include/sane-toolchain.inc + +############################################################################# +# PREFERRED PROVIDERS +############################################################################# +PREFERRED_PROVIDER_qemu-native = "qemu-native" PREFERRED_PROVIDER_gconf = "gconf" PREFERRED_PROVIDER_virtual/shr-splash-theme = "shr-splash-theme-logo" PREFERRED_PROVIDER_frameworkd-config = "frameworkd-config-shr" @@ -84,14 +171,55 @@ PREFERRED_PROVIDER_virtual/gail = "gtk+" PREFERRED_PROVIDER_opkg = "opkg" PREFERRED_PROVIDER_virtual/java-initial = "cacao-initial" PREFERRED_PROVIDER_atd = "atd-over-fso" - -# Helper to say what image we built -SHR_VERSION_FILE = "${IMAGE_ROOTFS}/${sysconfdir}/shr-version" -ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo Tag Name: `git tag|tail -n 1`> ${SHR_VERSION_FILE};cd $OLD_PWD;" -ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo VERSION: `git-log -n1 --pretty=oneline|awk '{print $1}'` >> ${SHR_VERSION_FILE}; cd $OLD_PWD;" -ROOTFS_POSTPROCESS_COMMAND += "OLD_PWD=$PWD; cd `dirname '${FILE_DIRNAME}'`; echo Branch: ` git branch |awk '/*/{print $2}'` >> ${SHR_VERSION_FILE}; cd $OLD_PWD;" -ROOTFS_POSTPROCESS_COMMAND += "echo Build Host: `cat /etc/hostname` >> ${SHR_VERSION_FILE};" -ROOTFS_POSTPROCESS_COMMAND += "echo Time Stamp: `date -R` >> ${SHR_VERSION_FILE};" - -#Package customization -EXTRA_OECONF-pn_qemu += " --target-list=arm-linux-user,arm-softmmu" +PREFERRED_PROVIDER_qt4x11 = "qt4-x11-free" +PREFERRED_PROVIDER_task-bootstrap = "task-bootstrap" +PREFERRED_PROVIDER_avahi = "avahi" +PREFERRED_PROVIDER_gtk+ = "gtk+" +PREFERRED_PROVIDER_libgpewidget = "libgpewidget" +PREFERRED_PROVIDER_virtual/db = "db3" +PREFERRED_PROVIDER_virtual/db-native = "db3-native" +PREFERRED_PROVIDER_virtual/libsdl = "libsdl-x11" +PREFERRED_PROVIDER_virtual/libx11 ?= "libx11" +PREFERRED_PROVIDER_virtual/libusb0 ?= "libusb" + +############################################################################# +# PREFERRED VERSIONS +############################################################################# +require conf/distro/include/sane-srcdates.inc +require conf/distro/include/sane-srcrevs.inc +require conf/distro/include/preferred-e-versions.inc +require conf/distro/include/preferred-opie-versions-1.2.4.inc +#Use newest available (X11R7.5 now) +#require conf/distro/include/preferred-xorg-versions-X11R7.4-updates.inc +#require conf/distro/include/preferred-xorg-versions-X11R7.4.inc + +############################################################################# +# CONTENTS +############################################################################# + +# Ship extra debug utils in the rootfs when doing a debug build +DISTRO_EXTRA_APPS ?= "" +DISTRO_EXTRA_APPS += '${@base_conditional("DISTRO_TYPE", "release", "", "task-cli-tools-debug",d)}' + +# Additional content I (only valid if you include task-base) +# distro-feed-configs: configuration files for the online feeds +# util-linux-ng-mount util-linux-ng-umount: busybox mount is broken +# angstrom-libc-fixup-hack: fixes an obscure bug with libc.so symlink +DISTRO_EXTRA_RDEPENDS += "\ + distro-feed-configs \ + util-linux-ng-mount util-linux-ng-umount \ + angstrom-libc-fixup-hack \ + ${DISTRO_EXTRA_APPS} \ +" + +# Additional content II (can be masked with BAD_RECOMMENDATIONS) +DISTRO_EXTRA_RRECOMMENDS += " \ + kernel-module-vfat \ + kernel-module-ext2 \ + kernel-module-ext3 \ + kernel-module-af-packet \ + openssh-sftp-server \ +" + +# avahi-daemon \ +# avahi-autoipd \ diff --git a/conf/machine/ben-nanonote.conf b/conf/machine/ben-nanonote.conf new file mode 100644 index 0000000000..391f4a542d --- /dev/null +++ b/conf/machine/ben-nanonote.conf @@ -0,0 +1,8 @@ +#@TYPE: Machine +#@NAME: Ben Nanonote +#@DESCRIPTION: Machine configuration for the Qi-Hardware's Ben Nanonote +TARGET_ARCH = "mipsel" +PREFERRED_PROVIDER_virtual/kernel = "linux" +KERNEL_IMAGETYPE = "uImage" +IMAGE_FSTYPES ?= "jffs2" + diff --git a/conf/machine/hawkboard.conf b/conf/machine/hawkboard.conf new file mode 100644 index 0000000000..5a9df79ade --- /dev/null +++ b/conf/machine/hawkboard.conf @@ -0,0 +1,13 @@ +#@TYPE: Machine +#@NAME: OMAP-L138 based board +#@DESCRIPTION: Machine configuration for the TI Hawkboard + +require conf/machine/include/davinci.inc + +UBOOT_MACHINE = "da850_omapl138_evm_config" +UBOOT_ENTRYPOINT = "0xc0008000" +UBOOT_LOADADDRESS = "0xc0008000" + +MACHINE_FEATURES = "kernel26 serial ethernet ide screen" + +SERIAL_CONSOLE = "115200 ttyS2" diff --git a/conf/machine/include/davinci.inc b/conf/machine/include/davinci.inc index 206afd46f2..baae3ff327 100644 --- a/conf/machine/include/davinci.inc +++ b/conf/machine/include/davinci.inc @@ -1,7 +1,7 @@ require conf/machine/include/tune-arm926ejs.inc # Increase this everytime you change something in the kernel -MACHINE_KERNEL_PR = "r10" +MACHINE_KERNEL_PR = "r11" TARGET_ARCH = "arm" diff --git a/conf/machine/include/tune-atom.inc b/conf/machine/include/tune-atom.inc new file mode 100644 index 0000000000..a7dd04f596 --- /dev/null +++ b/conf/machine/include/tune-atom.inc @@ -0,0 +1,8 @@ +# GCC 4.3.0- (see Poky) +# TARGET_CC_ARCH = "-march=i586" +# +# GCC 4.3.1+ (see Gentoo) +TARGET_CC_ARCH = "-march=core2" + +# GCC 4.4.2+ (see Fedora 12) +#TARGET_CC_ARCH = "-march=i686 -mtune=atom" diff --git a/conf/machine/ion.conf b/conf/machine/ion.conf new file mode 100644 index 0000000000..f58219bd1a --- /dev/null +++ b/conf/machine/ion.conf @@ -0,0 +1,23 @@ +#@TYPE: Machine +#@NAME: Ion + +#@DESCRIPTION: Machine configuration for NVidia Ion based machines. +#Point of View ION, Asrock 330, etc. + +TARGET_ARCH = "i686" + +#MACHINE_ARCH = "core2" + +PACKAGE_EXTRA_ARCHS = "x86" + +include conf/machine/include/tune-atom.inc + +MACHINE_FEATURES = "kernel26 screen keyboard pci usbhost ext2 ext3 x86 wifi \ + acpi" + +KERNEL_IMAGETYPE = "bzImage" + +PREFERRED_PROVIDER_virtual/kernel ?= "linux" + +GLIBC_ADDONS = "nptl" +GLIBC_EXTRA_OECONF = "--with-tls" diff --git a/conf/machine/om-gta01.conf b/conf/machine/om-gta01.conf index cbc66d8748..5bdeba01f3 100644 --- a/conf/machine/om-gta01.conf +++ b/conf/machine/om-gta01.conf @@ -7,8 +7,18 @@ TARGET_ARCH = "arm" PREFERRED_PROVIDER_virtual/kernel ?= "linux-openmoko-2.6.24" + +# SHR-specific overrides to the machine.conf file +PREFERRED_PROVIDER_virtual/kernel_shr = "linux-openmoko-shr-devel" +PREFERRED_PROVIDER_virtual/xserver_shr = "xserver-xorg" +PREFERRED_PROVIDER_xf86-video-fbdev_shr = "xf86-video-fbdev" +PREFERRED_PROVIDER_mesa_shr = "mesa" +XSERVER_shr = "xserver-xorg xf86-video-fbdev xf86-input-evdev xf86-input-keyboard" + UBOOT_ENTRYPOINT = "30008000" +OLDEST_KERNEL_linux-gnueabi = "2.6.24" + MACHINE_FEATURES = "kernel26 apm alsa bluetooth gps usbgadget usbhost phone vfat ext2" MACHINE_DISPLAY_WIDTH_PIXELS = "480" MACHINE_DISPLAY_HEIGHT_PIXELS = "640" @@ -16,6 +26,10 @@ MACHINE_DISPLAY_ORIENTATION = "0" MACHINE_DISPLAY_PPI = "285" XSERVER = "xserver-kdrive-fbdev" +# fbreader specific +READER_RESOLUTION = "480x640" +READER_ARCH = "openzaurus" + # package machine specific modules MACHINE_EXTRA_RRECOMMENDS = "\ kernel-module-gta01-pm-bt \ @@ -40,6 +54,8 @@ EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x4000 --pad -n" # build / upload tools EXTRA_IMAGEDEPENDS += "dfu-util-native" +module_autoload_snd-soc-neo1973-wm8753 = "snd-soc-neo1973-wm8753" + # tune for S3C24x0 include conf/machine/include/tune-arm920t.inc diff --git a/conf/machine/om-gta02.conf b/conf/machine/om-gta02.conf index 94ca2946e6..d47320e59d 100644 --- a/conf/machine/om-gta02.conf +++ b/conf/machine/om-gta02.conf @@ -8,18 +8,37 @@ TARGET_ARCH = "arm" PREFERRED_PROVIDER_virtual/kernel ?= "linux-openmoko-2.6.28" PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg" + +# If you want to have KMS enabled in default kernel, uncomment linux-openmoko-shr-drm-devel +PREFERRED_PROVIDER_virtual/kernel_shr = "linux-openmoko-shr-devel" +#PREFERRED_PROVIDER_virtual/kernel_shr = "linux-openmoko-shr-drm-devel" +#PREFERRED_PROVIDER_virtual/kernel_shr = "linux-openmoko-2.6.31" + +PREFERRED_PROVIDER_virtual/xserver_shr = "xserver-xorg" +PREFERRED_PROVIDER_virtual/libgl_shr = "mesa-dri" +MACHINE_DRI_MODULES_shr = "glamo" + +XSERVER_shr = "xserver-xorg xf86-video-glamo xf86-input-evdev xf86-input-keyboard xf86-input-mouse" + UBOOT_ENTRYPOINT = "30008000" +OLDEST_KERNEL_linux-gnueabi = "2.6.24" + MACHINE_FEATURES = "kernel26 apm alsa bluetooth gps usbgadget usbhost phone wifi vfat ext2" MACHINE_DISPLAY_WIDTH_PIXELS = "480" MACHINE_DISPLAY_HEIGHT_PIXELS = "640" MACHINE_DISPLAY_ORIENTATION = "0" MACHINE_DISPLAY_PPI = "285" -XSERVER = "xserver-xorg \ +XSERVER ?= "xserver-xorg \ xf86-input-tslib \ xf86-video-glamo \ xf86-input-keyboard" +# fbreader specific +READER_RESOLUTION = "480x640" +READER_ARCH = "desktop" +READER_UI = "gtk" + # package machine specific modules MACHINE_EXTRA_RRECOMMENDS = "\ kernel-modules \ @@ -32,8 +51,9 @@ USE_VT = "0" # used by some images ROOT_FLASH_SIZE = "256" +IMAGE_FSTYPES += "tar.gz jffs2 ubifs" + # extra jffs2 tweaks -IMAGE_FSTYPES += "jffs2" EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 \ --no-cleanmarkers --pad -n ; sumtool --eraseblock=0x20000 --no-cleanmarkers \ --littleendian --pad \ @@ -44,8 +64,25 @@ EXTRA_IMAGECMD_jffs2 = "--little-endian --eraseblock=0x20000 --pagesize=0x800 \ mv ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.jffs2.summary \ ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.jffs2" +# do ubiattach /dev/ubi_ctrl -m 4 +# From dmesg: +# UBI: smallest flash I/O unit: 2048 +# UBI: logical eraseblock size: 129024 bytes +# from ubiattach stdout: +# UBI device number 0, total 1996 LEBs +MKUBIFS_ARGS = "-m 2048 -e 129024 -c 2047" + +# do ubiattach /dev/ubi_ctrl -m 4 +# from dmesg: +# UBI: smallest flash I/O unit: 2048 +# UBI: physical eraseblock size: 131072 bytes (128 KiB) +# UBI: sub-page size: 512 +UBINIZE_ARGS = "-m 2048 -p 128KiB -s 512" + # build / upload tools EXTRA_IMAGEDEPENDS += "sjf2410-linux-native dfu-util-native" +module_autoload_snd-soc-neo1973-gta02-wm8753 = "snd-soc-neo1973-gta02-wm8753" + # tune for S3C24x0 include conf/machine/include/tune-arm920t.inc diff --git a/conf/machine/sgh-i900.conf b/conf/machine/sgh-i900.conf new file mode 100644 index 0000000000..2080bf8e1a --- /dev/null +++ b/conf/machine/sgh-i900.conf @@ -0,0 +1,23 @@ +#@TYPE: Machine +#@NAME: Samsung Omnia SGH-i900 +#@DESCRIPTION: Machine configuration for the Samsung Omnia SGH-i900 +#@HOMEPAGE: http://andromnia.sourceforge.net + +# Hardware-based properties +# + +TARGET_ARCH = "arm" + +require conf/machine/include/tune-xscale.inc + +MACHINE_FEATURES = "alsa apm bluetooth camera gps kernel26 phone screen touchscreen vfat wifi" + +# Software/packages selection +# + +PREFERRED_PROVIDER_virtual/kernel = "linux-sgh-i900" +PREFERRED_PROVIDER_virtual/xserver = "xserver-xorg" +XSERVER = "xserver-xorg \ + xf86-input-evdev \ + xf86-input-tslib \ + xf86-video-fbdev" diff --git a/recipes/aceofpenguins/aceofpenguins-launcher_0.3.bb b/recipes/aceofpenguins/aceofpenguins-launcher_0.3.bb new file mode 100644 index 0000000000..265b8c6651 --- /dev/null +++ b/recipes/aceofpenguins/aceofpenguins-launcher_0.3.bb @@ -0,0 +1,21 @@ +DESCRIPTION = "EFL launcher for ace-of-penguins" +HOMEPAGE = "http://shr-project.org" +SHR_RELEASE ?= "shr" +LICENSE ?= "GPL" +DEPENDS = "python-native python-elementary" +RDEPENDS = "aceofpenguins" +SECTION = "x11/application" + +PACKAGE_ARCH = "all" + +PR = "r0" + +inherit setuptools + +SRC_URI = "http://downloads.vdm-design.de/aceofpenguins-launcher-${PV}.tar.gz" + +S = "${WORKDIR}/aceofpenguins-launcher" + +FILES_${PN} += "${prefix}/share/pixmaps" +FILES_${PN} += "${prefix}/share/applications" + diff --git a/recipes/aceofpenguins/aceofpenguins_1.2.bb b/recipes/aceofpenguins/aceofpenguins_1.2.bb new file mode 100644 index 0000000000..9410eb9653 --- /dev/null +++ b/recipes/aceofpenguins/aceofpenguins_1.2.bb @@ -0,0 +1,18 @@ +DESCRIPTION = "The Ace of Penguins is a set of Unix/X solitaire games based on the ones available for Windows(tm) but with a number of enhancements that my wife says make my versions better :-) \ +The latest version includes clones of freecell, golf, mastermind, merlin, minesweeper, pegged, solitaire, taipei (with editor!), and thornq (by Martin Thornquist)." +AUTHOR = "dj@delorie.com" +HOMEPAGE = "http://www.delorie.com/store/ace/" +SECTION = "games" +DEPENDS = "libpng zlib libxpm" +PR = "r1" + +SRC_URI = "\ + http://www.delorie.com/store/ace/ace-${PV}.tar.gz\ + file://gcc4.patch;patch=1\ +" +S = "${WORKDIR}/ace-${PV}" + +inherit autotools + +# Workaround QA issue +TARGET_CC_ARCH += "${LDFLAGS}"
\ No newline at end of file diff --git a/recipes/aceofpenguins/files/gcc4.patch b/recipes/aceofpenguins/files/gcc4.patch new file mode 100644 index 0000000000..431c44e933 --- /dev/null +++ b/recipes/aceofpenguins/files/gcc4.patch @@ -0,0 +1,23 @@ +--- ace-of-penguins-1.2.orig/games/golf.c ++++ ace-of-penguins-1.2/games/golf.c +@@ -31,7 +31,7 @@ + + Stack *deck, *discard, *stacks[7]; + +-static int table_width, table_height; ++int table_width, table_height; + + int supress_arrows = 0; + +--- ace-of-penguins-1.2.orig/games/solitaire.c ++++ ace-of-penguins-1.2/games/solitaire.c +@@ -337,7 +337,7 @@ + return something_moved; + } + +-static void ++void + check_for_end_of_game() + { + while (auto_move()); + diff --git a/recipes/alsa/alsa-state.bb b/recipes/alsa/alsa-state.bb index 0963cc4ff8..39bae169af 100644 --- a/recipes/alsa/alsa-state.bb +++ b/recipes/alsa/alsa-state.bb @@ -7,7 +7,7 @@ DESCRIPTION = "Alsa Scenario Files" LICENSE = "MIT" PV = "0.2.0" -PR = "r9" +PR = "r10" SRC_URI = "\ file://asound.conf \ @@ -35,8 +35,8 @@ do_install() { PACKAGES += "alsa-states" RRECOMMENDS_alsa-state = "alsa-states" -RRECOMMENDS_${PN}_om-gta01 = "openmoko-alsa-scenarios" -RRECOMMENDS_${PN}_om-gta02 = "openmoko-alsa-scenarios" +RRECOMMENDS_${PN}_om-gta01 = "virtual/alsa-scenarios" +RRECOMMENDS_${PN}_om-gta02 = "virtual/alsa-scenarios" FILES_${PN} = "${sysconfdir}/init.d ${sysconfdir}/asound.conf" CONFFILES_${PN} = "${sysconfdir}/asound.conf" diff --git a/recipes/blipomoko/blipomoko_git.bb b/recipes/blipomoko/blipomoko_git.bb new file mode 100644 index 0000000000..82f190a73c --- /dev/null +++ b/recipes/blipomoko/blipomoko_git.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "python-elementary and python-blipapi based blip.pl client" +AUTHOR = "Sebastian Krzyszkowiak <seba.dos1@gmail.com>" +HOMEPAGE = "http://wiki.github.com/dos1/blipomoko" +LICENSE ?= "GPL" +RDEPENDS = "python-elementary python-dbus python-edbus python-ecore" +SECTION = "x11/applications" + +SRC_URI = "git://github.com/dos1/blipomoko.git;protocol=http" +S = "${WORKDIR}/git" + +PV = "0.0+gitr${SRCREV}" +PR = "r0" + +inherit distutils + +FILES_${PN} += "/usr/share/blipomoko" + diff --git a/recipes/blueman/blueman_1.10.bb b/recipes/blueman/blueman_1.10.bb new file mode 100644 index 0000000000..61309023c5 --- /dev/null +++ b/recipes/blueman/blueman_1.10.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "Blueman is a GTK+ Bluetooth Manager" +HOMEPAGE = "http://www.blueman-project.org/" +SECTION = "optional" +DEPENDS = "gtk+ glib-2.0 bluez4 intltool python python-native python-pyrex startup-notification" +RDEPENDS = "python-dbus python-pygobject python dbus bluez4 python-pygtk python-notify obex-data-server \ +" + +PR = "r1" + +inherit autotools pkgconfig + +EXTRA_OECONF += "--with-no-runtime-deps-check" + +BLUEZ_LIBS = "-L${libdir} -lbluetooth" +BLUEZ_CFLAGS = "-I${includedir}" + +SRC_URI = "\ + http://download.tuxfamily.org/blueman/blueman-${PV}.tar.gz\ + " + +FILES_${PN}-dbg += "${libdir}/python2.6/site-packages/.debug" +FILES_${PN} += "${libdir} ${datadir}" + +do_configure_prepend() { + sed -i "s/py_prefix=.*$/py_prefix=\"${@"${STAGING_DIR_TARGET}".replace("/","\/")}\/usr\"/" ${S}/acinclude.m4 + sed -i "s/py_exec_prefix=.*$/py_exec_prefix=\"${@"${STAGING_DIR_TARGET}".replace("/","\/")}\/usr\"/" ${S}/acinclude.m4 +} diff --git a/recipes/blueman/blueman_1.21.bb b/recipes/blueman/blueman_1.21.bb new file mode 100644 index 0000000000..744c05302e --- /dev/null +++ b/recipes/blueman/blueman_1.21.bb @@ -0,0 +1,31 @@ +DESCRIPTION = "GTK+ Bluetooth Manager, designed for common bluetooth tasks." +HOMEPAGE = "http://blueman-project.org/" +SECTION = "optional" + +DEPENDS = "gtk+ glib-2.0 bluez4 intltool python \ + python-native python-pyrex \ + startup-notification \ +" + +RDEPENDS = "python-dbus python-pygobject python \ + dbus bluez4 python-pygtk obex-data-server \ +" + +PR = "r1" + +SRC_URI = "http://download.tuxfamily.org/blueman/blueman-${PV}.tar.gz" + +inherit autotools pkgconfig + +EXTRA_OECONF += "--with-no-runtime-deps-check" + +do_configure_prepend() { + sed -i "s/py_prefix=.*$/py_prefix=\"${@"${STAGING_DIR_TARGET}".replace("/","\/")}\/usr\"/" ${S}/acinclude.m4 + sed -i "s/py_exec_prefix=.*$/py_exec_prefix=\"${@"${STAGING_DIR_TARGET}".replace("/","\/")}\/usr\"/" ${S}/acinclude.m4 +} + +FILES_${PN}-dbg += "${libdir}/python2.6/site-packages/.debug" +FILES_${PN} += "${libdir} ${datadir}" + +BLUEZ_LIBS = "-L${libdir} -lbluetooth" +BLUEZ_CFLAGS = "-I${includedir}" diff --git a/recipes/bluez/bluez4_4.56.bb b/recipes/bluez/bluez4_4.56.bb index ad2c957bfc..79e3005462 100644 --- a/recipes/bluez/bluez4_4.56.bb +++ b/recipes/bluez/bluez4_4.56.bb @@ -2,6 +2,7 @@ require bluez4.inc DEFAULT_PREFERENCE = "-1" DEFAULT_PREFERENCE_angstrom = "1" +DEFAULT_PREFERENCE_shr = "1" DEPENDS += "libsndfile1" @@ -10,5 +11,6 @@ PR = "${INC_PR}.0" # Not all distros have a recent enough udev BTUDEV = " --disable-udevrules" BTUDEV_angstrom = " --enable-udevrules" +BTUDEV_shr = " --enable-udevrules" EXTRA_OECONF += "${BTUDEV}" diff --git a/recipes/bt-configure/bt-configure_git.bb b/recipes/bt-configure/bt-configure_git.bb new file mode 100644 index 0000000000..226faa9b98 --- /dev/null +++ b/recipes/bt-configure/bt-configure_git.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "Python keyring" +SECTION = "console/network" +PRIORITY = "optional" +LICENSE = "GPL" +RDEPENDS = "python python-pygtk bluez4" + +PV = "1.0.0+gitr${SRCREV}" +PR = "r1" + +ARCH_bt-configure = "all" + +SRC_URI = "git://github.com/nytowl/BT-Configure.git;protocol=http" + +inherit distutils + +S = ${WORKDIR}/git + +FILES_${PN} += "${datadir}" + diff --git a/recipes/bt-gps/bt-gps.bb b/recipes/bt-gps/bt-gps.bb new file mode 100644 index 0000000000..414c37fb80 --- /dev/null +++ b/recipes/bt-gps/bt-gps.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "Turns your Neo Freerunner into a bluetooth GPS" +SECTION = "console/network" +PRIORITY = "optional" +LICENSE = "GPL" +RDEPENDS = "python python-pygtk gps-utils" + +SRC_URI = "http://handheldshell.com/software/fso/btgps.tgz \ + " + +#inherit autotools + +S = ${WORKDIR}/bluetooth + +do_install() { + install -d ${D}/usr/share/applications + install -d ${D}/usr/bin + install -m 0755 ${S}/BtGPS.py ${D}/usr/bin + install -m 0755 ${S}/btgps.desktop ${D}/usr/share/applications +} + +do_configure() { + exit 0 +} + +do_compile() { + exit 0 +} diff --git a/recipes/calc/calc_0.0.2.bb b/recipes/calc/calc_0.0.2.bb new file mode 100644 index 0000000000..9f15a32ec1 --- /dev/null +++ b/recipes/calc/calc_0.0.2.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "A simple calculator which is elementary-themed" +HOMEPAGE = "http://github.com/spaetz/calc" +AUTHOR = "Sebastian Spaeth <Sebastian@SSpaeth.de>" +LICENSE = "MIT" +RDEPENDS = "python-elementary python python-edbus" +SECTION = "x11/application" +PR = "r1" + + +SRC_URI = "git://github.com/spaetz/calc.git;protocol=http;branch=master;tag=${PV}" +S = "${WORKDIR}/git" + +do_install(){ + install -d ${D}${datadir}/applications + install -m 0644 ${S}/data/elementary-calculator.desktop ${D}${datadir}/applications/ + install -d ${D}${datadir}/pixmaps + install -m 0644 ${S}/data/calculator.png ${D}${datadir}/pixmaps/ + install -d ${D}${bindir} + install -m 0744 ${S}/calc ${D}${bindir}/ +} + +FILES_${PN} += "${prefix}/share/pixmaps" +FILES_${PN} += "${prefix}/share/applications" diff --git a/recipes/calc/calc_git.bb b/recipes/calc/calc_git.bb new file mode 100644 index 0000000000..9914d23717 --- /dev/null +++ b/recipes/calc/calc_git.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "A dead simple calculator. It's advantage is that it's elementary-themed" +HOMEPAGE = "http://github.com/spaetz/calc" +AUTHOR = "Sebastian Spaeth <Sebastian@SSpaeth.de>" +SHR_RELEASE ?= "shr" +LICENSE = "MIT" +RDEPENDS = "python-elementary python python-edbus" +SECTION = "x11/application" +SRCREV ?= "1c17792094eb" +PV = "0.0.1+gitr${SRCREV}" +PR = "r1" + +DEFAULT_PREFERENCE = "-1" + +SRC_URI = "git://github.com/spaetz/calc.git;protocol=http;branch=master" +S = "${WORKDIR}/git" + +do_install(){ + install -d ${D}${datadir}/applications + install -m 0644 ${S}/data/elementary-calculator.desktop ${D}${datadir}/applications/ + install -d ${D}${datadir}/pixmaps + install -m 0644 ${S}/data/calculator.png ${D}${datadir}/pixmaps/ + install -d ${D}${bindir} + install -m 0744 ${S}/calc ${D}${bindir}/ +} + +FILES_${PN} += "${prefix}/share/pixmaps" +FILES_${PN} += "${prefix}/share/applications" diff --git a/recipes/callrec/callrec_svn.bb b/recipes/callrec/callrec_svn.bb new file mode 100644 index 0000000000..6930648ecc --- /dev/null +++ b/recipes/callrec/callrec_svn.bb @@ -0,0 +1,70 @@ +DESCRIPTION = "a call recording application" +HOMEPAGE = "none" +SECTION = "system/applications" +LICENSE = "GPLv3 or later" +SRCNAME = "callrec" +DEPENDS = "gtk+" +RDEPENDS += "alsa-utils-alsactl alsa-utils-aplay" +PV = "0.2.4+svnr${SRCPV}" +PR = "r0" + +S = "${WORKDIR}/trunk" +inherit autotools + +SRC_URI = "svn://svn.projects.openmoko.org/svnroot/callrec;module=trunk" +FILES_${PN} += "${datadir} ${sysconfdir}" + +pkg_postinst_callrec_append() { + #!/bin/sh + #still a bit buggy, if the state path change for instance + files0="gsmhandset.state" + files1="gsmheadset.state" + files2="gsmspeakerout.state" + state_dir=`sed -n "s/^scenario_dir\s*=\s*//p" /etc/frameworkd.conf` + callrec_dir="/usr/share/callrec" + + for index in 0 1 2 + do + eval filename=\${files${index}} + current_file=${state_dir}/${filename} + patched="0" + + if [ -r ${callrec_dir}/${filename} ]; then + echo "Backup of ${filename} already exists" + echo "Replacing ${filename} with callrec-${filename}" + cp ${callrec_dir}/callrec-${filename} ${current_file} + else + echo "Backing up ${filename}" + cp ${current_file} ${callrec_dir}/ + + #fix the patch + sed -i "s!@STATE_PATH@!${current_file}!g" ${callrec_dir}/${filename}.patch + echo "Patching ${filename}" + patch -p0 < ${callrec_dir}/${filename}.patch && patched="1" + fi + + if [ $patched -eq 0 ]; then + echo "Failed patching ${filename}" + echo "Replacing ${filename} with callrec-${filename}" + echo "Backup is at ${callrec_dir}" + cp ${callrec_dir}/callrec-${filename} ${current_file} + fi + done +} +pkg_prerm_callrec_append() { + #!/bin/sh + files0="gsmhandset.state" + files1="gsmheadset.state" + files2="gsmspeakerout.state" + state_dir=`sed -n "s/^scenario_dir\s*=\s*//p" /etc/frameworkd.conf` + + for index in 0 1 2 + do + eval filename=\${files${index}} + current_file=${state_dir}/${filename} + echo "Restoring ${filename} from backup" + cp /usr/share/callrec/${filename} ${current_file} + echo "Removing backups" + rm /usr/share/callrec/${filename} + done +} diff --git a/recipes/cellhunter/cellhunter_0.5.0.bb b/recipes/cellhunter/cellhunter_0.5.0.bb new file mode 100644 index 0000000000..87d126c9bc --- /dev/null +++ b/recipes/cellhunter/cellhunter_0.5.0.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "CellHunter - A game to collect information about mobile phone cells" +SECTION = "x11/utils" +DEPENDS = "python" +RDEPENDS = "python-subprocess python-netclient python-math python-core python-io python-pygtk python-dbus frameworkd" +PR = "r0" + +SRC_URI = "\ + http://ch.omoco.de/cellhunter/files/cellhunter-${PV}.tar.gz \ +" + +do_configure () { + : +} + +do_compile () { + : +} + +do_install () { + install -d ${D}${bindir} + install -m 0755 cellhunter.py ${D}${bindir}/ + install -m 0755 cellhunter_upload.sh ${D}${bindir}/ + install -d ${D}${datadir}/pixmaps + install -d ${D}${datadir}/applications + install -m 0644 cellhunter.desktop ${D}${datadir}/applications/cellhunter.desktop + install -m 0644 cellhunter.png ${D}${datadir}/pixmaps/cellhunter.png +} diff --git a/recipes/connman/mokonnect_svn.bb b/recipes/connman/mokonnect_svn.bb new file mode 100644 index 0000000000..dec35e029e --- /dev/null +++ b/recipes/connman/mokonnect_svn.bb @@ -0,0 +1,39 @@ +DESCRIPTION = "mokonnect is an e17 frontend to connmand" +HOMEPAGE = "http://www.assembla.com/wiki/show/shrdev" +AUTHOR = "Fate" +LICENSE = "GPLv2" +SECTION = "e/apps" +RDEPENDS = "python-elementary connman connman-plugin-wifi" + +PV = "0.4+svnr${SRCPV}" +PR = "r2" + +SRC_URI = "svn://subversion.assembla.com/svn/shrdev;module=Mokonnect/trunk;proto=http" + +S = "${WORKDIR}/Mokonnect/trunk" + +do_install() { + install -d ${D}${datadir}/mokonnect + for pyfile in *.py + do + install -m 644 $pyfile ${D}${datadir}/mokonnect/ + done + chmod 755 ${D}${datadir}/mokonnect/mokonnect.py + + install -d ${D}${datadir}/applications + install -m 644 mokonnect.desktop ${D}${datadir}/applications/ + + install -d ${D}${datadir}/pixmaps + install -m 644 mokonnect.png ${D}${datadir}/pixmaps/ + + install -d ${D}${bindir} + ln -sf ${datadir}/mokonnect/mokonnect.py ${D}${bindir}/mokonnect +} + +FILES_${PN} = "\ +${datadir}/mokonnect \ +${datadir}/applications/* \ +${datadir}/pixmaps/* \ +${bindir}/mokonnect \ +" + diff --git a/recipes/curl/curl-common.inc b/recipes/curl/curl-common.inc index 41c5d919c5..a57a0f6283 100644 --- a/recipes/curl/curl-common.inc +++ b/recipes/curl/curl-common.inc @@ -2,7 +2,7 @@ DESCRIPTION = "Command line tool and library for client-side URL transfers." LICENSE = "MIT" SECTION = "console/network" -SRC_URI = "http://curl.haxx.se/download/curl-${PV}.tar.bz2 \ +SRC_URI = "http://curl.haxx.se/download/curl-${PV}.tar.bz2;name=tarball \ file://pkgconfig_fix.patch;patch=1" S = "${WORKDIR}/curl-${PV}" diff --git a/recipes/curl/curl-native_7.18.2.bb b/recipes/curl/curl-native_7.18.2.bb index 1eef23b29c..e2e3a48505 100644 --- a/recipes/curl/curl-native_7.18.2.bb +++ b/recipes/curl/curl-native_7.18.2.bb @@ -1,4 +1,6 @@ require curl-common.inc inherit native DEPENDS = "zlib-native" -PR = "${INC_PR}.1" +SRC_URI += "file://curl-7.18.1-CVE-2009-2417.patch;patch=1;pnum=0" + +PR = "${INC_PR}.2" diff --git a/recipes/curl/curl-sdk_7.18.2.bb b/recipes/curl/curl-sdk_7.18.2.bb index f1fd34ff2c..e26c53299d 100644 --- a/recipes/curl/curl-sdk_7.18.2.bb +++ b/recipes/curl/curl-sdk_7.18.2.bb @@ -1,4 +1,6 @@ require curl-common.inc inherit sdk DEPENDS = "zlib-sdk" -PR = "${INC_PR}.1" +SRC_URI += "file://curl-7.18.1-CVE-2009-2417.patch;patch=1;pnum=0" + +PR = "${INC_PR}.2" diff --git a/recipes/curl/curl_7.18.2.bb b/recipes/curl/curl_7.18.2.bb index 84c0d07e61..21eaedc508 100644 --- a/recipes/curl/curl_7.18.2.bb +++ b/recipes/curl/curl_7.18.2.bb @@ -1,4 +1,6 @@ require curl-common.inc require curl-target.inc -PR = "${INC_PR}.1" +SRC_URI += "file://curl-7.18.1-CVE-2009-2417.patch;patch=1;pnum=0" + +PR = "${INC_PR}.2" diff --git a/recipes/curl/curl_7.19.5.bb b/recipes/curl/curl_7.19.5.bb index d0577b06aa..e4476107af 100644 --- a/recipes/curl/curl_7.19.5.bb +++ b/recipes/curl/curl_7.19.5.bb @@ -2,5 +2,7 @@ require curl-common.inc require curl-target.inc SRC_URI += "file://off_t_abi_fix.patch;patch=1;pnum=0 \ - file://curl-add_all_algorithms.patch;patch=1" -PR = "${INC_PR}.1" + file://curl-add_all_algorithms.patch;patch=1 \ + file://curl-7.19.5-CVE-2009-2417.patch;patch=1;pnum=0" + +PR = "${INC_PR}.2" diff --git a/recipes/curl/curl_7.19.7.bb b/recipes/curl/curl_7.19.7.bb new file mode 100644 index 0000000000..87e7ef9c28 --- /dev/null +++ b/recipes/curl/curl_7.19.7.bb @@ -0,0 +1,8 @@ +require curl-common.inc +require curl-target.inc + +SRC_URI += "file://off_t_abi_fix.patch;patch=1;pnum=0" +PR = "${INC_PR}" + +SRC_URI[tarball.md5sum] = "79a8fbb2eed5464b97bdf94bee109380" +SRC_URI[tarball.sha256sum] = "1a15f94ae3401e3bd6208ce64155c2577815019824bceae7fd3221a12bc54a70" diff --git a/recipes/curl/files/curl-7.18.1-CVE-2009-2417.patch b/recipes/curl/files/curl-7.18.1-CVE-2009-2417.patch new file mode 100644 index 0000000000..e7c24c0b6e --- /dev/null +++ b/recipes/curl/files/curl-7.18.1-CVE-2009-2417.patch @@ -0,0 +1,83 @@ +--- + lib/ssluse.c | 40 +++++++++++++++++++++++++++------------- + 1 file changed, 27 insertions(+), 13 deletions(-) + +--- lib/ssluse.c.orig ++++ lib/ssluse.c +@@ -1061,7 +1061,7 @@ static CURLcode verifyhost(struct connec + if(check->type == target) { + /* get data and length */ + const char *altptr = (char *)ASN1_STRING_data(check->d.ia5); +- int altlen; ++ size_t altlen = (size_t) ASN1_STRING_length(check->d.ia5); + + switch(target) { + case GEN_DNS: /* name/pattern comparison */ +@@ -1075,14 +1075,16 @@ static CURLcode verifyhost(struct connec + "I checked the 0.9.6 and 0.9.8 sources before my patch and + it always 0-terminates an IA5String." + */ +- if(cert_hostcheck(altptr, conn->host.name)) ++ if((altlen == strlen(altptr)) && ++ /* if this isn't true, there was an embedded zero in the name ++ string and we cannot match it. */ ++ cert_hostcheck(altptr, conn->host.name)) + matched = TRUE; + break; + + case GEN_IPADD: /* IP address comparison */ + /* compare alternative IP address if the data chunk is the same size + our server IP address is */ +- altlen = ASN1_STRING_length(check->d.ia5); + if((altlen == addrlen) && !memcmp(altptr, &addr, altlen)) + matched = TRUE; + break; +@@ -1122,18 +1124,27 @@ static CURLcode verifyhost(struct connec + string manually to avoid the problem. This code can be made + conditional in the future when OpenSSL has been fixed. Work-around + brought by Alexis S. L. Carvalho. */ +- if(tmp && ASN1_STRING_type(tmp) == V_ASN1_UTF8STRING) { +- j = ASN1_STRING_length(tmp); +- if(j >= 0) { +- peer_CN = OPENSSL_malloc(j+1); +- if(peer_CN) { +- memcpy(peer_CN, ASN1_STRING_data(tmp), j); +- peer_CN[j] = '\0'; ++ if(tmp) { ++ if(ASN1_STRING_type(tmp) == V_ASN1_UTF8STRING) { ++ j = ASN1_STRING_length(tmp); ++ if(j >= 0) { ++ peer_CN = OPENSSL_malloc(j+1); ++ if(peer_CN) { ++ memcpy(peer_CN, ASN1_STRING_data(tmp), j); ++ peer_CN[j] = '\0'; ++ } + } + } ++ else /* not a UTF8 name */ ++ j = ASN1_STRING_to_UTF8(&peer_CN, tmp); ++ ++ if(peer_CN && ((int)strlen((char *)peer_CN) != j)) { ++ /* there was a terminating zero before the end of string, this ++ cannot match and we return failure! */ ++ failf(data, "SSL: illegal cert name field"); ++ res = CURLE_PEER_FAILED_VERIFICATION; ++ } + } +- else /* not a UTF8 name */ +- j = ASN1_STRING_to_UTF8(&peer_CN, tmp); + } + + if(peer_CN == nulstr) +@@ -1151,7 +1162,10 @@ static CURLcode verifyhost(struct connec + } + #endif /* CURL_DOES_CONVERSIONS */ + +- if(!peer_CN) { ++ if(res) ++ /* error already detected, pass through */ ++ ; ++ else if(!peer_CN) { + failf(data, + "SSL: unable to obtain common name from peer certificate"); + return CURLE_PEER_FAILED_VERIFICATION; diff --git a/recipes/curl/files/curl-7.19.5-CVE-2009-2417.patch b/recipes/curl/files/curl-7.19.5-CVE-2009-2417.patch new file mode 100644 index 0000000000..f64232c502 --- /dev/null +++ b/recipes/curl/files/curl-7.19.5-CVE-2009-2417.patch @@ -0,0 +1,80 @@ +--- lib/ssluse.c-7.19.5 2009-08-03 16:01:58.000000000 +0200 ++++ lib/ssluse.c 2009-08-03 16:07:17.000000000 +0200 +@@ -1092,7 +1092,8 @@ + if(check->type == target) { + /* get data and length */ + const char *altptr = (char *)ASN1_STRING_data(check->d.ia5); +- size_t altlen; ++ size_t altlen = (size_t) ASN1_STRING_length(check->d.ia5); ++ + + switch(target) { + case GEN_DNS: /* name/pattern comparison */ +@@ -1106,14 +1107,16 @@ + "I checked the 0.9.6 and 0.9.8 sources before my patch and + it always 0-terminates an IA5String." + */ +- if(cert_hostcheck(altptr, conn->host.name)) ++ if((altlen == strlen(altptr)) && ++ /* if this isn't true, there was an embedded zero in the name ++ string and we cannot match it. */ ++ cert_hostcheck(altptr, conn->host.name)) + matched = TRUE; + break; + + case GEN_IPADD: /* IP address comparison */ + /* compare alternative IP address if the data chunk is the same size + our server IP address is */ +- altlen = (size_t) ASN1_STRING_length(check->d.ia5); + if((altlen == addrlen) && !memcmp(altptr, &addr, altlen)) + matched = TRUE; + break; +@@ -1153,18 +1156,27 @@ + string manually to avoid the problem. This code can be made + conditional in the future when OpenSSL has been fixed. Work-around + brought by Alexis S. L. Carvalho. */ +- if(tmp && ASN1_STRING_type(tmp) == V_ASN1_UTF8STRING) { +- j = ASN1_STRING_length(tmp); +- if(j >= 0) { +- peer_CN = OPENSSL_malloc(j+1); +- if(peer_CN) { +- memcpy(peer_CN, ASN1_STRING_data(tmp), j); +- peer_CN[j] = '\0'; ++ if(tmp) { ++ if(ASN1_STRING_type(tmp) == V_ASN1_UTF8STRING) { ++ j = ASN1_STRING_length(tmp); ++ if(j >= 0) { ++ peer_CN = OPENSSL_malloc(j+1); ++ if(peer_CN) { ++ memcpy(peer_CN, ASN1_STRING_data(tmp), j); ++ peer_CN[j] = '\0'; ++ } + } + } ++ else /* not a UTF8 name */ ++ j = ASN1_STRING_to_UTF8(&peer_CN, tmp); ++ ++ if(peer_CN && ((int)strlen((char *)peer_CN) != j)) { ++ /* there was a terminating zero before the end of string, this ++ cannot match and we return failure! */ ++ failf(data, "SSL: illegal cert name field"); ++ res = CURLE_PEER_FAILED_VERIFICATION; ++ } + } +- else /* not a UTF8 name */ +- j = ASN1_STRING_to_UTF8(&peer_CN, tmp); + } + + if(peer_CN == nulstr) +@@ -1182,7 +1194,10 @@ + } + #endif /* CURL_DOES_CONVERSIONS */ + +- if(!peer_CN) { ++ if(res) ++ /* error already detected, pass through */ ++ ; ++ else if(!peer_CN) { + failf(data, + "SSL: unable to obtain common name from peer certificate"); + return CURLE_PEER_FAILED_VERIFICATION; diff --git a/recipes/dictator/dictator_0.2.bb b/recipes/dictator/dictator_0.2.bb new file mode 100644 index 0000000000..663b376ea7 --- /dev/null +++ b/recipes/dictator/dictator_0.2.bb @@ -0,0 +1,18 @@ +DESCRIPTION = "Call recodering program for Neo Smartphones" +SECTION = "utils" +PRIORITY = "optional" +LICENSE = "GPL" +RDEPENDS = "python python-pygtk python-xml python-netclient pydes python-audio" +PR="r2" + +ARCH_pyring = "all" + +SRC_URI = "http://home.htw-berlin.de/~s0526295/dictator-0.2.tar.gz" + +inherit distutils + +S = ${WORKDIR}/dictator-${PV} + +FILES_${PN} += " ${sysconfdir}/dictator.conf ${datadir}" + + diff --git a/recipes/disko/disko_1.6.0.bb b/recipes/disko/disko_1.6.0.bb new file mode 100644 index 0000000000..f8741e9c1c --- /dev/null +++ b/recipes/disko/disko_1.6.0.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "Disko is an application framework, that can be used to develop GUI applications for embedded devices. It is closely connected to the DirectFB" +LICENSE = "LGPL" +PR = "r0" + +require disko.inc + +DEPENDS += "taglib directfb virtual/libx11 hal libxv libxxf86vm" + +SRC_URI = "http://www.diskohq.org/downloads/${PN}-${PV}.tar.gz \ + file://pkgconfig.patch;patch=1 \ + " + +do_compile() { + ${STAGING_BINDIR_NATIVE}/scons ${PARALLEL_MAKE} graphics=all prefix=${prefix}/ || \ + oefatal "scons build execution failed." +} diff --git a/recipes/disko/disko_git.bb b/recipes/disko/disko_git.bb index 9aa378ee5c..10b57ecbe4 100644 --- a/recipes/disko/disko_git.bb +++ b/recipes/disko/disko_git.bb @@ -1,22 +1,21 @@ DESCRIPTION = "Disko is an application framework, that can be used to develop GUI applications for embedded devices. It is closely connected to the DirectFB" LICENSE = "GPL" -PV = "1.6.0+gitr${SRCREV}" +PV = "1.6.1+gitr${SRCREV}" PR = "r0" +DEFAULT_PREFERENCE = "-1" + require disko.inc DEPENDS += "taglib directfb virtual/libx11 hal libxv libxxf86vm" SRC_URI = "git://www.diskohq.org/disko.git;protocol=git \ - file://linkpath.patch;patch=1 \ file://pkgconfig.patch;patch=1 \ " -SRCREV = "2aa9912fc32fcf24574e5053201e967dd59bceca" - S = "${WORKDIR}/git" do_compile() { - ${STAGING_BINDIR_NATIVE}/scons ${PARALLEL_MAKE} graphics=all PREFIX=${prefix} prefix=${prefix} || \ + ${STAGING_BINDIR_NATIVE}/scons ${PARALLEL_MAKE} graphics=all prefix=${prefix}/ || \ oefatal "scons build execution failed." } diff --git a/recipes/disko/files/linkpath.patch b/recipes/disko/files/linkpath.patch deleted file mode 100644 index e38b0748c4..0000000000 --- a/recipes/disko/files/linkpath.patch +++ /dev/null @@ -1,15 +0,0 @@ -Index: git/SConstruct -=================================================================== ---- git.orig/SConstruct 2009-09-11 01:44:37.000000000 +0200 -+++ git/SConstruct 2009-09-11 01:52:26.265319426 +0200 -@@ -161,8 +161,8 @@ - idir_inc = idir_prefix + '/include/disko' - idir_data = idir_prefix + '/share/disko' - --# link with -rpath --# env['LINKFLAGS'].extend(['-Wl,-rpath=' + env['prefix'] + '/lib/disko']) -+# link with -rpath-link -+# env['LINKFLAGS'].extend(['-Wl,-rpath-link==' + env['prefix'] + '/lib/disko']) - - # extra flags - if env['messages']: diff --git a/recipes/disko/files/pkgconfig.patch b/recipes/disko/files/pkgconfig.patch index 3e4a84bfe8..c405f0200e 100644 --- a/recipes/disko/files/pkgconfig.patch +++ b/recipes/disko/files/pkgconfig.patch @@ -1,8 +1,8 @@ -Index: git/SConstruct +Index: disko-1.6.0/SConstruct =================================================================== ---- git.orig/SConstruct 2009-09-11 01:53:54.000000000 +0200 -+++ git/SConstruct 2009-09-11 02:08:12.789878911 +0200 -@@ -585,6 +585,7 @@ +--- disko-1.6.0.orig/SConstruct 2009-10-14 12:54:36.000000000 +0200 ++++ disko-1.6.0/SConstruct 2009-11-17 18:22:49.656165471 +0100 +@@ -580,6 +580,7 @@ ####################################################################### # TODO: handle disko_pc_libs # if 'install' in BUILD_TARGETS: @@ -10,7 +10,7 @@ Index: git/SConstruct disko_pc = open('disko.pc', 'w') disko_pc_requires = 'libxml-2.0 >= 2.6, sigc++-2.0, libpng >= 1.2, freetype2' if env['LIBPATH']: -@@ -610,30 +611,43 @@ +@@ -602,50 +603,76 @@ if env.has_key('libdl'): disko_pc_libs += ' -ldl' @@ -54,17 +54,17 @@ Index: git/SConstruct if env['enable_sip']: disko_pc_requires += ', libpj' -@@ -641,18 +655,32 @@ + if not env['big_lib'] and not env['static_lib']: disko_pc_libs += ' -lmmssip' ++ PKG_CCFLAGS += '-D__HAVE_MMSSIP__ ' if('uuid' in env['LIBS']): disko_pc_requires += ', uuid' -+ PKG_CCFLAGS += '-D__HAVE_MMSSIP__ ' if env['enable_mail']: disko_pc_requires += ', vmime' + PKG_CCFLAGS += '-D__HAVE_VMIME__ ' - if env['mmscrypt']: + if env['enable_crypt']: disko_pc_requires += ', openssl' + PKG_CCFLAGS += '-D__HAVE_MMSCRYPT__ ' @@ -74,20 +74,20 @@ Index: git/SConstruct if 'mysql' in env['database']: disko_pc_requires += ', mysql' -+ PKG_CCFLAGS += '-D__ENABLE_MYSQL__ ' -+ + + if 'odbc' in env['database']: + PKG_CCFLAGS += '-D__ENABLE_FREETDS__ ' + + if env['messages']: -+ PKG_CCFLAGS += '-D__ENABLE_LOG__ ' ++ PKG_CCFLAGS += '-D__ENABLE_LOG__ ' + + if env['debug']: -+ PKG_CCFLAGS += '-D__ENABLE_DEBUG__ ' - ++ PKG_CCFLAGS += '-D__ENABLE_DEBUG__ ' ++ disko_pc.write('prefix=' + env['prefix'] + '\n') disko_pc.write('exec_prefix=${prefix}\n') -@@ -664,13 +692,7 @@ + disko_pc.write('libdir=${exec_prefix}/lib/disko\n') +@@ -656,13 +683,7 @@ disko_pc.write('Requires: ' + disko_pc_requires + '\n') disko_pc.write('Libs: -L${libdir} ' + disko_pc_libs + '\n') disko_pc.write('Cflags: -I${includedir}/ ') diff --git a/recipes/dri/glamo-dri-tests_git.bb b/recipes/dri/glamo-dri-tests_git.bb new file mode 100644 index 0000000000..81e0146e90 --- /dev/null +++ b/recipes/dri/glamo-dri-tests_git.bb @@ -0,0 +1,17 @@ +DEPENDS = "libdrm virtual/libx11 libxext" + +PV = "1.0.0+gitr${SRCREV}" + +SRC_URI = "git://git.bitwiz.org.uk/glamo-dri-tests.git;protocol=git;branch=master" + +inherit pkgconfig + +do_compile_prepend() { + export CROSS_CFLAGS=`pkg-config --cflags libdrm_glamo` +} + +do_install() { + PREFIX=${D}/usr make install +} + +S = "${WORKDIR}/git" diff --git a/recipes/e17/e-tasks_svn.bb b/recipes/e17/e-tasks_svn.bb new file mode 100644 index 0000000000..4f27744717 --- /dev/null +++ b/recipes/e17/e-tasks_svn.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "tasks app for openmoko phones based on elementary" +HOMEPAGE = "http://code.google.com/p/e-tasks/" +AUTHOR = "cchandel" +LICENSE = "GPLv2" +SECTION = "e/apps" +#DEPENDS = "elementary eina edbus" + +PV = "0.0.1+svnr${SRCPV}" +PR = "r0" + +SRC_URI = "svn://e-tasks.googlecode.com/svn/trunk;module=.;proto=http" +S = "${WORKDIR}" + +inherit autotools + diff --git a/recipes/e17/e-wm/wizard-module-skipping.patch b/recipes/e17/e-wm/wizard-module-skipping.patch new file mode 100644 index 0000000000..d124325b3b --- /dev/null +++ b/recipes/e17/e-wm/wizard-module-skipping.patch @@ -0,0 +1,63 @@ +Index: e/src/modules/wizard/Makefile.am +=================================================================== +--- e/src/modules/wizard/Makefile.am (revision 43860) ++++ e/src/modules/wizard/Makefile.am (working copy) +@@ -6,7 +6,7 @@ + files_DATA = \ + e-module-$(MODULE).edj module.desktop + +-EXTRA_DIST = $(files_DATA) page_040.c page_050.c page_060.c ++EXTRA_DIST = $(files_DATA) page_030.c page_040.c page_050.c page_060.c page_070.c page_080.c + + # the module .so file + INCLUDES = -I. \ +@@ -21,9 +21,6 @@ + page_000.la \ + page_010.la \ + page_020.la \ +- page_030.la \ +- page_070.la \ +- page_080.la \ + page_200.la + + ### disabled because profile selector really does the job. code here just for +@@ -60,10 +57,10 @@ + page_020_la_DEPENDENCIES = $(top_builddir)/config.h + + #Choose Menus +-page_030_la_SOURCES = page_030.c +-page_030_la_LIBADD = @e_libs@ @dlopen_libs@ +-page_030_la_LDFLAGS = -module -avoid-version +-page_030_la_DEPENDENCIES = $(top_builddir)/config.h ++#page_030_la_SOURCES = page_030.c ++#page_030_la_LIBADD = @e_libs@ @dlopen_libs@ ++#page_030_la_LDFLAGS = -module -avoid-version ++#page_030_la_DEPENDENCIES = $(top_builddir)/config.h + + #page_040_la_SOURCES = page_040.c + #page_040_la_LIBADD = @e_libs@ @dlopen_libs@ +@@ -81,16 +78,16 @@ + #page_060_la_DEPENDENCIES = $(top_builddir)/config.h + + #Choose appliactions +-page_070_la_SOURCES = page_070.c +-page_070_la_LIBADD = @e_libs@ @dlopen_libs@ +-page_070_la_LDFLAGS = -module -avoid-version +-page_070_la_DEPENDENCIES = $(top_builddir)/config.h ++#page_070_la_SOURCES = page_070.c ++#page_070_la_LIBADD = @e_libs@ @dlopen_libs@ ++#page_070_la_LDFLAGS = -module -avoid-version ++#page_070_la_DEPENDENCIES = $(top_builddir)/config.h + + #Choose quick launch +-page_080_la_SOURCES = page_080.c +-page_080_la_LIBADD = @e_libs@ @dlopen_libs@ +-page_080_la_LDFLAGS = -module -avoid-version +-page_080_la_DEPENDENCIES = $(top_builddir)/config.h ++#page_080_la_SOURCES = page_080.c ++#page_080_la_LIBADD = @e_libs@ @dlopen_libs@ ++#page_080_la_LDFLAGS = -module -avoid-version ++#page_080_la_DEPENDENCIES = $(top_builddir)/config.h + + page_200_la_SOURCES = page_200.c + page_200_la_LIBADD = @e_libs@ @dlopen_libs@ diff --git a/recipes/e17/e-wm_svn.bb b/recipes/e17/e-wm_svn.bb index de0f48f059..a935728e02 100644 --- a/recipes/e17/e-wm_svn.bb +++ b/recipes/e17/e-wm_svn.bb @@ -3,7 +3,7 @@ DEPENDS = "eet evas ecore edje efreet edbus" LICENSE = "MIT BSD" SRCNAME = "e" PV = "0.16.999.060+svnr${SRCPV}" -PR = "r6" +PR = "r7" inherit e update-alternatives @@ -16,6 +16,11 @@ SRC_URI += "\ SRC_URI_append_openmoko = " file://illume-disable-screensaver.patch;patch=1" +SRC_URI_append_shr = " \ + file://illume-disable-screensaver.patch;patch=1 \ + file://wizard-module-skipping.patch;patch=1 \ +" + EXTRA_OECONF = "\ --with-edje-cc=${STAGING_BINDIR_NATIVE}/edje_cc \ --with-eet-eet=${STAGING_BINDIR_NATIVE}/eet \ @@ -75,6 +80,7 @@ PACKAGES =+ "\ ${PN}-input-methods \ ${PN}-sysactions \ ${PN}-utils \ + ${PN}-menu \ " RRECOMMENDS_${PN} = "\ @@ -84,6 +90,7 @@ RRECOMMENDS_${PN} = "\ ${PN}-other \ ${PN}-input-methods \ ${PN}-sysactions \ + ${PN}-menu \ " PACKAGE_ARCH_${PN}-config-default = "all" @@ -101,6 +108,7 @@ PACKAGE_ARCH_${PN}-icons = "all" PACKAGE_ARCH_${PN}-other = "all" PACKAGE_ARCH_${PN}-input-methods = "all" PACKAGE_ARCH_${PN}-sysactions = "all" +PACKAGE_ARCH_${PN}-menu = "all" FILES_${PN} = "\ ${bindir}/* \ @@ -135,6 +143,7 @@ FILES_${PN}-other = "${datadir}/enlightenment/data/other" FILES_${PN}-input-methods = "${datadir}/enlightenment/data/input_methods" FILES_${PN}-sysactions = "${sysconfdir}/enlightenment/sysactions.conf" FILES_${PN}-utils = "${libdir}/enlightenment/utils/*" +FILES_${PN}-menu = "${sysconfdir}/xdg/menus/applications.menu" RRECOMMENDS_${PN}-config-default = "${PN}-theme-default" RRECOMMENDS_${PN}-config-illume = "${PN}-theme-illume" @@ -160,7 +169,8 @@ FILES_${PN}-doc += "\ ${datadir}/enlightenment/doc \ " -CONFFILES_${PN} = "${sysconfdir}/xdg/menus/applications.menu" +CONFFILES_${PN}-menu = "${sysconfdir}/xdg/menus/applications.menu" +CONFFILES_${PN}-sysactions = "/etc/enlightenment/sysactions.conf" ALTERNATIVE_PATH = "${bindir}/enlightenment_start.oe" ALTERNATIVE_NAME = "x-window-manager" diff --git a/recipes/e17/elmdentica_svn.bb b/recipes/e17/elmdentica_svn.bb new file mode 100644 index 0000000000..5988d904ed --- /dev/null +++ b/recipes/e17/elmdentica_svn.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "A indenti.ca client for E" +DEPENDS = "glib-2.0 gconf libxml2 curl elementary sqlite3-native" +LICENSE = "GPLv3+" +SECTION = "e/apps" +HOMEPAGE = "http://elmdentica.googlecode.com" +AUTHOR = "seabra" +PV = "0.7.0+svnr${SRCPV}" +PR = "r0" + + +SRC_URI = "svn://elmdentica.googlecode.com/svn;module=trunk;proto=http" + +S = "${WORKDIR}/trunk" + +inherit autotools pkgconfig diff --git a/recipes/e17/eve_svn.bb b/recipes/e17/eve_svn.bb new file mode 100644 index 0000000000..d1a0e4775a --- /dev/null +++ b/recipes/e17/eve_svn.bb @@ -0,0 +1,18 @@ +DESCRIPTION = " Enlightenment webbrowser" +LICENSE = "GPL" +DEPENDS = "webkit-efl evas ecore edje" +PV = "0.0.1+svnr${SRCPV}" +PR = "r3" + +LDFLAGS += "-lstdc++" + +inherit e + +SRC_URI = "svn://svn.enlightenment.org/svn/e/trunk/PROTO;module=eve;proto=http \ +" + +S = "${WORKDIR}/eve" + +RDEPENDS_${PN} = "${PN}-themes" + + diff --git a/recipes/ebrainy/ebrainy_svn.bb b/recipes/ebrainy/ebrainy_svn.bb new file mode 100644 index 0000000000..699aa1bdff --- /dev/null +++ b/recipes/ebrainy/ebrainy_svn.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "Store knowledge in form of questions and answers and train them." +HOMEPAGE = "http://code.google.com/p/ebrainy/" +AUTHOR = "quickdev" +LICENSE = "GPL" +SECTION = "e/apps" +RDEPENDS = "elementary sqlite3 python-sqlalchemy python-mysqldb python-netserver" + +PV = "0.0.1+svnr${SRCPV}" +PR = "r1" +SRC_URI = "svn://ebrainy.googlecode.com/svn/trunk;module=.;proto=http" +S = "${WORKDIR}" + +inherit distutils +FILES_${PN} += "${datadir}/applications/ebrainy.desktop" + diff --git a/recipes/efl1/ecore.inc b/recipes/efl1/ecore.inc index 4cbbc01774..ef3ba55d55 100644 --- a/recipes/efl1/ecore.inc +++ b/recipes/efl1/ecore.inc @@ -1,6 +1,7 @@ DESCRIPTION = "Ecore is the Enlightenment application framework library" LICENSE = "MIT BSD" -DEPENDS = "curl eet evas tslib libxtst libxcomposite libxinerama libxscrnsaver libxdamage libxrandr libxcursor libxprintutil" +DEPENDS = "gettext-native virtual/libiconv curl eet evas tslib glib-2.0 \ + libxtst libxcomposite libxinerama libxscrnsaver libxdamage libxrandr libxcursor libxprintutil" # optional # DEPENDS += "directfb libsdl-x11 openssl virtual/libiconv" PV = "0.9.9.060+svnr${SRCPV}" diff --git a/recipes/efl1/ecore/exit_uclibc.patch b/recipes/efl1/ecore/exit_uclibc.patch new file mode 100644 index 0000000000..dea010c116 --- /dev/null +++ b/recipes/efl1/ecore/exit_uclibc.patch @@ -0,0 +1,26 @@ +Index: ecore/src/lib/ecore_con/ecore_con_dns.c +=================================================================== +--- ecore.orig/src/lib/ecore_con/ecore_con_dns.c 2009-11-14 00:12:04.279051754 +0100 ++++ ecore/src/lib/ecore_con/ecore_con_dns.c 2009-11-14 00:14:41.685708230 +0100 +@@ -135,7 +135,7 @@ + write(fd[1], "", 1); + } + close(fd[1]); +-# ifdef __USE_ISOC99 ++# if defined(__USE_ISOC99) && !defined(__UCLIBC__) + _Exit(0); + # else + _exit(0); +Index: ecore/src/lib/ecore_con/ecore_con_info.c +=================================================================== +--- ecore.orig/src/lib/ecore_con/ecore_con_info.c 2009-11-14 00:14:56.056955719 +0100 ++++ ecore/src/lib/ecore_con/ecore_con_info.c 2009-11-14 00:16:40.035696191 +0100 +@@ -243,7 +243,7 @@ + freeaddrinfo(result); + err = write(fd[1], "", 1); + close(fd[1]); +-# ifdef __USE_ISOC99 ++# if defined(__USE_ISOC99) && !defined(__UCLIBC__) + _Exit(0); + # else + _exit(0); diff --git a/recipes/efl1/ecore/iconv.patch b/recipes/efl1/ecore/iconv.patch new file mode 100644 index 0000000000..16524917b2 --- /dev/null +++ b/recipes/efl1/ecore/iconv.patch @@ -0,0 +1,96 @@ +Index: ecore/configure.ac +=================================================================== +--- ecore.orig/configure.ac 2009-11-13 13:16:18.000000000 +0100 ++++ ecore/configure.ac 2009-11-19 01:09:28.469345164 +0100 +@@ -29,6 +29,9 @@ + AM_GNU_GETTEXT_VERSION([0.12.1]) + AM_GNU_GETTEXT([external]) + ++# explicit call AM_ICONV, because gettext is used in a different way ++AM_ICONV ++ + release="ver-pre-svn-04" + case "$host_os" in + mingw32ce* | cegcc*) +@@ -378,48 +381,6 @@ + requirements_ecore="glib-2.0 ${requirements_ecore}" + fi + +- +-# iconv library (ecore_txt) +- +-iconv_cflags="" +-iconv_libs="" +-have_iconv="no" +-AC_ARG_WITH([iconv-link], +- AC_HELP_STRING([--with-iconv-link=ICONV_LINK], [explicitly specify an iconv link option]), +- [ +- iconv_libs=$withval +- have_iconv="yes" +- ] +-) +- +-if test "x${have_iconv}" = "xno" ; then +- AC_CHECK_LIB(c, iconv, +- [have_iconv="yes"] ) +- +- if ! test "x${have_iconv}" = "xyes" ; then +- AC_CHECK_LIB(iconv, iconv, +- [ +- iconv_libs="-liconv" +- have_iconv="yes" +- ]) +- fi +- +- if test "x$have_iconv" != "xyes"; then +- AC_CHECK_LIB(iconv_plug, iconv, +- [ +- iconv_libs="-liconv -liconv_plug" +- have_iconv="yes" +- ]) +- fi +- +-fi +-AC_MSG_CHECKING(for explicit iconv link options) +-AC_MSG_RESULT($iconv_libs) +- +-AC_SUBST(iconv_cflags) +-AC_SUBST(iconv_libs) +- +- + # SDL library (ecore_sdl) + + have_sdl="no" +@@ -790,7 +751,7 @@ + ECORE_CHECK_MODULE([Job], [${want_ecore_job}]) + + # ecore_txt +-ECORE_CHECK_MODULE([Txt], [${want_ecore_txt}], [$have_iconv]) ++ECORE_CHECK_MODULE([Txt], [${want_ecore_txt}]) + + # ecore_con + ECORE_CHECK_MODULE([Con], [${want_ecore_con}]) +Index: ecore/src/lib/ecore_txt/Makefile.am +=================================================================== +--- ecore.orig/src/lib/ecore_txt/Makefile.am 2009-11-13 13:16:12.000000000 +0100 ++++ ecore/src/lib/ecore_txt/Makefile.am 2009-11-19 01:08:47.619349166 +0100 +@@ -3,8 +3,7 @@ + AM_CPPFLAGS = \ + -I$(top_srcdir)/src/lib/ecore \ + -I$(top_builddir)/src/lib/ecore \ +-@EFL_ECORE_TXT_BUILD@ \ +-@iconv_cflags@ ++@EFL_ECORE_TXT_BUILD@ + + if BUILD_ECORE_TXT + +@@ -16,8 +15,7 @@ + libecore_txt_la_SOURCES = \ + ecore_txt.c + +-libecore_txt_la_LIBADD = @iconv_libs@ \ +-@EINA_LIBS@ ++libecore_txt_la_LIBADD = $(LTLIBICONV) @EINA_LIBS@ + + libecore_txt_la_LDFLAGS = -no-undefined @lt_enable_auto_import@ -version-info @version_info@ @ecore_txt_release_info@ + diff --git a/recipes/efl1/ecore_svn.bb b/recipes/efl1/ecore_svn.bb index b9f01ba8b3..5be2dc80f1 100644 --- a/recipes/efl1/ecore_svn.bb +++ b/recipes/efl1/ecore_svn.bb @@ -1,32 +1,35 @@ require ecore.inc -PR = "r5" +PR = "r6" + +SRC_URI += "file://iconv.patch;patch=1 \ + file://exit_uclibc.patch;patch=1 \ + " EXTRA_OECONF = "\ --x-includes=${STAGING_INCDIR}/X11 \ --x-libraries=${STAGING_LIBDIR} \ --enable-simple-x11 \ -\ --enable-ecore-txt \ --enable-ecore-config \ - --disable-ecore-x-xcb \ --enable-ecore-x \ --enable-ecore-job \ - --disable-ecore-directfb \ - --disable-ecore-sdl \ --enable-ecore-fb \ --enable-ecore-evas \ --enable-ecore-evas-software-16-x11 \ - --disable-ecore-evas-x11-gl \ --enable-ecore-evas-xrender \ - --disable-ecore-evas-dfb \ - --disable-ecore-evas-sdl \ - --disable-openssl \ --enable-abstract-sockets \ --enable-ecore-con \ --enable-ecore-ipc \ --enable-ecore-file \ --enable-inotify \ - --disable-poll \ --enable-curl \ --disable-ecore-desktop \ + --disable-ecore-x-xcb \ + --disable-ecore-directfb \ + --disable-ecore-sdl \ + --disable-ecore-evas-x11-gl \ + --disable-ecore-evas-dfb \ + --disable-ecore-evas-sdl \ + --disable-openssl \ + --disable-poll \ " diff --git a/recipes/efl1/elementary_svn.bb b/recipes/efl1/elementary_svn.bb index 06f98bbed3..e82272dbed 100644 --- a/recipes/efl1/elementary_svn.bb +++ b/recipes/efl1/elementary_svn.bb @@ -2,7 +2,7 @@ DESCRIPTION = "EFL based widget set for mobile devices" LICENSE = "LGPL" DEPENDS = "efreet evas ecore edje eet edbus" PV = "0.0.0+svnr${SRCPV}" -PR = "r4" +PR = "r5" inherit efl @@ -11,8 +11,7 @@ EXTRA_OECONF = "--with-edje-cc=${STAGING_BINDIR_NATIVE}/edje_cc" SRC_URI = "svn://svn.enlightenment.org/svn/e/trunk/TMP/st;module=elementary;proto=http" S = "${WORKDIR}/elementary" -RDEPENDS_${PN} = "elementary-themes" -RRECOMMENDS_${PN} = "elementary-tests" +RSUGGESTS_${PN} = "elementary-tests" do_compile_append() { sed -i -e s:${STAGING_DIR_TARGET}::g \ diff --git a/recipes/efl1/illume-keyboard-arabic_git.bb b/recipes/efl1/illume-keyboard-arabic_git.bb index 900c745fe5..fcc01c905a 100644 --- a/recipes/efl1/illume-keyboard-arabic_git.bb +++ b/recipes/efl1/illume-keyboard-arabic_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Mohammad Fahmi / Tom Hacohen" DESCRIPTION = "Illume keyboard with arabic layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-browse_git.bb b/recipes/efl1/illume-keyboard-browse_git.bb index 4eda497c4c..b9f5e750d1 100644 --- a/recipes/efl1/illume-keyboard-browse_git.bb +++ b/recipes/efl1/illume-keyboard-browse_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Pander" DESCRIPTION = "Illume keyboard with a layout optimized for browsing" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-danish_git.bb b/recipes/efl1/illume-keyboard-danish_git.bb index 5a042d9c6b..b824a9e9d9 100644 --- a/recipes/efl1/illume-keyboard-danish_git.bb +++ b/recipes/efl1/illume-keyboard-danish_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Esben Damgaard" DESCRIPTION = "Illume keyboard with danish layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-default-alt_git.bb b/recipes/efl1/illume-keyboard-default-alt_git.bb index f367f11f79..4ceca530ae 100644 --- a/recipes/efl1/illume-keyboard-default-alt_git.bb +++ b/recipes/efl1/illume-keyboard-default-alt_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Pander" DESCRIPTION = "Illume keyboard with an alternative default layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-dutch_git.bb b/recipes/efl1/illume-keyboard-dutch_git.bb index 2eb137db85..15d0022de8 100644 --- a/recipes/efl1/illume-keyboard-dutch_git.bb +++ b/recipes/efl1/illume-keyboard-dutch_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Pander" DESCRIPTION = "Illume keyboard with dutch layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-dvorak_git.bb b/recipes/efl1/illume-keyboard-dvorak_git.bb index dd6b96c31e..61c58b406b 100644 --- a/recipes/efl1/illume-keyboard-dvorak_git.bb +++ b/recipes/efl1/illume-keyboard-dvorak_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Gabor Adam TOTH" DESCRIPTION = "Illume keyboard with dvorak layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-french_git.bb b/recipes/efl1/illume-keyboard-french_git.bb index 8c8041a9b1..5e957e98e1 100644 --- a/recipes/efl1/illume-keyboard-french_git.bb +++ b/recipes/efl1/illume-keyboard-french_git.bb @@ -1,5 +1,5 @@ DESCRIPTION = "Illume keyboard with french layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-german_git.bb b/recipes/efl1/illume-keyboard-german_git.bb index a1ad5481df..7120dea750 100644 --- a/recipes/efl1/illume-keyboard-german_git.bb +++ b/recipes/efl1/illume-keyboard-german_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Florian Hackenberger" DESCRIPTION = "Illume keyboard with german layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-hebrew_git.bb b/recipes/efl1/illume-keyboard-hebrew_git.bb index e7cda399f2..cbd47eaad3 100644 --- a/recipes/efl1/illume-keyboard-hebrew_git.bb +++ b/recipes/efl1/illume-keyboard-hebrew_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Tom Hacohen" DESCRIPTION = "Illume keyboard with hebrew layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-numeric-alt_git.bb b/recipes/efl1/illume-keyboard-numeric-alt_git.bb index 92090d925d..8abfb8f020 100644 --- a/recipes/efl1/illume-keyboard-numeric-alt_git.bb +++ b/recipes/efl1/illume-keyboard-numeric-alt_git.bb @@ -1,6 +1,6 @@ AUTHOR = "Pander" DESCRIPTION = "Illume keyboard with an alternative numeric layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-russian-terminal_git.bb b/recipes/efl1/illume-keyboard-russian-terminal_git.bb index 7b126bbf09..b625e937c2 100644 --- a/recipes/efl1/illume-keyboard-russian-terminal_git.bb +++ b/recipes/efl1/illume-keyboard-russian-terminal_git.bb @@ -1,6 +1,6 @@ AUTHOR = "lucky" DESCRIPTION = "Illume keyboard with russian layout for the Terminal" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/efl1/illume-keyboard-russian_git.bb b/recipes/efl1/illume-keyboard-russian_git.bb index c067871848..ed0644ee58 100644 --- a/recipes/efl1/illume-keyboard-russian_git.bb +++ b/recipes/efl1/illume-keyboard-russian_git.bb @@ -1,6 +1,6 @@ AUTHOR = "lucky" DESCRIPTION = "Illume keyboard with russian layout" -PV = "0.0+gitr${SRCPV}" +PV = "0.0+gitr${SRCREV}" PE = "1" PR = "r0" diff --git a/recipes/enotes/enotes_svn.bb b/recipes/enotes/enotes_svn.bb new file mode 100644 index 0000000000..991f188154 --- /dev/null +++ b/recipes/enotes/enotes_svn.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "todo list manager in EFL" +HOMEPAGE = "http://enotes.googlecode.com" +AUTHOR = "furester" +LICENSE = "GPL" +SECTION = "e/apps" +DEPENDS = "elementary evas sqlite3" + +PV = "0.2.2+svnr${SRCPV}" +PR = "r1" +SRC_URI = "svn://enotes.googlecode.com/svn/trunk;module=.;proto=http" +S = "${WORKDIR}" + +inherit autotools + + diff --git a/recipes/erminig/erminig_3.0.3.bb b/recipes/erminig/erminig_3.0.3.bb new file mode 100644 index 0000000000..b061c321b8 --- /dev/null +++ b/recipes/erminig/erminig_3.0.3.bb @@ -0,0 +1,20 @@ +DESCRIPTION = "Erminig is a python application that provides two-way synchronization between Google Calendar and GPE Calendar." +HOMEPAGE = "https://garage.maemo.org/projects/erminig/" +SECTION = "devel/python" +LICENSE = "GPL" +PV="3.0.3" +PR="r0" + +SRC_URI = "https://garage.maemo.org/frs/download.php/4737/erminig_3.0.3-3.tar.gz" +S = "${WORKDIR}/${PN}-${PV}" + +inherit distutils + +RDEPENDS_${PN} = "\ + python-pygtk \ + python-pysqlite2 \ + +" +FILES_${PN} = "${datadir}" + + diff --git a/recipes/ffalarms/atd-over-fso/atd-alarm-glue.patch b/recipes/ffalarms/atd-over-fso/atd-alarm-glue.patch new file mode 100644 index 0000000000..66a268ce2b --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/atd-alarm-glue.patch @@ -0,0 +1,14 @@ +--- Makefile-orig 2003-03-23 19:46:26.000000000 +0100 ++++ Makefile 2009-03-16 19:39:39.000000000 +0100 +@@ -10,6 +10,11 @@ + rm -f atq + ln -s atd atq + ++atd.o: atd-alarm-glue.h ++ ++atd-alarm-glue.h: atd-alarm.xml ++ dbus-binding-tool --prefix=atd_alarm --mode=glib-server $< --output=$@ ++ + dist: atd + cp atd dist/usr/sbin/ + rm dist/usr/bin/atq diff --git a/recipes/ffalarms/atd-over-fso/atd-over-fso.conf.patch b/recipes/ffalarms/atd-over-fso/atd-over-fso.conf.patch new file mode 100644 index 0000000000..6b6bebaa0f --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/atd-over-fso.conf.patch @@ -0,0 +1,13 @@ +--- /dev/null 2009-03-26 10:57:36.511814417 +0100 ++++ dist/etc/dbus-1/system.d/atd-over-fso.conf 2009-03-29 03:15:37.000000000 +0200 +@@ -0,0 +1,10 @@ ++<!DOCTYPE busconfig PUBLIC "-//freedesktop//DTD D-BUS Bus Configuration 1.0//EN" ++ "http://www.freedesktop.org/standards/dbus/1.0/busconfig.dtd"> ++<busconfig> ++ <policy user="root"> ++ <allow own="org.openmoko.projects.ffalarms.atd"/> ++ <allow send_path="/"/> ++ <allow send_destination="org.openmoko.projects.ffalarms.atd"/> ++ <allow receive_sender="org.openmoko.projects.ffalarms.atd"/> ++ </policy> ++</busconfig> diff --git a/recipes/ffalarms/atd-over-fso/atd-startup-restart.patch b/recipes/ffalarms/atd-over-fso/atd-startup-restart.patch new file mode 100644 index 0000000000..adea0e1178 --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/atd-startup-restart.patch @@ -0,0 +1,17 @@ +--- dist/etc/init.d/atd-orig 2009-03-29 14:20:09.000000000 +0200 ++++ dist/etc/init.d/atd 2009-03-29 14:37:31.000000000 +0200 +@@ -20,9 +20,13 @@ + rm -f /var/spool/at/trigger + echo "." + ;; ++ restart) ++ $0 stop ++ $0 start ++ ;; + + *) +- echo "Usage: /etc/init.d/atd {start|stop}" ++ echo "Usage: /etc/init.d/atd {start|stop|restart}" + exit 1 + esac + diff --git a/recipes/ffalarms/atd-over-fso/atd-startup.patch b/recipes/ffalarms/atd-over-fso/atd-startup.patch new file mode 100644 index 0000000000..dc4c1195d1 --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/atd-startup.patch @@ -0,0 +1,39 @@ +? atd-startup.patch +Index: ChangeLog +=================================================================== +RCS file: /cvs/apps/atd/ChangeLog,v +retrieving revision 1.2 +diff -B -b -u -r1.2 ChangeLog +--- ChangeLog 2 Feb 2004 15:30:39 -0000 1.2 ++++ ChangeLog 13 Jan 2006 11:54:00 -0000 +@@ -1,3 +1,8 @@ ++2006-01-13 Florian Boor <florian@kernelconcepts.de> ++ ++ * dist/etc/init.d/atd: Remove obsolete --oknodo and add -m to ++ enable pidfile. ++ + V0.7 + - removed waiting for childpid after having spawned an event + this caused trouble with events rescheduling themselves +Index: dist/etc/init.d/atd +=================================================================== +RCS file: /cvs/apps/atd/dist/etc/init.d/atd,v +retrieving revision 1.3 +diff -B -b -u -r1.3 atd +--- dist/etc/init.d/atd 24 Jan 2003 15:09:03 -0000 1.3 ++++ dist/etc/init.d/atd 13 Jan 2006 11:54:00 -0000 +@@ -11,12 +11,12 @@ + echo -n "Starting at daemon: atd" + mkdir -p /var/spool/at + chmod a+w /var/spool/at +- start-stop-daemon --start --quiet --pidfile /var/run/atd.pid --exec /usr/sbin/atd /var/spool/at >/dev/null 2>&1 & ++ start-stop-daemon --start --quiet -m --pidfile /var/run/atd.pid --exec /usr/sbin/atd /var/spool/at >/dev/null 2>&1 & + echo "." + ;; + stop) + echo -n "Stopping at daemon: atd" +- start-stop-daemon --stop --quiet --oknodo --pidfile /var/run/atd.pid --exec /usr/sbin/atd ++ start-stop-daemon --stop --quiet --pidfile /var/run/atd.pid --exec /usr/sbin/atd + rm -f /var/spool/at/trigger + echo "." + ;; diff --git a/recipes/ffalarms/atd-over-fso/init.d-atd-restart.patch b/recipes/ffalarms/atd-over-fso/init.d-atd-restart.patch new file mode 100644 index 0000000000..11742d9937 --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/init.d-atd-restart.patch @@ -0,0 +1,17 @@ +--- S97atd-orig 2009-03-29 11:59:02.000000000 +0200 ++++ S97atd 2009-03-29 12:03:07.000000000 +0200 +@@ -20,9 +20,13 @@ + rm -f /var/spool/at/trigger + echo "." + ;; ++ restart) ++ $0 stop ++ $0 start ++ ;; + + *) +- echo "Usage: /etc/init.d/atd {start|stop}" ++ echo "Usage: /etc/init.d/atd {start|stop|restart}" + exit 1 + esac + diff --git a/recipes/ffalarms/atd-over-fso/no-oknodo.patch b/recipes/ffalarms/atd-over-fso/no-oknodo.patch new file mode 100644 index 0000000000..e1eb2528ac --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/no-oknodo.patch @@ -0,0 +1,11 @@ +--- atd/dist/etc/init.d/atd.orig 2003-01-24 07:09:03.000000000 -0800 ++++ atd/dist/etc/init.d/atd 2005-09-22 14:50:55.000000000 -0700 +@@ -16,7 +16,7 @@ case "$1" in + ;; + stop) + echo -n "Stopping at daemon: atd" +- start-stop-daemon --stop --quiet --oknodo --pidfile /var/run/atd.pid --exec /usr/sbin/atd ++ start-stop-daemon --stop --quiet --pidfile /var/run/atd.pid --exec /usr/sbin/atd + rm -f /var/spool/at/trigger + echo "." + ;; diff --git a/recipes/ffalarms/atd-over-fso/run-over-fso.patch b/recipes/ffalarms/atd-over-fso/run-over-fso.patch new file mode 100644 index 0000000000..425aca45fb --- /dev/null +++ b/recipes/ffalarms/atd-over-fso/run-over-fso.patch @@ -0,0 +1,505 @@ +--- src/atd.c-orig 2004-02-02 16:30:39.000000000 +0100 ++++ src/atd.c 2009-09-15 22:57:35.000000000 +0200 +@@ -7,10 +7,12 @@ + * Copyright (C) 1996, Paul Gortmaker + * Copyright (C) 2001, Russell Nelson + * Copyright (C) 2002-2004, Nils Faerber <nils@handhelds.org> ++ * Copyright (C) 2009, Łukasz Pankowski <lukpank@o2.pl> + * + * Released under the GNU General Public License, version 2, + * included herein by reference. + * ++ * Łukasz Pankowski: modified to work over org.freesmartphone.otimed + */ + + #include <stdio.h> +@@ -31,6 +33,16 @@ + #include <dirent.h> + #include <pwd.h> + #include <signal.h> ++#include <glib.h> ++#include <dbus/dbus-glib.h> ++#include <dbus/dbus-glib-lowlevel.h> ++#include <dbus/dbus.h> ++#include "atd-alarm.h" ++#include "atd-alarm-glue.h" ++ ++#define DBUS_NAME "org.openmoko.projects.ffalarms.atd" ++#define DBUS_RECONNECT_TIMEOUT 10 ++#define OTIMED "org.freesmartphone.otimed" + + + /* globals... */ +@@ -62,33 +74,23 @@ + } + + +-void waitfor (time_t t) ++void rtc_set_time (void) + { +-int rtcfd, tfd, retval= 0; +-unsigned long data; ++int rtcfd, retval= 0; + struct rtc_time rtc_tm; +-time_t now, then; ++time_t now; + struct tm *tm; +-struct timeval tv; +-int nfds; +-fd_set afds; + + #ifdef DEBUG +- printf("waitfor %ld\n", t); ++ printf("rtc_set_time\n"); + #endif + rtcfd = open ("/dev/rtc", O_RDONLY); + + if (rtcfd == -1) { ++ /* treat it as warning, may be should retry? */ + perror("/dev/rtc"); +- exit(errno); +- } +- +- /* Read the RTC time/date */ +- tfd = open ("trigger", O_RDWR); +- +- if (tfd == -1) { +- perror("trigger"); +- exit(errno); ++ errno = 0; ++ return; + } + + /* Set the RTC time/date */ +@@ -112,112 +114,7 @@ + rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec); + #endif + +- tm = gmtime (&t); +- +-#ifdef DEBUG +- printf ("Alarm date/time is %d-%d-%d, %02d:%02d:%02d.\n", +- tm->tm_mday, tm->tm_mon + 1, tm->tm_year + 1900, +- tm->tm_hour, tm->tm_min, tm->tm_sec); +-#endif +- if (t && compare_rtc_to_tm (&rtc_tm, tm) >= 0) { +- close (rtcfd); +- close (tfd); +- return; +- } +- +- if (t) { +- /* set the alarm */ +- rtc_tm.tm_mday = tm->tm_mday; +- rtc_tm.tm_mon = tm->tm_mon; +- rtc_tm.tm_year = tm->tm_year; +- rtc_tm.tm_sec = tm->tm_sec; +- rtc_tm.tm_min = tm->tm_min; +- rtc_tm.tm_hour = tm->tm_hour; +- retval = ioctl (rtcfd, RTC_ALM_SET, &rtc_tm); +- if (retval == -1) { +- perror ("ioctl"); +- exit (errno); +- } +-#ifdef DEBUG +- printf ("Alarm date/time now set to %d-%d-%d, %02d:%02d:%02d.\n", +- rtc_tm.tm_mday, rtc_tm.tm_mon + 1, rtc_tm.tm_year + 1900, +- rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec); +-#endif +- +- /* Read the current alarm settings */ +- retval = ioctl (rtcfd, RTC_ALM_READ, &rtc_tm); +- if (retval == -1) { +- perror ("ioctl"); +- exit (errno); +- } +- +-#ifdef DEBUG +- printf ("Alarm date/time now in RTC: %d-%d-%d, %02d:%02d:%02d.\n", +- rtc_tm.tm_mday, rtc_tm.tm_mon + 1, rtc_tm.tm_year + 1900, +- rtc_tm.tm_hour, rtc_tm.tm_min, rtc_tm.tm_sec); +-#endif +- +- /* Enable alarm interrupts */ +- retval = ioctl (rtcfd, RTC_AIE_ON, 0); +- if (retval == -1) { +- perror ("ioctl"); +- exit (errno); +- } +- } +- +-#ifdef DEBUG +- printf ("Waiting for alarm..."); +- fflush (stdout); +-#endif +- /* This blocks until the alarm ring causes an interrupt */ +- FD_ZERO (&afds); +- if (t) +- FD_SET (rtcfd, &afds); +- FD_SET (tfd, &afds); +- nfds = rtcfd+1; +- if (tfd > rtcfd) +- nfds = tfd + 1; +- /* Wait up to ten minutes. */ +- tv.tv_sec = 10 * 60; +- tv.tv_usec = 0; +- then = now; +- if (select (nfds, &afds, (fd_set *) 0, (fd_set *) 0, &tv) < 0) { +- if (errno != EINTR) +- perror ("select"); +- exit (errno); +- } +- now = time (NULL); +-#ifdef DEBUG +- printf ("While we were sleeping, %d seconds elapsed, but %d alarms passed\n", +- (int)(now - then), (int)(tv.tv_sec)); +-#endif +- if (FD_ISSET (rtcfd, &afds)) { +- retval = read (rtcfd, &data, sizeof (unsigned long)); +- if (retval == -1) { +- perror ("read"); +- exit (errno); +- } +- } +- if (FD_ISSET(tfd, &afds)) { +- retval = read (tfd, &data, 1); +- if (retval == -1) { +- perror ("read"); +- exit (errno); +- } +- } +-#ifdef DEBUG +- printf ("Something happened!\n"); +-#endif +- +- /* Disable alarm interrupts */ +- retval = ioctl (rtcfd, RTC_AIE_OFF, 0); +- if (retval == -1) { +- perror ("ioctl"); +- exit (errno); +- } +- + close (rtcfd); +- close (tfd); + } + + +@@ -345,11 +242,223 @@ + } + + ++G_DEFINE_TYPE(AtdAlarm, atd_alarm, G_TYPE_OBJECT); ++ ++ ++static void atd_alarm_finalize (GObject* self) { ++ g_object_unref(((AtdAlarm*) self)->alarm_proxy); ++ G_OBJECT_CLASS (atd_alarm_parent_class)->finalize (self); ++} ++ ++ ++static void atd_alarm_class_init(AtdAlarmClass *cls) ++{ ++ G_OBJECT_CLASS (cls)->finalize = atd_alarm_finalize; ++} ++ ++ ++static void atd_alarm_init(AtdAlarm *self) ++{ ++} ++ ++ ++AtdAlarm* atd_alarm_new (char *spooldir) ++{ ++AtdAlarm *self; ++ ++ self = g_object_new(ATD_TYPE_ALARM, NULL); ++ if (self) { ++ self->bus = NULL; ++ self->alarm_proxy = NULL; ++ self->trigger = NULL; ++ } ++ return self; ++} ++ ++ ++gboolean input_on_trigger(GIOChannel *source, GIOCondition condition, ++ AtdAlarm *obj) ++{ ++char data; ++ ++ if (read (g_io_channel_unix_get_fd(source), &data, 1) == -1) { ++ perror ("read"); ++ exit (errno); ++ } ++ atd_alarm_alarm(obj); ++ ++ return TRUE; ++} ++ ++ ++void display_free_g_error(GError **error) ++{ ++ if ((*error)->domain == DBUS_GERROR && ++ (*error)->code == DBUS_GERROR_REMOTE_EXCEPTION) ++ g_printerr("Remote exception: %s: %s\n", ++ dbus_g_error_get_name(*error), ++ (*error)->message); ++ else ++ g_printerr("Error: %s\n", (*error)->message); ++ g_error_free(*error); ++ *error = NULL; ++} ++ ++ ++static void otimed_destroy(DBusGProxy *alarm_proxy, AtdAlarm *obj) ++{ ++#ifdef DEBUG ++ printf("proxy for " OTIMED " destroyed\n"); ++#endif ++ g_object_unref(obj->alarm_proxy); ++ obj->alarm_proxy = NULL; ++} ++ ++ ++void atd_alarm_connect_otimed(AtdAlarm *self) ++{ ++GError *error; ++int tfd; ++ ++ error = NULL; ++ self->alarm_proxy = dbus_g_proxy_new_for_name_owner ++ (self->bus, OTIMED, "/org/freesmartphone/Time/Alarm", ++ "org.freesmartphone.Time.Alarm", &error); ++ if (error != NULL) { ++ display_free_g_error(&error); ++ return; ++ } ++ g_signal_connect(self->alarm_proxy, "destroy", ++ G_CALLBACK(otimed_destroy), self); ++ ++ /* if we are connected to otimed (so we know it is up and ++ * running) we can open the trigger ++ */ ++ if (self->trigger) ++ return; ++ if (mkfifo ("trigger.new", 0777) < 0) ++ die ("cannot mkfifo trigger.new"); ++ if (rename ("trigger.new","trigger")) ++ die ("cannot rename trigger.new"); ++ chmod ("trigger", S_IWUSR | S_IWGRP | S_IWOTH); ++ tfd = open ("trigger", O_RDWR); ++ if (tfd == -1) { ++ perror("trigger"); ++ exit(errno); ++ } ++ self->trigger = g_io_channel_unix_new(tfd); ++ g_io_add_watch(self->trigger, G_IO_IN, ++ (GIOFunc) input_on_trigger, self); ++} ++ ++ ++void atd_alarm_waitfor(AtdAlarm *self, time_t t) ++{ ++GError *error; ++ ++ if (!t) ++ return; ++ ++ rtc_set_time(); ++ error = NULL; ++ if (self->alarm_proxy == NULL) { ++ g_printerr(OTIMED " not running, could not call SetAlarm\n"); ++ } else if (!dbus_g_proxy_call(self->alarm_proxy, "SetAlarm", &error, ++ G_TYPE_STRING, DBUS_NAME, ++ G_TYPE_INT, t, G_TYPE_INVALID, ++ G_TYPE_INVALID)) { ++ display_free_g_error(&error); ++ } ++#ifdef DEBUG ++ printf("DBus waitfor: %d\n", (int) t); ++#endif ++} ++ ++ ++void name_owner_changed(DBusGProxy *proxy, const char *name, ++ const char *prev_name, const char *new_name, ++ AtdAlarm *obj) ++{ ++ if (!strcmp(name, OTIMED) && *new_name) { ++#ifdef DEBUG ++ printf("DBus NameOwnerChanged: " OTIMED "\n"); ++#endif ++ atd_alarm_connect_otimed(obj); ++ atd_alarm_alarm(obj); ++ } ++} ++ ++ ++static void dbus_disconnected(DBusGProxy *obj, GMainLoop *ml) ++{ ++ g_printerr("DBus disconnected\n"); ++ g_main_loop_quit(ml); ++} ++ ++ ++void atd_alarm_start(AtdAlarm *self) ++//int start_atd_alarm(GIOChannel *trigger, int exit_on_error) ++{ ++GMainLoop *ml; ++GError *error; ++DBusError dbus_error; ++DBusGProxy *proxy; ++int code; ++ ++ error = NULL; ++ self->bus = dbus_g_bus_get(DBUS_BUS_SYSTEM, &error); ++ if (!self->bus) { ++ g_printerr("failed to connect to DBUS: %s\n", ++ error->message); ++ g_error_free(error); ++ return; ++ } ++ dbus_error_init(&dbus_error); ++ code = dbus_bus_request_name ++ (dbus_g_connection_get_connection(self->bus), ++ DBUS_NAME, DBUS_NAME_FLAG_DO_NOT_QUEUE, &dbus_error); ++ if (code != DBUS_REQUEST_NAME_REPLY_PRIMARY_OWNER) { ++ if (code == -1) ++ g_printerr("Error: %s\n", dbus_error.message); ++ else ++ g_printerr("could not register name (%d): %s\n", ++ code, DBUS_NAME); ++ exit(1); ++ } ++ dbus_g_connection_register_g_object(self->bus, "/", G_OBJECT(self)); ++ proxy = dbus_g_proxy_new_for_name(self->bus, "org.freedesktop.DBus", ++ "/org/freedesktop/DBus", ++ "org.freedesktop.DBus"); ++ dbus_g_proxy_add_signal(proxy, "NameOwnerChanged", G_TYPE_STRING, ++ G_TYPE_STRING, G_TYPE_STRING, G_TYPE_INVALID); ++ dbus_g_proxy_connect_signal(proxy, "NameOwnerChanged", ++ G_CALLBACK(name_owner_changed), self, NULL); ++ atd_alarm_connect_otimed(self); ++ atd_alarm_alarm(self); ++ ++ ml = g_main_loop_new(NULL, FALSE); ++ g_signal_connect(proxy, "destroy", G_CALLBACK(dbus_disconnected), ml); ++ dbus_connection_set_exit_on_disconnect ++ (dbus_g_connection_get_connection(self->bus), FALSE); ++ ++ g_main_loop_run(ml); ++ ++ g_object_unref(proxy); ++ if (self->alarm_proxy) ++ g_object_unref(self->alarm_proxy); ++ self->alarm_proxy = NULL; ++ dbus_g_connection_unref(self->bus); ++ self->bus = NULL; ++ g_main_loop_unref(ml); ++ ++ return; ++} ++ ++ + int main (int argc, char *argv[]) + { +-struct dirent *dirent; +-unsigned long this, next, now; + char *argv0; ++AtdAlarm *obj; + + argv0 = strrchr(argv[0], '/'); + if (!argv0) +@@ -362,17 +471,36 @@ + die("cannot chdir"); + if (!strcmp (argv0, "atq")) + exit_atq(); +- if (mkfifo ("trigger.new", 0777) < 0) +- die ("cannot mkfifo trigger.new"); +- if (rename ("trigger.new","trigger")) +- die ("cannot rename trigger.new"); +- chmod ("trigger", S_IWUSR | S_IWGRP | S_IWOTH); + + /* ignore some signals we get from spawned processes */ + signal (SIGCHLD, SIG_IGN); + signal (SIGPIPE, SIG_IGN); + ++ ++ g_type_init(); ++ dbus_g_object_type_install_info(ATD_TYPE_ALARM, ++ &dbus_glib_atd_alarm_object_info); ++ obj = atd_alarm_new(argv[1]); ++ if (!obj) { ++ g_printerr("Failed to create AtdAlarm object"); ++ exit(1); ++ } + while (1) { ++ atd_alarm_start(obj); ++ sleep(DBUS_RECONNECT_TIMEOUT); ++ } ++} ++ ++ ++gboolean atd_alarm_alarm(AtdAlarm *self) ++{ ++struct dirent *dirent; ++unsigned long this, next, now; ++ ++#ifdef DEBUG ++ printf("atd_alarm_alarm() run at: %d\n", (int) time(NULL)); ++#endif ++ + /* run all the jobs in the past */ + now = time (NULL); + scan_from_top (); +@@ -402,8 +530,7 @@ + #endif + if (next == ULONG_MAX) + next = 0; +- waitfor (next); +- } ++ atd_alarm_waitfor (self, next); + +-return 0; ++ return TRUE; + } +--- /dev/null 2009-09-15 19:51:58.514753360 +0200 ++++ src/atd-alarm.h 2009-09-15 22:45:59.000000000 +0200 +@@ -0,0 +1,26 @@ ++#ifndef ATD_ALARM_H ++#define ATD_ALARM_H ++ ++#include <glib-object.h> ++#include <dbus/dbus-glib.h> ++ ++#define ATD_TYPE_ALARM (atd_alarm_get_type()) ++ ++typedef struct _AtdAlarm ++{ ++ GObject parent; ++ DBusGConnection *bus; ++ DBusGProxy *alarm_proxy; ++ GIOChannel *trigger; ++} AtdAlarm; ++ ++typedef struct _AtdAlarmClass ++{ ++ GObjectClass parent_class; ++} AtdAlarmClass; ++ ++static gboolean atd_alarm_alarm(AtdAlarm *self); ++ ++static void atd_alarm_waitfor(AtdAlarm *self, time_t t); ++ ++#endif +--- /dev/null 2009-09-15 19:51:58.514753360 +0200 ++++ src/atd-alarm.xml 2009-03-16 17:55:48.000000000 +0100 +@@ -0,0 +1,8 @@ ++<?xml version="1.0" encoding="UTF-8" ?> ++ ++<node name="/"> ++ <interface name="org.freesmartphone.Notification"> ++ <annotation name="org.freedesktop.DBus.GLib.CSymbol" value="atd_alarm" /> ++ <method name="Alarm" /> ++ </interface> ++</node> diff --git a/recipes/ffalarms/atd-over-fso_0.70.bb b/recipes/ffalarms/atd-over-fso_0.70.bb new file mode 100644 index 0000000000..b042a0356a --- /dev/null +++ b/recipes/ffalarms/atd-over-fso_0.70.bb @@ -0,0 +1,46 @@ +DESCRIPTION = "Lightweight At Daemon working on top of org.freesmartphone.otimed" +SECTION = "base" +LICENSE = "GPLV2" +RCONFLICTS_${PN} = "at atd" +RREPLACES_${PN} = "at atd" +RPROVIDES_${PN} = "atd" +DEPENDS = "dbus-glib pkgconfig" +RDEPENDS += "dbus dbus-glib frameworkd" + +PR = "r2" + +SRC_URI = "${HANDHELDS_CVS};module=apps/atd;tag=ATD-0_70 \ + file://atd-startup.patch;patch=1;pnum=0 \ + file://atd-startup-restart.patch;patch=2;pnum=0 \ + file://atd-alarm-glue.patch;patch=3;pnum=0 \ + file://atd-over-fso.conf.patch;patch=4;pnum=0 \ + file://run-over-fso.patch;patch=5;pnum=1" +S = "${WORKDIR}/atd" + +inherit update-rc.d + +INITSCRIPT_NAME = "atd" +INITSCRIPT_PARAMS = "defaults 97" + +do_compile() { + export CFLAGS="$CFLAGS `${STAGING_BINDIR_NATIVE}/pkg-config --cflags dbus-glib-1`" + export LDFLAGS="$LDFLAGS `${STAGING_BINDIR_NATIVE}/pkg-config --libs dbus-glib-1`" + oe_runmake +} + +do_install() { + install -d ${D}${sbindir} + install atd ${D}${sbindir}/atd + install -d ${D}${sysconfdir}/init.d + install -d ${D}${sysconfdir}/dbus-1/system.d + install dist/etc/init.d/atd ${D}${sysconfdir}/init.d/atd + install dist/etc/dbus-1/system.d/atd-over-fso.conf ${D}${sysconfdir}/dbus-1/system.d/atd-over-fso.conf +} + +updatercd_postinst_prepend() { +/etc/init.d/dbus-1 reload +} + +updatercd_postrm_append() { +/etc/init.d/dbus-1 reload +} diff --git a/recipes/ffalarms/ffalarms/shr.patch b/recipes/ffalarms/ffalarms/shr.patch new file mode 100644 index 0000000000..77a66d6583 --- /dev/null +++ b/recipes/ffalarms/ffalarms/shr.patch @@ -0,0 +1,11 @@ +--- ffalarms-0.2.4/ffalarms.vala 2009-09-21 14:05:09.000000000 +0200 ++++ ffalarms-0.2.4/ffalarms.vala 2009-09-21 14:05:09.000000000 +0200 +@@ -27,7 +27,7 @@ + "Could not contact atd daemon, the alarm may not work"; + public const string COMMANDS = "alsactl amixer"; + public const string ALSASTATE = +- "/usr/share/openmoko/scenarios/stereoout.state"; ++ "/usr/share/shr/scenarii/stereoout.state"; + + + public errordomain MyError { diff --git a/recipes/ffalarms/ffalarms_0.2.2.bb b/recipes/ffalarms/ffalarms_0.2.2.bb new file mode 100644 index 0000000000..a280779d52 --- /dev/null +++ b/recipes/ffalarms/ffalarms_0.2.2.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "Finger friendly alarms" +HOMEPAGE = "http://ffalarms.projects.openmoko.org/" +LICENSE = "GPLv3" +AUTHOR = "Lukasz Pankowski <lukpank@o2.pl>" +MAINTAINER = "Lukasz Pankowski <lukpank@o2.pl>" +SECTION = "x11/applications" +PRIORITY = "optional" +DEPENDS = "edje-native python-native" + +# Pure Python plus Edje interface +PACKAGE_ARCH = "all" + +SRC_URI = "http://projects.openmoko.org/frs/download.php/832/ffalarms-0.2.2.tar.gz" + +inherit distutils + +FILES_${PN} += "${datadir}/${PN} ${datadir}/applications/ffalarms.desktop ${datadir}/pixmaps" + +RDEPENDS += "python-re python-datetime python-edje python-ecore \ + atd-over-fso alsa-utils-amixer alsa-utils-alsactl \ + ttf-dejavu-sans" + +RSUGGESTS += "mplayer alsa-utils-aplay openmoko-alsa-scenarios" diff --git a/recipes/ffalarms/ffalarms_svn.bb b/recipes/ffalarms/ffalarms_svn.bb new file mode 100644 index 0000000000..a627a96ea6 --- /dev/null +++ b/recipes/ffalarms/ffalarms_svn.bb @@ -0,0 +1,36 @@ +DESCRIPTION = "Finger friendly alarms" +HOMEPAGE = "http://ffalarms.projects.openmoko.org/" +LICENSE = "GPLv3" +AUTHOR = "Lukasz Pankowski <lukpank@o2.pl>" +MAINTAINER = "Lukasz Pankowski <lukpank@o2.pl>" +SECTION = "x11/applications" +PRIORITY = "optional" +DEPENDS = "elementary libeflvala libical" + +PV = "0.3.1+svnr${SRCPV}" +PR = "r0" + +# needed because there is do_stage_append in vala.bbclass and do_stage() was removed.. +do_stage() { + +} + +inherit vala + +SRC_URI = "svn://svn.projects.openmoko.org/svnroot/ffalarms;module=trunk;proto=https" + +S = "${WORKDIR}/trunk" + +FILES_${PN} += "${datadir}/${PN} ${datadir}/applications ${datadir}/pixmaps" + +RDEPENDS = "atd alsa-utils-amixer alsa-utils-alsactl virtual/alsa-scenarios ttf-dejavu-sans libical" + +RSUGGESTS = "mplayer alsa-utils-aplay frameworkd" + +do_compile() { + oe_runmake VAPIDIR=${STAGING_DATADIR}/vala/vapi +} + +do_install() { + oe_runmake install DESTDIR=${D} +} diff --git a/recipes/ffmpeg/ffmpeg_svn.bb b/recipes/ffmpeg/ffmpeg_svn.bb index 945fdd4969..b8cea5104e 100644 --- a/recipes/ffmpeg/ffmpeg_svn.bb +++ b/recipes/ffmpeg/ffmpeg_svn.bb @@ -2,14 +2,15 @@ require ffmpeg.inc DEPENDS += "schroedinger libgsm" -SRCREV = "20231" +SRCREV = "20551" PE = "1" PV = "0.5.0+${PR}+svnr${SRCPV}" PR = "r0" DEFAULT_PREFERENCE = "-1" -DEFAULT_PREFERENCE_armv7a = "1" +DEFAULT_PREFERENCE_angstrom = "1" +DEFAULT_PREFERENCE_om-gta02 = "1" SRC_URI = "svn://svn.ffmpeg.org/ffmpeg/;module=trunk" diff --git a/recipes/firmwares/marvell-gspi-fw_9.70.3-p37.bb b/recipes/firmwares/marvell-gspi-fw_9.70.3-p37.bb index 017ec70685..736ddb8e0e 100644 --- a/recipes/firmwares/marvell-gspi-fw_9.70.3-p37.bb +++ b/recipes/firmwares/marvell-gspi-fw_9.70.3-p37.bb @@ -11,6 +11,7 @@ do_install() { install -d ${D}${base_libdir}/firmware install -m 0644 gspi8686.bin helper_gspi.bin ${D}${base_libdir}/firmware install -m 0644 ${WORKDIR}/Marvell-Licence.txt ${D}${base_libdir}/firmware + ln -s helper_gspi.bin ${D}${base_libdir}/firmware/gspi8686_hlp.bin } PACKAGES = "${PN}" diff --git a/recipes/flac/flac.inc b/recipes/flac/flac.inc index cadc32ff33..d20dacde58 100644 --- a/recipes/flac/flac.inc +++ b/recipes/flac/flac.inc @@ -26,10 +26,6 @@ do_configure () { sed -i 's/-Wl,-read_only_relocs,warning//g' src/libFLAC/Makefile } -do_stage () { - autotools_stage_all -} - PACKAGES += "libflac libflac++ liboggflac liboggflac++" FILES_${PN} = "${bindir}/*" FILES_libflac = "${libdir}/libFLAC.so.*" diff --git a/recipes/flac/flac_1.1.2.bb b/recipes/flac/flac_1.1.2.bb index 70d30c98d7..eb328b9b91 100644 --- a/recipes/flac/flac_1.1.2.bb +++ b/recipes/flac/flac_1.1.2.bb @@ -10,6 +10,6 @@ do_configure_append () { sed -i 's/-Wl,-read_only_relocs,warning//g' src/libFLAC/Makefile } -do_stage_append () { +do_stage () { install -m 0644 ${S}/include/FLAC/callback.h ${STAGING_INCDIR}/FLAC/callback.h } diff --git a/recipes/fltk/fltkclock_svn.bb b/recipes/fltk/fltkclock_svn.bb new file mode 100644 index 0000000000..907610da8e --- /dev/null +++ b/recipes/fltk/fltkclock_svn.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "FLTK Worldclock Application" +HOMEPAGE = "http://www.crash-override.net/omworldclock.html" +AUTHOR = "Benjamin 'blindcoder' Schieder' +LICENSE = "PD/GPLv2" +SECTION = "x11/tool" +DEPENDS = "fltk" +SRCREV = "41" +PV = "1.0+svnr${SRCPV}" +PR = "r0" +S = "${WORKDIR}/trunk" + +inherit autotools + +SRC_URI = "svn://scavenger.homeip.net/svn/fltkworldclock;module=trunk;proto=http" diff --git a/recipes/fltk/fltkhackdiet_svn.bb b/recipes/fltk/fltkhackdiet_svn.bb new file mode 100644 index 0000000000..7ff81bcb3d --- /dev/null +++ b/recipes/fltk/fltkhackdiet_svn.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "FLTK Hacker's Diet Application" +HOMEPAGE = "http://www.crash-override.net/omhackersdiet.html" +AUTHOR = "Benjamin 'blindcoder' Schieder' +LICENSE = "GPLv2" +SECTION = "x11/tool" +DEPENDS = "fltk" +RDEPENDS = "curl" +SRCREV = "67" +PV = "1.0+svnr${SRCPV}" +PR = "r0" +S = "${WORKDIR}/trunk" + +inherit autotools + +SRC_URI = "svn://scavenger.homeip.net/svn/fltkhackdiet;module=trunk;proto=http" diff --git a/recipes/fltk/fltkwwpointcal_svn.bb b/recipes/fltk/fltkwwpointcal_svn.bb new file mode 100644 index 0000000000..9ad34d2f29 --- /dev/null +++ b/recipes/fltk/fltkwwpointcal_svn.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "FLTK Weight Watchers Points Calculator" +HOMEPAGE = "http://www.crash-override.net/omwwpointcal.html" +AUTHOR = "Benjamin 'blindcoder' Schieder' +LICENSE = "GPLv2" +SECTION = "x11/tool" +DEPENDS = "fltk" +SRCREV = "2" +PV = "1.0+svnr${SRCPV}" +PR = "r0" +S = "${WORKDIR}/trunk" + +inherit autotools + +SRC_URI = "svn://scavenger.homeip.net/svn/fltkwwpointcal;module=trunk;proto=http" diff --git a/recipes/freesmartphone/fso-apm_git.bb b/recipes/freesmartphone/fso-apm_git.bb index 9a2c8a264c..18347978e5 100644 --- a/recipes/freesmartphone/fso-apm_git.bb +++ b/recipes/freesmartphone/fso-apm_git.bb @@ -3,7 +3,8 @@ AUTHOR = "Michael 'Mickey' Lauer <mlauer@vanille-media.de>" HOMEPAGE = "http://www.freesmartphone.org" SECTION = "console" LICENSE = "GPLv2" -PV = "0.1.0+gitr${SRCREV}" +DEPENDS = "vala-native" +PV = "2.0.0+gitr${SRCREV}" PR = "r0" SRC_URI = "${FREESMARTPHONE_GIT}/cornucopia.git;protocol=git;branch=master" diff --git a/recipes/freesmartphone/fsodeviced/fsodeviced b/recipes/freesmartphone/fsodeviced/fsodeviced new file mode 100644 index 0000000000..2926481e55 --- /dev/null +++ b/recipes/freesmartphone/fsodeviced/fsodeviced @@ -0,0 +1,41 @@ +#! /bin/sh +# +# fsodeviced -- This shell script starts and stops the FSO2 device subsystem daemon. +# +# chkconfig: 345 90 20 +# description: fsodeviced is the freesmartphone.org FSO2 device daemon +# processname: fsodeviced + +PATH=/bin:/usr/bin:/sbin:/usr/sbin +NAME=fsodeviced +NICENESS=10 + +[ -f /etc/default/rcS ] && . /etc/default/rcS + +case "$1" in + start) + echo -n "Starting fsodeviced: " + start-stop-daemon --start --pidfile /var/run/${NAME}.pid --make-pidfile --background -N ${NICENESS} -x /usr/bin/fsodeviced + if [ $? = 0 ]; then + echo "(ok)" + else + echo "(failed)" + fi + ;; + stop) + echo -n "Stopping fsodeviced: " + start-stop-daemon --stop --pidfile /var/run/${NAME}.pid --oknodo + rm -f /var/run/${NAME}.pid + echo "(done)" + ;; + restart|force-reload) + $0 stop + $0 start + ;; + *) + echo "Usage: /etc/init.d/fsodeviced {start|stop|restart|force-reload}" + exit 1 + ;; +esac + +exit 0 diff --git a/recipes/freesmartphone/fsodeviced_git.bb b/recipes/freesmartphone/fsodeviced_git.bb index 1b01241e4c..0fe723ff32 100644 --- a/recipes/freesmartphone/fsodeviced_git.bb +++ b/recipes/freesmartphone/fsodeviced_git.bb @@ -5,4 +5,19 @@ DEPENDS += "alsa-lib libcanberra libfsoresource" RDEPENDS += "libcanberra-alsa" RRECOMMENDS += "fso-alsa-data" PV = "0.9.0+gitr${SRCREV}" -PR = "${INC_PR}.0" +PE = "1" +PR = "${INC_PR}.3" + +inherit update-rc.d + +INITSCRIPT_NAME = "fsodeviced" +INITSCRIPT_PARAMS = "defaults 27" + +SRC_URI += "file://fsodeviced" + +do_install_append() { + install -d ${D}${sysconfdir}/init.d/ + install -m 0755 ${WORKDIR}/fsodeviced ${D}${sysconfdir}/init.d/ +} + +FILES_${PN} += "${sysconfdir}/init.d/fsodeviced" diff --git a/recipes/gcc/gcc-4.3.3.inc b/recipes/gcc/gcc-4.3.3.inc index 9dd46ec16c..f5c1bd84de 100644 --- a/recipes/gcc/gcc-4.3.3.inc +++ b/recipes/gcc/gcc-4.3.3.inc @@ -7,7 +7,7 @@ LICENSE = "GPLv3" DEPENDS = "mpfr gmp" -INC_PR = "r7" +INC_PR = "r9" SRC_URI = "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \ file://fedora/gcc43-c++-builtin-redecl.patch;patch=1;pnum=0 \ @@ -57,6 +57,7 @@ SRC_URI = "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \ file://gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch;patch=1 \ file://zecke-xgcc-cpp.patch;patch=1 \ file://gcc-flags-for-build.patch;patch=1 \ + file://arm-gcc-objective.patch;patch=1 \ " SRC_URI_append_sh3 = " file://sh3-installfix-fixheaders.patch;patch=1 " diff --git a/recipes/gcc/gcc-4.3.3/arm-gcc-objective.patch b/recipes/gcc/gcc-4.3.3/arm-gcc-objective.patch new file mode 100644 index 0000000000..ae8238bd40 --- /dev/null +++ b/recipes/gcc/gcc-4.3.3/arm-gcc-objective.patch @@ -0,0 +1,271 @@ +--- gcc-4.3.1/libobjc/exception.c.old 2009-04-21 22:13:18.000000000 -0700 ++++ gcc-4.3.1/libobjc/exception.c 2009-04-21 22:23:52.000000000 -0700 +@@ -31,7 +31,14 @@ + #include "unwind-pe.h" + + +-/* This is the exception class we report -- "GNUCOBJC". */ ++#ifdef __ARM_EABI_UNWINDER__ ++ ++const _Unwind_Exception_Class __objc_exception_class ++ = {'G', 'N', 'U', 'C', 'O', 'B', 'J', 'C'}; ++ ++#else ++ ++ /* This is the exception class we report -- "GNUCOBJC". */ + #define __objc_exception_class \ + ((((((((_Unwind_Exception_Class) 'G' \ + << 8 | (_Unwind_Exception_Class) 'N') \ +@@ -41,6 +48,17 @@ + << 8 | (_Unwind_Exception_Class) 'B') \ + << 8 | (_Unwind_Exception_Class) 'J') \ + << 8 | (_Unwind_Exception_Class) 'C') ++static const _Unwind_Exception_Class __objc_exception_class ++ = ((((((((_Unwind_Exception_Class) 'G' ++ << 8 | (_Unwind_Exception_Class) 'N') ++ << 8 | (_Unwind_Exception_Class) 'U') ++ << 8 | (_Unwind_Exception_Class) 'C') ++ << 8 | (_Unwind_Exception_Class) 'O') ++ << 8 | (_Unwind_Exception_Class) 'B') ++ << 8 | (_Unwind_Exception_Class) 'J') ++ << 8 | (_Unwind_Exception_Class) 'C'); ++ ++#endif + + /* This is the object that is passed around by the Objective C runtime + to represent the exception in flight. */ +@@ -50,12 +68,18 @@ + /* This bit is needed in order to interact with the unwind runtime. */ + struct _Unwind_Exception base; + +- /* The actual object we want to throw. */ ++ /* The actual object we want to throw. Note: must come immediately after ++ unwind header. */ + id value; + ++#ifdef __ARM_EABI_UNWINDER__ ++ /* Note: we use the barrier cache defined in the unwind control block for ++ ARM EABI. */ ++#else + /* Cache some internal unwind data between phase 1 and phase 2. */ + _Unwind_Ptr landingPad; + int handlerSwitchValue; ++#endif + }; + + +@@ -106,6 +130,24 @@ + return p; + } + ++#ifdef __ARM_EABI_UNWINDER__ ++ ++static Class ++get_ttype_entry (struct lsda_header_info *info, _uleb128_t i) ++{ ++ _Unwind_Ptr ptr; ++ ++ ptr = (_Unwind_Ptr) (info->TType - (i * 4)); ++ ptr = _Unwind_decode_target2 (ptr); ++ ++ if (ptr) ++ return objc_get_class ((const char *) ptr); ++ else ++ return 0; ++} ++ ++#else ++ + static Class + get_ttype_entry (struct lsda_header_info *info, _Unwind_Word i) + { +@@ -122,6 +164,8 @@ + return 0; + } + ++#endif ++ + /* Like unto the method of the same name on Object, but takes an id. */ + /* ??? Does this bork the meta-type system? Can/should we look up an + isKindOf method on the id? */ +@@ -150,12 +194,32 @@ + #define PERSONALITY_FUNCTION __gnu_objc_personality_v0 + #endif + ++#ifdef __ARM_EABI_UNWINDER__ ++ ++#define CONTINUE_UNWINDING \ ++ do \ ++ { \ ++ if (__gnu_unwind_frame(ue_header, context) != _URC_OK) \ ++ return _URC_FAILURE; \ ++ return _URC_CONTINUE_UNWIND; \ ++ } \ ++ while (0) ++ ++_Unwind_Reason_Code ++PERSONALITY_FUNCTION (_Unwind_State state, ++ struct _Unwind_Exception *ue_header, ++ struct _Unwind_Context *context) ++#else ++ ++#define CONTINUE_UNWINDING return _URC_CONTINUE_UNWIND ++ + _Unwind_Reason_Code + PERSONALITY_FUNCTION (int version, + _Unwind_Action actions, + _Unwind_Exception_Class exception_class, + struct _Unwind_Exception *ue_header, + struct _Unwind_Context *context) ++#endif + { + struct ObjcException *xh = (struct ObjcException *) ue_header; + +@@ -165,19 +229,66 @@ + const unsigned char *p; + _Unwind_Ptr landing_pad, ip; + int handler_switch_value; +- int saw_cleanup = 0, saw_handler; ++ int saw_cleanup = 0, saw_handler, foreign_exception; + void *return_object; + ++ int ip_before_insn = 0; ++ ++#ifdef __ARM_EABI_UNWINDER__ ++ _Unwind_Action actions; ++ ++ switch (state & _US_ACTION_MASK) ++ { ++ case _US_VIRTUAL_UNWIND_FRAME: ++ actions = _UA_SEARCH_PHASE; ++ break; ++ ++ case _US_UNWIND_FRAME_STARTING: ++ actions = _UA_CLEANUP_PHASE; ++ if (!(state & _US_FORCE_UNWIND) ++ && ue_header->barrier_cache.sp == _Unwind_GetGR (context, 13)) ++ actions |= _UA_HANDLER_FRAME; ++ break; ++ ++ case _US_UNWIND_FRAME_RESUME: ++ CONTINUE_UNWINDING; ++ break; ++ ++ default: ++ abort(); ++ } ++ actions |= state & _US_FORCE_UNWIND; ++ ++ /* TODO: Foreign exceptions need some attention (e.g. rethrowing doesn't ++ work). */ ++ foreign_exception = 0; ++ ++ /* The dwarf unwinder assumes the context structure holds things like the ++ function and LSDA pointers. The ARM implementation caches these in ++ the exception header (UCB). To avoid rewriting everything we make the ++ virtual IP register point at the UCB. */ ++ ip = (_Unwind_Ptr) ue_header; ++ _Unwind_SetGR (context, 12, ip); ++ ++#else /* !__ARM_EABI_UNWINDER. */ + /* Interface version check. */ + if (version != 1) + return _URC_FATAL_PHASE1_ERROR; ++ ++ foreign_exception = (exception_class != __objc_exception_class); ++#endif + + /* Shortcut for phase 2 found handler for domestic exception. */ + if (actions == (_UA_CLEANUP_PHASE | _UA_HANDLER_FRAME) +- && exception_class == __objc_exception_class) ++ && !foreign_exception) + { ++#ifdef __ARM_EABI_UNWINDER__ ++ handler_switch_value = (int) ue_header->barrier_cache.bitpattern[1]; ++ landing_pad = (_Unwind_Ptr) ue_header->barrier_cache.bitpattern[3]; ++#else + handler_switch_value = xh->handlerSwitchValue; + landing_pad = xh->landingPad; ++#endif + goto install_context; + } + +@@ -186,12 +297,18 @@ + + /* If no LSDA, then there are no handlers or cleanups. */ + if (! language_specific_data) +- return _URC_CONTINUE_UNWIND; ++ CONTINUE_UNWINDING; + + /* Parse the LSDA header. */ + p = parse_lsda_header (context, language_specific_data, &info); + info.ttype_base = base_of_encoded_value (info.ttype_encoding, context); +- ip = _Unwind_GetIP (context) - 1; ++#ifdef HAVE_GETIPINFO ++ ip = _Unwind_GetIPInfo (context, &ip_before_insn); ++#else ++ ip = _Unwind_GetIP (context) - 1; ++#endif ++ if (!ip_before_insn) ++ --ip; + landing_pad = 0; + action_record = 0; + handler_switch_value = 0; +@@ -250,7 +367,7 @@ + /* If ip is not present in the table, C++ would call terminate. */ + /* ??? As with Java, it's perhaps better to tweek the LSDA to + that no-action is mapped to no-entry. */ +- return _URC_CONTINUE_UNWIND; ++ CONTINUE_UNWINDING; + + found_something: + saw_cleanup = 0; +@@ -287,8 +404,7 @@ + + /* During forced unwinding, we only run cleanups. With a + foreign exception class, we have no class info to match. */ +- else if ((actions & _UA_FORCE_UNWIND) +- || exception_class != __objc_exception_class) ++ else if ((actions & _UA_FORCE_UNWIND) || foreign_exception) + ; + + else if (ar_filter > 0) +@@ -318,18 +434,24 @@ + } + + if (! saw_handler && ! saw_cleanup) +- return _URC_CONTINUE_UNWIND; ++ CONTINUE_UNWINDING; + + if (actions & _UA_SEARCH_PHASE) + { + if (!saw_handler) +- return _URC_CONTINUE_UNWIND; ++ CONTINUE_UNWINDING; + + /* For domestic exceptions, we cache data from phase 1 for phase 2. */ +- if (exception_class == __objc_exception_class) ++ if (!foreign_exception) + { ++#ifdef __ARM_EABI_UNWINDER__ ++ ue_header->barrier_cache.sp = _Unwind_GetGR (context, 13); ++ ue_header->barrier_cache.bitpattern[1] = (_uw) handler_switch_value; ++ ue_header->barrier_cache.bitpattern[3] = (_uw) landing_pad; ++#else + xh->handlerSwitchValue = handler_switch_value; + xh->landingPad = landing_pad; ++#endif + } + return _URC_HANDLER_FOUND; + } +@@ -361,7 +483,9 @@ + objc_exception_throw (id value) + { + struct ObjcException *header = calloc (1, sizeof (*header)); +- header->base.exception_class = __objc_exception_class; ++ ++ memcpy (&header->base.exception_class, &__objc_exception_class, ++ sizeof (__objc_exception_class)); + header->base.exception_cleanup = __objc_exception_cleanup; + header->value = value; + diff --git a/recipes/gcc/gcc-package-target.inc b/recipes/gcc/gcc-package-target.inc index 68c84abd5a..91f5f9060d 100644 --- a/recipes/gcc/gcc-package-target.inc +++ b/recipes/gcc/gcc-package-target.inc @@ -4,6 +4,7 @@ PACKAGES = "\ cpp cpp-symlinks \ g77 g77-symlinks \ gfortran gfortran-symlinks \ + objc objc-dev \ gcov gcov-symlinks \ libmudflap libmudflap-dev \ libgcc-dev \ @@ -87,6 +88,13 @@ FILES_libgfortran-dev = "${libdir}/libgfortran.a \ ${libdir}/libgfortran.so \ ${libdir}/libgfortranbegin.a" +FILES_objc = "${libdir}/libobjc*.so.* \ +" +FILES_objc-dev = "${libdir}/libobjc*.so \ + ${libdir}/libobjc*.la \ + ${libdir}/libobjc*.a \ +" + FILES_libmudflap = "${libdir}/libmudflap*.so.*" FILES_libmudflap-dev = "\ ${libdir}/libmudflap*.so \ diff --git a/recipes/glibc/glibc-package.inc b/recipes/glibc/glibc-package.inc new file mode 100644 index 0000000000..c30f315fbc --- /dev/null +++ b/recipes/glibc/glibc-package.inc @@ -0,0 +1,89 @@ +# +# For now, we will skip building of a gcc package if it is a uclibc one +# and our build is not a uclibc one, and we skip a glibc one if our build +# is a uclibc build. +# +# See the note in gcc/gcc_3.4.0.oe +# + +python __anonymous () { + import bb, re + uc_os = (re.match('.*uclibc*', bb.data.getVar('TARGET_OS', d, 1)) != None) + if uc_os: + raise bb.parse.SkipPackage("incompatible with target %s" % + bb.data.getVar('TARGET_OS', d, 1)) +} + + +# Binary locales are generated at build time if ENABLE_BINARY_LOCALE_GENERATION +# is set. The idea is to avoid running localedef on the target (at first boot) +# to decrease initial boot time and avoid localedef being killed by the OOM +# killer which used to effectively break i18n on machines with < 128MB RAM. + +# default to disabled until qemu works for everyone +ENABLE_BINARY_LOCALE_GENERATION ?= "0" + +# BINARY_LOCALE_ARCHES is a space separated list of regular expressions +BINARY_LOCALE_ARCHES ?= "arm.* i[3-6]86 x86_64 powerpc" + +# Set this to zero if you don't want ldconfig in the output package +USE_LDCONFIG ?= "1" + +inherit glibc-package + +INITSCRIPT_NAME = "nscd" +INITSCRIPT_PACKAGES = "nscd" +INITSCRIPT_PARAMS = "start 40 S . stop 40 0 6 1 ." +inherit update-rc.d + +def get_glibc_fpu_setting(bb, d): + if bb.data.getVar('TARGET_FPU', d, 1) in [ 'soft' ]: + return "--without-fp" + return "" + +EXTRA_OECONF += "${@get_glibc_fpu_setting(bb, d)}" +EXTRA_OEMAKE += "rootsbindir=${base_sbindir}" + +OVERRIDES_append = ":${TARGET_ARCH}-${TARGET_OS}" + +do_install() { + oe_runmake install_root=${D} install + for r in ${rpcsvc}; do + h=`echo $r|sed -e's,\.x$,.h,'` + install -m 0644 ${S}/sunrpc/rpcsvc/$h ${D}/${includedir}/rpcsvc/ + done + install -d ${D}${libdir}/locale + make -f ${WORKDIR}/generate-supported.mk IN="${S}/localedata/SUPPORTED" OUT="${WORKDIR}/SUPPORTED" + # get rid of some broken files... + for i in ${GLIBC_BROKEN_LOCALES}; do + grep -v $i ${WORKDIR}/SUPPORTED > ${WORKDIR}/SUPPORTED.tmp + mv ${WORKDIR}/SUPPORTED.tmp ${WORKDIR}/SUPPORTED + done + rm -f ${D}{sysconfdir}/rpc + install -d ${D}${sysconfdir}/init.d + install -m 0644 ${S}/nscd/nscd.conf ${D}${sysconfdir}/ + install ${S}/nscd/nscd.init ${D}${sysconfdir}/init.d/nscd +} + + +python __anonymous () { + enabled = bb.data.getVar("ENABLE_BINARY_LOCALE_GENERATION", d, 1) + + if enabled and int(enabled): + import re + + target_arch = bb.data.getVar("TARGET_ARCH", d, 1) + binary_arches = bb.data.getVar("BINARY_LOCALE_ARCHES", d, 1) or "" + + for regexp in binary_arches.split(" "): + r = re.compile(regexp) + + if r.match(target_arch): + depends = bb.data.getVar("DEPENDS", d, 1) + depends = "%s qemu-native" % depends + bb.data.setVar("DEPENDS", depends, d) + bb.data.setVar("GLIBC_INTERNAL_USE_BINARY_LOCALE", "compile", d) + break +} + + diff --git a/recipes/glibc/glibc_2.10.1.bb b/recipes/glibc/glibc_2.10.1.bb index 27fbef5222..a1ec4e32ca 100644 --- a/recipes/glibc/glibc_2.10.1.bb +++ b/recipes/glibc/glibc_2.10.1.bb @@ -148,4 +148,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.2.5.bb b/recipes/glibc/glibc_2.2.5.bb index f810477e73..4327b58da6 100644 --- a/recipes/glibc/glibc_2.2.5.bb +++ b/recipes/glibc/glibc_2.2.5.bb @@ -193,4 +193,4 @@ do_stage() { echo 'GROUP ( libc.so.6 libc_nonshared.a )' > ${STAGING_DIR_HOST}/${layout_base_libdir}/libc.so } -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.2+cvs20040726.bb b/recipes/glibc/glibc_2.3.2+cvs20040726.bb index 0799676592..7773e9cd52 100644 --- a/recipes/glibc/glibc_2.3.2+cvs20040726.bb +++ b/recipes/glibc/glibc_2.3.2+cvs20040726.bb @@ -75,4 +75,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.2.bb b/recipes/glibc/glibc_2.3.2.bb index 1524420b3b..152d2616b0 100644 --- a/recipes/glibc/glibc_2.3.2.bb +++ b/recipes/glibc/glibc_2.3.2.bb @@ -164,4 +164,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.3+cvs20041128.bb b/recipes/glibc/glibc_2.3.3+cvs20041128.bb index d99bde7384..f52bb07643 100644 --- a/recipes/glibc/glibc_2.3.3+cvs20041128.bb +++ b/recipes/glibc/glibc_2.3.3+cvs20041128.bb @@ -97,4 +97,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.3+cvs20050221.bb b/recipes/glibc/glibc_2.3.3+cvs20050221.bb index 7ce4cce907..34efe71ed5 100644 --- a/recipes/glibc/glibc_2.3.3+cvs20050221.bb +++ b/recipes/glibc/glibc_2.3.3+cvs20050221.bb @@ -80,4 +80,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.3+cvs20050420.bb b/recipes/glibc/glibc_2.3.3+cvs20050420.bb index ea51f9e4e7..36b2c2cfd0 100644 --- a/recipes/glibc/glibc_2.3.3+cvs20050420.bb +++ b/recipes/glibc/glibc_2.3.3+cvs20050420.bb @@ -81,4 +81,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.3.bb b/recipes/glibc/glibc_2.3.3.bb index 83ef019037..f832cb3cde 100644 --- a/recipes/glibc/glibc_2.3.3.bb +++ b/recipes/glibc/glibc_2.3.3.bb @@ -109,4 +109,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.5+cvs20050627.bb b/recipes/glibc/glibc_2.3.5+cvs20050627.bb index 04231d1901..9c8292c421 100644 --- a/recipes/glibc/glibc_2.3.5+cvs20050627.bb +++ b/recipes/glibc/glibc_2.3.5+cvs20050627.bb @@ -135,4 +135,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.3.6.bb b/recipes/glibc/glibc_2.3.6.bb index 9277dd1a54..75de4c39f6 100644 --- a/recipes/glibc/glibc_2.3.6.bb +++ b/recipes/glibc/glibc_2.3.6.bb @@ -92,4 +92,4 @@ do_stage_prepend() { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.4.bb b/recipes/glibc/glibc_2.4.bb index ca6afe284a..a90e06ed72 100644 --- a/recipes/glibc/glibc_2.4.bb +++ b/recipes/glibc/glibc_2.4.bb @@ -146,4 +146,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.5.bb b/recipes/glibc/glibc_2.5.bb index 02cfeaef2b..6792c58a4d 100644 --- a/recipes/glibc/glibc_2.5.bb +++ b/recipes/glibc/glibc_2.5.bb @@ -151,4 +151,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.6.1.bb b/recipes/glibc/glibc_2.6.1.bb index 5cbd8b693c..1daa63254f 100644 --- a/recipes/glibc/glibc_2.6.1.bb +++ b/recipes/glibc/glibc_2.6.1.bb @@ -161,4 +161,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.7.bb b/recipes/glibc/glibc_2.7.bb index dcea69cb50..4f52c95190 100644 --- a/recipes/glibc/glibc_2.7.bb +++ b/recipes/glibc/glibc_2.7.bb @@ -159,4 +159,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_2.9.bb b/recipes/glibc/glibc_2.9.bb index cddae98b08..e675d8923f 100644 --- a/recipes/glibc/glibc_2.9.bb +++ b/recipes/glibc/glibc_2.9.bb @@ -157,4 +157,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/glibc/glibc_cvs.bb b/recipes/glibc/glibc_cvs.bb index 5290dfa9e6..22f48d29fc 100644 --- a/recipes/glibc/glibc_cvs.bb +++ b/recipes/glibc/glibc_cvs.bb @@ -105,4 +105,4 @@ do_compile () { require glibc-stage.inc -require glibc-package.bbclass +require glibc-package.inc diff --git a/recipes/gnome/goffice/c99math.patch b/recipes/gnome/goffice/c99math.patch new file mode 100644 index 0000000000..24e6c31a72 --- /dev/null +++ b/recipes/gnome/goffice/c99math.patch @@ -0,0 +1,12 @@ +Index: goffice-0.7.14/configure.in +=================================================================== +--- goffice-0.7.14.orig/configure.in 2009-11-14 19:14:37.106109501 +0100 ++++ goffice-0.7.14/configure.in 2009-11-14 19:19:40.907333188 +0100 +@@ -66,6 +66,7 @@ + + AC_ISC_POSIX + AC_PROG_CC ++AC_PROG_CC_C99 + AC_PROG_YACC + AM_PROG_LEX + AC_PROG_LN_S diff --git a/recipes/gnome/goffice_0.7.14.bb b/recipes/gnome/goffice_0.7.14.bb index 77dd39ad79..beb23231db 100644 --- a/recipes/gnome/goffice_0.7.14.bb +++ b/recipes/gnome/goffice_0.7.14.bb @@ -1,12 +1,14 @@ DESCRIPTION="Gnome Office Library" LICENSE="GPLv2" -PR = "r1" +PR = "r2" DEPENDS="glib-2.0 gtk+ pango cairo libgnomeprint libgsf libglade libpcre libxml2 libart-lgpl" inherit gnome pkgconfig +SRC_URI += "file://c99math.patch;patch=1" + do_stage() { autotools_stage_all } diff --git a/recipes/gnuradio/gnuradio_git.bb b/recipes/gnuradio/gnuradio_git.bb index 37b21fdcb2..03dfdb25e6 100644 --- a/recipes/gnuradio/gnuradio_git.bb +++ b/recipes/gnuradio/gnuradio_git.bb @@ -1,17 +1,23 @@ require gnuradio.inc -#DEFAULT_PREFERENCE = "-1" +DEFAULT_PREFERENCE = "-1" DEPENDS += " gsl " -SRCREV = "0cd478fdc090123e09b7ee21c88e5657abab8ae0" -#SRCREV = "0f4226088ba84e25139bf77957c80ca7a64cba11" -PR = "${INC_PR}.1" +#SRCREV = "0cd478fdc090123e09b7ee21c88e5657abab8ae0" + +SRCREV = "bf7ad4d17514aba9fc5209bc916ce37482f77eaa" + +PR = "${INC_PR}.2" PV = "3.2.1-${PR}+gitr${SRCREV}" EXTRA_OECONF += "--with-boost=${STAGING_DIR_TARGET}/usr CXXFLAGS=-DBOOST_SP_USE_PTHREADS --disable-usrp2 --disable-usrp2-firmware --with-fusb-tech=libusb1" -SRC_URI = "git://gnuradio.org/git/gnuradio.git;protocol=http \ +# Make it easy to test against developer repos and branches +GIT_REPO = "balister.git" +GIT_BRANCH = "omap3-build" + +SRC_URI = "git://gnuradio.org/git/${GIT_REPO};branch=${GIT_BRANCH};protocol=http \ ${SOURCEFORGE_MIRROR}/libusb/libusb-0.1.12.tar.gz \ " diff --git a/recipes/gpe-sketchbook/gpe-sketchbook_0.2.9.bb b/recipes/gpe-sketchbook/gpe-sketchbook_0.2.9.bb index 488e32f55b..312df2a044 100644 --- a/recipes/gpe-sketchbook/gpe-sketchbook_0.2.9.bb +++ b/recipes/gpe-sketchbook/gpe-sketchbook_0.2.9.bb @@ -1,8 +1,11 @@ DEPENDS = "libgpewidget sqlite" +RDEPENDS = "gpe-icons" LICENSE = "GPL" DESCRIPTION = "A GPE notebook to sketch your notes" export CVSBUILD = "no" +PR = "r1" + inherit gpe pkgconfig CFLAGS +="-D_GNU_SOURCE" diff --git a/recipes/gtk-webcore/midori/config b/recipes/gtk-webcore/midori/config new file mode 100644 index 0000000000..7b6991d063 --- /dev/null +++ b/recipes/gtk-webcore/midori/config @@ -0,0 +1,4 @@ + +[settings] +enforce-96-dpi=true +toolbar-items=Back,Forward,ReloadStop,Fullscreen,Location,Panel, diff --git a/recipes/gtk-webcore/midori/ua-iphone-0.1.10.patch b/recipes/gtk-webcore/midori/ua-iphone-0.1.10.patch new file mode 100644 index 0000000000..b2541a5edb --- /dev/null +++ b/recipes/gtk-webcore/midori/ua-iphone-0.1.10.patch @@ -0,0 +1,34 @@ +diff -Nur o/midori/midori-websettings.c n/midori/midori-websettings.c +--- o/midori/midori-websettings.c 2009-09-12 00:09:38.000000000 +0200 ++++ n/midori/midori-websettings.c 2009-09-14 13:55:12.000000000 +0200 +@@ -285,6 +285,7 @@ + { + static const GEnumValue values[] = { + { MIDORI_IDENT_MIDORI, "MIDORI_IDENT_MIDORI", N_("Midori") }, ++ { MIDORI_IDENT_IPHONE, "MIDORI_IDENT_IPHONE", N_("iPhone") }, + { MIDORI_IDENT_SAFARI, "MIDORI_IDENT_SAFARI", N_("Safari") }, + { MIDORI_IDENT_FIREFOX, "MIDORI_IDENT_FIREFOX", N_("Firefox") }, + { MIDORI_IDENT_EXPLORER, "MIDORI_IDENT_EXPLORER", N_("Internet Explorer") }, +@@ -1118,6 +1119,11 @@ + case MIDORI_IDENT_MIDORI: + return g_strdup_printf ("%s (%s; %s; U; %s) %s", + appname, platform, os, lang, webcore); ++ case MIDORI_IDENT_IPHONE: ++ return g_strdup_printf ("Mozilla/5.0 (iPhone; U; %s; %s) " ++ "AppleWebKit/532+ (KHTML, like Gecko) Version/3.0 Mobile/1A538b " ++ "Safari/419.3 %s", ++ os, lang, appname); + case MIDORI_IDENT_SAFARI: + return g_strdup_printf ("Mozilla/5.0 (%s; U; %s; %s) " + "AppleWebKit/532+ (KHTML, like Gecko) Safari/%s %s", +diff -Nur o/midori/midori-websettings.h n/midori/midori-websettings.h +--- -o/midori/midori-websettings.h 2009-09-12 00:09:38.000000000 +0200 ++++ n/midori/midori-websettings.h 2009-09-14 13:55:14.000000000 +0200 +@@ -132,6 +132,7 @@ + typedef enum + { + MIDORI_IDENT_MIDORI, ++ MIDORI_IDENT_IPHONE, + MIDORI_IDENT_SAFARI, + MIDORI_IDENT_FIREFOX, + MIDORI_IDENT_EXPLORER, diff --git a/recipes/gtk-webcore/midori_0.1.10.bb b/recipes/gtk-webcore/midori_0.1.10.bb index 06d8964082..9d1f1dcec8 100644 --- a/recipes/gtk-webcore/midori_0.1.10.bb +++ b/recipes/gtk-webcore/midori_0.1.10.bb @@ -1,9 +1,15 @@ require midori.inc +PR = "r2" + DEPENDS += "python-native python-docutils-native" SRC_URI = "http://archive.xfce.org/src/apps/midori/0.1/midori-${PV}.tar.bz2 \ - file://waf" + file://waf \ + " + +SRC_URI_append_shr = "file://ua-iphone-0.1.10.patch;patch=1 \ + file://config" do_configure() { cp -f ${WORKDIR}/waf ${S}/ @@ -27,5 +33,8 @@ do_configure() { echo "LINK_CC = '${CXX}'" >> ./_build_/c4che/default.cache.py } - +do_install_append_shr() { + install -d ${D}${sysconfdir}/xdg/midori + install -m 0644 ${WORKDIR}/config ${D}${sysconfdir}/xdg/midori +} diff --git a/recipes/gtk-webcore/midori_0.2.1.bb b/recipes/gtk-webcore/midori_0.2.1.bb index 7439a85e3e..3eaf0f0bf8 100644 --- a/recipes/gtk-webcore/midori_0.2.1.bb +++ b/recipes/gtk-webcore/midori_0.2.1.bb @@ -5,6 +5,10 @@ DEPENDS += "python-native python-docutils-native" SRC_URI = "http://archive.xfce.org/src/apps/midori/0.2/midori-${PV}.tar.bz2 \ file://waf" +SRC_URI_append_shr = " file://config " + +PR = "r1" + do_configure() { cp -f ${WORKDIR}/waf ${S}/ sed -i -e 's:, shell=False::g' wscript @@ -27,5 +31,8 @@ do_configure() { echo "LINK_CC = '${CXX}'" >> ./_build_/c4che/default.cache.py } - +do_install_append_shr() { + install -d ${D}${sysconfdir}/xdg/midori + install -m 0644 ${WORKDIR}/config ${D}${sysconfdir}/xdg/midori +} diff --git a/recipes/gtk-webcore/midori_git.bb b/recipes/gtk-webcore/midori_git.bb index decc81c365..e1e2ecf99d 100644 --- a/recipes/gtk-webcore/midori_git.bb +++ b/recipes/gtk-webcore/midori_git.bb @@ -6,7 +6,7 @@ DEPENDS += "python-native python-docutils-native" PR = "r2" PV = "0.1.7+${PR}+gitr${SRCREV}" -SRC_URI = "git://git.xfce.org/kalikiana/midori;protocol=git \ +SRC_URI = "git://git.xfce.org/apps/midori;protocol=git \ file://waf \ file://wscript-fix.patch;patch=1" diff --git a/recipes/guile/files/cpp-linemarkers.patch b/recipes/guile/files/cpp-linemarkers.patch new file mode 100644 index 0000000000..3e48932a3c --- /dev/null +++ b/recipes/guile/files/cpp-linemarkers.patch @@ -0,0 +1,8 @@ +--- guile.orig/libguile/guile-snarf-docs.in 2009-07-03 18:19:00.000000000 -0400 ++++ guile/libguile/guile-snarf-docs.in 2009-11-19 12:55:32.487266268 -0500 +@@ -23,4 +23,4 @@ + ## Let the user override the preprocessor autoconf found. + test -n "${CPP+set}" || CPP="@CPP@" + +-${CPP} -DSCM_MAGIC_SNARF_DOCS "$@" ++${CPP} -P -DSCM_MAGIC_SNARF_DOCS "$@" diff --git a/recipes/guile/guile-native_1.8.5.bb b/recipes/guile/guile-native_1.8.5.bb index 9c2eb13d8d..5c999dbade 100644 --- a/recipes/guile/guile-native_1.8.5.bb +++ b/recipes/guile/guile-native_1.8.5.bb @@ -4,6 +4,7 @@ DEPENDS = "libtool (< 2)" SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \ file://configure-fix.patch;patch=1 \ + file://cpp-linemarkers.patch;patch=1 \ " PR = "r1" diff --git a/recipes/guile/guile-native_1.8.6.bb b/recipes/guile/guile-native_1.8.6.bb index d511807e09..2f87c482ca 100644 --- a/recipes/guile/guile-native_1.8.6.bb +++ b/recipes/guile/guile-native_1.8.6.bb @@ -1,4 +1,5 @@ require guile-native.inc SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \ file://configure-fix.patch;patch=1 \ + file://cpp-linemarkers.patch;patch=1 \ " diff --git a/recipes/guile/guile-native_1.8.7.bb b/recipes/guile/guile-native_1.8.7.bb new file mode 100644 index 0000000000..2f87c482ca --- /dev/null +++ b/recipes/guile/guile-native_1.8.7.bb @@ -0,0 +1,5 @@ +require guile-native.inc +SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \ + file://configure-fix.patch;patch=1 \ + file://cpp-linemarkers.patch;patch=1 \ + " diff --git a/recipes/guile/guile_1.8.7.bb b/recipes/guile/guile_1.8.7.bb new file mode 100644 index 0000000000..6889f33042 --- /dev/null +++ b/recipes/guile/guile_1.8.7.bb @@ -0,0 +1,6 @@ +require guile.inc + +SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \ + file://configure-fix.patch;patch=1 \ + " + diff --git a/recipes/images/shr-image.bb b/recipes/images/shr-image.bb new file mode 100644 index 0000000000..e889f2dfb9 --- /dev/null +++ b/recipes/images/shr-image.bb @@ -0,0 +1,30 @@ +require shr-image.inc + +IMAGE_BASENAME = "full" + +DEPENDS += "task-shr" +RDEPENDS += "\ + task-shr-apps \ + task-shr-games \ + task-shr-gtk \ +" + +IMAGE_INSTALL += "\ + task-shr-apps \ + task-shr-games \ + task-shr-gtk \ +" + +# perform some SHR convenience tweaks to the rootfs +shr_rootfs_postprocess_append() { + curdir=$PWD + cd ${IMAGE_ROOTFS} + + + #Replace desktop files + echo "Icon=pidgin.png" >> ./usr/share/applications/pidgin.desktop + sed -i "s/^X-Icon-path.*$//g" ./usr/share/applications/vagalume.desktop + + cd $curdir +} + diff --git a/recipes/images/shr-image.inc b/recipes/images/shr-image.inc new file mode 100644 index 0000000000..0498d3bac8 --- /dev/null +++ b/recipes/images/shr-image.inc @@ -0,0 +1,167 @@ +#------------------------------------------------------ +# SHR Image Recipe +#------------------------------------------------------ + +PV = "2.0" +PR = "r8" + + +DEPENDS += "task-shr-minimal" + +RDEPENDS += "\ + ${MACHINE_TASK_PROVIDER} \ + task-base \ + task-shr-minimal-base \ + task-shr-minimal-cli \ + task-shr-minimal-fso \ + task-shr-minimal-apps \ + task-shr-minimal-audio \ + task-shr-minimal-gtk \ + task-shr-minimal-x \ + task-x11-illume \ + task-fso2-compliance \ + task-fonts-truetype-core \ +" + +IMAGE_INSTALL += "\ + ${MACHINE_TASK_PROVIDER} \ + task-base \ + task-shr-minimal-base \ + task-shr-minimal-cli \ + task-shr-minimal-apps \ + task-shr-minimal-audio \ + task-shr-minimal-gtk \ + task-shr-minimal-x \ + task-x11-illume \ + task-fso2-compliance \ + task-fonts-truetype-core \ +" + +inherit image + +# perform some SHR convenience tweaks to the rootfs +shr_rootfs_postprocess() { + dirs=`find ${FILESDIR} -type d -printf "%P\n" | grep -v "^.$" | grep -v ".git"` + for dir in $dirs; do + mkdir -p ${IMAGE_ROOTFS}/$dir + done + files=`find ${FILESDIR} -type f -printf "%P\n" | grep -v ".git"` + for file in $files; do + cp -f ${FILESDIR}/$file ${IMAGE_ROOTFS}/$file + done + + curdir=$PWD + cd ${IMAGE_ROOTFS} + # date/time + date "+%m%d%H%M%Y" >./etc/timestamp + # alias foo + echo "alias pico=nano" >>./etc/profile + echo "alias fso='cd /local/pkg/fso'" >>./etc/profile + echo "alias ipkg='opkg'" >>./etc/profile + # dns + echo "nameserver 208.67.222.222" >./etc/resolv.conf + echo "nameserver 208.67.220.220" >>./etc/resolv.conf + # nfs + mkdir -p ./local/pkg + echo >>./etc/fstab + echo "# NFS Host" >>./etc/fstab + echo "192.168.0.200:/local/pkg /local/pkg nfs noauto,nolock,soft,rsize=32768,wsize=32768 0 0" >>./etc/fstab + # fix .desktop files for illume + #desktop=`find ./usr/share/applications -name "*.desktop"` + #for file in $desktop; do + # echo "Categories=Office;" >>$file + #done + + echo "Exec=vala-terminal -e htop" >> ./usr/share/applications/htop.desktop + + # minimal gtk theme foo + # this should be set in postinst phase of installed gtk-theme package + #mkdir -p ./etc/gtk-2.0/ + #echo 'gtk-font-name = "Sans 5"' >> ./etc/gtk-2.0/gtkrc.default + #echo 'gtk-theme-name = "shr-theme-gtk-e17lookalike"' >> ./etc/gtk-2.0/gtkrc.default + #echo 'gtk-icon-theme-name = "openmoko-standard"' >> ./etc/gtk-2.0/gtkrc.default + #echo 'style "treeview"' >> ./etc/gtk-2.0/gtkrc.default + #echo '{ ' >> ./etc/gtk-2.0/gtkrc.default + #echo ' GtkTreeView::expander-size = 40' >> ./etc/gtk-2.0/gtkrc.default + #echo '}' >> ./etc/gtk-2.0/gtkrc.default + #echo 'widget_class "*TreeView*" style "treeview"' >> ./etc/gtk-2.0/gtkrc.default + #update-alternatives --install /etc/gtk-2.0/gtkrc gtk-theme /etc/gtk-2.0/gtkrc.default 1 + + # elementary theme foo + ELM_PROFILE_SCR=./etc/profile.d/elementary.sh + echo 'export ELM_ENGINE=x11' > ${ELM_PROFILE_SCR} + echo 'export ELM_THEME=gry' >> ${ELM_PROFILE_SCR} + echo 'export ELM_SCALE=2' >> ${ELM_PROFILE_SCR} + echo 'export ELM_FINGER_SIZE=70' >> ${ELM_PROFILE_SCR} + chmod +x ${ELM_PROFILE_SCR} + + echo '' >> ./etc/ld.so.conf + # fix strange iconv/gconf bug + ln -s libc.so.6 ./lib/libc.so + + #font cache optimization, persistent cache + sed -i "s/<cachedir>.*\/var\/cache\/\(.*\)<\/cachedir>/<cachedir>\/var\/local\/\1<\/cachedir>/g" ./etc/fonts/fonts.conf + + #set up a nice gentoo-like PS1 + echo "export PS1=\"\[\033[01;32m\]\u@\h\[\033[01;34m\] \w \$\[\033[00m\] \"">> ./etc/profile + + #load modules on boot + [ -d ./etc/modutils ] || mkdir ./etc/modutils + echo "g_ether" > ./etc/modutils/g_ether + echo "ppp_generic" > ./etc/modutils/ppp_generic + # FIXME: Only do this for GTA02 + # FIXME: investigate why module_autoload in machine config doesn't work + echo "snd-soc-neo1973-gta02-wm8753" > ./etc/modutils/snd-soc-neo + + #set up some variables to improve default settings + echo "if [ \"\$DISPLAY\" = \"\" ]" >> ./etc/profile + echo "then" >> ./etc/profile + echo " export DISPLAY=localhost:0" >> ./etc/profile + echo "fi" >> ./etc/profile + echo "export HISTFILESIZE=1000" >> ./etc/profile + echo "export HISTSIZE=1000" >> ./etc/profile + echo "alias rm='rm -i'; alias cp='cp -i'; alias mv='mv -i'" >> ./etc/profile + echo "alias la='ls $LS_OPTIONS -ltrA'; alias lh='ls $LS_OPTIONS -ltrh'; alias lr='ls $LS_OPTIONS -ltr';" >> ./etc/profile + echo "alias lR='ls $LS_OPTIONS -ltrR'" >> ./etc/profile + echo "# set your locale here:" >> ./etc/profile + echo "export LANG=en_US.UTF-8" >> ./etc/profile + + # Add some missing entries to the passwd and group file; but do so carefully + # since this will be fixed upstream at some point. + grep -q '^tss:' ./etc/passwd || echo 'tss:x:93:93:Linux TSS User:/bin:/bin/sh' >>./etc/passwd + grep -q '^scanner:' ./etc/group || echo 'scanner:*:91:' >>./etc/group + grep -q '^nvram:' ./etc/group || echo 'nvram:*:92:' >>./etc/group + grep -q '^tss:' ./etc/group || echo 'tss:*:93:' >>./etc/group + grep -q '^fuse:' ./etc/group || echo 'fuse:*:94:' >>./etc/group + grep -q '^kvm:' ./etc/group || echo 'kvm:*:95:' >>./etc/group + grep -q '^rdma:' ./etc/group || echo 'rdma:*:96:' >>./etc/group + + cd $curdir +} + +shr_rootfs_gta02_postprocess() { + curdir=$PWD + cd ${IMAGE_ROOTFS} + cd ${IMAGE_ROOTFS}/boot + ln -s uImage uImage-GTA02.bin + cd $curdir + #sed -i 's/#SCORouting=PCM/SCORouting=PCM/' ${IMAGE_ROOTFS}/etc/bluetooth/audio.conf +} + +shr_rootfs_gta01_postprocess() { + curdir=$PWD + cd ${IMAGE_ROOTFS} + cd ${IMAGE_ROOTFS}/boot + ln -s uImage uImage-GTA01.bin + cd $curdir + #sed -i 's/#SCORouting=PCM/SCORouting=PCM/' ${IMAGE_ROOTFS}/etc/bluetooth/audio.conf +} + +ROOTFS_POSTPROCESS_COMMAND += " shr_rootfs_postprocess" + +ROOTFS_POSTPROCESS_COMMAND_append_om-gta02 = ";shr_rootfs_gta02_postprocess" +ROOTFS_POSTPROCESS_COMMAND_append_om-gta01 = ";shr_rootfs_gta01_postprocess" + +#do_testlab() { +# : +#} diff --git a/recipes/images/shr-image/boot/append-GTA02 b/recipes/images/shr-image/boot/append-GTA02 new file mode 100644 index 0000000000..4901a091e7 --- /dev/null +++ b/recipes/images/shr-image/boot/append-GTA02 @@ -0,0 +1,2 @@ +loglevel=1 quiet splash + diff --git a/recipes/images/shr-image/etc/htoprc b/recipes/images/shr-image/etc/htoprc new file mode 100644 index 0000000000..e7bb5b7879 --- /dev/null +++ b/recipes/images/shr-image/etc/htoprc @@ -0,0 +1,21 @@ +# Beware! This file is rewritten every time htop exits. +# The parser is also very primitive, and not human-friendly. +# (I know, it's in the todo list). +fields=39 46 47 49 1 +sort_key=46 +sort_direction=1 +hide_threads=0 +hide_kernel_threads=1 +hide_userland_threads=0 +shadow_other_users=0 +highlight_base_name=0 +highlight_megabytes=1 +tree_view=0 +header_margin=0 +detailed_cpu_time=1 +color_scheme=0 +delay=15 +left_meters=AllCPUs Memory +left_meter_modes=1 1 +right_meters=Tasks LoadAverage Uptime +right_meter_modes=2 2 2 diff --git a/recipes/images/shr-image/etc/logrotate.d/50freesmartphone b/recipes/images/shr-image/etc/logrotate.d/50freesmartphone new file mode 100644 index 0000000000..2d3fb8196f --- /dev/null +++ b/recipes/images/shr-image/etc/logrotate.d/50freesmartphone @@ -0,0 +1,11 @@ +/var/log/frameworkd.log { + rotate 5 + weekly + compress +} + +/var/log/ophonekitd.log { + rotate 5 + weekly + compress +} diff --git a/recipes/images/shr-image/etc/profile.d/elementary.sh b/recipes/images/shr-image/etc/profile.d/elementary.sh new file mode 100755 index 0000000000..da435964a7 --- /dev/null +++ b/recipes/images/shr-image/etc/profile.d/elementary.sh @@ -0,0 +1,4 @@ +export ELM_ENGINE=x11 +export ELM_THEME=default +export ELM_SCALE=2 +export ELM_FINGER_SIZE=70 diff --git a/recipes/images/shr-lite-image.bb b/recipes/images/shr-lite-image.bb new file mode 100644 index 0000000000..fa1a7ac71a --- /dev/null +++ b/recipes/images/shr-lite-image.bb @@ -0,0 +1,5 @@ +require shr-image.inc + +IMAGE_BASENAME = "lite" + +IMAGES_LINGUAS="en-us" diff --git a/recipes/images/shr-lite-image/boot/append-GTA02 b/recipes/images/shr-lite-image/boot/append-GTA02 new file mode 100644 index 0000000000..4901a091e7 --- /dev/null +++ b/recipes/images/shr-lite-image/boot/append-GTA02 @@ -0,0 +1,2 @@ +loglevel=1 quiet splash + diff --git a/recipes/images/shr-lite-image/etc/htoprc b/recipes/images/shr-lite-image/etc/htoprc new file mode 100644 index 0000000000..e7bb5b7879 --- /dev/null +++ b/recipes/images/shr-lite-image/etc/htoprc @@ -0,0 +1,21 @@ +# Beware! This file is rewritten every time htop exits. +# The parser is also very primitive, and not human-friendly. +# (I know, it's in the todo list). +fields=39 46 47 49 1 +sort_key=46 +sort_direction=1 +hide_threads=0 +hide_kernel_threads=1 +hide_userland_threads=0 +shadow_other_users=0 +highlight_base_name=0 +highlight_megabytes=1 +tree_view=0 +header_margin=0 +detailed_cpu_time=1 +color_scheme=0 +delay=15 +left_meters=AllCPUs Memory +left_meter_modes=1 1 +right_meters=Tasks LoadAverage Uptime +right_meter_modes=2 2 2 diff --git a/recipes/images/shr-lite-image/etc/logrotate.d/50freesmartphone b/recipes/images/shr-lite-image/etc/logrotate.d/50freesmartphone new file mode 100644 index 0000000000..2d3fb8196f --- /dev/null +++ b/recipes/images/shr-lite-image/etc/logrotate.d/50freesmartphone @@ -0,0 +1,11 @@ +/var/log/frameworkd.log { + rotate 5 + weekly + compress +} + +/var/log/ophonekitd.log { + rotate 5 + weekly + compress +} diff --git a/recipes/images/shr-lite-image/etc/profile.d/elementary.sh b/recipes/images/shr-lite-image/etc/profile.d/elementary.sh new file mode 100755 index 0000000000..da435964a7 --- /dev/null +++ b/recipes/images/shr-lite-image/etc/profile.d/elementary.sh @@ -0,0 +1,4 @@ +export ELM_ENGINE=x11 +export ELM_THEME=default +export ELM_SCALE=2 +export ELM_FINGER_SIZE=70 diff --git a/recipes/intone-video/intone-video_svn.bb b/recipes/intone-video/intone-video_svn.bb new file mode 100644 index 0000000000..1047c35748 --- /dev/null +++ b/recipes/intone-video/intone-video_svn.bb @@ -0,0 +1,37 @@ +DESCRIPTION = "intone-video is a mplayer video frontend for openmoko phones" +HOMEPAGE = "http://code.google.com/p/intone-video/" +AUTHOR = "cchandel" +LICENSE = "GPLv2" +SECTION = "e/apps" +DEPENDS = "elementary eina sqlite3 edbus" +RDEPENDS = "mplayer lame libxv libsdl-x11" + +PV = "0.13+svnr${SRCPV}" +PR = "r0" + +SRC_URI = "svn://intone-video.googlecode.com/svn/trunk;module=.;proto=http" +S = "${WORKDIR}" + +inherit autotools + +do_configure_prepend() { + rm -f "${S}/INSTALL" + touch "${S}/INSTALL" + sed -i 's/intone/intone-video/g' ${S}/configure.ac + sed -i 's/\/doc\/intone$/\/share\/doc\/intone-video/g' ${S}/Makefile.am + sed -i '/^EXTRA_DIST = $(glade_DATA)/d' ${S}/src/Makefile.am + sed -i '/^gladedir = $(datadir)\/intone\/glade/d' ${S}/src/Makefile.am + sed -i '/^glade_DATA = intone.glade/d' ${S}/src/Makefile.am +} + +do_install_append() { + mv ${D}/${bindir}/intone ${D}/${bindir}/intone-video + mkdir -p "${D}/${datadir}/pixmaps" + install -m 0644 "${S}/resources/intone-video.png" "${D}/${datadir}/pixmaps" + mkdir -p "${D}/${datadir}/applications" + install -m 0644 "${S}/resources/intone-video.desktop" "${D}/${datadir}/applications" +} + + +FILES_${PN} += "/usr/share/pixmaps/* /usr/share/applications/*" + diff --git a/recipes/intone/intone/vorbis-include-id3tag.patch b/recipes/intone/intone/vorbis-include-id3tag.patch new file mode 100644 index 0000000000..71bd5e7dc8 --- /dev/null +++ b/recipes/intone/intone/vorbis-include-id3tag.patch @@ -0,0 +1,23 @@ +diff -uri intone/src/db_sqlite.c intone.mok/src/db_sqlite.c +--- intone/src/db_sqlite.c 2009-06-30 22:41:23.000000000 +0200 ++++ intone.mok/src/db_sqlite.c 2009-07-05 23:10:01.000000000 +0200 +@@ -17,7 +17,7 @@ + #include "db_sqlite.h" + #include <id3.h> + #include <vorbis/codec.h> +-#include <vorbisfile.h> ++#include <vorbis/vorbisfile.h> + #include <string.h> + + int check_file_exists(char *path) +diff -uri intone/src/Makefile.am intone.mok/src/Makefile.am +--- intone/src/Makefile.am 2009-05-15 16:29:18.000000000 +0200 ++++ intone.mok/src/Makefile.am 2009-07-05 23:54:20.000000000 +0200 +@@ -31,6 +31,6 @@ + intone_LDFLAGS = \ + -Wl,--export-dynamic + +-intone_LDADD = $(INTONE_LIBS) ++intone_LDADD = $(INTONE_LIBS) -lid3 + + EXTRA_DIST = $(glade_DATA) diff --git a/recipes/intone/intone_svn.bb b/recipes/intone/intone_svn.bb new file mode 100644 index 0000000000..5b3f06232f --- /dev/null +++ b/recipes/intone/intone_svn.bb @@ -0,0 +1,39 @@ +DESCRIPTION = "intone is a mplayer frontend for openmoko phones" +HOMEPAGE = "http://code.google.com/p/intone/" +AUTHOR = "cchandel" +LICENSE = "GPLv2" +SECTION = "e/apps" +DEPENDS = "elementary eina sqlite3 edbus libvorbis id3lib" +RDEPENDS = "mplayer lame libxv libsdl-x11" + +PV = "0.66+svnr${SRCPV}" +PR = "r1" + +SRC_URI = "svn://intone.googlecode.com/svn/trunk;module=.;proto=http \ +file://vorbis-include-id3tag.patch;pnum=1;patch=1;maxrev=18" +S = "${WORKDIR}" + +inherit autotools + +do_configure_prepend() { + rm -f "${S}/INSTALL" + touch "${S}/INSTALL" + sed -i 's/{prefix}\/doc\/intone$/{prefix}\/share\/doc\/intone/g' ${S}/Makefile.am +} + +do_install_append() { + mkdir -p "${D}/${datadir}/pixmaps" + install -m 0644 "${S}/resources/intone.png" "${D}/${datadir}/pixmaps" + mkdir -p "${D}/${datadir}/applications" + install -m 0644 "${S}/resources/intone.desktop" "${D}/${datadir}/applications" + mkdir -p "${D}/${datadir}/intone" + for ico in "${S}/resources/"*.png; do + if [ "$(basename $ico)" != "intone.png" ]; then + install -m 0644 $ico "${D}/${datadir}/intone" + fi + done +} + + +FILES_${PN} += "/usr/share/intone/* /usr/share/applications/* /usr/share/pixmaps/*" + diff --git a/recipes/jamvm/jamvm-initial_1.5.0.bb b/recipes/jamvm/jamvm-initial_1.5.0.bb index 1566deba61..4ef56c1576 100644 --- a/recipes/jamvm/jamvm-initial_1.5.0.bb +++ b/recipes/jamvm/jamvm-initial_1.5.0.bb @@ -2,7 +2,7 @@ SUMMARY = "A compact Java Virtual Machine which conforms to the JVM specificatio HOMEPAGE = "http://jamvm.sourceforge.net/" LICENSE = "GPL" -DEPENDS = "zlib-native classpath-initial jikes-initial" +DEPENDS = "zlib-native classpath-initial jikes-initial libffi-native" PR = "r1" diff --git a/recipes/kexec/files/kexec-tools-2-arm-add-uImage.patch b/recipes/kexec/files/kexec-tools-2-arm-add-uImage.patch new file mode 100644 index 0000000000..69a1588ba2 --- /dev/null +++ b/recipes/kexec/files/kexec-tools-2-arm-add-uImage.patch @@ -0,0 +1,271 @@ +From 160f15aa3b87b6b7b16ccad99f5ce110cacb8256 Mon Sep 17 00:00:00 2001 +From: Marc Andre Tanner <mat at brain-dump.org> +Date: Fri, 20 Nov 2009 15:07:42 +0100 +Subject: [PATCH 2/2] kexec-arm: add uImage support + +uImages are basically just zImages with a special header, +we therefore just skip the header and let the normal zImage +infrastructure do the actual work. + +Signed-off-by: Marc Andre Tanner <mat at brain-dump.org> +--- + kexec/arch/arm/Makefile | 2 + + kexec/arch/arm/kexec-arm.c | 3 + + kexec/arch/arm/kexec-arm.h | 4 + + kexec/arch/arm/kexec-uImage-arm.c | 33 ++++++++ + kexec/arch/arm/kexec-uImage-arm.h | 161 +++++++++++++++++++++++++++++++++++++ + 5 files changed, 203 insertions(+), 0 deletions(-) + create mode 100644 kexec/arch/arm/kexec-uImage-arm.c + create mode 100644 kexec/arch/arm/kexec-uImage-arm.h + +diff --git a/kexec/arch/arm/Makefile b/kexec/arch/arm/Makefile +index e05e4c7..806c4d9 100644 +--- a/kexec/arch/arm/Makefile ++++ b/kexec/arch/arm/Makefile +@@ -3,8 +3,10 @@ + # + arm_KEXEC_SRCS= kexec/arch/arm/kexec-elf-rel-arm.c + arm_KEXEC_SRCS+= kexec/arch/arm/kexec-zImage-arm.c ++arm_KEXEC_SRCS+= kexec/arch/arm/kexec-uImage-arm.c + arm_KEXEC_SRCS+= kexec/arch/arm/kexec-arm.c + + dist += kexec/arch/arm/Makefile $(arm_KEXEC_SRCS) \ + kexec/arch/arm/kexec-arm.h \ ++ kexec/arch/arm/kexec-uImage-arm.h \ + kexec/arch/arm/include/arch/options.h +diff --git a/kexec/arch/arm/kexec-arm.c b/kexec/arch/arm/kexec-arm.c +index 2e50489..3fdf839 100644 +--- a/kexec/arch/arm/kexec-arm.c ++++ b/kexec/arch/arm/kexec-arm.c +@@ -74,6 +74,9 @@ int get_memory_ranges(struct memory_range **range, int *ranges, + + /* Supported file types and callbacks */ + struct file_type file_type[] = { ++ /* uImage is probed before zImage because the latter also accepts ++ uncompressed images. */ ++ {"uImage", uImage_arm_probe, uImage_arm_load, zImage_arm_usage}, + {"zImage", zImage_arm_probe, zImage_arm_load, zImage_arm_usage}, + }; + int file_types = sizeof(file_type) / sizeof(file_type[0]); +diff --git a/kexec/arch/arm/kexec-arm.h b/kexec/arch/arm/kexec-arm.h +index bb41ce0..0d9a066 100644 +--- a/kexec/arch/arm/kexec-arm.h ++++ b/kexec/arch/arm/kexec-arm.h +@@ -6,4 +6,8 @@ int zImage_arm_load(int argc, char **argv, const char *buf, off_t len, + struct kexec_info *info); + void zImage_arm_usage(void); + ++int uImage_arm_probe(const char *buf, off_t len); ++int uImage_arm_load(int argc, char **argv, const char *buf, off_t len, ++ struct kexec_info *info); ++ + #endif /* KEXEC_ARM_H */ +diff --git a/kexec/arch/arm/kexec-uImage-arm.c b/kexec/arch/arm/kexec-uImage-arm.c +new file mode 100644 +index 0000000..218148a +--- /dev/null ++++ b/kexec/arch/arm/kexec-uImage-arm.c +@@ -0,0 +1,33 @@ ++/* ++ * uImage support added by Marc Andre Tanner <mat at brain-dump.org> ++ */ ++#include <stdint.h> ++#include <string.h> ++#include <sys/types.h> ++#include "../../kexec.h" ++#include "kexec-arm.h" ++#include "kexec-uImage-arm.h" ++ ++int uImage_arm_probe(const char *buf, off_t len) ++{ ++ struct image_header header; ++ ++ if (len < sizeof(header)) ++ return -1; ++ ++ memcpy(&header, buf, sizeof(header)); ++ ++ if (cpu_to_be32(header.ih_magic) != IH_MAGIC) ++ return -1; ++ ++ /* XXX: check CRC Checksum? */ ++ ++ return 0; ++} ++ ++int uImage_arm_load(int argc, char **argv, const char *buf, off_t len, ++ struct kexec_info *info) ++{ ++ return zImage_arm_load(argc, argv, buf + sizeof(struct image_header), ++ len - sizeof(struct image_header), info); ++} +diff --git a/kexec/arch/arm/kexec-uImage-arm.h b/kexec/arch/arm/kexec-uImage-arm.h +new file mode 100644 +index 0000000..b9079a4 +--- /dev/null ++++ b/kexec/arch/arm/kexec-uImage-arm.h +@@ -0,0 +1,161 @@ ++/* ++ * (C) Copyright 2000-2005 ++ * Wolfgang Denk, DENX Software Engineering, wd at denx.de. ++ * ++ * See file CREDITS for list of people who contributed to this ++ * project. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ ******************************************************************** ++ * NOTE: This header file defines an interface to U-Boot. Including ++ * this (unmodified) header file in another file is considered normal ++ * use of U-Boot, and does *not* fall under the heading of "derived ++ * work". ++ ******************************************************************** ++ */ ++ ++#ifndef __IMAGE_H__ ++#define __IMAGE_H__ ++ ++/* ++ * Operating System Codes ++ */ ++#define IH_OS_INVALID 0 /* Invalid OS */ ++#define IH_OS_OPENBSD 1 /* OpenBSD */ ++#define IH_OS_NETBSD 2 /* NetBSD */ ++#define IH_OS_FREEBSD 3 /* FreeBSD */ ++#define IH_OS_4_4BSD 4 /* 4.4BSD */ ++#define IH_OS_LINUX 5 /* Linux */ ++#define IH_OS_SVR4 6 /* SVR4 */ ++#define IH_OS_ESIX 7 /* Esix */ ++#define IH_OS_SOLARIS 8 /* Solaris */ ++#define IH_OS_IRIX 9 /* Irix */ ++#define IH_OS_SCO 10 /* SCO */ ++#define IH_OS_DELL 11 /* Dell */ ++#define IH_OS_NCR 12 /* NCR */ ++#define IH_OS_LYNXOS 13 /* LynxOS */ ++#define IH_OS_VXWORKS 14 /* VxWorks */ ++#define IH_OS_PSOS 15 /* pSOS */ ++#define IH_OS_QNX 16 /* QNX */ ++#define IH_OS_U_BOOT 17 /* Firmware */ ++#define IH_OS_RTEMS 18 /* RTEMS */ ++#define IH_OS_ARTOS 19 /* ARTOS */ ++#define IH_OS_UNITY 20 /* Unity OS */ ++ ++/* ++ * CPU Architecture Codes (supported by Linux) ++ */ ++#define IH_CPU_INVALID 0 /* Invalid CPU */ ++#define IH_CPU_ALPHA 1 /* Alpha */ ++#define IH_CPU_ARM 2 /* ARM */ ++#define IH_CPU_I386 3 /* Intel x86 */ ++#define IH_CPU_IA64 4 /* IA64 */ ++#define IH_CPU_MIPS 5 /* MIPS */ ++#define IH_CPU_MIPS64 6 /* MIPS 64 Bit */ ++#define IH_CPU_PPC 7 /* PowerPC */ ++#define IH_CPU_S390 8 /* IBM S390 */ ++#define IH_CPU_SH 9 /* SuperH */ ++#define IH_CPU_SPARC 10 /* Sparc */ ++#define IH_CPU_SPARC64 11 /* Sparc 64 Bit */ ++#define IH_CPU_M68K 12 /* M68K */ ++#define IH_CPU_NIOS 13 /* Nios-32 */ ++#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */ ++#define IH_CPU_NIOS2 15 /* Nios-II */ ++#define IH_CPU_BLACKFIN 16 /* Blackfin */ ++#define IH_CPU_AVR32 17 /* AVR32 */ ++ ++/* ++ * Image Types ++ * ++ * "Standalone Programs" are directly runnable in the environment ++ * provided by U-Boot; it is expected that (if they behave ++ * well) you can continue to work in U-Boot after return from ++ * the Standalone Program. ++ * "OS Kernel Images" are usually images of some Embedded OS which ++ * will take over control completely. Usually these programs ++ * will install their own set of exception handlers, device ++ * drivers, set up the MMU, etc. - this means, that you cannot ++ * expect to re-enter U-Boot except by resetting the CPU. ++ * "RAMDisk Images" are more or less just data blocks, and their ++ * parameters (address, size) are passed to an OS kernel that is ++ * being started. ++ * "Multi-File Images" contain several images, typically an OS ++ * (Linux) kernel image and one or more data images like ++ * RAMDisks. This construct is useful for instance when you want ++ * to boot over the network using BOOTP etc., where the boot ++ * server provides just a single image file, but you want to get ++ * for instance an OS kernel and a RAMDisk image. ++ * ++ * "Multi-File Images" start with a list of image sizes, each ++ * image size (in bytes) specified by an "uint32_t" in network ++ * byte order. This list is terminated by an "(uint32_t)0". ++ * Immediately after the terminating 0 follow the images, one by ++ * one, all aligned on "uint32_t" boundaries (size rounded up to ++ * a multiple of 4 bytes - except for the last file). ++ * ++ * "Firmware Images" are binary images containing firmware (like ++ * U-Boot or FPGA images) which usually will be programmed to ++ * flash memory. ++ * ++ * "Script files" are command sequences that will be executed by ++ * U-Boot's command interpreter; this feature is especially ++ * useful when you configure U-Boot to use a real shell (hush) ++ * as command interpreter (=> Shell Scripts). ++ */ ++ ++#define IH_TYPE_INVALID 0 /* Invalid Image */ ++#define IH_TYPE_STANDALONE 1 /* Standalone Program */ ++#define IH_TYPE_KERNEL 2 /* OS Kernel Image */ ++#define IH_TYPE_RAMDISK 3 /* RAMDisk Image */ ++#define IH_TYPE_MULTI 4 /* Multi-File Image */ ++#define IH_TYPE_FIRMWARE 5 /* Firmware Image */ ++#define IH_TYPE_SCRIPT 6 /* Script file */ ++#define IH_TYPE_FILESYSTEM 7 /* Filesystem Image (any type) */ ++#define IH_TYPE_FLATDT 8 /* Binary Flat Device Tree Blob */ ++ ++/* ++ * Compression Types ++ */ ++#define IH_COMP_NONE 0 /* No Compression Used */ ++#define IH_COMP_GZIP 1 /* gzip Compression Used */ ++#define IH_COMP_BZIP2 2 /* bzip2 Compression Used */ ++#define IH_COMP_LZMA 3 /* lzma Compression Used */ ++ ++#define IH_MAGIC 0x27051956 /* Image Magic Number */ ++#define IH_NMLEN 32 /* Image Name Length */ ++ ++/* ++ * all data in network byte order (aka natural aka bigendian) ++ */ ++ ++typedef struct image_header { ++ uint32_t ih_magic; /* Image Header Magic Number */ ++ uint32_t ih_hcrc; /* Image Header CRC Checksum */ ++ uint32_t ih_time; /* Image Creation Timestamp */ ++ uint32_t ih_size; /* Image Data Size */ ++ uint32_t ih_load; /* Data Load Address */ ++ uint32_t ih_ep; /* Entry Point Address */ ++ uint32_t ih_dcrc; /* Image Data CRC Checksum */ ++ uint8_t ih_os; /* Operating System */ ++ uint8_t ih_arch; /* CPU architecture */ ++ uint8_t ih_type; /* Image Type */ ++ uint8_t ih_comp; /* Compression Type */ ++ uint8_t ih_name[IH_NMLEN]; /* Image Name */ ++} image_header_t; ++ ++ ++#endif /* __IMAGE_H__ */ +-- +1.6.4.4 + diff --git a/recipes/kexec/kexec-tools-klibc-static_1.101.bb b/recipes/kexec/kexec-tools-klibc-static_1.101.bb index 4ad59ce257..5d131d839e 100644 --- a/recipes/kexec/kexec-tools-klibc-static_1.101.bb +++ b/recipes/kexec/kexec-tools-klibc-static_1.101.bb @@ -1,10 +1,12 @@ # the binaries are statical linked against klibc require kexec-tools.inc -PR = "r5" +PR = "r6" DEPENDS = "klibc" -SRC_URI += "file://kexec-klibc.patch;patch=1" +SRC_URI += "file://kexec-static.patch;patch=1 \ + file://kexec-klibc.patch;patch=1 \ + " S = "${WORKDIR}/kexec-tools-${PV}" EXTRA_OECONF = " --without-zlib" diff --git a/recipes/kexec/kexec-tools-klibc-static_2.0.1.bb b/recipes/kexec/kexec-tools-klibc-static_2.0.1.bb index d7d114b51d..54e4601d20 100644 --- a/recipes/kexec/kexec-tools-klibc-static_2.0.1.bb +++ b/recipes/kexec/kexec-tools-klibc-static_2.0.1.bb @@ -3,7 +3,7 @@ require kexec-tools2.inc DEFAULT_PREFERENCE = "1" -PR = "r1" +PR = "r2" DEPENDS = "klibc" SRC_URI += "file://kexec-tools-2-headers.patch;patch=1 \ diff --git a/recipes/kexec/kexec-tools2.inc b/recipes/kexec/kexec-tools2.inc index c34cc35e03..a21afe4003 100644 --- a/recipes/kexec/kexec-tools2.inc +++ b/recipes/kexec/kexec-tools2.inc @@ -11,4 +11,5 @@ inherit autotools SRC_URI = "http://www.kernel.org/pub/linux/kernel/people/horms/kexec-tools/kexec-tools-${PV}.tar.gz \ file://fix-arm-arch-detection.patch;patch=1 \ file://no-getline-no-fscanf.patch;patch=1 \ + file://kexec-tools-2-arm-add-uImage.patch;patch=1 \ " diff --git a/recipes/kexec/kexec-tools_2.0.1.bb b/recipes/kexec/kexec-tools_2.0.1.bb index f43ca60401..606b3fd634 100644 --- a/recipes/kexec/kexec-tools_2.0.1.bb +++ b/recipes/kexec/kexec-tools_2.0.1.bb @@ -2,6 +2,6 @@ require kexec-tools2.inc export LDFLAGS = "-L${STAGING_LIBDIR}" EXTRA_OECONF = " --with-zlib=yes" -PR = "r1" +PR = "r2" DEFAULT_PREFERENCE = "1" diff --git a/recipes/kexecboot/kexecboot_git.bb b/recipes/kexecboot/kexecboot_git.bb index 3bd280c206..9aa2fdc3f9 100644 --- a/recipes/kexecboot/kexecboot_git.bb +++ b/recipes/kexecboot/kexecboot_git.bb @@ -1,8 +1,8 @@ PV = "0.5" -PR = "r6+gitr${SRCREV}" +PR = "r7+gitr${SRCREV}" SRC_URI = "git://git.linuxtogo.org/home/groups/kexecboot/kexecboot.git;protocol=git " -SRCREV = "40e5be92f045f2a7cfc918f4b1acc42f6cc013e9" +SRCREV = "ddf66724ce68509a8d80727f26f682b9a9341ff5" S = "${WORKDIR}/git" diff --git a/recipes/libacpi/libacpi_0.2.bb b/recipes/libacpi/libacpi_0.2.bb index f3990306b1..e60d934ea8 100644 --- a/recipes/libacpi/libacpi_0.2.bb +++ b/recipes/libacpi/libacpi_0.2.bb @@ -14,11 +14,6 @@ FILES_${PN}-bin = "${bindir}" COMPATIBLE_HOST = '(x86_64|i.86.*)-(linux|freebsd.*)' -do_stage() { - install -m 0644 libacpi.h ${STAGING_INCDIR} - oe_libinstall -so libacpi ${STAGING_LIBDIR} -} - do_install() { oe_runmake install DESTDIR=${D} PREFIX=${exec_prefix} } diff --git a/recipes/libical/libical_0.44.bb b/recipes/libical/libical_0.44.bb new file mode 100644 index 0000000000..e1889bc71b --- /dev/null +++ b/recipes/libical/libical_0.44.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "iCal and scheduling (RFC 2445, 2446, 2447) library" +HOMEPAGE = "http://www.softwarestudio.org/softwarestudio/app.php/libical" +SECTION = "libs" +LICENSE = "LGPL / MPL" +PR = "r0" + +SRC_URI = "${SOURCEFORGE_MIRROR}/freeassociation/${P}.tar.gz \ + " + + +inherit autotools + +do_stage () { + autotools_stage_all +} diff --git a/recipes/libsdl/libsdl-mixer_1.2.11.bb b/recipes/libsdl/libsdl-mixer_1.2.11.bb new file mode 100644 index 0000000000..5ecd2944a2 --- /dev/null +++ b/recipes/libsdl/libsdl-mixer_1.2.11.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "Simple DirectMedia Layer mixer library." +SECTION = "libs" +PRIORITY = "optional" +DEPENDS = "virtual/libsdl libmikmod libvorbis" +LICENSE = "LGPL" + +SRC_URI = "http://www.libsdl.org/projects/SDL_mixer/release/SDL_mixer-${PV}.tar.gz" +S = "${WORKDIR}/SDL_mixer-${PV}" + +export SDL_CONFIG = "${STAGING_BINDIR_CROSS}/sdl-config" + +inherit autotools_stage + +EXTRA_OECONF = "--disable-music-mp3" +# although we build smpeg... need to find out how +# to deal with optional dependencies + +do_compile() { + # Override SDL_LIBS to include a linker rpath so the linker + # can find the correct libdl.so when it links playwave to + # libSDL_mixer.so. + oe_runmake SDL_LIBS="$(pkg-config sdl --libs) -Wl,-rpath-link,${STAGING_LIBDIR}" +} diff --git a/recipes/linphone/linphone-3.1.0/preferences-segv.patch b/recipes/linphone/linphone-3.1.0/preferences-segv.patch new file mode 100644 index 0000000000..529688b68f --- /dev/null +++ b/recipes/linphone/linphone-3.1.0/preferences-segv.patch @@ -0,0 +1,11 @@ +--- linphone-3.1.0/coreapi/linphonecore.c 2009/03/24 22:24:49 366 ++++ linphone-3.1.0/coreapi/linphonecore.c 2009/03/24 22:43:14 367 +@@ -2108,7 +2108,7 @@ + if (olddev!=NULL && olddev!=lc->video_conf.device){ + toggle_video_preview(lc,FALSE);/*restart the video local preview*/ + } +- if (lc->ready){ ++ if (lc->ready && lc->video_conf.device){ + vd=ms_web_cam_get_string_id(lc->video_conf.device); + if (vd && strstr(vd,"Static picture")!=NULL){ + vd=NULL; diff --git a/recipes/linphone/linphone_3.1.0.bb b/recipes/linphone/linphone_3.1.0.bb new file mode 100644 index 0000000000..bebaa169e2 --- /dev/null +++ b/recipes/linphone/linphone_3.1.0.bb @@ -0,0 +1,82 @@ +DESCRIPTION = "SIP-based IP phone (console edition)" +HOMEPAGE = "http://www.linphone.org/?lang=us" +SECTION = "x11/utils" +LICENSE = "GPLv2" + +PR = "r1" + +DEPENDS = "intltool libosip2 speex libogg alsa-lib readline libexosip2" +DEPENDS_${PN} = "liblinphone" +DEPENDS_${PN}c = "liblinphone readline" +DEPENDS_liblinphone = "libmediastreamer libortp libosip2" +#DEPENDS_libquickstream = "speex libmediastreamer alsa-lib" +DEPENDS_libmediastreamer = "speex libogg alsa-lib libortp" + +RDEPENDS_${PN} = "liblinphone" +RDEPENDS_${PN}c = "liblinphone readline" +RDEPENDS_liblinphone = "libmediastreamer libortp libosip2" +#RDEPENDS_libquickstream = "speex libmediastreamer libasound" +RDEPENDS_libmediastreamer = "speex libogg libasound libortp" + +PROVIDES += "linphone linphonec liblinphone" + +SRC_URI = "http://download.savannah.nongnu.org/releases/linphone/3.1.x/sources/linphone-${PV}.tar.gz \ + file://b64_assert.patch;patch=1 \ + file://preferences-segv.patch;patch=1 \ + " + +S = "${WORKDIR}/linphone-${PV}" + +inherit autotools pkgconfig + +export PKG_CONFIG=${STAGING_BINDIR_NATIVE}/pkg-config + +EXTRA_OECONF = "--disable-gtk-doc \ + --without-ffmpeg --disable-video \ + --enable-alsa \ + --with-osip=${STAGING_DIR_HOST}${layout_exec_prefix} \ + --with-readline=${STAGING_DIR_HOST}${layout_exec_prefix} \ + --with-speex=${STAGING_DIR_HOST}${layout_exec_prefix} \ + --disable-truespeech --disable-manual \ + --enable-console_ui=yes --enable-gtk_ui=yes \ + --with-realprefix=/usr \ + " + +PARALLEL_MAKE = "" + +do_stage () { + install -d ${STAGING_DATADIR}/aclocal + oe_libinstall -a -so liblinphone ${STAGING_LIBDIR} + install -d ${STAGING_INCDIR}/linphone + install -m 0644 ${S}/coreapi/linphonecore.h ${STAGING_INCDIR}/linphone + install -m 0644 ${S}/coreapi/lpconfig.h ${STAGING_INCDIR}/linphone + oe_libinstall -a -so libmediastreamer ${STAGING_LIBDIR} +# oe_libinstall -a -so libquickstream ${STAGING_LIBDIR} + install -d ${STAGING_INCDIR}/mediastreamer2 + install -m 0644 ${S}/mediastreamer2/include/mediastreamer2/*.h ${STAGING_INCDIR}/mediastreamer2 + install -d ${STAGING_INCDIR}/ortp + oe_libinstall -a -so libortp ${STAGING_LIBDIR}/ + install -m 0644 ${S}/oRTP/include/ortp/*.h ${STAGING_INCDIR}/ortp/ + autotools_stage_all +} + +PACKAGES += "linphonec linphone-rings liblinphone libmediastreamer libortp" + +FILES_${PN} = "${bindir}/linphone-3 \ + ${bindir}/linphone \ + ${datadir}/linphone \ + ${datadir}/pixmaps \ + ${datadir}/applications \ + ${datadir}/gnome/apps \ + ${datadir}/sounds/linphone/hello8000.wav \ + ${datadir}/sounds/linphone/hello16000.wav \ + ${datadir}/images/nowebcamCIF.jpg \ + " +FILES_${PN}c = "${bindir}/linphonec ${bindir}/linphonecsh ${bindir}/sipomatic ${datadir}/sounds/linphone/ringback.wav" +FILES_${PN}-rings = "${datadir}/sounds/linphone/rings" +FILES_liblinphone = "${libdir}/liblinphone.so.*" +#FILES_libquickstream = "${libdir}/libquickstream.so.*" +FILES_libmediastreamer = "${libdir}/libmediastreamer.so.* /usr/libexec/mediastream" +FILES_libortp = "${libdir}/libortp.so.*" +FILES_${PN}-dev += "${libdir}/*.a ${libdir}/*.la ${libdir}/pkgconfig ${includedir}" + diff --git a/recipes/linux/linux-2.6.31/0001-Squashfs-move-zlib-decompression-wrapper-code-into.patch b/recipes/linux/linux-2.6.31/0001-Squashfs-move-zlib-decompression-wrapper-code-into.patch new file mode 100644 index 0000000000..32f79f45f2 --- /dev/null +++ b/recipes/linux/linux-2.6.31/0001-Squashfs-move-zlib-decompression-wrapper-code-into.patch @@ -0,0 +1,255 @@ +From 6c4419d997d4431bb62e73475cd6b084e83efbd1 Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Tue, 22 Sep 2009 19:25:24 +0100 +Subject: [PATCH] Squashfs: move zlib decompression wrapper code into a separate file + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/Makefile | 2 +- + fs/squashfs/block.c | 74 ++---------------------------- + fs/squashfs/squashfs.h | 4 ++ + fs/squashfs/zlib_wrapper.c | 109 ++++++++++++++++++++++++++++++++++++++++++++ + 4 files changed, 118 insertions(+), 71 deletions(-) + +diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile +index 70e3244..a397e6f 100644 +--- a/fs/squashfs/Makefile ++++ b/fs/squashfs/Makefile +@@ -4,4 +4,4 @@ + + obj-$(CONFIG_SQUASHFS) += squashfs.o + squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o +-squashfs-y += namei.o super.o symlink.o ++squashfs-y += namei.o super.o symlink.o zlib_wrapper.o +diff --git a/fs/squashfs/block.c b/fs/squashfs/block.c +index 2a79603..5cd3934 100644 +--- a/fs/squashfs/block.c ++++ b/fs/squashfs/block.c +@@ -29,7 +29,6 @@ + #include <linux/fs.h> + #include <linux/vfs.h> + #include <linux/slab.h> +-#include <linux/mutex.h> + #include <linux/string.h> + #include <linux/buffer_head.h> + #include <linux/zlib.h> +@@ -153,72 +152,10 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index, + } + + if (compressed) { +- int zlib_err = 0, zlib_init = 0; +- +- /* +- * Uncompress block. +- */ +- +- mutex_lock(&msblk->read_data_mutex); +- +- msblk->stream.avail_out = 0; +- msblk->stream.avail_in = 0; +- +- bytes = length; +- do { +- if (msblk->stream.avail_in == 0 && k < b) { +- avail = min(bytes, msblk->devblksize - offset); +- bytes -= avail; +- wait_on_buffer(bh[k]); +- if (!buffer_uptodate(bh[k])) +- goto release_mutex; +- +- if (avail == 0) { +- offset = 0; +- put_bh(bh[k++]); +- continue; +- } +- +- msblk->stream.next_in = bh[k]->b_data + offset; +- msblk->stream.avail_in = avail; +- offset = 0; +- } +- +- if (msblk->stream.avail_out == 0 && page < pages) { +- msblk->stream.next_out = buffer[page++]; +- msblk->stream.avail_out = PAGE_CACHE_SIZE; +- } +- +- if (!zlib_init) { +- zlib_err = zlib_inflateInit(&msblk->stream); +- if (zlib_err != Z_OK) { +- ERROR("zlib_inflateInit returned" +- " unexpected result 0x%x," +- " srclength %d\n", zlib_err, +- srclength); +- goto release_mutex; +- } +- zlib_init = 1; +- } +- +- zlib_err = zlib_inflate(&msblk->stream, Z_SYNC_FLUSH); +- +- if (msblk->stream.avail_in == 0 && k < b) +- put_bh(bh[k++]); +- } while (zlib_err == Z_OK); +- +- if (zlib_err != Z_STREAM_END) { +- ERROR("zlib_inflate error, data probably corrupt\n"); +- goto release_mutex; +- } +- +- zlib_err = zlib_inflateEnd(&msblk->stream); +- if (zlib_err != Z_OK) { +- ERROR("zlib_inflate error, data probably corrupt\n"); +- goto release_mutex; +- } +- length = msblk->stream.total_out; +- mutex_unlock(&msblk->read_data_mutex); ++ length = zlib_uncompress(msblk, buffer, bh, b, offset, length, ++ srclength, pages); ++ if (length < 0) ++ goto read_failure; + } else { + /* + * Block is uncompressed. +@@ -255,9 +192,6 @@ int squashfs_read_data(struct super_block *sb, void **buffer, u64 index, + kfree(bh); + return length; + +-release_mutex: +- mutex_unlock(&msblk->read_data_mutex); +- + block_release: + for (; k < b; k++) + put_bh(bh[k]); +diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h +index 0e9feb6..988bdce 100644 +--- a/fs/squashfs/squashfs.h ++++ b/fs/squashfs/squashfs.h +@@ -70,6 +70,10 @@ extern struct inode *squashfs_iget(struct super_block *, long long, + unsigned int); + extern int squashfs_read_inode(struct inode *, long long); + ++/* zlib_wrapper.c */ ++extern int zlib_uncompress(struct squashfs_sb_info *, void **, ++ struct buffer_head **, int, int, int, int, int); ++ + /* + * Inodes and files operations + */ +diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c +new file mode 100644 +index 0000000..486a2a7 +--- /dev/null ++++ b/fs/squashfs/zlib_wrapper.c +@@ -0,0 +1,109 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++ * Phillip Lougher <phillip@lougher.demon.co.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ++ * ++ * zlib_wrapper.c ++ */ ++ ++ ++#include <linux/mutex.h> ++#include <linux/buffer_head.h> ++#include <linux/zlib.h> ++ ++#include "squashfs_fs.h" ++#include "squashfs_fs_sb.h" ++#include "squashfs_fs_i.h" ++#include "squashfs.h" ++ ++int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, ++ struct buffer_head **bh, int b, int offset, int length, int srclength, ++ int pages) ++{ ++ int zlib_err = 0, zlib_init = 0; ++ int avail, bytes, k = 0, page = 0; ++ ++ mutex_lock(&msblk->read_data_mutex); ++ ++ msblk->stream.avail_out = 0; ++ msblk->stream.avail_in = 0; ++ ++ bytes = length; ++ do { ++ if (msblk->stream.avail_in == 0 && k < b) { ++ avail = min(bytes, msblk->devblksize - offset); ++ bytes -= avail; ++ wait_on_buffer(bh[k]); ++ if (!buffer_uptodate(bh[k])) ++ goto release_mutex; ++ ++ if (avail == 0) { ++ offset = 0; ++ put_bh(bh[k++]); ++ continue; ++ } ++ ++ msblk->stream.next_in = bh[k]->b_data + offset; ++ msblk->stream.avail_in = avail; ++ offset = 0; ++ } ++ ++ if (msblk->stream.avail_out == 0 && page < pages) { ++ msblk->stream.next_out = buffer[page++]; ++ msblk->stream.avail_out = PAGE_CACHE_SIZE; ++ } ++ ++ if (!zlib_init) { ++ zlib_err = zlib_inflateInit(&msblk->stream); ++ if (zlib_err != Z_OK) { ++ ERROR("zlib_inflateInit returned unexpected " ++ "result 0x%x, srclength %d\n", ++ zlib_err, srclength); ++ goto release_mutex; ++ } ++ zlib_init = 1; ++ } ++ ++ zlib_err = zlib_inflate(&msblk->stream, Z_SYNC_FLUSH); ++ ++ if (msblk->stream.avail_in == 0 && k < b) ++ put_bh(bh[k++]); ++ } while (zlib_err == Z_OK); ++ ++ if (zlib_err != Z_STREAM_END) { ++ ERROR("zlib_inflate error, data probably corrupt\n"); ++ goto release_mutex; ++ } ++ ++ zlib_err = zlib_inflateEnd(&msblk->stream); ++ if (zlib_err != Z_OK) { ++ ERROR("zlib_inflate error, data probably corrupt\n"); ++ goto release_mutex; ++ } ++ ++ mutex_unlock(&msblk->read_data_mutex); ++ return msblk->stream.total_out; ++ ++release_mutex: ++ mutex_unlock(&msblk->read_data_mutex); ++ ++ for (; k < b; k++) ++ put_bh(bh[k]); ++ ++ return -EIO; ++} +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/0002-Squashfs-Factor-out-remaining-zlib-dependencies-int.patch b/recipes/linux/linux-2.6.31/0002-Squashfs-Factor-out-remaining-zlib-dependencies-int.patch new file mode 100644 index 0000000000..19e18ae461 --- /dev/null +++ b/recipes/linux/linux-2.6.31/0002-Squashfs-Factor-out-remaining-zlib-dependencies-int.patch @@ -0,0 +1,348 @@ +From 37c44e85fd49676ec15ccaeea065662c1fbcda7d Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Wed, 23 Sep 2009 19:04:49 +0100 +Subject: [PATCH] Squashfs: Factor out remaining zlib dependencies into separate wrapper file + +Move zlib buffer init/destroy code into separate wrapper file. Also +make zlib z_stream field a void * removing the need to include zlib.h +for most files. + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/block.c | 1 - + fs/squashfs/cache.c | 1 - + fs/squashfs/dir.c | 1 - + fs/squashfs/export.c | 1 - + fs/squashfs/file.c | 1 - + fs/squashfs/fragment.c | 1 - + fs/squashfs/id.c | 1 - + fs/squashfs/inode.c | 1 - + fs/squashfs/namei.c | 1 - + fs/squashfs/squashfs.h | 2 + + fs/squashfs/squashfs_fs_sb.h | 2 +- + fs/squashfs/super.c | 14 +++------ + fs/squashfs/symlink.c | 1 - + fs/squashfs/zlib_wrapper.c | 56 ++++++++++++++++++++++++++++++++--------- + 14 files changed, 51 insertions(+), 33 deletions(-) + +diff --git a/fs/squashfs/block.c b/fs/squashfs/block.c +index 5cd3934..baf7624 100644 +--- a/fs/squashfs/block.c ++++ b/fs/squashfs/block.c +@@ -31,7 +31,6 @@ + #include <linux/slab.h> + #include <linux/string.h> + #include <linux/buffer_head.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/cache.c b/fs/squashfs/cache.c +index 40c98fa..57314be 100644 +--- a/fs/squashfs/cache.c ++++ b/fs/squashfs/cache.c +@@ -51,7 +51,6 @@ + #include <linux/sched.h> + #include <linux/spinlock.h> + #include <linux/wait.h> +-#include <linux/zlib.h> + #include <linux/pagemap.h> + + #include "squashfs_fs.h" +diff --git a/fs/squashfs/dir.c b/fs/squashfs/dir.c +index 566b0ea..12b933a 100644 +--- a/fs/squashfs/dir.c ++++ b/fs/squashfs/dir.c +@@ -30,7 +30,6 @@ + #include <linux/fs.h> + #include <linux/vfs.h> + #include <linux/slab.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/export.c b/fs/squashfs/export.c +index 2b1b8fe..7f93d5a 100644 +--- a/fs/squashfs/export.c ++++ b/fs/squashfs/export.c +@@ -39,7 +39,6 @@ + #include <linux/vfs.h> + #include <linux/dcache.h> + #include <linux/exportfs.h> +-#include <linux/zlib.h> + #include <linux/slab.h> + + #include "squashfs_fs.h" +diff --git a/fs/squashfs/file.c b/fs/squashfs/file.c +index 717767d..a25c506 100644 +--- a/fs/squashfs/file.c ++++ b/fs/squashfs/file.c +@@ -47,7 +47,6 @@ + #include <linux/string.h> + #include <linux/pagemap.h> + #include <linux/mutex.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/fragment.c b/fs/squashfs/fragment.c +index b5a2c15..7c90bbd 100644 +--- a/fs/squashfs/fragment.c ++++ b/fs/squashfs/fragment.c +@@ -36,7 +36,6 @@ + #include <linux/fs.h> + #include <linux/vfs.h> + #include <linux/slab.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/id.c b/fs/squashfs/id.c +index 3795b83..b7f64bc 100644 +--- a/fs/squashfs/id.c ++++ b/fs/squashfs/id.c +@@ -34,7 +34,6 @@ + #include <linux/fs.h> + #include <linux/vfs.h> + #include <linux/slab.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/inode.c b/fs/squashfs/inode.c +index 9101dbd..49daaf6 100644 +--- a/fs/squashfs/inode.c ++++ b/fs/squashfs/inode.c +@@ -40,7 +40,6 @@ + + #include <linux/fs.h> + #include <linux/vfs.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/namei.c b/fs/squashfs/namei.c +index 9e39865..5266bd8 100644 +--- a/fs/squashfs/namei.c ++++ b/fs/squashfs/namei.c +@@ -57,7 +57,6 @@ + #include <linux/slab.h> + #include <linux/string.h> + #include <linux/dcache.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h +index 988bdce..b3eaf87 100644 +--- a/fs/squashfs/squashfs.h ++++ b/fs/squashfs/squashfs.h +@@ -71,6 +71,8 @@ extern struct inode *squashfs_iget(struct super_block *, long long, + extern int squashfs_read_inode(struct inode *, long long); + + /* zlib_wrapper.c */ ++extern void *zlib_init(void); ++extern void zlib_free(void *); + extern int zlib_uncompress(struct squashfs_sb_info *, void **, + struct buffer_head **, int, int, int, int, int); + +diff --git a/fs/squashfs/squashfs_fs_sb.h b/fs/squashfs/squashfs_fs_sb.h +index c8c6561..23a67fa 100644 +--- a/fs/squashfs/squashfs_fs_sb.h ++++ b/fs/squashfs/squashfs_fs_sb.h +@@ -64,7 +64,7 @@ struct squashfs_sb_info { + struct mutex read_data_mutex; + struct mutex meta_index_mutex; + struct meta_index *meta_index; +- z_stream stream; ++ void *stream; + __le64 *inode_lookup_table; + u64 inode_table; + u64 directory_table; +diff --git a/fs/squashfs/super.c b/fs/squashfs/super.c +index 6c197ef..6c3429b 100644 +--- a/fs/squashfs/super.c ++++ b/fs/squashfs/super.c +@@ -35,7 +35,6 @@ + #include <linux/pagemap.h> + #include <linux/init.h> + #include <linux/module.h> +-#include <linux/zlib.h> + #include <linux/magic.h> + + #include "squashfs_fs.h" +@@ -87,12 +86,9 @@ static int squashfs_fill_super(struct super_block *sb, void *data, int silent) + } + msblk = sb->s_fs_info; + +- msblk->stream.workspace = kmalloc(zlib_inflate_workspacesize(), +- GFP_KERNEL); +- if (msblk->stream.workspace == NULL) { +- ERROR("Failed to allocate zlib workspace\n"); ++ msblk->stream = zlib_init(); ++ if (msblk->stream == NULL) + goto failure; +- } + + sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); + if (sblk == NULL) { +@@ -292,17 +288,17 @@ failed_mount: + squashfs_cache_delete(msblk->block_cache); + squashfs_cache_delete(msblk->fragment_cache); + squashfs_cache_delete(msblk->read_page); ++ zlib_free(msblk->stream); + kfree(msblk->inode_lookup_table); + kfree(msblk->fragment_index); + kfree(msblk->id_table); +- kfree(msblk->stream.workspace); + kfree(sb->s_fs_info); + sb->s_fs_info = NULL; + kfree(sblk); + return err; + + failure: +- kfree(msblk->stream.workspace); ++ zlib_free(msblk->stream); + kfree(sb->s_fs_info); + sb->s_fs_info = NULL; + return -ENOMEM; +@@ -346,10 +342,10 @@ static void squashfs_put_super(struct super_block *sb) + squashfs_cache_delete(sbi->block_cache); + squashfs_cache_delete(sbi->fragment_cache); + squashfs_cache_delete(sbi->read_page); ++ zlib_free(sbi->stream); + kfree(sbi->id_table); + kfree(sbi->fragment_index); + kfree(sbi->meta_index); +- kfree(sbi->stream.workspace); + kfree(sb->s_fs_info); + sb->s_fs_info = NULL; + } +diff --git a/fs/squashfs/symlink.c b/fs/squashfs/symlink.c +index 83d8788..e80be20 100644 +--- a/fs/squashfs/symlink.c ++++ b/fs/squashfs/symlink.c +@@ -36,7 +36,6 @@ + #include <linux/slab.h> + #include <linux/string.h> + #include <linux/pagemap.h> +-#include <linux/zlib.h> + + #include "squashfs_fs.h" + #include "squashfs_fs_sb.h" +diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c +index 486a2a7..8ebbbc7 100644 +--- a/fs/squashfs/zlib_wrapper.c ++++ b/fs/squashfs/zlib_wrapper.c +@@ -31,21 +31,51 @@ + #include "squashfs_fs_i.h" + #include "squashfs.h" + ++void *zlib_init() ++{ ++ z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL); ++ if (stream == NULL) ++ goto failed; ++ stream->workspace = kmalloc(zlib_inflate_workspacesize(), ++ GFP_KERNEL); ++ if (stream->workspace == NULL) ++ goto failed; ++ ++ return stream; ++ ++failed: ++ ERROR("Failed to allocate zlib workspace\n"); ++ kfree(stream); ++ return NULL; ++} ++ ++ ++void zlib_free(void *strm) ++{ ++ z_stream *stream = strm; ++ ++ if (stream) ++ kfree(stream->workspace); ++ kfree(stream); ++} ++ ++ + int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, + struct buffer_head **bh, int b, int offset, int length, int srclength, + int pages) + { + int zlib_err = 0, zlib_init = 0; + int avail, bytes, k = 0, page = 0; ++ z_stream *stream = msblk->stream; + + mutex_lock(&msblk->read_data_mutex); + +- msblk->stream.avail_out = 0; +- msblk->stream.avail_in = 0; ++ stream->avail_out = 0; ++ stream->avail_in = 0; + + bytes = length; + do { +- if (msblk->stream.avail_in == 0 && k < b) { ++ if (stream->avail_in == 0 && k < b) { + avail = min(bytes, msblk->devblksize - offset); + bytes -= avail; + wait_on_buffer(bh[k]); +@@ -58,18 +88,18 @@ int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, + continue; + } + +- msblk->stream.next_in = bh[k]->b_data + offset; +- msblk->stream.avail_in = avail; ++ stream->next_in = bh[k]->b_data + offset; ++ stream->avail_in = avail; + offset = 0; + } + +- if (msblk->stream.avail_out == 0 && page < pages) { +- msblk->stream.next_out = buffer[page++]; +- msblk->stream.avail_out = PAGE_CACHE_SIZE; ++ if (stream->avail_out == 0 && page < pages) { ++ stream->next_out = buffer[page++]; ++ stream->avail_out = PAGE_CACHE_SIZE; + } + + if (!zlib_init) { +- zlib_err = zlib_inflateInit(&msblk->stream); ++ zlib_err = zlib_inflateInit(stream); + if (zlib_err != Z_OK) { + ERROR("zlib_inflateInit returned unexpected " + "result 0x%x, srclength %d\n", +@@ -79,9 +109,9 @@ int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, + zlib_init = 1; + } + +- zlib_err = zlib_inflate(&msblk->stream, Z_SYNC_FLUSH); ++ zlib_err = zlib_inflate(stream, Z_SYNC_FLUSH); + +- if (msblk->stream.avail_in == 0 && k < b) ++ if (stream->avail_in == 0 && k < b) + put_bh(bh[k++]); + } while (zlib_err == Z_OK); + +@@ -90,14 +120,14 @@ int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, + goto release_mutex; + } + +- zlib_err = zlib_inflateEnd(&msblk->stream); ++ zlib_err = zlib_inflateEnd(stream); + if (zlib_err != Z_OK) { + ERROR("zlib_inflate error, data probably corrupt\n"); + goto release_mutex; + } + + mutex_unlock(&msblk->read_data_mutex); +- return msblk->stream.total_out; ++ return stream->total_out; + + release_mutex: + mutex_unlock(&msblk->read_data_mutex); +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/0003-Squashfs-add-a-decompressor-framework.patch b/recipes/linux/linux-2.6.31/0003-Squashfs-add-a-decompressor-framework.patch new file mode 100644 index 0000000000..b83182536d --- /dev/null +++ b/recipes/linux/linux-2.6.31/0003-Squashfs-add-a-decompressor-framework.patch @@ -0,0 +1,442 @@ +From 327fbf47a419befc6bff74f3ca42d2b6f0841903 Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Tue, 6 Oct 2009 04:04:15 +0100 +Subject: [PATCH] Squashfs: add a decompressor framework + +This adds a decompressor framework which allows multiple compression +algorithms to be cleanly supported. + +Also update zlib wrapper and other code to use the new framework. + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/Makefile | 2 +- + fs/squashfs/block.c | 6 ++-- + fs/squashfs/decompressor.c | 58 ++++++++++++++++++++++++++++++++++++++++++ + fs/squashfs/decompressor.h | 55 +++++++++++++++++++++++++++++++++++++++ + fs/squashfs/squashfs.h | 14 +++++----- + fs/squashfs/squashfs_fs_sb.h | 41 +++++++++++++++-------------- + fs/squashfs/super.c | 45 ++++++++++++++++++------------- + fs/squashfs/zlib_wrapper.c | 17 ++++++++++-- + 8 files changed, 185 insertions(+), 53 deletions(-) + +Index: git/fs/squashfs/Makefile +=================================================================== +--- git.orig/fs/squashfs/Makefile 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/Makefile 2009-10-26 14:25:41.000000000 +0100 +@@ -4,4 +4,4 @@ + + obj-$(CONFIG_SQUASHFS) += squashfs.o + squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o +-squashfs-y += namei.o super.o symlink.o zlib_wrapper.o ++squashfs-y += namei.o super.o symlink.o zlib_wrapper.o decompressor.o +Index: git/fs/squashfs/block.c +=================================================================== +--- git.orig/fs/squashfs/block.c 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/block.c 2009-10-26 14:25:41.000000000 +0100 +@@ -36,7 +36,7 @@ + #include "squashfs_fs_sb.h" + #include "squashfs_fs_i.h" + #include "squashfs.h" +- ++#include "decompressor.h" + /* + * Read the metadata block length, this is stored in the first two + * bytes of the metadata block. +@@ -151,8 +151,8 @@ + } + + if (compressed) { +- length = zlib_uncompress(msblk, buffer, bh, b, offset, length, +- srclength, pages); ++ length = squashfs_decompress(msblk, buffer, bh, b, offset, ++ length, srclength, pages); + if (length < 0) + goto read_failure; + } else { +Index: git/fs/squashfs/decompressor.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/fs/squashfs/decompressor.c 2009-10-26 14:25:41.000000000 +0100 +@@ -0,0 +1,58 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++ * Phillip Lougher <phillip@lougher.demon.co.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ++ * ++ * decompressor.c ++ */ ++ ++#include <linux/types.h> ++#include <linux/mutex.h> ++#include <linux/buffer_head.h> ++ ++#include "squashfs_fs.h" ++#include "squashfs_fs_sb.h" ++#include "squashfs_fs_i.h" ++#include "decompressor.h" ++#include "squashfs.h" ++ ++/* ++ * This file (and decompressor.h) implements a decompressor framework for ++ * Squashfs, allowing multiple decompressors to be easily supported ++ */ ++ ++static const struct squashfs_decompressor squashfs_unknown_comp_ops = { ++ NULL, NULL, NULL, 0, "unknown", 0 ++}; ++ ++static const struct squashfs_decompressor *decompressor[] = { ++ &squashfs_zlib_comp_ops, ++ &squashfs_unknown_comp_ops ++}; ++ ++ ++const struct squashfs_decompressor *squashfs_lookup_decompressor(int id) ++{ ++ int i; ++ ++ for (i = 0; decompressor[i]->id; i++) ++ if (id == decompressor[i]->id) ++ break; ++ ++ return decompressor[i]; ++} +Index: git/fs/squashfs/decompressor.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/fs/squashfs/decompressor.h 2009-10-26 14:25:41.000000000 +0100 +@@ -0,0 +1,55 @@ ++#ifndef DECOMPRESSOR_H ++#define DECOMPRESSOR_H ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++ * Phillip Lougher <phillip@lougher.demon.co.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ++ * ++ * decompressor.h ++ */ ++ ++struct squashfs_decompressor { ++ void *(*init)(void); ++ void (*free)(void *); ++ int (*decompress)(struct squashfs_sb_info *, void **, ++ struct buffer_head **, int, int, int, int, int); ++ int id; ++ char *name; ++ int supported; ++}; ++ ++static inline void *squashfs_decompressor_init(struct squashfs_sb_info *msblk) ++{ ++ return msblk->decompressor->init(); ++} ++ ++static inline void squashfs_decompressor_free(struct squashfs_sb_info *msblk, ++ void *s) ++{ ++ if (msblk->decompressor) ++ msblk->decompressor->free(s); ++} ++ ++static inline int squashfs_decompress(struct squashfs_sb_info *msblk, ++ void **buffer, struct buffer_head **bh, int b, int offset, int length, ++ int srclength, int pages) ++{ ++ return msblk->decompressor->decompress(msblk, buffer, bh, b, offset, ++ length, srclength, pages); ++} ++#endif +Index: git/fs/squashfs/squashfs.h +=================================================================== +--- git.orig/fs/squashfs/squashfs.h 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/squashfs.h 2009-10-26 14:25:41.000000000 +0100 +@@ -51,6 +51,9 @@ + u64, int); + extern int squashfs_read_table(struct super_block *, void *, u64, int); + ++/* decompressor.c */ ++extern const struct squashfs_decompressor *squashfs_lookup_decompressor(int); ++ + /* export.c */ + extern __le64 *squashfs_read_inode_lookup_table(struct super_block *, u64, + unsigned int); +@@ -70,14 +73,8 @@ + unsigned int); + extern int squashfs_read_inode(struct inode *, long long); + +-/* zlib_wrapper.c */ +-extern void *zlib_init(void); +-extern void zlib_free(void *); +-extern int zlib_uncompress(struct squashfs_sb_info *, void **, +- struct buffer_head **, int, int, int, int, int); +- + /* +- * Inodes and files operations ++ * Inodes, files and decompressor operations + */ + + /* dir.c */ +@@ -94,3 +91,6 @@ + + /* symlink.c */ + extern const struct address_space_operations squashfs_symlink_aops; ++ ++/* zlib_wrapper.c */ ++extern const struct squashfs_decompressor squashfs_zlib_comp_ops; +Index: git/fs/squashfs/squashfs_fs_sb.h +=================================================================== +--- git.orig/fs/squashfs/squashfs_fs_sb.h 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/squashfs_fs_sb.h 2009-10-26 14:25:41.000000000 +0100 +@@ -52,25 +52,26 @@ + }; + + struct squashfs_sb_info { +- int devblksize; +- int devblksize_log2; +- struct squashfs_cache *block_cache; +- struct squashfs_cache *fragment_cache; +- struct squashfs_cache *read_page; +- int next_meta_index; +- __le64 *id_table; +- __le64 *fragment_index; +- unsigned int *fragment_index_2; +- struct mutex read_data_mutex; +- struct mutex meta_index_mutex; +- struct meta_index *meta_index; +- void *stream; +- __le64 *inode_lookup_table; +- u64 inode_table; +- u64 directory_table; +- unsigned int block_size; +- unsigned short block_log; +- long long bytes_used; +- unsigned int inodes; ++ const struct squashfs_decompressor *decompressor; ++ int devblksize; ++ int devblksize_log2; ++ struct squashfs_cache *block_cache; ++ struct squashfs_cache *fragment_cache; ++ struct squashfs_cache *read_page; ++ int next_meta_index; ++ __le64 *id_table; ++ __le64 *fragment_index; ++ unsigned int *fragment_index_2; ++ struct mutex read_data_mutex; ++ struct mutex meta_index_mutex; ++ struct meta_index *meta_index; ++ void *stream; ++ __le64 *inode_lookup_table; ++ u64 inode_table; ++ u64 directory_table; ++ unsigned int block_size; ++ unsigned short block_log; ++ long long bytes_used; ++ unsigned int inodes; + }; + #endif +Index: git/fs/squashfs/super.c +=================================================================== +--- git.orig/fs/squashfs/super.c 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/super.c 2009-10-26 14:31:09.000000000 +0100 +@@ -41,27 +41,37 @@ + #include "squashfs_fs_sb.h" + #include "squashfs_fs_i.h" + #include "squashfs.h" ++#include "decompressor.h" + + static struct file_system_type squashfs_fs_type; + static struct super_operations squashfs_super_ops; + +-static int supported_squashfs_filesystem(short major, short minor, short comp) ++ ++ ++static const struct squashfs_decompressor *supported_squashfs_filesystem(short ++ major, short minor, short id) + { ++ const struct squashfs_decompressor *decompressor; ++ + if (major < SQUASHFS_MAJOR) { + ERROR("Major/Minor mismatch, older Squashfs %d.%d " + "filesystems are unsupported\n", major, minor); +- return -EINVAL; ++ return NULL; + } else if (major > SQUASHFS_MAJOR || minor > SQUASHFS_MINOR) { + ERROR("Major/Minor mismatch, trying to mount newer " + "%d.%d filesystem\n", major, minor); + ERROR("Please update your kernel\n"); +- return -EINVAL; ++ return NULL; + } + +- if (comp != ZLIB_COMPRESSION) +- return -EINVAL; ++ decompressor = squashfs_lookup_decompressor(id); ++ if (!decompressor->supported) { ++ ERROR("Filesystem uses \"%s\" compression. This is not " ++ "supported\n", decompressor->name); ++ return NULL; ++ } + +- return 0; ++ return decompressor; + } + + +@@ -86,10 +96,6 @@ + } + msblk = sb->s_fs_info; + +- msblk->stream = zlib_init(); +- if (msblk->stream == NULL) +- goto failure; +- + sblk = kzalloc(sizeof(*sblk), GFP_KERNEL); + if (sblk == NULL) { + ERROR("Failed to allocate squashfs_super_block\n"); +@@ -116,25 +122,25 @@ + goto failed_mount; + } + ++ err = -EINVAL; ++ + /* Check it is a SQUASHFS superblock */ + sb->s_magic = le32_to_cpu(sblk->s_magic); + if (sb->s_magic != SQUASHFS_MAGIC) { + if (!silent) + ERROR("Can't find a SQUASHFS superblock on %s\n", + bdevname(sb->s_bdev, b)); +- err = -EINVAL; + goto failed_mount; + } + +- /* Check the MAJOR & MINOR versions and compression type */ +- err = supported_squashfs_filesystem(le16_to_cpu(sblk->s_major), ++ /* Check the MAJOR & MINOR versions and lookup compression type */ ++ msblk->decompressor = supported_squashfs_filesystem( ++ le16_to_cpu(sblk->s_major), + le16_to_cpu(sblk->s_minor), + le16_to_cpu(sblk->compression)); +- if (err < 0) ++ if (msblk->decompressor == NULL) + goto failed_mount; + +- err = -EINVAL; +- + /* + * Check if there's xattrs in the filesystem. These are not + * supported in this version, so warn that they will be ignored. +@@ -201,6 +207,10 @@ + + err = -ENOMEM; + ++ msblk->stream = squashfs_decompressor_init(msblk); ++ if (msblk->stream == NULL) ++ goto failed_mount; ++ + msblk->block_cache = squashfs_cache_init("metadata", + SQUASHFS_CACHED_BLKS, SQUASHFS_METADATA_SIZE); + if (msblk->block_cache == NULL) +@@ -288,7 +298,7 @@ + squashfs_cache_delete(msblk->block_cache); + squashfs_cache_delete(msblk->fragment_cache); + squashfs_cache_delete(msblk->read_page); +- zlib_free(msblk->stream); ++ squashfs_decompressor_free(msblk, msblk->stream); + kfree(msblk->inode_lookup_table); + kfree(msblk->fragment_index); + kfree(msblk->id_table); +@@ -298,7 +308,6 @@ + return err; + + failure: +- zlib_free(msblk->stream); + kfree(sb->s_fs_info); + sb->s_fs_info = NULL; + return -ENOMEM; +@@ -342,7 +351,7 @@ + squashfs_cache_delete(sbi->block_cache); + squashfs_cache_delete(sbi->fragment_cache); + squashfs_cache_delete(sbi->read_page); +- zlib_free(sbi->stream); ++ squashfs_decompressor_free(sbi, sbi->stream); + kfree(sbi->id_table); + kfree(sbi->fragment_index); + kfree(sbi->meta_index); +Index: git/fs/squashfs/zlib_wrapper.c +=================================================================== +--- git.orig/fs/squashfs/zlib_wrapper.c 2009-10-26 12:19:33.000000000 +0100 ++++ git/fs/squashfs/zlib_wrapper.c 2009-10-26 14:25:41.000000000 +0100 +@@ -30,8 +30,9 @@ + #include "squashfs_fs_sb.h" + #include "squashfs_fs_i.h" + #include "squashfs.h" ++#include "decompressor.h" + +-void *zlib_init() ++static void *zlib_init(void) + { + z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL); + if (stream == NULL) +@@ -50,7 +51,7 @@ + } + + +-void zlib_free(void *strm) ++static void zlib_free(void *strm) + { + z_stream *stream = strm; + +@@ -60,7 +61,7 @@ + } + + +-int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, ++static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, + struct buffer_head **bh, int b, int offset, int length, int srclength, + int pages) + { +@@ -137,3 +138,13 @@ + + return -EIO; + } ++ ++const struct squashfs_decompressor squashfs_zlib_comp_ops = { ++ .init = zlib_init, ++ .free = zlib_free, ++ .decompress = zlib_uncompress, ++ .id = ZLIB_COMPRESSION, ++ .name = "zlib", ++ .supported = 1 ++}; ++ diff --git a/recipes/linux/linux-2.6.31/0004-Squashfs-add-decompressor-entries-for-lzma-and-lzo.patch b/recipes/linux/linux-2.6.31/0004-Squashfs-add-decompressor-entries-for-lzma-and-lzo.patch new file mode 100644 index 0000000000..f7d32e36cc --- /dev/null +++ b/recipes/linux/linux-2.6.31/0004-Squashfs-add-decompressor-entries-for-lzma-and-lzo.patch @@ -0,0 +1,61 @@ +From 1885ca0a1973944684f252094a703b7c80dfc974 Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Wed, 14 Oct 2009 03:58:11 +0100 +Subject: [PATCH] Squashfs: add decompressor entries for lzma and lzo + +Add knowledge of lzma/lzo compression formats to the decompressor +framework. For now these are added as unsupported. Without +these entries lzma/lzo compressed filesystems will be flagged as +having unknown compression which is undesirable. + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/decompressor.c | 10 ++++++++++ + fs/squashfs/squashfs_fs.h | 4 +++- + 2 files changed, 13 insertions(+), 1 deletions(-) + +diff --git a/fs/squashfs/decompressor.c b/fs/squashfs/decompressor.c +index 0072ccd..157478d 100644 +--- a/fs/squashfs/decompressor.c ++++ b/fs/squashfs/decompressor.c +@@ -36,12 +36,22 @@ + * Squashfs, allowing multiple decompressors to be easily supported + */ + ++static const struct squashfs_decompressor squashfs_lzma_unsupported_comp_ops = { ++ NULL, NULL, NULL, LZMA_COMPRESSION, "lzma", 0 ++}; ++ ++static const struct squashfs_decompressor squashfs_lzo_unsupported_comp_ops = { ++ NULL, NULL, NULL, LZO_COMPRESSION, "lzo", 0 ++}; ++ + static const struct squashfs_decompressor squashfs_unknown_comp_ops = { + NULL, NULL, NULL, 0, "unknown", 0 + }; + + static const struct squashfs_decompressor *decompressor[] = { + &squashfs_zlib_comp_ops, ++ &squashfs_lzma_unsupported_comp_ops, ++ &squashfs_lzo_unsupported_comp_ops, + &squashfs_unknown_comp_ops + }; + +diff --git a/fs/squashfs/squashfs_fs.h b/fs/squashfs/squashfs_fs.h +index 283daaf..36e1604 100644 +--- a/fs/squashfs/squashfs_fs.h ++++ b/fs/squashfs/squashfs_fs.h +@@ -211,7 +211,9 @@ struct meta_index { + /* + * definitions for structures on disk + */ +-#define ZLIB_COMPRESSION 1 ++#define ZLIB_COMPRESSION 1 ++#define LZMA_COMPRESSION 2 ++#define LZO_COMPRESSION 3 + + struct squashfs_super_block { + __le32 s_magic; +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/0005-Squashfs-add-an-extra-parameter-to-the-decompressor.patch b/recipes/linux/linux-2.6.31/0005-Squashfs-add-an-extra-parameter-to-the-decompressor.patch new file mode 100644 index 0000000000..0082efdf82 --- /dev/null +++ b/recipes/linux/linux-2.6.31/0005-Squashfs-add-an-extra-parameter-to-the-decompressor.patch @@ -0,0 +1,49 @@ +From 5f393ede3ddb5dd4cc2a9f243182fac45f1ce10b Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Wed, 14 Oct 2009 04:07:54 +0100 +Subject: [PATCH] Squashfs: add an extra parameter to the decompressor init function + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/decompressor.h | 4 ++-- + fs/squashfs/zlib_wrapper.c | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/fs/squashfs/decompressor.h b/fs/squashfs/decompressor.h +index 778760c..7425f80 100644 +--- a/fs/squashfs/decompressor.h ++++ b/fs/squashfs/decompressor.h +@@ -24,7 +24,7 @@ + */ + + struct squashfs_decompressor { +- void *(*init)(void); ++ void *(*init)(struct squashfs_sb_info *); + void (*free)(void *); + int (*decompress)(struct squashfs_sb_info *, void **, + struct buffer_head **, int, int, int, int, int); +@@ -35,7 +35,7 @@ struct squashfs_decompressor { + + static inline void *squashfs_decompressor_init(struct squashfs_sb_info *msblk) + { +- return msblk->decompressor->init(); ++ return msblk->decompressor->init(msblk); + } + + static inline void squashfs_decompressor_free(struct squashfs_sb_info *msblk, +diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c +index 381768c..4dd70e0 100644 +--- a/fs/squashfs/zlib_wrapper.c ++++ b/fs/squashfs/zlib_wrapper.c +@@ -32,7 +32,7 @@ + #include "squashfs.h" + #include "decompressor.h" + +-static void *zlib_init(void) ++static void *zlib_init(struct squashfs_sb_info *dummy) + { + z_stream *stream = kmalloc(sizeof(z_stream), GFP_KERNEL); + if (stream == NULL) +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/0006-Squashfs-add-LZMA-compression.patch b/recipes/linux/linux-2.6.31/0006-Squashfs-add-LZMA-compression.patch new file mode 100644 index 0000000000..46f3ada441 --- /dev/null +++ b/recipes/linux/linux-2.6.31/0006-Squashfs-add-LZMA-compression.patch @@ -0,0 +1,229 @@ +From f49e1efdd179d54e814ff2a8e8f469496583062c Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Tue, 20 Oct 2009 10:54:36 +0100 +Subject: [PATCH] Squashfs: add LZMA compression + +Add support for LZMA compressed filesystems. This is an initial +implementation. + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/Kconfig | 5 ++ + fs/squashfs/Makefile | 1 + + fs/squashfs/decompressor.c | 4 + + fs/squashfs/lzma_wrapper.c | 151 ++++++++++++++++++++++++++++++++++++++++++++ + fs/squashfs/squashfs.h | 3 + + 5 files changed, 164 insertions(+), 0 deletions(-) + +diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig +index 25a00d1..0294aa2 100644 +--- a/fs/squashfs/Kconfig ++++ b/fs/squashfs/Kconfig +@@ -26,6 +26,11 @@ config SQUASHFS + + If unsure, say N. + ++config SQUASHFS_LZMA ++ bool "Include support for LZMA compressed file systems" ++ depends on SQUASHFS ++ select DECOMPRESS_LZMA ++ + config SQUASHFS_EMBEDDED + + bool "Additional option for memory-constrained systems" +diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile +index df8a19e..45aaefd 100644 +--- a/fs/squashfs/Makefile ++++ b/fs/squashfs/Makefile +@@ -5,3 +5,4 @@ + obj-$(CONFIG_SQUASHFS) += squashfs.o + squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o + squashfs-y += namei.o super.o symlink.o zlib_wrapper.o decompressor.o ++squashfs-$(CONFIG_SQUASHFS_LZMA) += lzma_wrapper.o +diff --git a/fs/squashfs/decompressor.c b/fs/squashfs/decompressor.c +index 157478d..0b6ad9b 100644 +--- a/fs/squashfs/decompressor.c ++++ b/fs/squashfs/decompressor.c +@@ -50,7 +50,11 @@ static const struct squashfs_decompressor squashfs_unknown_comp_ops = { + + static const struct squashfs_decompressor *decompressor[] = { + &squashfs_zlib_comp_ops, ++#ifdef CONFIG_SQUASHFS_LZMA ++ &squashfs_lzma_comp_ops, ++#else + &squashfs_lzma_unsupported_comp_ops, ++#endif + &squashfs_lzo_unsupported_comp_ops, + &squashfs_unknown_comp_ops + }; +diff --git a/fs/squashfs/lzma_wrapper.c b/fs/squashfs/lzma_wrapper.c +new file mode 100644 +index 0000000..9fa617d +--- /dev/null ++++ b/fs/squashfs/lzma_wrapper.c +@@ -0,0 +1,151 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++ * Phillip Lougher <phillip@lougher.demon.co.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ++ * ++ * lzma_wrapper.c ++ */ ++ ++#include <asm/unaligned.h> ++#include <linux/buffer_head.h> ++#include <linux/mutex.h> ++#include <linux/vmalloc.h> ++#include <linux/decompress/unlzma.h> ++ ++#include "squashfs_fs.h" ++#include "squashfs_fs_sb.h" ++#include "squashfs_fs_i.h" ++#include "squashfs.h" ++#include "decompressor.h" ++ ++struct squashfs_lzma { ++ void *input; ++ void *output; ++}; ++ ++/* decompress_unlzma.c is currently non re-entrant... */ ++DEFINE_MUTEX(lzma_mutex); ++ ++/* decompress_unlzma.c doesn't provide any context in its callbacks... */ ++static int lzma_error; ++ ++static void error(char *m) ++{ ++ ERROR("unlzma error: %s\n", m); ++ lzma_error = 1; ++} ++ ++ ++static void *lzma_init(struct squashfs_sb_info *msblk) ++{ ++ struct squashfs_lzma *stream = kzalloc(sizeof(*stream), GFP_KERNEL); ++ if (stream == NULL) ++ goto failed; ++ stream->input = vmalloc(msblk->block_size); ++ if (stream->input == NULL) ++ goto failed; ++ stream->output = vmalloc(msblk->block_size); ++ if (stream->output == NULL) ++ goto failed2; ++ ++ return stream; ++ ++failed2: ++ vfree(stream->input); ++failed: ++ ERROR("failed to allocate lzma workspace\n"); ++ kfree(stream); ++ return NULL; ++} ++ ++ ++static void lzma_free(void *strm) ++{ ++ struct squashfs_lzma *stream = strm; ++ ++ if (stream) { ++ vfree(stream->input); ++ vfree(stream->output); ++ } ++ kfree(stream); ++} ++ ++ ++static int lzma_uncompress(struct squashfs_sb_info *msblk, void **buffer, ++ struct buffer_head **bh, int b, int offset, int length, int srclength, ++ int pages) ++{ ++ struct squashfs_lzma *stream = msblk->stream; ++ void *buff = stream->input; ++ int avail, i, bytes = length, res; ++ ++ mutex_lock(&lzma_mutex); ++ ++ for (i = 0; i < b; i++) { ++ wait_on_buffer(bh[i]); ++ if (!buffer_uptodate(bh[i])) ++ goto block_release; ++ ++ avail = min(bytes, msblk->devblksize - offset); ++ memcpy(buff, bh[i]->b_data + offset, avail); ++ buff += avail; ++ bytes -= avail; ++ offset = 0; ++ put_bh(bh[i]); ++ } ++ ++ lzma_error = 0; ++ res = unlzma(stream->input, length, NULL, NULL, stream->output, NULL, ++ error); ++ if (res || lzma_error) ++ goto failed; ++ ++ /* uncompressed size is stored in the LZMA header (5 byte offset) */ ++ res = bytes = get_unaligned_le32(stream->input + 5); ++ for (i = 0, buff = stream->output; bytes && i < pages; i++) { ++ avail = min_t(int, bytes, PAGE_CACHE_SIZE); ++ memcpy(buffer[i], buff, avail); ++ buff += avail; ++ bytes -= avail; ++ } ++ if (bytes) ++ goto failed; ++ ++ mutex_unlock(&lzma_mutex); ++ return res; ++ ++block_release: ++ for (; i < b; i++) ++ put_bh(bh[i]); ++ ++failed: ++ mutex_unlock(&lzma_mutex); ++ ++ ERROR("lzma decompression failed, data probably corrupt\n"); ++ return -EIO; ++} ++ ++const struct squashfs_decompressor squashfs_lzma_comp_ops = { ++ .init = lzma_init, ++ .free = lzma_free, ++ .decompress = lzma_uncompress, ++ .id = LZMA_COMPRESSION, ++ .name = "lzma", ++ .supported = 1 ++}; ++ +diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h +index fe2587a..d094886 100644 +--- a/fs/squashfs/squashfs.h ++++ b/fs/squashfs/squashfs.h +@@ -94,3 +94,6 @@ extern const struct address_space_operations squashfs_symlink_aops; + + /* zlib_wrapper.c */ + extern const struct squashfs_decompressor squashfs_zlib_comp_ops; ++ ++/* lzma wrapper.c */ ++extern const struct squashfs_decompressor squashfs_lzma_comp_ops; +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/0007-Squashfs-Make-unlzma-available-to-non-initramfs-ini.patch b/recipes/linux/linux-2.6.31/0007-Squashfs-Make-unlzma-available-to-non-initramfs-ini.patch new file mode 100644 index 0000000000..2d6fc3af7e --- /dev/null +++ b/recipes/linux/linux-2.6.31/0007-Squashfs-Make-unlzma-available-to-non-initramfs-ini.patch @@ -0,0 +1,186 @@ +From fdf23ed283bc6ef5c25076ce2065f892120ff556 Mon Sep 17 00:00:00 2001 +From: Phillip Lougher <phillip@lougher.demon.co.uk> +Date: Thu, 22 Oct 2009 04:57:38 +0100 +Subject: [PATCH] Squashfs: Make unlzma available to non initramfs/initrd code + +Add a config option DECOMPRESS_LZMA_NEEDED which allows subsystems to +specify they need the unlzma code. Normally decompress_unlzma.c is +compiled with __init and unlzma is not exported to modules. + +Signed-off-by: Phillip Lougher <phillip@lougher.demon.co.uk> +--- + fs/squashfs/Kconfig | 1 + + include/linux/decompress/bunzip2_mm.h | 12 ++++++++++++ + include/linux/decompress/inflate_mm.h | 12 ++++++++++++ + include/linux/decompress/mm.h | 3 --- + include/linux/decompress/unlzma_mm.h | 20 ++++++++++++++++++++ + lib/Kconfig | 3 +++ + lib/decompress_bunzip2.c | 1 + + lib/decompress_inflate.c | 1 + + lib/decompress_unlzma.c | 5 ++++- + 9 files changed, 54 insertions(+), 4 deletions(-) + +diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig +index 0294aa2..7ec5d7e 100644 +--- a/fs/squashfs/Kconfig ++++ b/fs/squashfs/Kconfig +@@ -30,6 +30,7 @@ config SQUASHFS_LZMA + bool "Include support for LZMA compressed file systems" + depends on SQUASHFS + select DECOMPRESS_LZMA ++ select DECOMPRESS_LZMA_NEEDED + + config SQUASHFS_EMBEDDED + +diff --git a/include/linux/decompress/bunzip2_mm.h b/include/linux/decompress/bunzip2_mm.h +new file mode 100644 +index 0000000..cac6fef +--- /dev/null ++++ b/include/linux/decompress/bunzip2_mm.h +@@ -0,0 +1,12 @@ ++#ifndef BUNZIP2_MM_H ++#define BUNZIP2_MM_H ++ ++#ifdef STATIC ++/* Code active when included from pre-boot environment: */ ++#define INIT ++#else ++/* Compile for initramfs/initrd code only */ ++#define INIT __init ++#endif ++ ++#endif +diff --git a/include/linux/decompress/inflate_mm.h b/include/linux/decompress/inflate_mm.h +new file mode 100644 +index 0000000..ca4a2ae +--- /dev/null ++++ b/include/linux/decompress/inflate_mm.h +@@ -0,0 +1,12 @@ ++#ifndef INFLATE_MM_H ++#define INFLATE_MM_H ++ ++#ifdef STATIC ++/* Code active when included from pre-boot environment: */ ++#define INIT ++#else ++/* Compile for initramfs/initrd code only */ ++#define INIT __init ++#endif ++ ++#endif +diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h +index 12ff8c3..80f5ba4 100644 +--- a/include/linux/decompress/mm.h ++++ b/include/linux/decompress/mm.h +@@ -53,8 +53,6 @@ static void free(void *where) + + #define set_error_fn(x) + +-#define INIT +- + #else /* STATIC */ + + /* Code active when compiled standalone for use when loading ramdisk: */ +@@ -77,7 +75,6 @@ static void free(void *where) + static void(*error)(char *m); + #define set_error_fn(x) error = x; + +-#define INIT __init + #define STATIC + + #include <linux/init.h> +diff --git a/include/linux/decompress/unlzma_mm.h b/include/linux/decompress/unlzma_mm.h +new file mode 100644 +index 0000000..859287e +--- /dev/null ++++ b/include/linux/decompress/unlzma_mm.h +@@ -0,0 +1,20 @@ ++#ifndef UNLZMA_MM_H ++#define UNLZMA_MM_H ++ ++#ifdef STATIC ++ ++/* Code active when included from pre-boot environment: */ ++#define INIT ++ ++#elif defined(CONFIG_DECOMPRESS_LZMA_NEEDED) ++ ++/* Make it available to non initramfs/initrd code */ ++#define INIT ++#include <linux/module.h> ++#else ++ ++/* Compile for initramfs/initrd code only */ ++#define INIT __init ++#endif ++ ++#endif +diff --git a/lib/Kconfig b/lib/Kconfig +index bb1326d..25e7f28 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -117,6 +117,9 @@ config DECOMPRESS_BZIP2 + config DECOMPRESS_LZMA + tristate + ++config DECOMPRESS_LZMA_NEEDED ++ boolean ++ + # + # Generic allocator support is selected if needed + # +diff --git a/lib/decompress_bunzip2.c b/lib/decompress_bunzip2.c +index 600f473..6eb6433 100644 +--- a/lib/decompress_bunzip2.c ++++ b/lib/decompress_bunzip2.c +@@ -52,6 +52,7 @@ + #include <linux/slab.h> + #endif /* STATIC */ + ++#include <linux/decompress/bunzip2_mm.h> + #include <linux/decompress/mm.h> + + #ifndef INT_MAX +diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c +index fc686c7..cb6bcab 100644 +--- a/lib/decompress_inflate.c ++++ b/lib/decompress_inflate.c +@@ -23,6 +23,7 @@ + + #endif /* STATIC */ + ++#include <linux/decompress/inflate_mm.h> + #include <linux/decompress/mm.h> + + #define GZIP_IOBUF_SIZE (16*1024) +diff --git a/lib/decompress_unlzma.c b/lib/decompress_unlzma.c +index ca82fde..b2fd927 100644 +--- a/lib/decompress_unlzma.c ++++ b/lib/decompress_unlzma.c +@@ -36,6 +36,7 @@ + #include <linux/slab.h> + #endif /* STATIC */ + ++#include <linux/decompress/unlzma_mm.h> + #include <linux/decompress/mm.h> + + #define MIN(a, b) (((a) < (b)) ? (a) : (b)) +@@ -531,7 +532,7 @@ static inline void INIT process_bit1(struct writer *wr, struct rc *rc, + + + +-STATIC inline int INIT unlzma(unsigned char *buf, int in_len, ++STATIC int INIT unlzma(unsigned char *buf, int in_len, + int(*fill)(void*, unsigned int), + int(*flush)(void*, unsigned int), + unsigned char *output, +@@ -664,4 +665,6 @@ STATIC int INIT decompress(unsigned char *buf, int in_len, + { + return unlzma(buf, in_len - 4, fill, flush, output, posp, error_fn); + } ++#elif defined(CONFIG_DECOMPRESS_LZMA_NEEDED) ++EXPORT_SYMBOL(unlzma); + #endif +-- +1.5.2.5 + diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/001-core.patch b/recipes/linux/linux-2.6.31/ben-nanonote/001-core.patch new file mode 100644 index 0000000000..67d3be0134 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/001-core.patch @@ -0,0 +1,661 @@ +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -158,6 +158,9 @@ config MACH_JAZZ + Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and + Olivetti M700-10 workstations. + ++config MACH_JZ ++ bool "Ingenic JZ4720/JZ4740 based machines" ++ + config LASAT + bool "LASAT Networks platforms" + select CEVT_R4K +@@ -661,6 +664,7 @@ endchoice + source "arch/mips/alchemy/Kconfig" + source "arch/mips/basler/excite/Kconfig" + source "arch/mips/jazz/Kconfig" ++source "arch/mips/jz4740/Kconfig" + source "arch/mips/lasat/Kconfig" + source "arch/mips/pmc-sierra/Kconfig" + source "arch/mips/sgi-ip27/Kconfig" +@@ -1911,6 +1915,14 @@ config NR_CPUS + + source "kernel/time/Kconfig" + ++# the value of (max order + 1) ++config FORCE_MAX_ZONEORDER ++ prompt "MAX_ZONEORDER" ++ int ++ default "12" ++ help ++ The max memory that can be allocated = 4KB * 2^(CONFIG_FORCE_MAX_ZONEORDER - 1) ++ + # + # Timer Interrupt Frequency Configuration + # +@@ -2182,6 +2194,23 @@ config BINFMT_ELF32 + + endmenu + ++menu "CPU Frequency scaling" ++ ++config CPU_FREQ_JZ ++ tristate "CPUfreq driver for JZ CPUs" ++ depends on JZSOC ++ default n ++ help ++ This enables the CPUfreq driver for JZ CPUs. ++ ++ If in doubt, say N. ++ ++if (CPU_FREQ_JZ) ++source "drivers/cpufreq/Kconfig" ++endif ++ ++endmenu ++ + menu "Power management options" + + config ARCH_HIBERNATION_POSSIBLE +--- a/arch/mips/Makefile ++++ b/arch/mips/Makefile +@@ -180,6 +180,14 @@ cflags-$(CONFIG_AR7) += -I$(srctree)/ar + load-$(CONFIG_AR7) += 0xffffffff94100000 + + # ++# Commond Ingenic JZ4740 series ++# ++ ++core-$(CONFIG_SOC_JZ4740) += arch/mips/jz4740/ ++cflags-$(CONFIG_SOC_JZ4740) += -I$(srctree)/arch/mips/include/asm/mach-jz4740 ++load-$(CONFIG_SOC_JZ4740) += 0xffffffff80010000 ++ ++# + # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. + # + core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ +@@ -714,6 +722,12 @@ makeboot =$(Q)$(MAKE) $(build)=arch/mips + + all: $(all-y) + ++uImage: $(vmlinux-32) ++ +@$(call makeboot,$@) ++ ++zImage: $(vmlinux-32) ++ +@$(call makeboot,$@) ++ + vmlinux.bin: $(vmlinux-32) + +@$(call makeboot,$@) + +@@ -743,6 +757,7 @@ install: + + archclean: + @$(MAKE) $(clean)=arch/mips/boot ++ @$(MAKE) $(clean)=arch/mips/boot/compressed + @$(MAKE) $(clean)=arch/mips/lasat + + define archhelp +@@ -750,6 +765,9 @@ define archhelp + echo ' vmlinux.ecoff - ECOFF boot image' + echo ' vmlinux.bin - Raw binary boot image' + echo ' vmlinux.srec - SREC boot image' ++ echo ' uImage - u-boot format image (arch/$(ARCH)/boot/uImage)' ++ echo ' zImage - Compressed binary image (arch/$(ARCH)/boot/compressed/zImage)' ++ echo ' vmlinux.bin - Uncompressed binary image (arch/$(ARCH)/boot/vmlinux.bin)' + echo + echo ' These will be default as apropriate for a configured platform.' + endef +--- a/arch/mips/boot/Makefile ++++ b/arch/mips/boot/Makefile +@@ -7,6 +7,9 @@ + # Copyright (C) 2004 Maciej W. Rozycki + # + ++# This one must match the LOADADDR in arch/mips/Makefile! ++LOADADDR=0x80010000 ++ + # + # Some DECstations need all possible sections of an ECOFF executable + # +@@ -25,7 +28,7 @@ strip-flags = $(addprefix --remove-secti + + VMLINUX = vmlinux + +-all: vmlinux.ecoff vmlinux.srec addinitrd ++all: vmlinux.ecoff vmlinux.srec addinitrd uImage zImage + + vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX) + $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) +@@ -42,8 +45,24 @@ vmlinux.srec: $(VMLINUX) + $(obj)/addinitrd: $(obj)/addinitrd.c + $(HOSTCC) -o $@ $^ + ++uImage: $(VMLINUX) vmlinux.bin ++ rm -f $(obj)/vmlinux.bin.gz ++ gzip -9 $(obj)/vmlinux.bin ++ mkimage -A mips -O linux -T kernel -C gzip \ ++ -a $(LOADADDR) -e $(shell sh ./$(obj)/tools/entry $(NM) $(VMLINUX) ) \ ++ -n 'Linux-$(KERNELRELEASE)' \ ++ -d $(obj)/vmlinux.bin.gz $(obj)/uImage ++ @echo ' Kernel: arch/mips/boot/$@ is ready' ++ ++zImage: ++ $(Q)$(MAKE) $(build)=$(obj)/compressed loadaddr=$(LOADADDR) $@ ++ @echo ' Kernel: arch/mips/boot/compressed/$@ is ready' ++ + clean-files += addinitrd \ + elf2ecoff \ + vmlinux.bin \ + vmlinux.ecoff \ +- vmlinux.srec ++ vmlinux.srec \ ++ vmlinux.bin.gz \ ++ uImage \ ++ zImage +--- a/arch/mips/include/asm/bootinfo.h ++++ b/arch/mips/include/asm/bootinfo.h +@@ -57,6 +57,12 @@ + #define MACH_MIKROTIK_RB532 0 /* Mikrotik RouterBoard 532 */ + #define MACH_MIKROTIK_RB532A 1 /* Mikrotik RouterBoard 532A */ + ++/* ++ * Valid machtype for group INGENIC ++ */ ++#define MACH_INGENIC_JZ4720 0 /* JZ4730 SOC */ ++#define MACH_INGENIC_JZ4740 1 /* JZ4740 SOC */ ++ + #define CL_SIZE COMMAND_LINE_SIZE + + extern char *system_type; +--- a/arch/mips/include/asm/cpu.h ++++ b/arch/mips/include/asm/cpu.h +@@ -34,7 +34,7 @@ + #define PRID_COMP_LSI 0x080000 + #define PRID_COMP_LEXRA 0x0b0000 + #define PRID_COMP_CAVIUM 0x0d0000 +- ++#define PRID_COMP_INGENIC 0xd00000 + + /* + * Assigned values for the product ID register. In order to detect a +@@ -127,6 +127,12 @@ + #define PRID_IMP_CAVIUM_CN52XX 0x0700 + + /* ++ * These are the PRID's for when 23:16 == PRID_COMP_INGENIC ++ */ ++ ++#define PRID_IMP_JZRISC 0x0200 ++ ++/* + * Definitions for 7:0 on legacy processors + */ + +@@ -217,6 +223,11 @@ enum cpu_type_enum { + CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, + CPU_CAVIUM_OCTEON, + ++ /* ++ * Ingenic class processors ++ */ ++ CPU_JZRISC, CPU_XBURST, ++ + CPU_LAST + }; + +--- a/arch/mips/include/asm/mach-generic/irq.h ++++ b/arch/mips/include/asm/mach-generic/irq.h +@@ -9,7 +9,7 @@ + #define __ASM_MACH_GENERIC_IRQ_H + + #ifndef NR_IRQS +-#define NR_IRQS 128 ++#define NR_IRQS 256 + #endif + + #ifdef CONFIG_I8259 +--- a/arch/mips/include/asm/r4kcache.h ++++ b/arch/mips/include/asm/r4kcache.h +@@ -17,6 +17,58 @@ + #include <asm/cpu-features.h> + #include <asm/mipsmtregs.h> + ++#ifdef CONFIG_JZRISC ++ ++#define K0_TO_K1() \ ++do { \ ++ unsigned long __k0_addr; \ ++ \ ++ __asm__ __volatile__( \ ++ "la %0, 1f\n\t" \ ++ "or %0, %0, %1\n\t" \ ++ "jr %0\n\t" \ ++ "nop\n\t" \ ++ "1: nop\n" \ ++ : "=&r"(__k0_addr) \ ++ : "r" (0x20000000) ); \ ++} while(0) ++ ++#define K1_TO_K0() \ ++do { \ ++ unsigned long __k0_addr; \ ++ __asm__ __volatile__( \ ++ "nop;nop;nop;nop;nop;nop;nop\n\t" \ ++ "la %0, 1f\n\t" \ ++ "jr %0\n\t" \ ++ "nop\n\t" \ ++ "1: nop\n" \ ++ : "=&r" (__k0_addr)); \ ++} while (0) ++ ++#define INVALIDATE_BTB() \ ++do { \ ++ unsigned long tmp; \ ++ __asm__ __volatile__( \ ++ ".set mips32\n\t" \ ++ "mfc0 %0, $16, 7\n\t" \ ++ "nop\n\t" \ ++ "ori %0, 2\n\t" \ ++ "mtc0 %0, $16, 7\n\t" \ ++ "nop\n\t" \ ++ : "=&r" (tmp)); \ ++} while (0) ++ ++#define SYNC_WB() __asm__ __volatile__ ("sync") ++ ++#else /* CONFIG_JZRISC */ ++ ++#define K0_TO_K1() do { } while (0) ++#define K1_TO_K0() do { } while (0) ++#define INVALIDATE_BTB() do { } while (0) ++#define SYNC_WB() do { } while (0) ++ ++#endif /* CONFIG_JZRISC */ ++ + /* + * This macro return a properly sign-extended address suitable as base address + * for indexed cache operations. Two issues here: +@@ -144,6 +196,7 @@ static inline void flush_icache_line_ind + { + __iflush_prologue + cache_op(Index_Invalidate_I, addr); ++ INVALIDATE_BTB(); + __iflush_epilogue + } + +@@ -151,6 +204,7 @@ static inline void flush_dcache_line_ind + { + __dflush_prologue + cache_op(Index_Writeback_Inv_D, addr); ++ SYNC_WB(); + __dflush_epilogue + } + +@@ -163,6 +217,7 @@ static inline void flush_icache_line(uns + { + __iflush_prologue + cache_op(Hit_Invalidate_I, addr); ++ INVALIDATE_BTB(); + __iflush_epilogue + } + +@@ -170,6 +225,7 @@ static inline void flush_dcache_line(uns + { + __dflush_prologue + cache_op(Hit_Writeback_Inv_D, addr); ++ SYNC_WB(); + __dflush_epilogue + } + +@@ -177,6 +233,7 @@ static inline void invalidate_dcache_lin + { + __dflush_prologue + cache_op(Hit_Invalidate_D, addr); ++ SYNC_WB(); + __dflush_epilogue + } + +@@ -209,6 +266,7 @@ static inline void flush_scache_line(uns + static inline void protected_flush_icache_line(unsigned long addr) + { + protected_cache_op(Hit_Invalidate_I, addr); ++ INVALIDATE_BTB(); + } + + /* +@@ -220,6 +278,7 @@ static inline void protected_flush_icach + static inline void protected_writeback_dcache_line(unsigned long addr) + { + protected_cache_op(Hit_Writeback_Inv_D, addr); ++ SYNC_WB(); + } + + static inline void protected_writeback_scache_line(unsigned long addr) +@@ -396,8 +455,10 @@ static inline void blast_##pfx##cache##l + __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) ++#ifndef CONFIG_JZRISC + __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) ++#endif + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) + __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64) + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) +@@ -405,12 +466,122 @@ __BUILD_BLAST_CACHE(s, scache, Index_Wri + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) + + __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) ++#ifndef CONFIG_JZRISC + __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) ++#endif + __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16) + __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32) + __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64) + __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128) + ++#ifdef CONFIG_JZRISC ++ ++static inline void blast_dcache32(void) ++{ ++ unsigned long start = INDEX_BASE; ++ unsigned long end = start + current_cpu_data.dcache.waysize; ++ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; ++ unsigned long ws_end = current_cpu_data.dcache.ways << ++ current_cpu_data.dcache.waybit; ++ unsigned long ws, addr; ++ ++ for (ws = 0; ws < ws_end; ws += ws_inc) ++ for (addr = start; addr < end; addr += 0x400) ++ cache32_unroll32(addr|ws,Index_Writeback_Inv_D); ++ ++ SYNC_WB(); ++} ++ ++static inline void blast_dcache32_page(unsigned long page) ++{ ++ unsigned long start = page; ++ unsigned long end = page + PAGE_SIZE; ++ ++ do { ++ cache32_unroll32(start,Hit_Writeback_Inv_D); ++ start += 0x400; ++ } while (start < end); ++ ++ SYNC_WB(); ++} ++ ++static inline void blast_dcache32_page_indexed(unsigned long page) ++{ ++ unsigned long indexmask = current_cpu_data.dcache.waysize - 1; ++ unsigned long start = INDEX_BASE + (page & indexmask); ++ unsigned long end = start + PAGE_SIZE; ++ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; ++ unsigned long ws_end = current_cpu_data.dcache.ways << ++ current_cpu_data.dcache.waybit; ++ unsigned long ws, addr; ++ ++ for (ws = 0; ws < ws_end; ws += ws_inc) ++ for (addr = start; addr < end; addr += 0x400) ++ cache32_unroll32(addr|ws,Index_Writeback_Inv_D); ++ ++ SYNC_WB(); ++} ++ ++static inline void blast_icache32(void) ++{ ++ unsigned long start = INDEX_BASE; ++ unsigned long end = start + current_cpu_data.icache.waysize; ++ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; ++ unsigned long ws_end = current_cpu_data.icache.ways << ++ current_cpu_data.icache.waybit; ++ unsigned long ws, addr; ++ ++ K0_TO_K1(); ++ ++ for (ws = 0; ws < ws_end; ws += ws_inc) ++ for (addr = start; addr < end; addr += 0x400) ++ cache32_unroll32(addr|ws,Index_Invalidate_I); ++ ++ INVALIDATE_BTB(); ++ ++ K1_TO_K0(); ++} ++ ++static inline void blast_icache32_page(unsigned long page) ++{ ++ unsigned long start = page; ++ unsigned long end = page + PAGE_SIZE; ++ ++ K0_TO_K1(); ++ ++ do { ++ cache32_unroll32(start,Hit_Invalidate_I); ++ start += 0x400; ++ } while (start < end); ++ ++ INVALIDATE_BTB(); ++ ++ K1_TO_K0(); ++} ++ ++static inline void blast_icache32_page_indexed(unsigned long page) ++{ ++ unsigned long indexmask = current_cpu_data.icache.waysize - 1; ++ unsigned long start = INDEX_BASE + (page & indexmask); ++ unsigned long end = start + PAGE_SIZE; ++ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; ++ unsigned long ws_end = current_cpu_data.icache.ways << ++ current_cpu_data.icache.waybit; ++ unsigned long ws, addr; ++ ++ K0_TO_K1(); ++ ++ for (ws = 0; ws < ws_end; ws += ws_inc) ++ for (addr = start; addr < end; addr += 0x400) ++ cache32_unroll32(addr|ws,Index_Invalidate_I); ++ ++ INVALIDATE_BTB(); ++ ++ K1_TO_K0(); ++} ++ ++#endif /* CONFIG_JZRISC */ ++ + /* build blast_xxx_range, protected_blast_xxx_range */ + #define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \ + static inline void prot##blast_##pfx##cache##_range(unsigned long start, \ +@@ -432,13 +603,73 @@ static inline void prot##blast_##pfx##ca + __##pfx##flush_epilogue \ + } + ++#ifndef CONFIG_JZRISC + __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_) ++#endif + __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_) ++#ifndef CONFIG_JZRISC + __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_) + __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, ) ++#endif + __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, ) + /* blast_inv_dcache_range */ + __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, ) + __BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, ) + ++#ifdef CONFIG_JZRISC ++ ++static inline void protected_blast_dcache_range(unsigned long start, ++ unsigned long end) ++{ ++ unsigned long lsize = cpu_dcache_line_size(); ++ unsigned long addr = start & ~(lsize - 1); ++ unsigned long aend = (end - 1) & ~(lsize - 1); ++ ++ while (1) { ++ protected_cache_op(Hit_Writeback_Inv_D, addr); ++ if (addr == aend) ++ break; ++ addr += lsize; ++ } ++ SYNC_WB(); ++} ++ ++static inline void protected_blast_icache_range(unsigned long start, ++ unsigned long end) ++{ ++ unsigned long lsize = cpu_icache_line_size(); ++ unsigned long addr = start & ~(lsize - 1); ++ unsigned long aend = (end - 1) & ~(lsize - 1); ++ ++ K0_TO_K1(); ++ ++ while (1) { ++ protected_cache_op(Hit_Invalidate_I, addr); ++ if (addr == aend) ++ break; ++ addr += lsize; ++ } ++ INVALIDATE_BTB(); ++ ++ K1_TO_K0(); ++} ++ ++static inline void blast_dcache_range(unsigned long start, ++ unsigned long end) ++{ ++ unsigned long lsize = cpu_dcache_line_size(); ++ unsigned long addr = start & ~(lsize - 1); ++ unsigned long aend = (end - 1) & ~(lsize - 1); ++ ++ while (1) { ++ cache_op(Hit_Writeback_Inv_D, addr); ++ if (addr == aend) ++ break; ++ addr += lsize; ++ } ++ SYNC_WB(); ++} ++ ++#endif /* CONFIG_JZRISC */ ++ + #endif /* _ASM_R4KCACHE_H */ +--- a/arch/mips/include/asm/suspend.h ++++ b/arch/mips/include/asm/suspend.h +@@ -2,6 +2,9 @@ + #define __ASM_SUSPEND_H + + static inline int arch_prepare_suspend(void) { return 0; } ++#if defined(CONFIG_PM) && defined(CONFIG_JZSOC) ++extern int jz_pm_init(void); ++#endif + + /* References to section boundaries */ + extern const void __nosave_begin, __nosave_end; +--- a/arch/mips/kernel/cpu-probe.c ++++ b/arch/mips/kernel/cpu-probe.c +@@ -160,6 +160,7 @@ void __init check_wait(void) + case CPU_PR4450: + case CPU_BCM3302: + case CPU_CAVIUM_OCTEON: ++ case CPU_JZRISC: + cpu_wait = r4k_wait; + break; + +@@ -888,6 +889,23 @@ static inline void cpu_probe_cavium(stru + } + } + ++static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) ++{ ++ decode_configs(c); ++ c->options &= ~MIPS_CPU_COUNTER; /* JZRISC does not implement the CP0 counter. */ ++ switch (c->processor_id & 0xff00) { ++ case PRID_IMP_JZRISC: ++ c->cputype = CPU_JZRISC; ++ c->isa_level = MIPS_CPU_ISA_M32R1; ++ c->tlbsize = 32; ++ __cpu_name[cpu] = "Ingenic JZRISC"; ++ break; ++ default: ++ panic("Unknown Ingenic Processor ID!"); ++ break; ++ } ++} ++ + const char *__cpu_name[NR_CPUS]; + + __cpuinit void cpu_probe(void) +@@ -925,6 +943,9 @@ __cpuinit void cpu_probe(void) + case PRID_COMP_CAVIUM: + cpu_probe_cavium(c, cpu); + break; ++ case PRID_COMP_INGENIC: ++ cpu_probe_ingenic(c, cpu); ++ break; + } + + BUG_ON(!__cpu_name[cpu]); +--- a/arch/mips/mm/c-r4k.c ++++ b/arch/mips/mm/c-r4k.c +@@ -928,6 +928,36 @@ static void __cpuinit probe_pcache(void) + c->dcache.waybit = 0; + break; + ++ case CPU_JZRISC: ++ config1 = read_c0_config1(); ++ config1 = (config1 >> 22) & 0x07; ++ if (config1 == 0x07) ++ config1 = 10; ++ else ++ config1 = config1 + 11; ++ config1 += 2; ++ icache_size = (1 << config1); ++ c->icache.linesz = 32; ++ c->icache.ways = 4; ++ c->icache.waybit = __ffs(icache_size / c->icache.ways); ++ ++ config1 = read_c0_config1(); ++ config1 = (config1 >> 13) & 0x07; ++ if (config1 == 0x07) ++ config1 = 10; ++ else ++ config1 = config1 + 11; ++ config1 += 2; ++ dcache_size = (1 << config1); ++ c->dcache.linesz = 32; ++ c->dcache.ways = 4; ++ c->dcache.waybit = __ffs(dcache_size / c->dcache.ways); ++ ++ c->dcache.flags = 0; ++ c->options |= MIPS_CPU_PREFETCH; ++ ++ break; ++ + default: + if (!(config & MIPS_CONF_M)) + panic("Don't know how to probe P-caches on this cpu."); +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -52,6 +52,8 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_wback); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT */ + +--- a/arch/mips/mm/tlbex.c ++++ b/arch/mips/mm/tlbex.c +@@ -385,6 +385,11 @@ static void __cpuinit build_tlb_write_en + tlbw(p); + break; + ++ case CPU_JZRISC: ++ tlbw(p); ++ uasm_i_nop(p); ++ break; ++ + default: + panic("No TLB refill handler yet (CPU type: %d)", + current_cpu_data.cputype); diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch b/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch new file mode 100644 index 0000000000..da0d76caa5 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch @@ -0,0 +1,68 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -452,4 +452,10 @@ config MTD_NAND_SOCRATES + help + Enables support for NAND Flash chips wired onto Socrates board. + ++config MTD_NAND_JZ4740 ++ tristate "Support NAND Flash device on Jz4740 board" ++ depends on SOC_JZ4740 ++ help ++ Support NAND Flash device on Jz4740 board ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -40,5 +40,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_f + obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o + obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o + obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o ++obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o + + nand-objs := nand_base.o nand_bbt.o +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -953,29 +953,22 @@ static int nand_read_page_hwecc(struct m + uint8_t *ecc_calc = chip->buffers->ecccalc; + uint8_t *ecc_code = chip->buffers->ecccode; + uint32_t *eccpos = chip->ecc.layout->eccpos; +- +- for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { +- chip->ecc.hwctl(mtd, NAND_ECC_READ); +- chip->read_buf(mtd, p, eccsize); +- chip->ecc.calculate(mtd, p, &ecc_calc[i]); +- } +- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ int stat; + + for (i = 0; i < chip->ecc.total; i++) + ecc_code[i] = chip->oob_poi[eccpos[i]]; + +- eccsteps = chip->ecc.steps; +- p = buf; +- +- for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { +- int stat; + ++ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { ++ chip->ecc.hwctl(mtd, NAND_ECC_READ); ++ chip->read_buf(mtd, p, eccsize); + stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); + if (stat < 0) + mtd->ecc_stats.failed++; + else + mtd->ecc_stats.corrected += stat; + } ++ + return 0; + } + +@@ -1125,6 +1118,8 @@ static int nand_do_read_ops(struct mtd_i + bufpoi = aligned ? buf : chip->buffers->databuf; + + if (likely(sndcmd)) { ++ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x00, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + sndcmd = 0; + } diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/051-fb.patch b/recipes/linux/linux-2.6.31/ben-nanonote/051-fb.patch new file mode 100644 index 0000000000..8288f52133 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/051-fb.patch @@ -0,0 +1,28 @@ +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -2148,6 +2148,15 @@ config FB_BROADSHEET + and could also have been called by other names when coupled with + a bridge adapter. + ++config FB_JZ4740 ++ tristate "JZ47420/JZ4740 LCD framebuffer support" ++ depends on FB ++ select FB_SYS_FILLRECT ++ select FB_SYS_COPYAREA ++ select FB_SYS_IMAGEBLIT ++ help ++ Framebuffer support for the JZ4720 and JZ4740 SoC. ++ + source "drivers/video/omap/Kconfig" + + source "drivers/video/backlight/Kconfig" +--- a/drivers/video/Makefile ++++ b/drivers/video/Makefile +@@ -126,6 +126,7 @@ obj-$(CONFIG_FB_OMAP) += oma + obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o + obj-$(CONFIG_FB_CARMINE) += carminefb.o + obj-$(CONFIG_FB_MB862XX) += mb862xx/ ++obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o + + # Platform or fallback drivers go here + obj-$(CONFIG_FB_UVESA) += uvesafb.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/052-rtc.patch b/recipes/linux/linux-2.6.31/ben-nanonote/052-rtc.patch new file mode 100644 index 0000000000..303501b989 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/052-rtc.patch @@ -0,0 +1,30 @@ +--- a/drivers/rtc/Kconfig ++++ b/drivers/rtc/Kconfig +@@ -460,6 +460,17 @@ config RTC_DRV_EFI + This driver can also be built as a module. If so, the module + will be called rtc-efi. + ++config RTC_DRV_JZ4740 ++ tristate "Ingenic JZ4720/JZ4740 SoC" ++ depends on RTC_CLASS ++ depends on SOC_JZ4740 ++ help ++ If you say yes here you get support for the ++ Ingenic JZ4720/JZ4740 SoC RTC controller. ++ ++ This driver can also be buillt as a module. If so, the module ++ will be called rtc-jz4740. ++ + config RTC_DRV_STK17TA8 + tristate "Simtek STK17TA8" + depends on RTC_CLASS +--- a/drivers/rtc/Makefile ++++ b/drivers/rtc/Makefile +@@ -40,6 +40,7 @@ obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o + obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o + obj-$(CONFIG_RTC_DRV_FM3130) += rtc-fm3130.o + obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o ++obj-$(CONFIG_RTC_DRV_JZ4740) += rtc-jz4740.o + obj-$(CONFIG_RTC_DRV_M41T80) += rtc-m41t80.o + obj-$(CONFIG_RTC_DRV_M41T94) += rtc-m41t94.o + obj-$(CONFIG_RTC_DRV_M48T35) += rtc-m48t35.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/053-adc.patch b/recipes/linux/linux-2.6.31/ben-nanonote/053-adc.patch new file mode 100644 index 0000000000..2f71ddceb5 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/053-adc.patch @@ -0,0 +1,29 @@ +--- a/drivers/misc/Kconfig ++++ b/drivers/misc/Kconfig +@@ -233,6 +233,17 @@ config ISL29003 + This driver can also be built as a module. If so, the module + will be called isl29003. + ++config JZ4740_ADC ++ tristate "Ingenic JZ4720/JZ4740 SoC ADC driver" ++ depends on SOC_JZ4740 ++ help ++ If you say yes here you get support for the Ingenic JZ4720/JZ4740 SoC ADC ++ core. It is required for the JZ4720/JZ4740 battery and touchscreen driver ++ and is used to synchronize access to the adc core between those two. ++ ++ This driver can also be build as a module. If so, the module will be ++ called jz4740-adc. ++ + source "drivers/misc/c2port/Kconfig" + source "drivers/misc/eeprom/Kconfig" + source "drivers/misc/cb710/Kconfig" +--- a/drivers/misc/Makefile ++++ b/drivers/misc/Makefile +@@ -20,5 +20,6 @@ obj-$(CONFIG_SGI_GRU) += sgi-gru/ + obj-$(CONFIG_HP_ILO) += hpilo.o + obj-$(CONFIG_ISL29003) += isl29003.o + obj-$(CONFIG_C2PORT) += c2port/ ++obj-$(CONFIG_JZ4740_ADC) += jz4740-adc.o + obj-y += eeprom/ + obj-y += cb710/ diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/100-battery.patch b/recipes/linux/linux-2.6.31/ben-nanonote/100-battery.patch new file mode 100644 index 0000000000..1279dde69c --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/100-battery.patch @@ -0,0 +1,25 @@ +--- a/drivers/power/Kconfig ++++ b/drivers/power/Kconfig +@@ -103,4 +103,15 @@ config CHARGER_PCF50633 + help + Say Y to include support for NXP PCF50633 Main Battery Charger. + ++config BATTERY_JZ4740 ++ tristate "Ingenic JZ4720/JZ4740 battery" ++ depends on SOC_JZ4740 ++ depends on JZ4740_ADC ++ help ++ Say Y to enable support for the battery on Ingenic JZ4720/JZ4740 based ++ boards. ++ ++ This driver can be build as a module. If so, the module will be ++ called jz4740-battery. ++ + endif # POWER_SUPPLY +--- a/drivers/power/Makefile ++++ b/drivers/power/Makefile +@@ -28,3 +28,4 @@ obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00 + obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o + obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o + obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o ++obj-$(CONFIG_BATTERY_JZ4740) += jz4740-battery.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/101-mmc.patch b/recipes/linux/linux-2.6.31/ben-nanonote/101-mmc.patch new file mode 100644 index 0000000000..0b1835ddc1 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/101-mmc.patch @@ -0,0 +1,28 @@ +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -66,6 +66,15 @@ config MMC_RICOH_MMC + useless. It is safe to select this driver even if you don't + have a Ricoh based card reader. + ++config MMC_JZ ++ tristate "JZ SD/Multimedia Card Interface support" ++ depends on SOC_JZ4720 || SOC_JZ4740 ++ help ++ This selects the Ingenic JZ4720/JZ4740 SD/Multimedia card Interface. ++ If you have abIngenic platform with a Multimedia Card slot, ++ say Y or M here. ++ ++ If unsure, say N. + + To compile this driver as a module, choose M here: + the module will be called ricoh_mmc. +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -6,6 +6,7 @@ ifeq ($(CONFIG_MMC_DEBUG),y) + EXTRA_CFLAGS += -DDEBUG + endif + ++obj-$(CONFIG_MMC_JZ) += jz_mmc.o + obj-$(CONFIG_MMC_ARMMMCI) += mmci.o + obj-$(CONFIG_MMC_PXA) += pxamci.o + obj-$(CONFIG_MMC_IMX) += imxmmc.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/102-video.patch b/recipes/linux/linux-2.6.31/ben-nanonote/102-video.patch new file mode 100644 index 0000000000..22b05e3e47 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/102-video.patch @@ -0,0 +1,134 @@ +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -237,6 +237,119 @@ config FB_TILEBLITTING + comment "Frame buffer hardware drivers" + depends on FB + ++/************************************************************/ ++config FB_JZSOC ++ tristate "JZSOC LCD controller support" ++ depends on FB && JZSOC ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ ---help--- ++ JZSOC LCD Controller and Smart LCD Controller driver support. ++ ++config FB_JZ4740_SLCD ++ tristate "JZ4740 Smart LCD controller support" ++ depends on FB_JZSOC && SOC_JZ4740 ++ default n ++ ---help--- ++ This is the frame buffer device driver for the JZ4740 Smart LCD controller. ++ If select this, please set <JZ4740 LCD controller support> to <n>. ++ ++choice ++ depends on FB_JZ4740_SLCD ++ prompt "SLCD Panel" ++ default JZ_SLCD_LGDP4551_8BUS ++ ++config JZ_SLCD_LGDP4551 ++ bool "LG LGDP4551 Smart LCD panel" ++ ---help--- ++ Driver for Smart LCD LGDP4551, 8-bit sytem interface, 16BPP. ++ ++config JZ_SLCD_SPFD5420A ++ bool "SPFD5420A Smart LCD panel" ++ ---help--- ++ Driver for Smart LCD SPFD5420A 18-bit sytem interface, 18BPP. ++ ++config JZ_SLCD_TRULY ++ bool "TRULY Smart LCD panel (MAX Pixels 400x240)" ++ ---help--- ++ ++endchoice ++ ++config FB_JZLCD_4730_4740 ++ tristate "JZ4730 JZ4740 LCD controller support" ++ depends on FB_JZSOC && (SOC_JZ4730 || SOC_JZ4740) ++ help ++ This is the frame buffer device driver for the JZ4730 and JZ4740 LCD controller. ++choice ++ depends on FB_JZLCD_4730_4740 ++ prompt "LCD Panel" ++ default JZLCD_SAMSUNG_LTP400WQF01 ++ ++config JZLCD_SHARP_LQ035Q7 ++ bool "SHARP LQ035Q7 TFT panel (240x320)" ++ ++config JZLCD_SAMSUNG_LTS350Q1 ++ bool "SAMSUNG LTS350Q1 TFT panel (240x320)" ++ ++config JZLCD_SAMSUNG_LTV350QVF04 ++ bool "SAMSUNG LTV350QV_F04 TFT panel (320x240)" ++ ++config JZLCD_SAMSUNG_LTP400WQF01 ++ bool "SAMSUNG LTP400WQF01 TFT panel (480x272)(16bits)" ++ ++config JZLCD_SAMSUNG_LTP400WQF02 ++ bool "SAMSUNG LTP400WQF02 TFT panel (480x272)(18bits)" ++ ++config JZLCD_AUO_A030FL01_V1 ++ bool "AUO A030FL01_V1 TFT panel (480x272)" ++ ++config JZLCD_TRULY_TFTG320240DTSW ++ bool "TRULY TFTG320240DTSW TFT panel (320x240)" ++ ++config JZLCD_TRULY_TFTG320240DTSW_SERIAL ++ bool "TRULY TFTG320240DTSW TFT panel (320x240)(8bit-serial mode)" ++ ++config JZLCD_TRULY_TFTG240320UTSW_63W_E ++ bool "TRULY TFTG240320UTSW-63W-E TFT panel (240x320,2.5in)" ++ ++config JZLCD_FOXCONN_PT035TN01 ++ bool "FOXCONN PT035TN01 TFT panel (320x240)" ++ ++config JZLCD_INNOLUX_PT035TN01_SERIAL ++ bool "INNOLUX PT035TN01 TFT panel (320x240,3.5in)(8bit-serial mode)" ++ ++config JZLCD_TOSHIBA_LTM084P363 ++ bool "Toshiba LTM084P363 TFT panel (800x600)" ++ ++config JZLCD_HYNIX_HT10X21 ++ bool "Hynix HT10X21_300 TFT panel (1024x768)" ++ ++config JZLCD_INNOLUX_AT080TN42 ++ bool "INNOLUX AT080TN42 TFT panel (800x600)" ++ ++config JZLCD_CSTN_800x600 ++ bool "800x600 colorDSTN panel" ++ ++config JZLCD_CSTN_320x240 ++ bool "320x240 colorSTN panel" ++ ++config JZLCD_MSTN_480x320 ++ bool "480x320 monoSTN panel" ++ ++config JZLCD_MSTN_320x240 ++ bool "320x240 monoSTN panel" ++ ++config JZLCD_MSTN_240x128 ++ bool "240x128 monoSTN panel" ++ ++config JZLCD_MSTN_INVERSE ++ bool "Use an inverse color display." ++ depends on (JZLCD_MSTN_480x320 || JZLCD_MSTN_240x128) ++ ++endchoice ++ ++ + config FB_CIRRUS + tristate "Cirrus Logic support" + depends on FB && (ZORRO || PCI) +--- a/drivers/video/Makefile ++++ b/drivers/video/Makefile +@@ -28,6 +28,9 @@ obj-$(CONFIG_FB_DDC) += fb_ddc + obj-$(CONFIG_FB_DEFERRED_IO) += fb_defio.o + + # Hardware specific drivers go first ++obj-$(CONFIG_FB_JZLCD_4720_4740) += jzlcd.o ++obj-$(CONFIG_FB_JZ4740_SLCD) += jz4740_slcd.o ++ + obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o + obj-$(CONFIG_FB_ARC) += arcfb.o + obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/103-lcm.patch b/recipes/linux/linux-2.6.31/ben-nanonote/103-lcm.patch new file mode 100644 index 0000000000..21303ad83b --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/103-lcm.patch @@ -0,0 +1,26 @@ +--- a/drivers/video/backlight/Kconfig ++++ b/drivers/video/backlight/Kconfig +@@ -93,6 +93,13 @@ config LCD_HP700 + If you have an HP Jornada 700 series handheld (710/720/728) + say Y to enable LCD control driver. + ++config LCD_GPM940B0 ++ tristate "Giantplus GPM940B0 LCD and backlight driver" ++ depends on LCD_CLASS_DEVICE && BACKLIGHT_CLASS_DEVICE && SPI ++ default n ++ help ++ LCD and backlight driver for the Giantplus GPM940B0 LCD module. ++ + # + # Backlight + # +--- a/drivers/video/backlight/Makefile ++++ b/drivers/video/backlight/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_LCD_PLATFORM) += platfor + obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o + obj-$(CONFIG_LCD_TDO24M) += tdo24m.o + obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o ++obj-$(CONFIG_LCD_GPM940B0) += gpm940b0.o + + obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o + obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/103-serial.patch b/recipes/linux/linux-2.6.31/ben-nanonote/103-serial.patch new file mode 100644 index 0000000000..d6b4ea8444 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/103-serial.patch @@ -0,0 +1,164 @@ +--- a/drivers/serial/8250.c ++++ b/drivers/serial/8250.c +@@ -194,7 +194,7 @@ static const struct serial8250_config ua + [PORT_16550A] = { + .name = "16550A", + .fifo_size = 16, +- .tx_loadsz = 16, ++ .tx_loadsz = 8, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO, + }, +@@ -401,6 +401,10 @@ static unsigned int mem_serial_in(struct + static void mem_serial_out(struct uart_port *p, int offset, int value) + { + offset = map_8250_out_reg(p, offset) << p->regshift; ++#if defined(CONFIG_JZSOC) ++ if (offset == (UART_FCR << p->regshift)) ++ value |= 0x10; /* set FCR.UUE */ ++#endif + writeb(value, p->membase + offset); + } + +@@ -2213,6 +2217,83 @@ static void serial8250_shutdown(struct u + serial_unlink_irq_chain(up); + } + ++#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730) ++static unsigned short quot1[3] = {0}; /* quot[0]:baud_div, quot[1]:umr, quot[2]:uacr */ ++static unsigned short * serial8250_get_divisor(struct uart_port *port, unsigned int baud) ++{ ++ int err, sum, i, j; ++ int a[12], b[12]; ++ unsigned short div, umr, uacr; ++ unsigned short umr_best, div_best, uacr_best; ++ long long t0, t1, t2, t3; ++ ++ sum = 0; ++ umr_best = div_best = uacr_best = 0; ++ div = 1; ++ ++ if ((port->uartclk % (16 * baud)) == 0) { ++ quot1[0] = port->uartclk / (16 * baud); ++ quot1[1] = 16; ++ quot1[2] = 0; ++ return quot1; ++ } ++ ++ while (1) { ++ umr = port->uartclk / (baud * div); ++ if (umr > 32) { ++ div++; ++ continue; ++ } ++ if (umr < 4) { ++ break; ++ } ++ for (i = 0; i < 12; i++) { ++ a[i] = umr; ++ b[i] = 0; ++ sum = 0; ++ for (j = 0; j <= i; j++) { ++ sum += a[j]; ++ } ++ ++ /* the precision could be 1/2^(36) due to the value of t0 */ ++ t0 = 0x1000000000LL; ++ t1 = (i + 1) * t0; ++ t2 = (sum * div) * t0; ++ t3 = div * t0; ++ do_div(t1, baud); ++ do_div(t2, port->uartclk); ++ do_div(t3, (2 * port->uartclk)); ++ err = t1 - t2 - t3; ++ ++ if (err > 0) { ++ a[i] += 1; ++ b[i] = 1; ++ } ++ } ++ ++ uacr = 0; ++ for (i = 0; i < 12; i++) { ++ if (b[i] == 1) { ++ uacr |= 1 << i; ++ } ++ } ++ ++ /* the best value of umr should be near 16, and the value of uacr should better be smaller */ ++ if (abs(umr - 16) < abs(umr_best - 16) || (abs(umr - 16) == abs(umr_best - 16) && uacr_best > uacr)) { ++ div_best = div; ++ umr_best = umr; ++ uacr_best = uacr; ++ } ++ div++; ++ } ++ ++ quot1[0] = div_best; ++ quot1[1] = umr_best; ++ quot1[2] = uacr_best; ++ ++ return quot1; ++} ++#else + static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud) + { + unsigned int quot; +@@ -2232,6 +2313,7 @@ static unsigned int serial8250_get_divis + + return quot; + } ++#endif + + static void + serial8250_set_termios(struct uart_port *port, struct ktermios *termios, +@@ -2241,6 +2323,9 @@ serial8250_set_termios(struct uart_port + unsigned char cval, fcr = 0; + unsigned long flags; + unsigned int baud, quot; ++#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730) ++ unsigned short *quot1; ++#endif + + switch (termios->c_cflag & CSIZE) { + case CS5: +@@ -2273,7 +2358,12 @@ serial8250_set_termios(struct uart_port + * Ask the core to calculate the divisor for us. + */ + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); ++#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730) ++ quot1 = serial8250_get_divisor(port, baud); ++ quot = quot1[0]; /* not usefull, just let gcc happy */ ++#else + quot = serial8250_get_divisor(port, baud); ++#endif + + /* + * Oxford Semi 952 rev B workaround +@@ -2351,6 +2441,10 @@ serial8250_set_termios(struct uart_port + if (up->capabilities & UART_CAP_UUE) + up->ier |= UART_IER_UUE | UART_IER_RTOIE; + ++#ifdef CONFIG_JZSOC ++ up->ier |= UART_IER_RTOIE; /* Set this flag, or very slow */ ++#endif ++ + serial_out(up, UART_IER, up->ier); + + if (up->capabilities & UART_CAP_EFR) { +@@ -2385,7 +2479,15 @@ serial8250_set_termios(struct uart_port + serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ + } + ++#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730) ++#define UART_UMR 9 ++#define UART_UACR 10 ++ serial_dl_write(up, quot1[0]); ++ serial_outp(up, UART_UMR, quot1[1]); ++ serial_outp(up, UART_UACR, quot1[2]); ++#else + serial_dl_write(up, quot); ++#endif + + /* + * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/104-usb.patch b/recipes/linux/linux-2.6.31/ben-nanonote/104-usb.patch new file mode 100644 index 0000000000..e15e3088f6 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/104-usb.patch @@ -0,0 +1,158 @@ +--- a/drivers/usb/Kconfig ++++ b/drivers/usb/Kconfig +@@ -44,6 +44,7 @@ config USB_ARCH_HAS_OHCI + default y if PPC_MPC52xx + # MIPS: + default y if SOC_AU1X00 ++ default y if JZSOC + # SH: + default y if CPU_SUBTYPE_SH7720 + default y if CPU_SUBTYPE_SH7721 +--- a/drivers/usb/core/hub.c ++++ b/drivers/usb/core/hub.c +@@ -1857,6 +1857,25 @@ static int hub_port_reset(struct usb_hub + { + int i, status; + ++#ifdef CONFIG_SOC_JZ4730 ++ /* ++ * On Jz4730, we assume that the first USB port was used as device. ++ * If not, please comment next lines. ++ */ ++ if (port1 == 1) { ++ return 0; ++ } ++#endif ++ ++#if defined(CONFIG_SOC_JZ4740) || defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ /* ++ * On Jz4740 and Jz4750, the second USB port was used as device. ++ */ ++ if (port1 == 2) { ++ return 0; ++ } ++#endif ++ + /* Block EHCI CF initialization during the port reset. + * Some companion controllers don't like it when they mix. + */ +@@ -2818,11 +2837,35 @@ static void hub_port_connect_change(stru + le16_to_cpu(hub->descriptor->wHubCharacteristics); + struct usb_device *udev; + int status, i; ++#ifdef CONFIG_JZSOC ++ static char jzhub = 1; /* the hub first to be initialized is jzsoc on-chip hub */ ++#endif + + dev_dbg (hub_dev, + "port %d, status %04x, change %04x, %s\n", + port1, portstatus, portchange, portspeed (portstatus)); + ++#ifdef CONFIG_SOC_JZ4730 ++ /* ++ * On Jz4730, we assume that the first USB port was used as device. ++ * If not, please comment next lines. ++ */ ++ if ((port1 == 1) && (jzhub)) { ++ jzhub = 0; ++ return; ++ } ++#endif ++ ++#if defined(CONFIG_SOC_JZ4740) || defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ /* ++ * On Jz4740 and Jz4750, the second USB port was used as device. ++ */ ++ if ((port1 == 2) && (jzhub)) { ++ jzhub = 0; ++ return; ++ } ++#endif ++ + if (hub->has_indicators) { + set_port_led(hub, port1, HUB_LED_AUTO); + hub->indicator[port1-1] = INDICATOR_AUTO; +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -121,11 +121,25 @@ choice + # + # Integrated controllers + # ++config USB_GADGET_JZ4740 ++ boolean "JZ4740 UDC" ++ depends on SOC_JZ4740 ++ select USB_GADGET_SELECTED ++ select USB_GADGET_DUALSPEED ++ help ++ Select this to support the Ingenic JZ4740 processor ++ high speed USB device controller. ++ ++config USB_JZ4740 ++ tristate ++ depends on USB_GADGET_JZ4740 ++ default USB_GADGET + + config USB_GADGET_AT91 + boolean "Atmel AT91 USB Device Port" + depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9 + select USB_GADGET_SELECTED ++ + help + Many Atmel AT91 processors (such as the AT91RM2000) have a + full speed USB Device Port with support for five configurable +@@ -534,6 +548,10 @@ config USB_DUMMY_HCD + + endchoice + ++config USB_JZ_UDC_HOTPLUG ++ boolean "Ingenic USB Device Controller Hotplug Support" ++ depends on USB_GADGET_JZ4750 ++ + config USB_GADGET_DUALSPEED + bool + depends on USB_GADGET +@@ -541,7 +559,6 @@ config USB_GADGET_DUALSPEED + help + Means that gadget drivers should include extra descriptors + and code to handle dual-speed controllers. +- + # + # USB Gadget Drivers + # +--- a/drivers/usb/gadget/Makefile ++++ b/drivers/usb/gadget/Makefile +@@ -27,6 +27,9 @@ obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o + obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o + obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o + obj-$(CONFIG_USB_LANGWELL) += langwell_udc.o ++obj-$(CONFIG_USB_JZ4740) += jz4740_udc.o ++ ++obj-$(CONFIG_USB_JZ_UDC_HOTPLUG)+= udc_hotplug_core.o + + # + # USB gadget drivers +--- a/drivers/usb/gadget/gadget_chips.h ++++ b/drivers/usb/gadget/gadget_chips.h +@@ -15,6 +15,12 @@ + #ifndef __GADGET_CHIPS_H + #define __GADGET_CHIPS_H + ++#ifdef CONFIG_USB_GADGET_JZ4740 ++#define gadget_is_jz4740(g) !strcmp("ingenic_hsusb", (g)->name) ++#else ++#define gadget_is_jz4740(g) 0 ++#endif ++ + #ifdef CONFIG_USB_GADGET_NET2280 + #define gadget_is_net2280(g) !strcmp("net2280", (g)->name) + #else +@@ -239,6 +245,9 @@ static inline int usb_gadget_controller_ + return 0x23; + else if (gadget_is_langwell(gadget)) + return 0x24; ++ else if (gadget_is_jz4740(gadget)) ++ return 0x25; ++ + return -ENOENT; + } + diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/105-sound.patch b/recipes/linux/linux-2.6.31/ben-nanonote/105-sound.patch new file mode 100644 index 0000000000..14fc3785eb --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/105-sound.patch @@ -0,0 +1,103 @@ +--- a/include/sound/pcm.h ++++ b/include/sound/pcm.h +@@ -113,23 +113,23 @@ struct snd_pcm_ops { + #define SNDRV_PCM_RATE_5512 (1<<0) /* 5512Hz */ + #define SNDRV_PCM_RATE_8000 (1<<1) /* 8000Hz */ + #define SNDRV_PCM_RATE_11025 (1<<2) /* 11025Hz */ +-#define SNDRV_PCM_RATE_16000 (1<<3) /* 16000Hz */ +-#define SNDRV_PCM_RATE_22050 (1<<4) /* 22050Hz */ +-#define SNDRV_PCM_RATE_32000 (1<<5) /* 32000Hz */ +-#define SNDRV_PCM_RATE_44100 (1<<6) /* 44100Hz */ +-#define SNDRV_PCM_RATE_48000 (1<<7) /* 48000Hz */ +-#define SNDRV_PCM_RATE_64000 (1<<8) /* 64000Hz */ +-#define SNDRV_PCM_RATE_88200 (1<<9) /* 88200Hz */ +-#define SNDRV_PCM_RATE_96000 (1<<10) /* 96000Hz */ +-#define SNDRV_PCM_RATE_176400 (1<<11) /* 176400Hz */ +-#define SNDRV_PCM_RATE_192000 (1<<12) /* 192000Hz */ ++#define SNDRV_PCM_RATE_12000 (1<<3) /* 12000Hz */ ++#define SNDRV_PCM_RATE_16000 (1<<4) /* 16000Hz */ ++#define SNDRV_PCM_RATE_22050 (1<<5) /* 22050Hz */ ++#define SNDRV_PCM_RATE_24000 (1<<6) /* 24000Hz */ ++#define SNDRV_PCM_RATE_32000 (1<<7) /* 32000Hz */ ++#define SNDRV_PCM_RATE_44100 (1<<8) /* 44100Hz */ ++#define SNDRV_PCM_RATE_48000 (1<<9) /* 48000Hz */ ++#define SNDRV_PCM_RATE_64000 (1<<10) /* 64000Hz */ ++#define SNDRV_PCM_RATE_88200 (1<<11) /* 88200Hz */ ++#define SNDRV_PCM_RATE_96000 (1<<12) /* 96000Hz */ ++#define SNDRV_PCM_RATE_176400 (1<<13) /* 176400Hz */ ++#define SNDRV_PCM_RATE_192000 (1<<14) /* 192000Hz */ + + #define SNDRV_PCM_RATE_CONTINUOUS (1<<30) /* continuous range */ + #define SNDRV_PCM_RATE_KNOT (1<<31) /* supports more non-continuos rates */ + +-#define SNDRV_PCM_RATE_8000_44100 (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_11025|\ +- SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_22050|\ +- SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100) ++#define SNDRV_PCM_RATE_8000_44100 (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_11025|SNDRV_PCM_RATE_12000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_22050|SNDRV_PCM_RATE_24000|SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100) + #define SNDRV_PCM_RATE_8000_48000 (SNDRV_PCM_RATE_8000_44100|SNDRV_PCM_RATE_48000) + #define SNDRV_PCM_RATE_8000_96000 (SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_64000|\ + SNDRV_PCM_RATE_88200|SNDRV_PCM_RATE_96000) +--- a/sound/core/pcm_native.c ++++ b/sound/core/pcm_native.c +@@ -1748,12 +1748,13 @@ static int snd_pcm_hw_rule_sample_bits(s + return snd_interval_refine(hw_param_interval(params, rule->var), &t); + } + +-#if SNDRV_PCM_RATE_5512 != 1 << 0 || SNDRV_PCM_RATE_192000 != 1 << 12 ++#if SNDRV_PCM_RATE_5512 != 1 << 0 || SNDRV_PCM_RATE_192000 != 1 << 14 + #error "Change this table" + #endif + +-static unsigned int rates[] = { 5512, 8000, 11025, 16000, 22050, 32000, 44100, +- 48000, 64000, 88200, 96000, 176400, 192000 }; ++static unsigned int rates[] = { 5512, 8000, 11025, 12000, 16000, 22050, 24000, ++ 32000, 44100, 48000, 64000, 88200, 96000, ++ 176400, 192000 }; + + const struct snd_pcm_hw_constraint_list snd_pcm_known_rates = { + .count = ARRAY_SIZE(rates), +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -35,6 +35,7 @@ source "sound/soc/s3c24xx/Kconfig" + source "sound/soc/s6000/Kconfig" + source "sound/soc/sh/Kconfig" + source "sound/soc/txx9/Kconfig" ++source "sound/soc/jz4740/Kconfig" + + # Supported codecs + source "sound/soc/codecs/Kconfig" +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -13,3 +13,4 @@ obj-$(CONFIG_SND_SOC) += s3c24xx/ + obj-$(CONFIG_SND_SOC) += s6000/ + obj-$(CONFIG_SND_SOC) += sh/ + obj-$(CONFIG_SND_SOC) += txx9/ ++obj-$(CONFIG_SND_SOC) += jz4740/ +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -176,3 +176,10 @@ config SND_SOC_WM9712 + + config SND_SOC_WM9713 + tristate ++ ++config SND_SOC_JZCODEC ++ tristate "JZ4720/JZ4740 SoC internal codec" ++ depends on SND_SOC && SOC_JZ4740 ++ help ++ Say Y if you want to use internal codec on Ingenic JZ4720/JZ4740 based ++ boards. +--- a/sound/soc/codecs/Makefile ++++ b/sound/soc/codecs/Makefile +@@ -34,6 +34,7 @@ snd-soc-wm9081-objs := wm9081.o + snd-soc-wm9705-objs := wm9705.o + snd-soc-wm9712-objs := wm9712.o + snd-soc-wm9713-objs := wm9713.o ++snd-soc-jzcodec-objs := jzcodec.o + + obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o + obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o +@@ -71,3 +72,4 @@ obj-$(CONFIG_SND_SOC_WM9081) += snd-soc- + obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o + obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o + obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o ++obj-$(CONFIG_SND_SOC_JZCODEC) += snd-soc-jzcodec.o diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/220-add-2gb-nand-support.patch b/recipes/linux/linux-2.6.31/ben-nanonote/220-add-2gb-nand-support.patch new file mode 100644 index 0000000000..ae80c11910 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/220-add-2gb-nand-support.patch @@ -0,0 +1,11 @@ +--- a/include/mtd/mtd-abi.h ++++ b/include/mtd/mtd-abi.h +@@ -135,7 +135,7 @@ struct nand_oobfree { + */ + struct nand_ecclayout { + __u32 eccbytes; +- __u32 eccpos[64]; ++ __u32 eccpos[72]; + __u32 oobavail; + struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES]; + }; diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/300-jffs2-summery-vmalloc.patch b/recipes/linux/linux-2.6.31/ben-nanonote/300-jffs2-summery-vmalloc.patch new file mode 100644 index 0000000000..f5949d99bb --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/300-jffs2-summery-vmalloc.patch @@ -0,0 +1,20 @@ +--- a/fs/jffs2/summary.c ++++ b/fs/jffs2/summary.c +@@ -32,7 +32,7 @@ int jffs2_sum_init(struct jffs2_sb_info + return -ENOMEM; + } + +- c->summary->sum_buf = kmalloc(sum_size, GFP_KERNEL); ++ c->summary->sum_buf = vmalloc(sum_size); + + if (!c->summary->sum_buf) { + JFFS2_WARNING("Can't allocate buffer for writing out summary information!\n"); +@@ -51,7 +51,7 @@ void jffs2_sum_exit(struct jffs2_sb_info + + jffs2_sum_disable_collecting(c->summary); + +- kfree(c->summary->sum_buf); ++ vfree(c->summary->sum_buf); + c->summary->sum_buf = NULL; + + kfree(c->summary); diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/400-spi-gpio-3wire.patch b/recipes/linux/linux-2.6.31/ben-nanonote/400-spi-gpio-3wire.patch new file mode 100644 index 0000000000..d05d9d3486 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/400-spi-gpio-3wire.patch @@ -0,0 +1,37 @@ +--- a/drivers/spi/spi_gpio.c ++++ b/drivers/spi/spi_gpio.c +@@ -254,9 +254,11 @@ spi_gpio_request(struct spi_gpio_platfor + if (value) + goto done; + +- value = spi_gpio_alloc(SPI_MISO_GPIO, label, true); +- if (value) +- goto free_mosi; ++ if (SPI_MISO_GPIO != SPI_MOSI_GPIO) { ++ value = spi_gpio_alloc(SPI_MISO_GPIO, label, true); ++ if (value) ++ goto free_mosi; ++ } + + value = spi_gpio_alloc(SPI_SCK_GPIO, label, false); + if (value) +@@ -319,7 +321,8 @@ static int __devinit spi_gpio_probe(stru + if (status < 0) { + spi_master_put(spi_gpio->bitbang.master); + gpio_free: +- gpio_free(SPI_MISO_GPIO); ++ if (SPI_MISO_GPIO != SPI_MOSI_GPIO) ++ gpio_free(SPI_MISO_GPIO); + gpio_free(SPI_MOSI_GPIO); + gpio_free(SPI_SCK_GPIO); + spi_master_put(master); +@@ -343,7 +346,8 @@ static int __devexit spi_gpio_remove(str + + platform_set_drvdata(pdev, NULL); + +- gpio_free(SPI_MISO_GPIO); ++ if (SPI_MISO_GPIO != SPI_MOSI_GPIO) ++ gpio_free(SPI_MISO_GPIO); + gpio_free(SPI_MOSI_GPIO); + gpio_free(SPI_SCK_GPIO); + diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/410-soc-32bit-regs.patch b/recipes/linux/linux-2.6.31/ben-nanonote/410-soc-32bit-regs.patch new file mode 100644 index 0000000000..ef8455bcca --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/410-soc-32bit-regs.patch @@ -0,0 +1,241 @@ +--- a/include/sound/soc.h ++++ b/include/sound/soc.h +@@ -215,10 +215,10 @@ void snd_soc_jack_free_gpios(struct snd_ + #endif + + /* codec register bit access */ +-int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, +- unsigned short mask, unsigned short value); +-int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, +- unsigned short mask, unsigned short value); ++int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg, ++ unsigned int mask, unsigned int value); ++int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg, ++ unsigned int mask, unsigned int value); + + int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, + struct snd_ac97_bus_ops *ops, int num); +@@ -492,8 +492,8 @@ struct soc_mixer_control { + + /* enumerated kcontrol */ + struct soc_enum { +- unsigned short reg; +- unsigned short reg2; ++ unsigned int reg; ++ unsigned int reg2; + unsigned char shift_l; + unsigned char shift_r; + unsigned int max; +--- a/sound/soc/soc-core.c ++++ b/sound/soc/soc-core.c +@@ -500,8 +500,8 @@ static int soc_pcm_hw_params(struct snd_ + if (cpu_dai->ops->hw_params) { + ret = cpu_dai->ops->hw_params(substream, params, cpu_dai); + if (ret < 0) { +- printk(KERN_ERR "asoc: interface %s hw params failed\n", +- cpu_dai->name); ++ printk(KERN_ERR "asoc: interface %s hw params failed: %d\n", ++ cpu_dai->name, ret); + goto interface_err; + } + } +@@ -842,7 +842,7 @@ static void snd_soc_instantiate_card(str + * DAIs currently; we can't do this per link since some AC97 + * codecs have non-AC97 DAIs. + */ +- if (!ac97) ++ if (!ac97) { + for (i = 0; i < card->num_links; i++) { + found = 0; + list_for_each_entry(dai, &dai_list, list) +@@ -856,6 +856,7 @@ static void snd_soc_instantiate_card(str + return; + } + } ++ } + + /* Note that we do not current check for codec components */ + +@@ -1263,11 +1264,11 @@ EXPORT_SYMBOL_GPL(snd_soc_free_ac97_code + * + * Returns 1 for change else 0. + */ +-int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, +- unsigned short mask, unsigned short value) ++int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg, ++ unsigned int mask, unsigned int value) + { + int change; +- unsigned short old, new; ++ unsigned int old, new; + + mutex_lock(&io_mutex); + old = snd_soc_read(codec, reg); +@@ -1293,11 +1294,11 @@ EXPORT_SYMBOL_GPL(snd_soc_update_bits); + * + * Returns 1 for change else 0. + */ +-int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, +- unsigned short mask, unsigned short value) ++int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg, ++ unsigned int mask, unsigned int value) + { + int change; +- unsigned short old, new; ++ unsigned int old, new; + + mutex_lock(&io_mutex); + old = snd_soc_read(codec, reg); +@@ -1586,7 +1587,7 @@ int snd_soc_get_enum_double(struct snd_k + { + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val, bitmask; ++ unsigned int val, bitmask; + + for (bitmask = 1; bitmask < e->max; bitmask <<= 1) + ; +@@ -1615,8 +1616,8 @@ int snd_soc_put_enum_double(struct snd_k + { + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val; +- unsigned short mask, bitmask; ++ unsigned int val; ++ unsigned int mask, bitmask; + + for (bitmask = 1; bitmask < e->max; bitmask <<= 1) + ; +@@ -1652,7 +1653,7 @@ int snd_soc_get_value_enum_double(struct + { + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short reg_val, val, mux; ++ unsigned int reg_val, val, mux; + + reg_val = snd_soc_read(codec, e->reg); + val = (reg_val >> e->shift_l) & e->mask; +@@ -1691,8 +1692,8 @@ int snd_soc_put_value_enum_double(struct + { + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val; +- unsigned short mask; ++ unsigned int val; ++ unsigned int mask; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) + return -EINVAL; +@@ -1852,7 +1853,7 @@ int snd_soc_put_volsw(struct snd_kcontro + int max = mc->max; + unsigned int mask = (1 << fls(max)) - 1; + unsigned int invert = mc->invert; +- unsigned short val, val2, val_mask; ++ unsigned int val, val2, val_mask; + + val = (ucontrol->value.integer.value[0] & mask); + if (invert) +@@ -1958,7 +1959,7 @@ int snd_soc_put_volsw_2r(struct snd_kcon + unsigned int mask = (1 << fls(max)) - 1; + unsigned int invert = mc->invert; + int err; +- unsigned short val, val2, val_mask; ++ unsigned int val, val2, val_mask; + + val_mask = mask << shift; + val = (ucontrol->value.integer.value[0] & mask); +@@ -2050,7 +2051,7 @@ int snd_soc_put_volsw_s8(struct snd_kcon + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int reg = mc->reg; + int min = mc->min; +- unsigned short val; ++ unsigned int val; + + val = (ucontrol->value.integer.value[0]+min) & 0xff; + val |= ((ucontrol->value.integer.value[1]+min) & 0xff) << 8; +@@ -2251,6 +2252,7 @@ int snd_soc_register_dai(struct snd_soc_ + if (!dai->ops) + dai->ops = &null_dai_ops; + ++ + INIT_LIST_HEAD(&dai->list); + + mutex_lock(&client_mutex); +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -268,7 +268,7 @@ static int dapm_connect_mixer(struct snd + static int dapm_update_bits(struct snd_soc_dapm_widget *widget) + { + int change, power; +- unsigned short old, new; ++ unsigned int old, new; + struct snd_soc_codec *codec = widget->codec; + + /* check for valid widgets */ +@@ -1246,7 +1246,6 @@ EXPORT_SYMBOL_GPL(snd_soc_dapm_add_route + /** + * snd_soc_dapm_new_widgets - add new dapm widgets + * @codec: audio codec +- * + * Checks the codec for any new dapm widgets and creates them if found. + * + * Returns 0 for success. +@@ -1336,7 +1335,8 @@ int snd_soc_dapm_get_volsw(struct snd_kc + + ucontrol->value.integer.value[0] = + (snd_soc_read(widget->codec, reg) >> shift) & mask; +- if (shift != rshift) ++ ++ if (shift != rshift) + ucontrol->value.integer.value[1] = + (snd_soc_read(widget->codec, reg) >> rshift) & mask; + if (invert) { +@@ -1372,7 +1372,7 @@ int snd_soc_dapm_put_volsw(struct snd_kc + int max = mc->max; + unsigned int mask = (1 << fls(max)) - 1; + unsigned int invert = mc->invert; +- unsigned short val, val2, val_mask; ++ unsigned int val, val2, val_mask; + int ret; + + val = (ucontrol->value.integer.value[0] & mask); +@@ -1436,7 +1436,7 @@ int snd_soc_dapm_get_enum_double(struct + { + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val, bitmask; ++ unsigned int val, bitmask; + + for (bitmask = 1; bitmask < e->max; bitmask <<= 1) + ; +@@ -1464,8 +1464,8 @@ int snd_soc_dapm_put_enum_double(struct + { + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val, mux; +- unsigned short mask, bitmask; ++ unsigned int val, mux; ++ unsigned int mask, bitmask; + int ret = 0; + + for (bitmask = 1; bitmask < e->max; bitmask <<= 1) +@@ -1523,7 +1523,7 @@ int snd_soc_dapm_get_value_enum_double(s + { + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short reg_val, val, mux; ++ unsigned int reg_val, val, mux; + + reg_val = snd_soc_read(widget->codec, e->reg); + val = (reg_val >> e->shift_l) & e->mask; +@@ -1563,8 +1563,8 @@ int snd_soc_dapm_put_value_enum_double(s + { + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; +- unsigned short val, mux; +- unsigned short mask; ++ unsigned int val, mux; ++ unsigned int mask; + int ret = 0; + + if (ucontrol->value.enumerated.item[0] > e->max - 1) diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/500-modifier-keys.patch b/recipes/linux/linux-2.6.31/ben-nanonote/500-modifier-keys.patch new file mode 100644 index 0000000000..bf75ddf7b8 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/500-modifier-keys.patch @@ -0,0 +1,170 @@ +diff --git a/drivers/char/defkeymap.map b/drivers/char/defkeymap.map +index 50b30ca..e2ff31a 100644 +--- a/drivers/char/defkeymap.map ++++ b/drivers/char/defkeymap.map +@@ -1,5 +1,5 @@ + # Default kernel keymap. This uses 7 modifier combinations. +-keymaps 0-2,4-5,8,12 ++keymaps 0-2,4-5,8,12,128 + # Change the above line into + # keymaps 0-2,4-6,8,12 + # in case you want the entries +@@ -45,24 +45,38 @@ keycode 12 = minus underscore backslash + control keycode 12 = Control_underscore + shift control keycode 12 = Control_underscore + alt keycode 12 = Meta_minus +-keycode 13 = equal plus ++keycode 13 = equal plus + alt keycode 13 = Meta_equal ++ altgr keycode 13 = asciitilde ++ ctrlr keycode 13 = three + keycode 14 = Delete Delete + control keycode 14 = BackSpace + alt keycode 14 = Meta_Delete + keycode 15 = Tab Tab + alt keycode 15 = Meta_Tab + keycode 16 = q ++ altgr keycode 16 = exclam + keycode 17 = w ++ altgr keycode 17 = at + keycode 18 = e +- altgr keycode 18 = Hex_E ++ altgr keycode 18 = numbersign + keycode 19 = r ++ altgr keycode 19 = dollar + keycode 20 = t ++ altgr keycode 20 = percent + keycode 21 = y ++ altgr keycode 21 = asciicircum + keycode 22 = u ++ altgr keycode 22 = ampersand ++ ctrlr keycode 22 = seven + keycode 23 = i ++ altgr keycode 23 = asterisk ++ ctrlr keycode 23 = eight + keycode 24 = o ++ altgr keycode 24 = parenleft ++ ctrlr keycode 24 = nine + keycode 25 = p ++ altgr keycode 25 = parenright + keycode 26 = bracketleft braceleft + control keycode 26 = Escape + alt keycode 26 = Meta_bracketleft +@@ -73,17 +87,26 @@ keycode 28 = Return + alt keycode 28 = Meta_Control_m + keycode 29 = Control + keycode 30 = a +- altgr keycode 30 = Hex_A ++ altgr keycode 30 = U+00B0 + keycode 31 = s ++ altgr keycode 31 = U+00A8 + keycode 32 = d +- altgr keycode 32 = Hex_D ++ altgr keycode 32 = U+20AC + keycode 33 = f +- altgr keycode 33 = Hex_F ++ altgr keycode 33 = minus + keycode 34 = g ++ altgr keycode 34 = underscore + keycode 35 = h ++ altgr keycode 35 = braceleft + keycode 36 = j ++ altgr keycode 36 = bracketleft ++ ctrlr keycode 36 = four + keycode 37 = k ++ altgr keycode 37 = bracketright ++ ctrlr keycode 37 = five + keycode 38 = l ++ altgr keycode 38 = braceright ++ ctrlr keycode 38 = six + keycode 39 = semicolon colon + alt keycode 39 = Meta_semicolon + keycode 40 = apostrophe quotedbl +@@ -97,58 +120,65 @@ keycode 43 = backslash bar + control keycode 43 = Control_backslash + alt keycode 43 = Meta_backslash + keycode 44 = z ++ altgr keycode 44 = nine + keycode 45 = x ++ altgr keycode 45 = zero + keycode 46 = c + altgr keycode 46 = Hex_C + keycode 47 = v + keycode 48 = b + altgr keycode 48 = Hex_B + keycode 49 = n ++ altgr keycode 49 = less ++ ctrlr keycode 49 = one + keycode 50 = m +-keycode 51 = comma less +- alt keycode 51 = Meta_comma +-keycode 52 = period greater ++ altgr keycode 50 = greater ++ ctrlr keycode 50 = two ++keycode 51 = comma semicolon ++ altgr keycode 51 = apostrophe ++keycode 52 = period colon + control keycode 52 = Compose +- alt keycode 52 = Meta_period ++ altgr keycode 52 = quotedbl + keycode 53 = slash question + control keycode 53 = Delete + alt keycode 53 = Meta_slash +-keycode 54 = Shift ++ ctrlr keycode 53 = zero ++keycode 54 = AltGr + keycode 55 = KP_Multiply + keycode 56 = Alt + keycode 57 = space space + control keycode 57 = nul + alt keycode 57 = Meta_space + keycode 58 = Caps_Lock +-keycode 59 = F1 F11 Console_13 ++keycode 59 = F1 F11 one + control keycode 59 = F1 + alt keycode 59 = Console_1 + control alt keycode 59 = Console_1 +-keycode 60 = F2 F12 Console_14 ++keycode 60 = F2 F12 two + control keycode 60 = F2 + alt keycode 60 = Console_2 + control alt keycode 60 = Console_2 +-keycode 61 = F3 F13 Console_15 ++keycode 61 = F3 F13 three + control keycode 61 = F3 + alt keycode 61 = Console_3 + control alt keycode 61 = Console_3 +-keycode 62 = F4 F14 Console_16 ++keycode 62 = F4 F14 four + control keycode 62 = F4 + alt keycode 62 = Console_4 + control alt keycode 62 = Console_4 +-keycode 63 = F5 F15 Console_17 ++keycode 63 = F5 F15 five + control keycode 63 = F5 + alt keycode 63 = Console_5 + control alt keycode 63 = Console_5 +-keycode 64 = F6 F16 Console_18 ++keycode 64 = F6 F16 six + control keycode 64 = F6 + alt keycode 64 = Console_6 + control alt keycode 64 = Console_6 +-keycode 65 = F7 F17 Console_19 ++keycode 65 = F7 F17 seven + control keycode 65 = F7 + alt keycode 65 = Console_7 + control alt keycode 65 = Console_7 +-keycode 66 = F8 F18 Console_20 ++keycode 66 = F8 F18 eight + control keycode 66 = F8 + alt keycode 66 = Console_8 + control alt keycode 66 = Console_8 +@@ -220,7 +250,7 @@ keycode 93 = + keycode 94 = + keycode 95 = + keycode 96 = KP_Enter +-keycode 97 = Control ++keycode 97 = CtrlR + keycode 98 = KP_Divide + keycode 99 = Control_backslash + control keycode 99 = Control_backslash diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/900-add-openwrt-logo.patch b/recipes/linux/linux-2.6.31/ben-nanonote/900-add-openwrt-logo.patch new file mode 100644 index 0000000000..e2d85641d8 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/900-add-openwrt-logo.patch @@ -0,0 +1,9716 @@ +--- a/drivers/video/logo/Kconfig ++++ b/drivers/video/logo/Kconfig +@@ -82,4 +82,8 @@ config LOGO_M32R_CLUT224 + depends on M32R + default y + ++config LOGO_OPENWRT_CLUT224 ++ bool "224-color OpenWrt Linux logo" ++ default y ++ + endif # LOGO +--- a/drivers/video/logo/Makefile ++++ b/drivers/video/logo/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_LOGO_SUPERH_MONO) += logo_ + obj-$(CONFIG_LOGO_SUPERH_VGA16) += logo_superh_vga16.o + obj-$(CONFIG_LOGO_SUPERH_CLUT224) += logo_superh_clut224.o + obj-$(CONFIG_LOGO_M32R_CLUT224) += logo_m32r_clut224.o ++obj-$(CONFIG_LOGO_OPENWRT_CLUT224) += logo_openwrt_clut224.o + + obj-$(CONFIG_SPU_BASE) += logo_spe_clut224.o + +--- a/drivers/video/logo/logo.c ++++ b/drivers/video/logo/logo.c +@@ -100,6 +100,10 @@ const struct linux_logo * __init_refok f + /* M32R Linux logo */ + logo = &logo_m32r_clut224; + #endif ++#ifdef CONFIG_LOGO_OPENWRT_CLUT224 ++ /* OpenWrt logo */ ++ logo = &logo_openwrt_clut224; ++#endif + } + return logo; + } +--- /dev/null ++++ b/drivers/video/logo/logo_openwrt_clut224.ppm +@@ -0,0 +1,9669 @@ ++P3 ++320 179 ++255 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 55 70 121 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 48 64 117 73 86 133 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++73 86 133 65 79 128 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 35 51 108 70 84 131 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 49 65 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 58 73 123 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 36 52 108 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 56 70 122 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 54 69 120 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 72 85 132 72 85 132 58 73 123 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++52 67 119 73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 66 80 129 33 50 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 38 54 109 71 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 66 80 129 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 55 70 121 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 36 52 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 58 73 123 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 33 50 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 46 61 115 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 47 105 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 43 59 113 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 72 85 132 64 78 127 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 50 65 118 ++73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 66 80 129 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 44 60 114 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 54 69 120 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 50 65 118 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 48 64 117 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 27 44 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 27 44 102 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 72 85 132 70 84 131 32 49 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 46 61 115 73 86 133 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 65 79 128 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++56 70 122 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 32 49 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++58 73 123 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 35 51 108 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 52 67 119 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 43 59 113 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 111 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 33 50 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++72 85 132 72 85 132 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 42 58 112 73 86 133 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 63 77 126 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 66 80 128 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 54 69 120 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++40 56 111 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 39 55 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 58 73 123 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 52 67 119 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 39 55 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++44 60 114 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 111 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 35 51 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++72 85 132 55 70 121 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 38 54 109 72 85 132 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++58 73 123 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 71 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 63 77 126 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 52 67 119 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 47 62 115 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 38 54 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 47 62 115 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 110 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 35 51 108 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 37 53 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++65 79 128 27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 47 105 69 83 131 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 49 65 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 45 60 114 72 85 132 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 51 66 119 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 46 61 115 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 47 62 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 38 54 109 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++34 50 107 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 43 59 113 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 63 77 126 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 72 85 132 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 60 75 125 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 66 80 129 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 60 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 55 70 121 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 31 48 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 46 104 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 47 62 115 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++50 65 118 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 68 82 130 30 46 104 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 71 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 48 64 117 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 55 70 121 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 52 67 119 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 54 69 120 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++54 69 120 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 37 53 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 29 45 103 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 60 75 125 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 50 65 118 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 64 78 127 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 110 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 37 53 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++48 64 117 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 47 62 115 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 32 49 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 42 58 112 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 69 83 131 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 47 62 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 66 80 129 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 64 78 127 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 44 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++40 56 111 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 47 62 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 42 58 112 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 36 52 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 111 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 32 49 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 54 69 120 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 70 84 131 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 40 56 111 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++56 70 122 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 50 65 118 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++47 62 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 58 73 123 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 52 67 119 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++34 50 107 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 52 67 119 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 37 53 109 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 40 56 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 38 54 109 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 35 51 108 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 56 70 122 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++60 75 125 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++58 73 123 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 50 65 118 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++29 45 103 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 44 60 114 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 34 50 107 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 36 52 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 63 77 126 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++36 52 108 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 45 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 63 77 126 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++63 77 126 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 54 69 120 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 33 50 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 28 45 103 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 47 62 115 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 31 48 105 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 38 54 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 45 60 114 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++66 80 128 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 58 73 123 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 59 74 124 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 50 65 118 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++40 56 111 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 48 64 117 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 29 45 103 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 27 44 102 68 82 130 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 37 53 109 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++60 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 43 59 113 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 44 60 114 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 47 62 115 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 30 46 104 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 46 61 115 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 66 80 129 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 63 77 126 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 45 60 114 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 66 80 128 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 56 70 122 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++54 69 120 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++52 67 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 37 53 109 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 48 64 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 43 59 113 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 32 49 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++26 43 102 66 80 129 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 72 85 132 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 58 73 123 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 56 70 122 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++45 60 114 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 52 67 119 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 40 56 111 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 35 51 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++43 59 113 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 65 79 128 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 68 82 130 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 66 80 129 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 37 53 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 110 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 37 53 109 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 39 55 110 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 40 56 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++66 80 128 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 40 56 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 50 65 118 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 39 55 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 45 60 114 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++32 49 106 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 54 69 120 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 33 50 106 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 35 51 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 73 86 133 71 84 130 70 81 118 70 81 118 71 84 130 ++76 89 135 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 60 75 125 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 51 66 119 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++66 80 128 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 51 66 119 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 49 65 117 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 47 105 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 44 60 114 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 37 53 109 25 42 101 15 25 57 23 37 83 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 77 90 136 60 71 109 43 51 76 25 31 50 15 16 21 ++3 4 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 7 9 13 15 18 27 29 34 52 46 54 80 64 76 117 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 63 77 126 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 63 77 126 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++58 73 123 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 58 73 123 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 56 70 122 61 75 125 61 75 125 61 75 125 54 69 120 ++32 41 72 32 41 72 32 41 72 32 41 72 32 41 72 30 37 63 ++30 37 63 30 37 63 30 37 63 30 37 63 30 37 63 30 37 63 ++30 37 63 27 35 61 13 22 52 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 15 25 57 13 22 52 ++13 22 52 13 22 52 27 35 61 30 37 63 30 37 63 30 37 63 ++30 37 63 30 37 63 30 37 63 30 37 63 30 37 63 30 37 63 ++36 45 78 54 69 120 54 69 120 54 69 120 54 69 120 39 55 110 ++25 42 101 19 29 65 13 22 52 13 22 52 13 22 52 13 22 52 ++13 22 52 13 22 52 13 22 52 13 22 52 13 22 52 13 22 52 ++13 22 52 13 22 52 13 22 52 27 35 61 28 36 67 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 47 62 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 43 59 113 23 33 67 4 6 13 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 64 76 117 ++32 38 56 7 9 13 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 14 14 16 3 4 6 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++10 12 18 38 45 67 70 81 118 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 48 64 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 47 62 115 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++48 64 117 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 63 77 126 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 49 65 117 61 75 125 61 75 125 61 75 125 59 74 124 ++2 3 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 10 17 39 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 41 89 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++5 7 13 54 69 120 54 69 120 54 69 120 54 69 120 42 58 112 ++25 42 101 8 10 17 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 14 19 34 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++29 39 72 8 10 17 0 0 0 0 0 0 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 64 76 117 23 26 38 0 0 0 ++0 0 0 0 0 0 15 16 21 89 90 90 137 140 149 187 187 187 ++215 215 215 244 244 244 255 255 255 255 255 255 255 255 255 255 255 255 ++237 237 237 207 207 207 180 180 180 134 134 135 75 75 75 7 8 9 ++0 0 0 0 0 0 1 1 2 29 34 52 70 81 118 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 65 79 128 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 110 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 43 59 113 61 75 125 61 75 125 61 75 125 61 75 125 ++15 18 27 0 0 0 53 55 60 100 102 106 100 102 106 100 102 106 ++100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 ++100 102 106 75 75 75 0 0 0 8 10 17 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 15 25 57 0 0 0 30 30 30 ++100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 ++100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 7 8 9 ++0 0 0 45 57 100 54 69 120 54 69 120 54 69 120 46 61 115 ++25 42 101 1 1 3 0 0 0 89 90 90 100 102 106 100 102 106 ++100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 100 102 106 ++100 102 106 100 102 106 30 30 30 0 0 0 26 32 53 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 29 40 76 8 11 18 ++0 0 0 0 0 0 30 30 30 7 8 9 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 75 88 134 32 38 61 1 1 1 0 0 0 3 4 6 ++89 90 90 195 195 195 251 251 251 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 244 244 244 ++167 167 167 75 75 75 1 2 3 0 0 0 2 3 3 43 51 76 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 65 79 128 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 49 65 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 47 105 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 40 56 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 39 55 110 61 75 125 61 75 125 61 75 125 61 75 125 ++27 35 61 0 0 0 100 102 106 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 226 226 226 0 0 0 1 1 2 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 9 15 36 0 0 0 123 126 137 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 75 75 75 ++0 0 0 30 37 63 54 69 120 54 69 120 54 69 120 49 65 117 ++23 37 83 0 0 0 15 16 21 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 43 45 49 0 0 0 36 45 78 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 30 46 104 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 46 61 115 ++45 60 114 45 60 114 28 40 79 9 12 21 0 0 0 0 0 0 ++15 16 21 137 140 149 244 244 244 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++70 81 118 15 18 27 0 0 0 1 1 1 89 90 90 226 226 226 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 207 207 207 75 75 75 0 0 0 0 0 0 ++23 26 38 71 84 130 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 50 65 118 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 52 67 119 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 58 73 123 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 65 79 128 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 46 61 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 61 75 125 61 75 125 61 75 125 61 75 125 ++41 51 85 0 0 0 43 45 49 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 15 16 21 0 0 0 23 37 83 25 42 101 ++25 42 101 25 42 101 25 42 101 2 3 7 0 0 0 195 195 195 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 148 148 149 ++0 0 0 14 19 34 54 69 120 54 69 120 54 69 120 52 67 119 ++19 29 65 0 0 0 75 75 75 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 237 237 237 1 2 3 0 0 0 49 62 109 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 46 61 115 ++28 40 79 9 13 26 0 0 0 0 0 0 15 16 21 134 134 135 ++244 244 244 255 255 255 255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 64 76 117 ++8 10 17 0 0 0 30 30 30 187 187 187 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 155 156 157 14 14 16 ++0 0 0 12 15 26 70 81 118 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 63 77 126 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 66 80 128 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 58 73 123 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 51 66 119 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 61 75 125 61 75 125 61 75 125 61 75 125 ++53 67 117 0 0 0 2 3 3 244 244 244 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 75 75 75 0 0 0 19 29 65 25 42 101 ++25 42 101 25 42 101 23 37 83 0 0 0 14 14 16 251 251 251 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 215 215 215 ++0 0 0 1 2 3 53 67 117 54 69 120 54 69 120 54 69 120 ++13 20 42 0 0 0 117 119 127 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 187 187 187 0 0 0 7 9 15 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 33 50 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 18 31 74 10 14 26 ++0 0 0 0 0 0 14 14 16 123 126 137 244 244 244 255 255 255 ++255 255 255 255 255 255 255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 70 81 118 8 10 17 ++0 0 0 43 45 49 226 226 226 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 207 207 207 ++30 30 30 0 0 0 12 15 26 72 85 132 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 72 85 132 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 50 65 118 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 56 70 122 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 60 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 8 11 18 0 0 0 187 187 187 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 117 119 127 0 0 0 13 20 42 25 42 101 ++25 42 101 25 42 101 13 22 52 0 0 0 89 90 90 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++30 30 30 0 0 0 41 51 85 54 69 120 54 69 120 54 69 120 ++9 13 26 0 0 0 167 167 167 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 134 134 135 0 0 0 13 20 42 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 35 51 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 18 31 74 9 13 26 0 0 0 0 0 0 ++14 14 16 117 119 127 237 237 237 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 ++78 91 137 78 91 137 78 91 137 75 88 134 15 18 27 0 0 0 ++43 45 49 237 237 237 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++226 226 226 30 30 30 0 0 0 23 26 38 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++64 78 127 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 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120 ++2 3 7 0 0 0 215 215 215 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 75 75 75 0 0 0 19 29 65 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 37 53 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 9 15 36 0 0 0 7 8 9 117 119 127 ++237 237 237 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 32 38 61 0 0 0 30 30 30 ++226 226 226 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 207 207 207 7 8 9 0 0 0 46 54 80 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++51 66 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++54 69 120 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 44 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 39 55 111 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 52 67 119 61 75 125 61 75 125 61 75 125 ++60 75 125 32 41 72 0 0 0 75 75 75 255 255 255 255 255 255 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255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 ++78 91 137 78 91 137 60 71 109 0 0 1 1 1 1 187 187 187 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 148 148 149 0 0 0 4 5 9 74 85 123 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++63 77 126 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++44 60 114 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 49 65 117 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 32 49 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 49 65 117 61 75 125 61 75 125 61 75 125 ++60 75 125 49 61 100 0 0 0 15 16 21 254 254 254 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 251 251 251 7 8 9 0 0 0 23 37 83 ++25 42 101 19 29 65 0 0 0 43 45 49 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++237 237 237 2 3 3 0 0 0 49 62 109 54 69 120 41 51 85 ++0 0 0 51 51 51 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++215 215 215 0 0 0 1 2 3 31 48 105 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 40 56 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 9 15 36 0 0 0 148 148 149 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 30 30 30 0 0 0 18 31 74 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 19 23 37 0 0 0 100 102 106 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 254 254 254 53 55 60 0 0 0 32 38 56 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 66 79 125 55 65 99 44 53 81 ++40 48 74 44 52 77 50 58 85 60 71 109 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++71 85 132 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++36 52 108 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 66 80 128 60 71 109 49 60 97 ++50 58 85 40 48 74 39 46 71 40 49 78 44 53 81 49 60 97 ++60 71 109 66 79 125 68 82 130 68 82 130 68 82 130 56 70 122 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 29 45 103 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 27 41 89 19 29 65 ++15 25 57 15 25 57 15 25 57 19 29 65 23 37 83 25 42 101 ++25 42 101 25 42 101 46 61 115 61 75 125 61 75 125 61 75 125 ++61 75 125 59 74 124 2 3 5 0 0 0 215 215 215 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 51 51 51 0 0 0 19 29 65 ++25 42 101 10 17 39 0 0 0 100 102 106 255 255 255 255 255 255 ++255 255 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25 42 101 28 45 103 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 ++78 91 137 60 71 109 0 0 0 7 8 9 226 226 226 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 ++167 167 167 75 75 75 30 30 30 2 3 3 7 8 9 43 45 49 ++100 102 106 207 207 207 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 195 195 195 0 0 0 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4 6 13 4 6 13 4 6 13 27 41 89 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 29 34 52 0 0 0 100 102 106 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 226 226 226 53 55 60 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 1 2 3 100 102 106 251 251 251 255 255 255 255 255 255 ++255 255 255 255 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101 25 42 101 ++25 42 101 25 42 101 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 71 84 130 ++44 52 77 19 23 37 1 2 3 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 3 3 ++23 26 38 48 55 81 74 87 134 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 ++77 90 136 77 90 136 77 90 136 44 53 81 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++15 16 21 4 5 9 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 3 5 ++32 38 56 66 79 125 73 86 133 65 79 128 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 29 45 103 71 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 66 79 125 40 48 74 ++12 15 26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 3 5 9 13 20 42 ++23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++64 78 127 66 80 129 66 80 129 40 48 74 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++32 41 72 63 77 126 54 69 120 25 42 101 9 15 36 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 41 51 85 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 8 11 18 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++13 22 52 25 42 101 48 64 117 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 23 28 45 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 11 15 31 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 46 104 29 39 72 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++13 22 52 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 46 61 115 ++41 51 85 9 13 26 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 4 6 13 15 25 57 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 38 54 109 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 74 87 134 55 65 99 43 51 76 32 38 56 ++23 26 38 15 18 27 10 12 18 7 9 13 4 5 9 10 12 18 ++15 18 27 16 21 36 29 34 52 40 48 74 55 65 99 73 86 133 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 44 53 81 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 73 86 133 55 65 99 32 38 61 23 26 38 15 18 27 ++8 10 17 15 16 21 19 23 37 29 34 52 49 60 97 71 84 130 ++73 86 133 73 86 133 73 86 133 47 62 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 45 60 114 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 64 76 117 46 54 81 32 38 61 23 28 45 15 18 27 ++9 12 21 8 11 17 7 9 13 8 11 17 9 12 21 15 18 27 ++23 28 45 32 38 61 40 49 78 41 54 95 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 ++66 80 129 66 80 129 66 80 129 59 72 115 49 60 97 49 60 97 ++49 60 97 49 60 97 49 60 97 49 60 97 49 60 97 49 60 97 ++49 60 97 49 60 97 49 60 97 49 60 97 49 60 97 49 60 97 ++60 71 109 63 77 126 47 62 115 25 42 101 23 37 83 18 31 74 ++18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 ++18 31 74 41 54 95 41 54 95 41 54 95 41 54 95 41 54 95 ++41 54 95 53 67 117 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 49 61 100 41 54 95 41 54 95 ++41 54 95 28 40 79 18 31 74 18 31 74 18 31 74 18 31 74 ++18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 ++27 41 89 25 42 101 51 66 119 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 49 62 109 41 51 85 ++41 51 85 41 51 85 41 51 85 41 51 85 41 51 85 23 37 83 ++18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 18 31 74 ++18 31 74 23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 42 56 104 41 51 85 41 51 85 ++41 51 85 41 51 85 41 51 85 41 51 85 41 51 85 41 51 85 ++41 51 85 41 51 85 41 51 85 28 40 79 18 31 74 18 31 74 ++23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 46 61 115 ++45 60 114 45 60 114 41 54 95 27 35 61 16 21 36 9 13 26 ++7 9 15 5 7 13 4 6 13 8 10 17 9 13 26 11 15 31 ++13 20 42 15 25 57 18 31 74 27 41 89 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++50 65 118 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 44 53 81 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 82 95 139 110 117 140 110 117 140 ++110 117 140 82 95 139 69 83 131 28 45 103 60 75 125 64 78 127 ++64 78 127 64 78 127 42 58 112 64 78 127 72 85 132 107 114 137 ++110 117 140 110 117 140 110 117 140 82 95 139 75 88 134 110 117 140 ++110 117 140 110 117 140 82 95 139 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 30 47 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 ++76 89 135 107 114 137 107 114 137 107 114 137 82 95 139 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 39 55 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++37 53 109 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 82 95 139 82 95 139 ++82 95 139 70 84 131 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 32 49 106 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 55 70 121 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 51 66 119 63 77 126 82 95 139 ++82 95 139 82 95 139 68 82 130 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 39 55 110 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 40 56 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++29 45 103 71 85 132 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 137 140 149 43 45 49 43 45 49 ++53 55 60 115 121 140 49 65 117 36 52 108 98 103 119 43 45 49 ++43 45 49 53 55 60 101 108 130 72 85 132 76 89 135 123 126 137 ++43 45 49 43 45 49 89 90 90 110 117 140 110 117 140 75 75 75 ++43 45 49 43 45 49 137 140 149 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 61 75 125 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 54 69 120 ++117 122 139 51 51 51 43 45 49 53 55 60 115 121 140 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++43 59 113 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 82 95 139 100 102 106 43 45 49 ++43 45 49 43 45 49 43 45 49 43 45 49 43 45 49 43 45 49 ++43 45 49 98 103 119 46 61 115 25 42 101 25 42 101 25 42 101 ++25 42 101 30 47 105 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 111 51 66 119 82 95 139 89 90 90 ++43 45 49 43 45 49 128 131 141 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 36 52 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 52 67 119 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 76 90 135 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 115 121 140 14 14 16 0 0 0 ++1 1 1 117 122 139 29 45 103 66 79 125 43 45 49 0 0 0 ++0 0 0 0 0 0 106 112 131 72 85 132 82 95 139 75 75 75 ++0 0 0 0 0 0 89 90 90 82 95 139 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 49 65 117 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 64 78 127 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 59 74 124 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++50 65 118 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 82 95 139 55 60 74 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 75 75 75 46 61 115 25 42 101 25 42 101 25 42 101 ++25 42 101 36 52 108 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 49 65 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 50 65 118 82 95 139 43 45 49 ++0 0 0 0 0 0 104 109 128 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 33 50 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 44 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 29 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 30 46 104 72 85 132 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 76 90 135 76 90 135 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 110 117 140 43 45 49 0 0 0 ++0 0 0 98 104 122 26 43 102 93 100 124 7 8 9 0 0 0 ++0 0 0 0 0 0 89 90 90 82 95 139 110 117 140 30 30 30 ++0 0 0 0 0 0 106 112 131 71 85 132 110 117 140 128 131 141 ++112 118 137 112 118 137 128 131 141 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 71 85 132 68 82 130 ++68 82 130 68 82 130 35 51 108 25 42 101 25 42 101 32 49 106 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 66 80 129 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 66 80 129 69 83 131 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 50 65 118 25 42 101 25 42 101 33 50 106 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++58 73 123 61 75 125 63 77 126 68 82 130 63 77 126 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 82 95 139 55 60 74 0 0 0 ++0 0 0 15 18 27 100 102 106 79 84 103 79 84 103 79 84 103 ++79 84 103 123 126 137 46 61 115 25 42 101 25 42 101 25 42 101 ++25 42 101 42 58 112 59 74 124 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 58 73 123 58 73 123 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 46 61 115 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 51 66 119 50 65 118 82 95 139 43 45 49 ++0 0 0 0 0 0 104 109 128 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 37 53 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 28 45 103 ++25 42 101 25 42 101 25 42 101 26 43 102 49 65 117 47 62 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 54 69 120 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 78 91 137 ++78 91 137 78 91 137 78 91 137 78 91 137 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 ++76 90 135 76 90 135 76 90 135 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 82 95 139 75 75 75 0 0 0 ++0 0 0 72 78 100 42 58 112 98 103 119 0 0 0 0 0 0 ++14 14 16 0 0 0 30 30 30 110 117 140 115 121 140 14 14 16 ++0 0 0 3 4 6 115 121 140 70 84 131 107 114 137 123 126 137 ++104 109 128 104 109 128 137 140 149 69 83 131 110 117 140 106 112 131 ++104 109 128 128 131 141 137 140 149 117 119 127 98 103 119 137 140 149 ++82 95 139 64 78 127 66 79 125 99 106 127 90 96 116 79 85 105 ++93 98 117 98 104 122 81 92 128 32 49 106 47 62 115 66 80 129 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 66 80 128 ++66 80 128 69 83 131 110 117 140 106 112 131 98 103 119 100 102 106 ++98 103 119 112 118 137 107 114 137 65 79 128 64 78 127 64 78 127 ++65 79 128 82 95 139 98 104 122 90 96 116 79 84 103 90 96 116 ++98 103 119 93 100 124 35 51 108 25 42 101 25 42 101 40 56 111 ++110 117 140 106 112 131 98 103 119 100 102 106 98 103 119 106 112 131 ++107 114 137 64 78 127 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 76 90 135 33 50 106 33 50 106 33 50 106 ++33 50 106 33 50 106 38 54 109 115 121 140 93 98 117 93 98 117 ++115 121 140 110 117 140 100 102 106 106 112 131 110 117 140 56 70 122 ++69 83 131 107 114 137 104 109 128 100 102 106 100 102 106 104 109 128 ++109 115 137 76 90 135 54 69 120 54 69 120 40 56 111 25 42 101 ++49 65 117 93 100 124 93 98 117 79 85 105 90 96 116 93 98 117 ++93 100 124 44 60 114 25 42 101 25 42 101 25 42 101 36 52 108 ++93 100 124 93 98 117 100 102 106 106 112 131 137 140 149 43 45 49 ++0 0 0 0 0 0 104 109 128 49 65 117 49 65 117 49 65 117 ++82 95 139 106 112 131 98 103 119 79 85 105 93 98 117 98 104 122 ++71 84 130 27 44 102 25 42 101 25 42 101 101 108 130 93 98 117 ++93 98 117 128 131 141 75 88 134 101 108 130 90 96 116 90 96 116 ++101 108 130 46 61 115 58 73 123 104 109 128 100 102 106 98 103 119 ++107 114 137 61 75 125 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 43 59 113 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 28 45 103 69 83 131 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 104 109 128 0 0 0 ++0 0 0 51 51 51 82 95 139 75 75 75 0 0 0 7 8 9 ++89 90 90 0 0 0 3 4 6 117 122 139 117 122 139 0 0 0 ++0 0 0 30 30 30 110 117 140 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 53 55 60 137 140 149 1 1 1 0 0 0 104 109 128 ++73 86 133 107 114 137 55 60 74 2 3 3 0 0 0 0 0 0 ++0 0 0 0 0 0 30 30 30 104 109 128 69 83 131 66 80 129 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 66 80 128 ++72 85 132 117 122 139 43 45 49 0 0 0 0 0 0 0 0 0 ++0 0 0 1 2 3 53 55 60 115 121 140 65 79 128 63 77 126 ++115 121 140 43 45 49 0 0 0 3 4 6 15 16 21 2 3 3 ++0 0 0 15 18 27 104 109 128 29 45 103 29 45 103 107 114 137 ++30 30 30 0 0 0 7 8 9 15 16 21 1 1 1 0 0 0 ++43 45 49 115 121 140 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 115 121 140 66 80 128 66 80 128 66 80 128 ++71 84 130 39 55 110 46 61 115 55 60 74 0 0 0 0 0 0 ++128 131 141 15 16 21 0 0 0 43 45 49 107 114 137 77 90 136 ++98 103 119 15 16 21 0 0 0 0 0 0 0 0 0 0 0 0 ++7 8 9 89 90 90 82 95 139 54 69 120 35 51 108 66 79 125 ++89 90 90 7 9 13 0 0 0 0 0 0 0 0 0 0 0 0 ++14 14 16 90 96 116 54 69 120 25 42 101 31 48 105 104 109 128 ++15 16 21 0 0 0 0 0 0 1 1 1 75 75 75 51 51 51 ++0 0 0 0 0 0 104 109 128 49 65 117 50 65 118 107 114 137 ++55 60 74 3 4 6 0 0 0 0 0 0 0 0 0 1 1 1 ++51 51 51 101 108 130 28 45 103 25 42 101 98 104 122 0 0 0 ++0 0 0 89 90 90 100 102 106 3 4 6 0 0 0 0 0 0 ++7 8 9 123 126 137 89 90 90 3 4 6 0 0 0 0 0 0 ++14 14 16 106 112 131 47 62 115 45 60 114 44 60 114 44 60 114 ++44 60 114 40 56 111 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 38 54 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 43 59 113 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 46 54 80 0 0 0 75 75 75 ++255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 ++255 255 255 255 255 255 255 255 255 255 255 255 117 119 127 0 0 0 ++32 38 56 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 117 122 139 1 2 3 ++0 0 0 30 30 30 137 140 149 30 30 30 0 0 0 43 45 49 ++137 140 149 0 0 0 0 0 0 104 109 128 106 112 131 0 0 0 ++0 0 0 55 60 74 82 95 139 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 1 2 3 3 4 6 30 30 30 51 51 51 110 117 140 ++107 114 137 55 60 74 0 0 0 0 0 0 75 75 75 99 106 127 ++98 103 119 14 14 16 0 0 0 15 16 21 115 121 140 66 80 129 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 66 80 128 ++110 117 140 15 18 27 0 0 0 7 8 9 100 102 106 115 121 140 ++89 90 90 1 1 1 0 0 0 53 55 60 107 114 137 76 89 135 ++89 90 90 0 0 0 1 2 3 104 109 128 81 92 128 104 109 128 ++51 51 51 55 60 74 117 119 127 78 91 137 61 75 125 51 51 51 ++0 0 0 14 14 16 117 122 139 107 114 137 98 103 119 51 51 51 ++75 75 75 137 140 149 82 95 139 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 7 8 9 30 30 30 30 30 30 30 30 30 30 30 30 ++75 75 75 59 74 124 46 61 115 55 60 74 0 0 0 0 0 0 ++3 4 6 14 14 16 30 30 30 104 109 128 63 77 126 106 112 131 ++3 4 6 0 0 0 30 30 30 106 112 131 112 118 137 53 55 60 ++0 0 0 0 0 0 100 102 106 66 80 129 42 58 112 90 96 116 ++1 1 1 0 0 0 43 45 49 99 106 127 99 106 127 30 30 30 ++0 0 0 3 4 6 98 104 122 29 45 103 79 90 127 30 30 30 ++0 0 0 0 0 0 15 16 21 51 51 51 14 14 16 3 4 6 ++0 0 0 0 0 0 104 109 128 49 65 117 82 95 139 53 55 60 ++0 0 0 0 0 0 43 45 49 79 84 103 43 45 49 0 0 0 ++0 0 0 43 45 49 79 90 127 25 42 101 98 104 122 0 0 0 ++0 0 0 30 30 30 14 14 16 30 30 30 3 4 6 0 0 0 ++0 0 0 14 14 16 7 8 9 30 30 30 3 4 6 0 0 0 ++0 0 0 53 55 60 72 85 132 45 60 114 44 60 114 44 60 114 ++44 60 114 38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 37 53 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 61 75 125 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 46 54 80 0 0 0 55 60 74 ++220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 220 ++220 220 220 220 220 220 220 220 220 220 220 220 100 102 106 0 0 0 ++32 38 56 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 110 117 140 30 30 30 ++0 0 0 2 3 3 128 131 141 2 3 3 0 0 0 79 84 103 ++128 131 141 14 14 16 0 0 0 89 90 90 117 119 127 0 0 0 ++0 0 0 100 102 106 74 87 134 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 0 0 0 75 75 75 110 117 140 115 121 140 78 91 137 ++112 118 137 1 2 3 0 0 0 30 30 30 82 95 139 33 50 106 ++54 69 120 89 90 90 0 0 0 0 0 0 100 102 106 73 86 133 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 71 85 132 ++100 102 106 0 0 0 0 0 0 75 75 75 82 95 139 71 85 132 ++110 117 140 43 45 49 0 0 0 2 3 3 112 118 137 82 95 139 ++75 75 75 0 0 0 1 1 1 79 84 103 99 106 127 115 121 140 ++115 121 140 74 87 134 42 58 112 30 47 105 66 80 128 43 45 49 ++0 0 0 7 8 9 98 103 119 112 118 137 137 140 149 137 140 149 ++107 114 137 73 86 133 64 78 127 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++43 45 49 59 74 124 46 61 115 55 60 74 0 0 0 0 0 0 ++14 14 16 115 121 140 101 108 130 107 114 137 82 95 139 51 51 51 ++0 0 0 0 0 0 106 112 131 66 80 129 63 77 126 117 122 139 ++3 4 6 0 0 0 30 30 30 101 108 130 81 92 128 30 30 30 ++0 0 0 3 4 6 107 114 137 34 50 107 36 52 108 104 109 128 ++0 0 0 0 0 0 53 55 60 59 74 124 93 100 124 0 0 0 ++0 0 0 7 8 9 115 121 140 82 95 139 112 118 137 3 4 6 ++0 0 0 0 0 0 104 109 128 49 65 117 104 109 128 1 1 1 ++0 0 0 30 30 30 107 114 137 36 52 108 84 94 130 30 30 30 ++0 0 0 0 0 0 98 103 119 25 42 101 98 104 122 0 0 0 ++0 0 0 3 4 6 104 109 128 79 90 127 79 84 103 0 0 0 ++0 0 0 3 4 6 98 104 122 81 94 136 89 90 90 0 0 0 ++0 0 0 30 30 30 82 95 139 45 60 114 44 60 114 44 60 114 ++44 60 114 36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 72 85 132 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 44 52 77 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++32 38 56 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 82 95 139 53 55 60 ++0 0 0 0 0 0 14 14 16 0 0 0 0 0 0 112 118 137 ++107 114 137 53 55 60 0 0 0 3 4 6 7 8 9 0 0 0 ++0 0 0 112 118 137 70 84 131 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 0 0 0 112 118 137 68 82 130 68 82 130 68 82 130 ++98 103 119 0 0 0 0 0 0 30 30 30 90 96 116 79 84 103 ++79 84 103 53 55 60 0 0 0 0 0 0 75 75 75 82 95 139 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 82 95 139 ++55 60 74 0 0 0 0 0 0 75 75 75 89 90 90 89 90 90 ++100 102 106 30 30 30 0 0 0 0 0 0 98 104 122 64 78 127 ++106 112 131 14 14 16 0 0 0 0 0 0 0 0 0 14 14 16 ++30 30 30 75 75 75 99 106 127 30 46 104 40 56 111 104 109 128 ++3 4 6 0 0 0 0 0 0 1 1 1 14 14 16 43 45 49 ++100 102 106 107 114 137 61 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 117 122 139 93 100 124 93 100 124 93 100 124 ++112 118 137 52 67 119 46 61 115 55 60 74 0 0 0 0 0 0 ++55 60 74 82 95 139 56 70 122 56 70 122 107 114 137 30 30 30 ++0 0 0 0 0 0 100 102 106 89 90 90 89 90 90 89 90 90 ++3 4 6 0 0 0 2 3 3 107 114 137 99 106 127 1 2 3 ++0 0 0 14 14 16 100 102 106 79 84 103 79 84 103 75 75 75 ++0 0 0 0 0 0 30 30 30 79 90 127 93 98 117 0 0 0 ++0 0 0 43 45 49 82 95 139 50 65 118 82 95 139 30 30 30 ++0 0 0 0 0 0 104 109 128 52 67 119 90 96 116 0 0 0 ++0 0 0 75 75 75 59 74 124 25 42 101 42 58 112 75 75 75 ++0 0 0 0 0 0 79 84 103 36 52 108 98 104 122 0 0 0 ++0 0 0 30 30 30 79 90 127 25 42 101 93 100 124 0 0 0 ++0 0 0 30 30 30 79 90 127 39 55 110 106 112 131 0 0 0 ++0 0 0 30 30 30 82 95 139 45 60 114 44 60 114 44 60 114 ++44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 33 50 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 48 64 117 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 77 90 136 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 48 55 81 4 5 9 4 5 9 ++4 5 9 4 5 9 4 5 9 4 5 9 4 5 9 4 5 9 ++4 5 9 4 5 9 4 5 9 4 5 9 4 5 9 4 5 9 ++32 38 61 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 66 80 129 36 52 108 79 84 103 ++0 0 0 0 0 0 0 0 0 0 0 0 15 16 21 115 121 140 ++76 90 135 98 103 119 0 0 0 0 0 0 0 0 0 0 0 0 ++14 14 16 115 121 140 70 84 131 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 3 4 6 115 121 140 68 82 130 68 82 130 66 80 129 ++93 98 117 0 0 0 0 0 0 15 18 27 53 55 60 53 55 60 ++53 55 60 53 55 60 53 55 60 53 55 60 100 102 106 82 95 139 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 82 95 139 ++75 75 75 0 0 0 0 0 0 43 45 49 53 55 60 53 55 60 ++53 55 60 53 55 60 53 55 60 53 55 60 128 131 141 66 80 129 ++43 59 113 101 108 130 79 84 103 53 55 60 15 18 27 1 1 1 ++0 0 0 0 0 0 43 45 49 84 94 130 39 55 111 82 95 139 ++112 118 137 89 90 90 51 51 51 15 16 21 0 0 0 0 0 0 ++0 0 0 55 60 74 82 95 139 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 46 61 115 55 60 74 0 0 0 0 0 0 ++89 90 90 66 80 129 56 70 122 56 70 122 107 114 137 30 30 30 ++0 0 0 0 0 0 53 55 60 53 55 60 53 55 60 53 55 60 ++53 55 60 53 55 60 53 55 60 117 122 139 99 106 127 2 3 3 ++0 0 0 7 8 9 53 55 60 53 55 60 53 55 60 53 55 60 ++53 55 60 53 55 60 75 75 75 99 106 127 98 103 119 0 0 0 ++0 0 0 43 45 49 82 95 139 50 65 118 82 95 139 30 30 30 ++0 0 0 0 0 0 104 109 128 54 69 120 90 96 116 0 0 0 ++0 0 0 75 75 75 52 67 119 25 42 101 40 56 111 75 75 75 ++0 0 0 0 0 0 79 84 103 37 53 109 98 104 122 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 93 98 117 0 0 0 ++0 0 0 30 30 30 71 84 130 42 58 112 106 112 131 0 0 0 ++0 0 0 30 30 30 82 95 139 45 60 114 44 60 114 44 60 114 ++44 60 114 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 40 56 111 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++60 75 125 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 72 85 132 36 52 108 25 42 101 98 104 122 ++0 0 0 0 0 0 0 0 0 0 0 0 53 55 60 107 114 137 ++71 85 132 117 122 139 2 3 3 0 0 0 0 0 0 0 0 0 ++43 45 49 110 117 140 70 84 131 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 14 14 16 110 117 140 68 82 130 68 82 130 52 67 119 ++99 106 127 1 1 1 0 0 0 43 45 49 110 117 140 56 70 122 ++58 73 123 107 114 137 110 117 140 110 117 140 110 117 140 66 80 128 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 73 86 133 ++100 102 106 0 0 0 0 0 0 100 102 106 110 117 140 82 95 139 ++110 117 140 137 140 149 115 121 140 110 117 140 82 95 139 64 78 127 ++60 75 125 71 84 130 84 94 130 107 114 137 81 92 128 101 108 130 ++43 45 49 0 0 0 0 0 0 98 104 122 63 77 126 82 95 139 ++107 114 137 115 121 140 115 121 140 110 117 140 112 118 137 15 16 21 ++0 0 0 14 14 16 107 114 137 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 46 61 115 55 60 74 0 0 0 0 0 0 ++100 102 106 59 74 124 56 70 122 56 70 122 82 95 139 51 51 51 ++0 0 0 0 0 0 128 131 141 82 95 139 82 95 139 110 117 140 ++115 121 140 110 117 140 82 95 139 55 70 121 84 94 130 15 18 27 ++0 0 0 7 8 9 128 131 141 56 70 122 56 70 122 82 95 139 ++82 95 139 81 94 136 68 82 130 35 51 108 99 106 127 1 2 3 ++0 0 0 14 14 16 110 117 140 63 77 126 110 117 140 7 9 13 ++0 0 0 0 0 0 104 109 128 49 65 117 104 109 128 0 0 0 ++0 0 0 43 45 49 84 94 130 25 42 101 73 86 133 43 45 49 ++0 0 0 0 0 0 93 98 117 26 43 102 98 104 122 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 93 98 117 0 0 0 ++0 0 0 30 30 30 71 84 130 45 60 114 106 112 131 0 0 0 ++0 0 0 30 30 30 82 95 139 45 60 114 44 60 114 44 60 114 ++44 60 114 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 28 45 103 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 46 104 68 82 130 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 48 64 117 25 42 101 25 42 101 93 100 124 ++14 14 16 0 0 0 0 0 0 0 0 0 98 103 119 75 88 134 ++71 85 132 110 117 140 30 30 30 0 0 0 0 0 0 0 0 0 ++89 90 90 82 95 139 70 84 131 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 14 14 16 110 117 140 68 82 130 68 82 130 33 50 106 ++74 85 123 43 45 49 0 0 0 1 2 3 90 96 116 93 100 124 ++104 109 128 55 60 74 53 55 60 75 75 75 155 156 157 75 88 134 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 65 79 128 ++115 121 140 14 14 16 0 0 0 14 14 16 112 118 137 110 117 140 ++104 109 128 53 55 60 55 60 74 100 102 106 155 156 157 107 114 137 ++75 75 75 30 30 30 30 30 30 98 103 119 79 90 127 84 94 130 ++53 55 60 0 0 0 7 9 13 93 100 124 128 131 141 53 55 60 ++30 30 30 30 30 30 112 118 137 107 114 137 115 121 140 30 30 30 ++0 0 0 30 30 30 107 114 137 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 46 61 115 55 60 74 0 0 0 0 0 0 ++100 102 106 56 70 122 56 70 122 56 70 122 61 75 125 104 109 128 ++1 2 3 0 0 0 43 45 49 115 121 140 107 114 137 100 102 106 ++51 51 51 55 60 74 128 131 141 82 95 139 45 60 114 79 84 103 ++0 0 0 0 0 0 55 60 74 101 108 130 99 106 127 89 90 90 ++51 51 51 61 66 84 137 140 149 60 75 125 66 80 128 43 45 49 ++0 0 0 0 0 0 43 45 49 89 90 90 30 30 30 30 30 30 ++0 0 0 0 0 0 104 109 128 49 65 117 101 108 130 43 45 49 ++0 0 0 1 1 1 55 60 74 93 98 117 75 75 75 1 1 1 ++0 0 0 30 30 30 81 92 128 25 42 101 98 104 122 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 93 98 117 0 0 0 ++0 0 0 30 30 30 72 85 132 46 61 115 106 112 131 0 0 0 ++0 0 0 30 30 30 82 95 139 45 60 114 44 60 114 44 60 114 ++44 60 114 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++56 70 122 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 38 54 109 72 85 132 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 59 74 124 25 42 101 25 42 101 25 42 101 68 82 130 ++43 45 49 0 0 0 0 0 0 3 4 6 117 122 139 71 85 132 ++71 85 132 82 95 139 75 75 75 0 0 0 0 0 0 0 0 0 ++106 112 131 71 85 132 70 84 131 70 84 131 110 117 140 30 30 30 ++0 0 0 0 0 0 117 122 139 69 83 131 115 121 140 7 8 9 ++0 0 0 14 14 16 110 117 140 68 82 130 56 70 122 25 42 101 ++28 45 103 101 108 130 30 30 30 0 0 0 0 0 0 7 9 13 ++1 2 3 0 0 0 3 4 6 100 102 106 82 95 139 66 80 128 ++109 115 137 7 8 9 0 0 0 14 14 16 110 117 140 65 79 128 ++78 91 137 106 112 131 14 14 16 0 0 0 1 1 1 7 9 13 ++0 0 0 0 0 0 15 16 21 112 118 137 74 87 134 42 58 112 ++98 104 122 14 14 16 0 0 0 2 3 3 30 30 30 15 18 27 ++0 0 0 7 8 9 90 96 116 55 70 121 81 94 136 100 102 106 ++3 4 6 0 0 0 7 8 9 30 30 30 14 14 16 0 0 0 ++14 14 16 106 112 131 68 82 130 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 82 95 139 55 60 74 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 46 61 115 55 60 74 0 0 0 0 0 0 ++100 102 106 56 70 122 56 70 122 56 70 122 56 70 122 82 95 139 ++89 90 90 3 4 6 0 0 0 3 4 6 7 8 9 0 0 0 ++0 0 0 43 45 49 110 117 140 29 45 103 25 42 101 84 94 130 ++55 60 74 1 1 1 0 0 0 7 8 9 3 4 6 0 0 0 ++1 1 1 55 60 74 84 94 130 25 42 101 29 45 103 104 109 128 ++14 14 16 0 0 0 0 0 0 0 0 0 75 75 75 100 102 106 ++0 0 0 0 0 0 104 109 128 49 65 117 52 67 119 110 117 140 ++43 45 49 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++30 30 30 101 108 130 30 46 104 25 42 101 98 104 122 0 0 0 ++0 0 0 30 30 30 71 84 130 25 42 101 93 98 117 0 0 0 ++0 0 0 30 30 30 75 88 134 46 61 115 106 112 131 0 0 0 ++0 0 0 30 30 30 82 95 139 44 60 114 44 60 114 44 60 114 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++72 85 132 44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 49 65 117 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++66 80 129 29 45 103 25 42 101 25 42 101 25 42 101 45 60 114 ++123 126 137 90 96 116 98 103 119 117 119 127 110 117 140 71 85 132 ++71 85 132 72 85 132 137 140 149 98 103 119 98 103 119 98 103 119 ++137 140 149 70 84 131 70 84 131 70 84 131 115 121 140 117 119 127 ++98 103 119 98 103 119 137 140 149 69 83 131 137 140 149 98 103 119 ++98 103 119 104 109 128 128 131 141 68 82 130 37 53 109 25 42 101 ++25 42 101 30 47 105 84 94 130 93 98 117 72 78 100 61 66 84 ++75 75 75 100 102 106 115 121 140 82 95 139 66 80 128 66 80 128 ++128 131 141 98 103 119 98 103 119 104 109 128 128 131 141 65 79 128 ++65 79 128 78 91 137 115 121 140 98 103 119 89 90 90 75 75 75 ++89 90 90 98 103 119 115 121 140 72 85 132 56 70 122 25 42 101 ++42 58 112 99 106 127 90 96 116 72 78 100 61 66 84 75 75 75 ++90 96 116 99 106 127 49 65 117 44 60 114 61 75 125 82 95 139 ++115 121 140 100 102 106 89 90 90 75 75 75 75 75 75 98 103 119 ++110 117 140 73 86 133 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 82 95 139 128 131 141 90 96 116 ++90 96 116 117 119 127 73 86 133 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 46 61 115 128 131 141 90 96 116 93 98 117 ++148 148 149 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++81 94 136 109 115 137 100 102 106 75 75 75 75 75 75 89 90 90 ++106 112 131 101 108 130 50 65 118 25 42 101 25 42 101 26 43 102 ++66 79 125 98 104 122 79 84 103 75 75 75 75 75 75 79 84 103 ++99 106 127 66 79 125 25 42 101 25 42 101 25 42 101 43 59 113 ++106 112 131 89 90 90 75 75 75 98 103 119 110 117 140 137 140 149 ++100 102 106 100 102 106 137 140 149 49 65 117 49 65 117 52 67 119 ++101 108 130 98 104 122 72 78 100 61 66 84 75 75 75 98 103 119 ++84 94 130 30 46 104 25 42 101 25 42 101 128 131 141 90 96 116 ++90 96 116 117 119 127 73 86 133 25 42 101 115 121 140 90 96 116 ++90 96 116 117 119 127 81 94 136 46 61 115 137 140 149 93 98 117 ++93 98 117 117 119 127 101 108 130 44 60 114 44 60 114 44 60 114 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 34 50 107 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 38 54 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++72 85 132 70 84 131 34 50 107 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 54 69 120 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 76 90 135 ++76 90 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 69 83 131 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 58 73 123 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 60 75 125 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 39 55 110 48 64 117 ++50 65 118 69 83 131 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 68 82 130 78 91 137 82 95 139 ++75 88 134 66 80 129 64 78 127 63 77 126 43 59 113 25 42 101 ++25 42 101 25 42 101 29 45 103 39 55 110 48 64 117 44 60 114 ++31 48 105 25 42 101 25 42 101 56 70 122 61 75 125 61 75 125 ++61 75 125 65 79 128 74 87 134 81 94 136 75 88 134 64 78 127 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 50 65 118 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 63 77 126 71 85 132 71 85 132 63 77 126 ++55 70 121 54 69 120 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 37 53 109 46 61 115 44 60 114 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++42 58 112 61 75 125 68 82 130 55 70 121 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 36 52 108 39 55 111 48 64 117 39 55 111 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 110 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 36 52 108 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 36 52 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 72 85 132 65 79 128 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 58 73 123 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 90 135 76 90 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 71 85 132 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++46 61 115 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 38 54 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++54 69 120 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 55 70 121 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 35 51 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++48 64 117 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 110 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 34 50 107 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 72 85 132 72 85 132 56 70 122 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 61 75 125 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 72 85 132 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++71 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 59 74 124 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 55 70 121 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 44 60 114 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 45 60 114 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 29 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 40 56 111 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 72 85 132 72 85 132 47 62 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++64 78 127 73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 72 85 132 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 66 80 129 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 37 53 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 49 65 117 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 40 56 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 56 70 122 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 36 52 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 50 65 118 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 29 45 103 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 43 59 113 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 30 46 104 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 42 58 112 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 61 75 125 73 86 133 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 71 85 132 39 55 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 28 45 103 64 78 127 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 56 70 122 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 66 80 128 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 61 75 125 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 52 67 119 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 40 56 111 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++40 56 111 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 40 56 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 71 85 132 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 58 73 123 73 86 133 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++69 83 131 36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 27 44 102 63 77 126 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++66 80 129 32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 49 65 117 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 48 64 117 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 45 60 114 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 49 65 117 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 47 62 115 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 36 52 108 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 37 53 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 33 50 106 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 110 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++70 84 131 35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 54 69 120 73 86 133 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 76 89 135 ++76 89 135 76 89 135 76 89 135 76 89 135 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 73 86 133 66 80 129 ++33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 58 73 123 72 85 132 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++50 65 118 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 66 80 128 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 58 73 123 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 39 55 110 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 110 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 40 56 111 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 37 53 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 68 82 130 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 48 64 117 72 85 132 ++73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++73 86 133 73 86 133 73 86 133 73 86 133 63 77 126 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 54 69 120 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 65 79 128 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 50 65 118 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 56 70 122 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++36 52 108 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 48 64 117 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++50 65 118 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 44 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 110 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++72 85 132 72 85 132 68 82 130 36 52 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 ++66 80 129 73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 54 69 120 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++56 70 122 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 42 58 112 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 66 80 128 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++50 65 118 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 49 65 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 55 70 121 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 42 58 112 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++29 45 103 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 31 48 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 72 85 132 72 85 132 70 84 131 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++29 45 103 59 74 124 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++73 86 133 70 84 131 40 56 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 60 75 125 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 56 70 122 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 56 70 122 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++59 74 124 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 35 51 108 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 37 53 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++33 50 106 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 42 58 112 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 29 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 72 85 132 72 85 132 71 85 132 43 59 113 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 48 64 117 71 85 132 73 86 133 73 86 133 ++73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++63 77 126 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 63 77 126 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 66 80 129 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 38 54 109 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 45 60 114 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++38 54 109 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 38 54 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 ++48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 31 48 105 59 74 124 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 75 88 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 69 83 131 44 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 66 80 128 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 43 59 113 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 61 75 125 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 61 75 125 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 56 70 122 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 54 69 120 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 46 61 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 33 50 106 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++43 59 113 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 33 50 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 58 73 123 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 40 56 111 ++66 80 129 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 54 69 120 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 40 56 111 69 83 131 72 85 132 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 56 70 122 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++47 62 115 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 47 62 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 38 54 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 42 58 112 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 44 60 114 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 39 55 110 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 35 51 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++72 85 132 72 85 132 66 80 128 35 51 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++27 44 102 50 65 118 70 84 131 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 61 75 125 36 52 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++54 69 120 72 85 132 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 64 78 127 29 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 ++66 80 128 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 61 75 125 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 54 69 120 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 56 70 122 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 46 61 115 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 48 64 117 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 38 54 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 43 59 113 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 40 56 111 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 32 49 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 72 85 132 72 85 132 71 85 132 46 61 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 48 64 117 69 83 131 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 59 74 124 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 63 77 126 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++66 80 129 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 58 73 123 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 46 61 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 34 50 107 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 44 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++27 44 102 55 70 121 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 48 64 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 46 104 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 39 55 110 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 46 104 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 30 46 104 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 58 73 123 ++30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 48 64 117 ++68 82 130 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 58 73 123 35 51 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 44 60 114 69 83 131 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 61 75 125 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 50 65 118 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++35 51 108 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 39 55 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 37 53 109 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 47 62 115 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++33 50 106 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 ++70 84 131 48 64 117 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 39 55 111 58 73 123 72 85 132 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 74 87 134 ++74 87 134 74 87 134 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++66 80 128 48 64 117 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 63 77 126 72 85 132 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 55 70 121 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 66 80 128 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 45 60 114 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 51 66 119 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++46 61 115 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 30 46 104 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 44 60 114 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 30 47 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++36 52 108 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 72 85 132 65 79 128 38 54 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 29 45 103 44 60 114 63 77 126 ++72 85 132 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 68 82 130 54 69 120 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++52 67 119 72 85 132 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 63 77 126 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 59 74 124 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 60 75 125 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 48 64 117 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 38 54 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++55 70 121 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 48 64 117 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 44 60 114 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 111 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 72 85 132 72 85 132 72 85 132 56 70 122 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 39 55 111 52 67 119 65 79 128 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 69 83 131 ++58 73 123 46 61 115 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 44 60 114 68 82 130 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 65 79 128 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 48 64 117 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 56 70 122 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 39 55 110 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 33 50 106 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 40 56 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 71 85 132 ++54 69 120 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 39 55 111 ++47 62 115 54 69 120 63 77 126 69 83 131 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 ++73 86 133 73 86 133 73 86 133 73 86 133 73 86 133 72 85 132 ++65 79 128 58 73 123 50 65 118 43 59 113 34 50 107 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 42 58 112 66 80 128 72 85 132 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 66 80 129 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 38 54 109 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 56 70 122 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 49 65 117 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 43 59 113 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 51 66 119 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 29 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 42 58 112 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 44 60 114 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 36 52 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 71 85 132 55 70 121 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 33 50 106 ++37 53 109 40 56 111 43 59 113 44 60 114 44 60 114 44 60 114 ++44 60 114 42 58 112 39 55 110 35 51 108 31 48 105 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++45 60 114 66 80 128 72 85 132 72 85 132 72 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 66 80 129 39 55 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 64 78 127 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++63 77 126 36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 29 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 48 64 117 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 72 85 132 72 85 132 72 85 132 60 75 125 42 58 112 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 33 50 106 51 66 119 69 83 131 ++72 85 132 72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++59 74 124 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++51 66 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++50 65 118 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 46 61 115 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++34 50 107 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 33 50 106 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 43 59 113 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++36 52 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 72 85 132 ++68 82 130 54 69 120 37 53 109 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 47 105 46 61 115 61 75 125 72 85 132 72 85 132 72 85 132 ++72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 52 67 119 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 ++30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 28 45 103 55 70 121 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++43 59 113 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 47 62 115 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 111 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 66 80 129 54 69 120 40 56 111 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 34 50 107 48 64 117 61 75 125 ++72 85 132 72 85 132 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 47 62 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 43 59 113 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 54 69 120 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 49 65 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 110 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 45 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++71 85 132 61 75 125 51 66 119 39 55 111 30 47 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 35 51 108 ++46 61 115 56 70 122 66 80 129 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 46 61 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 111 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 56 70 122 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 52 67 119 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 47 105 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 68 82 130 ++60 75 125 54 69 120 47 62 115 40 56 111 35 51 108 31 48 105 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 30 46 104 33 50 106 38 54 109 ++44 60 114 49 65 117 56 70 122 65 79 128 71 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 43 59 113 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 66 80 128 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 32 49 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 58 73 123 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++51 66 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++50 65 118 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++47 62 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 36 52 108 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 36 52 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 71 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 66 80 129 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 64 78 127 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 46 61 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 44 60 114 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 49 65 117 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++39 55 111 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 32 49 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 72 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++66 80 128 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 63 77 126 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 56 70 122 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 46 104 60 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 50 65 118 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 33 50 106 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 31 48 105 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 64 78 127 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++63 77 126 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 32 49 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 51 66 119 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 33 50 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 47 62 115 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 45 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 46 61 115 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 47 62 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 44 60 114 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 36 52 108 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 58 73 123 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 61 75 125 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++63 77 126 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 39 55 110 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 49 65 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 47 105 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 33 50 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 39 55 110 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 42 58 112 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 111 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 36 52 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++64 78 127 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 50 65 118 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 31 48 105 61 75 125 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++52 67 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 58 73 123 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 32 49 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++44 60 114 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 49 65 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 40 56 111 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 30 47 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++30 46 104 58 73 123 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 66 80 129 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 63 77 126 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 59 74 124 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++48 64 117 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 48 64 117 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 ++55 70 121 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 37 53 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 49 65 117 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 46 61 115 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++34 50 107 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 44 60 114 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 33 50 106 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 26 43 102 47 62 115 66 80 129 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 71 85 132 ++71 85 132 71 85 132 71 85 132 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++60 75 125 32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 34 50 107 64 78 127 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 34 50 107 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 ++61 75 125 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 30 46 104 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 51 66 119 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 35 51 108 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 37 53 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++42 58 112 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 40 56 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 38 54 109 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 38 54 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 35 51 108 63 77 126 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 48 64 117 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 110 65 79 128 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 42 58 112 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 58 73 123 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 43 59 113 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 39 55 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 45 60 114 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 33 50 106 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 40 56 111 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 34 50 107 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 50 65 118 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 63 77 126 36 52 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 ++66 80 128 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 50 65 118 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 51 66 119 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 56 70 122 27 44 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 46 61 115 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 52 67 119 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 44 60 114 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 30 46 104 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++35 51 108 63 77 126 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 66 80 129 48 64 117 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 49 65 117 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 56 70 122 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 40 56 111 61 75 125 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 40 56 111 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 32 49 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 42 58 112 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 39 55 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 36 52 108 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 47 62 115 66 80 129 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++58 73 123 33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 56 70 122 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 58 73 123 30 46 104 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 60 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++51 66 119 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 47 62 115 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 30 46 104 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++27 44 102 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 47 62 115 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 33 50 106 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 39 55 111 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 36 52 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 54 69 120 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 ++70 84 131 70 84 131 70 84 131 70 84 131 70 84 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 63 77 126 40 56 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 63 77 126 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++61 75 125 32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 55 70 121 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 43 59 113 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++38 54 109 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 44 60 114 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 46 104 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++58 73 123 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 70 84 131 70 84 131 70 84 131 ++70 84 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 66 80 128 46 61 115 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++44 60 114 66 80 128 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 48 64 117 61 75 125 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 44 60 114 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 50 65 118 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++48 64 117 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 29 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 43 59 113 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 39 55 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++35 51 108 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 27 44 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 37 53 109 59 74 124 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++66 80 129 47 62 115 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 56 70 122 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 40 56 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++40 56 111 61 75 125 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 54 69 120 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 37 53 109 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 111 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 38 54 109 58 73 123 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 66 80 128 48 64 117 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 38 54 109 63 77 126 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 44 60 114 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 ++60 75 125 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 34 50 107 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++27 44 102 54 69 120 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 47 62 115 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 33 50 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 39 55 110 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 44 60 114 27 44 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 32 49 106 ++63 77 126 38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 27 41 89 18 31 74 15 25 57 13 22 52 18 27 58 ++30 37 63 38 45 69 32 38 61 32 38 61 32 38 61 32 38 61 ++32 38 61 32 38 61 32 38 61 66 79 125 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 63 77 126 44 60 114 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 29 45 103 52 67 119 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 63 77 126 46 61 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 58 73 123 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 47 62 115 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++42 58 112 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 42 58 112 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 32 49 106 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 27 44 102 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 35 51 108 ++66 80 129 66 80 129 52 67 119 29 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 23 37 83 15 25 57 9 15 36 ++4 6 13 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 44 53 81 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 66 80 129 ++55 70 121 38 54 109 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++40 56 111 64 78 127 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 47 62 115 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 54 69 120 61 75 125 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 56 70 122 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 ++55 70 121 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 44 60 114 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 34 50 107 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++38 54 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++29 45 103 35 51 108 ++66 80 129 66 80 129 66 80 129 64 78 127 42 58 112 25 42 101 ++25 42 101 25 42 101 9 15 36 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 44 53 81 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 69 83 131 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 61 75 125 46 61 115 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 23 37 83 13 22 52 18 27 58 27 35 61 ++32 38 61 32 38 61 32 38 61 32 38 61 29 34 52 25 31 50 ++25 31 50 25 31 50 25 31 50 23 28 45 40 49 78 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++63 77 126 48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 50 65 118 61 75 125 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 35 51 108 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 47 62 115 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 42 58 112 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 47 62 115 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++32 49 106 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 35 51 108 ++66 80 128 66 80 129 66 80 129 66 80 129 66 80 129 58 73 123 ++36 52 108 25 42 101 9 13 26 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 44 53 81 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++63 77 126 48 64 117 32 49 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 19 29 65 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 38 61 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 ++48 64 117 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 44 60 114 61 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 45 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 52 67 119 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 43 59 113 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 37 53 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 30 46 104 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++34 50 107 35 51 108 ++66 80 128 66 80 128 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 54 69 120 9 13 26 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 21 31 69 39 55 110 50 65 118 ++63 77 126 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 66 80 129 56 70 122 44 60 114 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 42 58 112 41 51 85 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++38 45 69 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 46 61 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 39 55 111 61 75 125 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++54 69 120 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 54 69 120 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 38 54 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 47 105 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 38 54 109 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 44 60 114 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 26 43 102 39 55 111 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 38 54 109 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++35 51 108 35 51 108 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 129 66 80 129 ++66 80 129 66 80 129 15 18 27 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 31 48 105 42 58 112 52 67 119 61 75 125 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 66 80 129 56 70 122 ++47 62 115 36 52 108 27 44 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 40 56 111 ++61 75 125 66 80 129 44 53 81 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++23 26 38 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 44 60 114 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++36 52 108 61 75 125 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 44 60 114 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 49 65 117 26 43 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 44 60 114 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 39 55 111 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 39 55 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 32 49 106 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++35 51 108 35 51 108 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 129 66 80 129 12 15 26 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++36 52 108 44 60 114 51 66 119 59 74 124 65 79 128 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 68 82 130 ++68 82 130 68 82 130 68 82 130 68 82 130 66 80 129 63 77 126 ++55 70 121 48 64 117 39 55 111 32 49 106 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 40 56 111 60 75 125 66 80 129 ++66 80 129 66 80 129 44 53 81 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++15 18 27 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 63 77 126 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++59 74 124 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 40 56 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 33 50 106 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++33 50 106 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 31 48 105 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 36 52 108 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 27 44 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 ++35 51 108 35 51 108 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 9 12 21 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 ++33 50 106 39 55 110 43 59 113 47 62 115 49 65 117 54 69 120 ++56 70 122 56 70 122 58 73 123 59 74 124 59 74 124 59 74 124 ++59 74 124 56 70 122 56 70 122 55 70 121 51 66 119 48 64 117 ++44 60 114 42 58 112 36 52 108 30 47 105 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++27 44 102 43 59 113 61 75 125 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 44 53 81 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++9 12 21 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 63 77 126 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 59 74 124 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 49 65 117 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 51 66 119 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 45 60 114 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 42 58 112 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++42 58 112 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 43 59 113 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 27 44 102 40 56 111 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 37 53 109 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 28 45 103 35 51 108 ++35 51 108 35 51 108 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 7 9 15 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 48 64 117 ++64 78 127 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 38 47 77 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++7 9 15 65 79 128 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 63 77 126 ++60 75 125 34 50 107 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 32 49 106 59 74 124 61 75 125 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 54 69 120 28 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 42 58 112 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++32 49 106 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 30 47 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 44 60 114 44 60 114 36 52 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 32 49 106 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 35 51 108 ++35 51 108 35 51 108 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 7 9 13 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 39 55 111 56 70 122 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 ++66 80 128 66 80 128 40 48 74 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++7 9 13 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 64 78 127 63 77 126 63 77 126 58 73 123 ++30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 47 105 58 73 123 61 75 125 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 31 48 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++32 49 106 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++46 61 115 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 40 56 111 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 44 60 114 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 39 55 110 40 56 111 40 56 111 39 55 111 ++39 55 111 39 55 111 39 55 111 39 55 111 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 34 50 107 35 51 108 ++35 51 108 35 51 108 ++65 79 128 65 79 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 4 5 9 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++49 65 117 63 77 126 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 40 48 74 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++3 4 6 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 63 77 126 63 77 126 54 69 120 28 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 58 73 123 61 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 38 54 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++52 67 119 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 51 66 119 ++27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 33 50 106 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 30 47 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 30 46 104 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 39 55 111 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 29 45 103 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 35 51 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 35 51 108 35 51 108 ++35 51 108 35 51 108 ++65 79 128 65 79 128 65 79 128 65 79 128 66 80 128 66 80 128 ++66 80 128 66 80 128 2 3 5 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 34 50 107 48 64 117 63 77 126 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 40 48 74 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++1 2 3 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 63 77 126 63 77 126 45 60 114 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++32 49 106 58 73 123 61 75 125 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 45 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 45 60 114 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 47 62 115 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 46 61 115 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 44 60 114 31 48 105 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 111 30 46 104 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 47 105 35 51 108 35 51 108 ++35 51 108 35 51 108 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++66 80 128 66 80 128 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 28 40 79 34 50 107 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 40 56 111 ++52 67 119 64 78 127 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 40 48 74 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++63 77 126 61 75 125 37 53 109 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 9 15 36 ++2 3 7 10 17 39 25 42 101 25 42 101 25 42 101 34 50 107 ++59 74 124 61 75 125 61 75 125 61 75 125 61 75 125 61 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++51 66 119 26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 45 60 114 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 37 53 109 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 30 46 104 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 28 45 103 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 42 58 112 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 40 56 111 40 56 111 40 56 111 39 55 111 39 55 111 ++39 55 111 39 55 111 39 55 110 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 34 50 107 35 51 108 35 51 108 ++35 51 108 34 50 107 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 62 75 121 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 50 58 85 66 80 129 64 78 127 ++55 70 121 45 60 114 36 52 108 27 44 102 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 40 56 111 50 65 118 60 75 125 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 38 47 77 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 62 75 121 64 78 127 64 78 127 63 77 126 63 77 126 ++56 70 122 30 47 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 4 6 13 ++0 0 0 0 0 0 25 42 101 25 42 101 35 51 108 59 74 124 ++61 75 125 61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 54 69 120 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 54 69 120 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 52 67 119 29 45 103 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 27 44 102 49 65 117 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 46 61 115 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 ++44 60 114 44 60 114 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++31 48 105 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 33 50 106 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 28 45 103 35 51 108 35 51 108 35 51 108 ++35 51 108 34 50 107 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 62 75 121 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 128 59 74 124 52 67 119 ++45 60 114 37 53 109 30 46 104 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++28 45 103 34 50 107 42 58 112 48 64 117 56 70 122 64 78 127 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++65 79 128 65 79 128 38 45 69 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 62 75 121 64 78 127 63 77 126 63 77 126 47 62 115 ++26 43 102 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 11 15 31 ++0 0 0 0 0 0 25 42 101 38 54 109 60 75 125 61 75 125 ++61 75 125 61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 56 70 122 30 46 104 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 48 64 117 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 37 53 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 40 56 111 51 66 119 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 26 43 102 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 42 58 112 26 43 102 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++38 54 109 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 39 55 111 28 45 103 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 31 48 105 35 51 108 35 51 108 35 51 108 ++35 51 108 34 50 107 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 59 72 115 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 128 61 75 125 56 70 122 ++50 65 118 46 61 115 42 58 112 39 55 111 36 52 108 33 50 106 ++30 47 105 30 47 105 29 45 103 28 45 103 28 45 103 28 45 103 ++28 45 103 30 46 104 30 47 105 31 48 105 35 51 108 38 54 109 ++42 58 112 44 60 114 48 64 117 54 69 120 58 73 123 64 78 127 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 32 41 72 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 59 72 115 63 77 126 59 74 124 36 52 108 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 13 22 52 ++4 6 13 4 6 13 4 6 13 4 6 13 4 6 13 2 3 7 ++0 0 0 0 0 0 42 56 104 61 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 34 50 107 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 42 58 112 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 48 64 117 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 30 46 104 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 40 56 111 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 35 51 108 46 61 115 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 ++44 60 114 35 51 108 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 29 45 103 ++40 56 111 40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 ++39 55 111 37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 34 50 107 35 51 108 35 51 108 35 51 108 ++34 50 107 32 49 106 ++64 78 127 64 78 127 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 60 71 109 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 32 41 72 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 60 71 109 51 66 119 28 45 103 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 13 20 42 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 53 67 117 61 75 125 61 75 125 61 75 125 ++61 75 125 61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 37 53 109 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 54 69 120 30 46 104 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 44 60 114 51 66 119 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 49 65 117 48 64 117 29 45 103 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 26 43 102 44 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++43 59 113 27 44 102 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 35 51 108 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 ++39 55 111 31 48 105 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 28 45 103 35 51 108 35 51 108 35 51 108 35 51 108 ++34 50 107 30 46 104 ++64 78 127 64 78 127 64 78 127 64 78 127 65 79 128 65 79 128 ++65 79 128 53 64 102 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 32 41 72 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 13 22 52 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 49 62 109 61 75 125 61 75 125 61 75 125 ++61 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 ++58 73 123 58 73 123 40 56 111 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 47 105 54 69 120 56 70 122 56 70 122 56 70 122 56 70 122 ++56 70 122 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 ++54 69 120 39 55 110 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 33 50 106 51 66 119 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 48 64 117 39 55 110 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 35 51 108 46 61 115 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 ++37 53 109 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 39 55 111 ++40 56 111 40 56 111 39 55 111 39 55 111 39 55 111 36 52 108 ++19 29 65 13 22 52 10 17 39 11 15 31 9 13 26 13 20 42 ++18 31 74 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 31 48 105 35 51 108 35 51 108 35 51 108 35 51 108 ++34 50 107 26 43 102 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++65 79 128 49 61 100 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 49 60 97 62 75 121 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 ++66 80 129 66 80 129 66 80 129 66 80 129 66 80 129 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 62 75 121 ++60 71 109 53 64 102 59 72 115 66 79 125 66 80 128 66 80 128 ++66 80 128 66 80 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 32 41 72 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 13 22 52 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 53 64 102 61 75 125 61 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++60 75 125 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 ++58 73 123 44 60 114 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++51 66 119 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++55 70 121 54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 ++47 62 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 48 64 117 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 49 65 117 47 62 115 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 44 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 44 60 114 44 60 114 44 60 114 44 60 114 ++28 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 31 48 105 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 2 3 7 23 37 83 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++26 43 102 35 51 108 35 51 108 35 51 108 35 51 108 34 50 107 ++32 49 106 25 42 101 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 49 60 97 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 40 49 78 32 38 61 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 29 34 52 12 15 26 7 9 13 1 2 3 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 5 7 13 9 12 21 ++49 60 97 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 64 78 127 32 41 72 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 13 22 52 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 49 61 100 61 75 125 60 75 125 60 75 125 ++60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 60 75 125 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 ++46 61 115 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++13 20 42 9 13 26 9 13 26 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 46 61 115 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 52 67 119 ++29 45 103 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++39 55 111 51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 49 65 117 48 64 117 35 51 108 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++35 51 108 46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 45 60 114 43 59 113 21 28 52 19 24 44 13 20 42 ++10 17 39 10 17 39 10 17 39 13 20 42 13 20 42 13 20 42 ++13 20 42 13 20 42 13 22 52 19 29 65 23 37 83 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 110 40 56 111 ++40 56 111 39 55 111 39 55 111 39 55 111 39 55 111 31 48 105 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 9 12 21 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++30 46 104 35 51 108 35 51 108 35 51 108 35 51 108 34 50 107 ++29 45 103 25 42 101 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 41 54 95 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 40 48 74 25 31 50 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 15 18 27 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++23 28 45 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 64 78 127 ++64 78 127 64 78 127 32 38 61 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 23 37 83 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 15 25 57 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 27 35 61 36 45 78 36 45 78 36 45 78 ++36 45 78 36 45 78 36 45 78 36 45 78 41 51 85 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++59 74 124 58 73 123 58 73 123 58 73 123 58 73 123 47 62 115 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++9 13 26 0 0 0 0 0 0 18 31 74 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 39 55 111 56 70 122 ++56 70 122 56 70 122 56 70 122 56 70 122 56 70 122 55 70 121 ++55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 55 70 121 ++54 69 120 54 69 120 54 69 120 54 69 120 54 69 120 35 51 108 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++51 66 119 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 45 60 114 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 26 43 102 ++44 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 41 54 95 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 3 ++9 13 26 13 22 52 18 31 74 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 30 46 104 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 29 45 103 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 6 11 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++33 50 106 35 51 108 35 51 108 35 51 108 35 51 108 34 50 107 ++26 43 102 25 42 101 ++64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 41 51 85 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 65 79 128 65 79 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 38 45 69 23 28 45 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 15 18 27 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++23 28 45 65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 64 78 127 64 78 127 64 78 127 ++64 78 127 64 78 127 32 38 61 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 18 31 74 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 15 25 57 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 9 12 21 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 ++58 73 123 58 73 123 58 73 123 58 73 123 48 64 117 26 43 102 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++9 13 26 0 0 0 0 0 0 9 15 36 25 42 101 25 42 101 ++25 42 101 19 29 65 9 13 26 11 17 38 18 23 42 18 23 42 ++18 23 42 19 24 44 21 28 52 21 28 52 23 28 45 23 28 45 ++26 32 53 26 32 53 26 32 53 41 51 85 55 70 121 54 69 120 ++54 69 120 54 69 120 54 69 120 54 69 120 43 59 113 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 47 62 115 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++50 65 118 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++49 65 117 48 64 117 31 48 105 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 36 52 108 ++46 61 115 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++45 60 114 44 60 114 41 54 95 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 5 7 14 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 37 53 109 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 39 55 111 27 41 89 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 6 11 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 ++35 51 108 35 51 108 35 51 108 35 51 108 34 50 107 30 47 105 ++25 42 101 25 42 101 ++63 77 126 63 77 126 64 78 127 64 78 127 64 78 127 64 78 127 ++64 78 127 41 51 85 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 49 60 97 65 79 128 65 79 128 ++65 79 128 65 79 128 65 79 128 65 79 128 65 79 128 66 80 128 ++66 80 128 32 38 61 16 21 36 66 80 128 66 80 128 59 72 115 ++41 51 85 41 51 85 50 58 85 49 60 97 49 60 97 49 60 97 ++49 60 97 49 60 97 49 60 97 53 64 102 53 64 102 53 64 102 ++53 64 102 53 64 102 53 64 102 60 71 109 62 75 121 66 80 128 ++66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 66 80 128 ++66 80 128 66 80 128 62 75 121 49 60 97 50 58 85 60 71 109 ++63 77 126 15 18 27 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++23 28 45 62 75 121 32 38 61 32 38 61 32 38 61 32 38 56 ++25 31 50 25 31 50 25 31 50 19 24 44 19 24 44 49 60 97 ++64 78 127 26 32 53 9 12 21 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 18 31 74 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 23 33 67 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 9 12 21 59 74 124 ++59 74 124 59 74 124 59 74 124 59 74 124 59 74 124 58 73 123 ++58 73 123 58 73 123 58 73 123 49 65 117 26 43 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++9 13 26 0 0 0 0 0 0 10 17 39 25 42 101 25 42 101 ++15 25 57 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 26 32 53 54 69 120 54 69 120 ++54 69 120 54 69 120 54 69 120 50 65 118 27 44 102 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 38 54 109 51 66 119 ++50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 50 65 118 ++49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 49 65 117 ++48 64 117 42 58 112 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 27 44 102 45 60 114 ++45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 45 60 114 ++44 60 114 44 60 114 41 54 95 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 3 6 11 25 42 101 25 42 101 ++25 42 101 25 42 101 29 45 103 40 56 111 40 56 111 40 56 111 ++39 55 111 39 55 111 39 55 111 39 55 111 38 54 109 23 37 83 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 6 11 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 ++25 42 101 25 42 101 25 42 101 25 42 101 25 42 101 30 47 105 ++35 51 108 35 51 108 35 51 108 35 51 108 34 50 107 28 45 103 ++25 42 101 25 42 101 ++45 60 114 61 75 125 63 77 126 63 77 126 64 78 127 64 78 127 ++64 78 127 38 47 77 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 53 64 102 65 79 128 65 79 128 ++65 79 128 59 72 115 49 61 100 63 77 126 65 79 128 65 79 128 ++65 79 128 32 38 61 12 15 26 65 79 128 63 77 126 12 15 26 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 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0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 +--- a/include/linux/linux_logo.h ++++ b/include/linux/linux_logo.h +@@ -47,6 +47,7 @@ extern const struct linux_logo logo_supe + extern const struct linux_logo logo_superh_clut224; + extern const struct linux_logo logo_m32r_clut224; + extern const struct linux_logo logo_spe_clut224; ++extern const struct linux_logo logo_openwrt_clut224; + + extern const struct linux_logo *fb_find_logo(int depth); + #ifdef CONFIG_FB_LOGO_EXTRA diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/defconfig b/recipes/linux/linux-2.6.31/ben-nanonote/defconfig new file mode 100644 index 0000000000..917b10fe2a --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/defconfig @@ -0,0 +1,1283 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31 +# Wed Nov 18 21:33:12 2009 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_AR7 is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_BCM47XX is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +CONFIG_MACH_JZ=y +# CONFIG_LASAT is not set +# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_NEC_MARKEINS is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SNI_RM is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MIKROTIK_RB532 is not set +# CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_JZ4740_QI_LB60=y +CONFIG_SOC_JZ4740=y +CONFIG_JZSOC=y +CONFIG_JZRISC=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_EARLY_PRINTK=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_GPIO=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_LOONGSON2 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPSR1=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_HARDWARE_WATCHPOINTS=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_32KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_FORCE_MAX_ZONEORDER=12 +# CONFIG_HZ_48 is not set +CONFIG_HZ_100=y +# CONFIG_HZ_128 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=100 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +# CONFIG_KEXEC is not set +CONFIG_SECCOMP=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_RELAY=y +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Performance Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_STRIP_ASM_SYMS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_FREEZER=y + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_MMU=y +# CONFIG_PCCARD is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ_JZ=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set + +# +# Power management options +# +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +# CONFIG_HIBERNATION is not set +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +# CONFIG_LIB80211 is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +CONFIG_MAC80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_JZ4740=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_JZ4740_ADC=y +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +CONFIG_ISDN=y +# CONFIG_MISDN is not set +# CONFIG_ISDN_I4L is not set +# CONFIG_ISDN_CAPI is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_MATRIX=y +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=2 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +CONFIG_BATTERY_JZ4740=y +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_JZSOC is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_FB_JZ4740=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_LCD_GPM940B0=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +CONFIG_FONT_SUN8x16=y +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +CONFIG_LOGO_OPENWRT_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_SPI is not set +# CONFIG_SND_MIPS is not set +CONFIG_SND_SOC=y +CONFIG_SND_JZ4740_SOC=y +CONFIG_SND_JZ4740_SOC_QI_LB60=y +CONFIG_SND_JZ4740_SOC_I2S=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_JZCODEC=y +# CONFIG_SOUND_PRIME is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_JZ4740=y +CONFIG_USB_JZ4740=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_SDIO_UART=y +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +CONFIG_MMC_JZ=y +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +CONFIG_RTC_DRV_JZ4740=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_MEILHAUS is not set +# CONFIG_ECHO is not set +# CONFIG_COMEDI is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_DST is not set +# CONFIG_POHMELFS is not set +# CONFIG_PLAN9AUTH is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +# CONFIG_FSNOTIFY is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +# CONFIG_INOTIFY_USER is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +# CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_XATTR is not set +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_CMDLINE="" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_PCOMP=y +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_ZLIB=y +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/files.patch b/recipes/linux/linux-2.6.31/ben-nanonote/files.patch new file mode 100644 index 0000000000..3d274cbe25 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/files.patch @@ -0,0 +1,20506 @@ +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/compressed/Makefile linux-2.6.31/arch/mips/boot/compressed/Makefile +--- linux-2.6.31-vanilla/arch/mips/boot/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/compressed/Makefile 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,42 @@ ++#
++# linux/arch/mips/boot/compressed/Makefile
++#
++# create a compressed zImage from the original vmlinux
++#
++
++targets := zImage vmlinuz vmlinux.bin.gz head.o misc.o piggy.o dummy.o
++
++OBJS := $(obj)/head.o $(obj)/misc.o
++
++LD_ARGS := -T $(obj)/ld.script -Ttext 0x80600000 -Bstatic
++OBJCOPY_ARGS := -O elf32-tradlittlemips
++
++ENTRY := $(obj)/../tools/entry
++FILESIZE := $(obj)/../tools/filesize
++
++drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
++strip-flags = $(addprefix --remove-section=,$(drop-sections))
++
++
++$(obj)/vmlinux.bin.gz: vmlinux
++ rm -f $(obj)/vmlinux.bin.gz
++ $(OBJCOPY) -O binary $(strip-flags) vmlinux $(obj)/vmlinux.bin
++ gzip -v9f $(obj)/vmlinux.bin
++
++$(obj)/head.o: $(obj)/head.S $(obj)/vmlinux.bin.gz vmlinux
++ $(CC) $(KBUILD_AFLAGS) \
++ -DIMAGESIZE=$(shell sh $(FILESIZE) $(obj)/vmlinux.bin.gz) \
++ -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) vmlinux ) \
++ -DLOADADDR=$(loadaddr) \
++ -c -o $(obj)/head.o $<
++
++$(obj)/vmlinuz: $(OBJS) $(obj)/ld.script $(obj)/vmlinux.bin.gz $(obj)/dummy.o
++ $(OBJCOPY) \
++ --add-section=.image=$(obj)/vmlinux.bin.gz \
++ --set-section-flags=.image=contents,alloc,load,readonly,data \
++ $(obj)/dummy.o $(obj)/piggy.o
++ $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/piggy.o
++ $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap
++
++zImage: $(obj)/vmlinuz
++ $(OBJCOPY) -O binary $(obj)/vmlinuz $(obj)/zImage
+diff -ruN linux-2.6.31-vanilla/arch/mips/boot/compressed/dummy.c linux-2.6.31/arch/mips/boot/compressed/dummy.c +--- linux-2.6.31-vanilla/arch/mips/boot/compressed/dummy.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/compressed/dummy.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,4 @@ ++int main(void) ++{ ++ return 0; ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/compressed/head.S linux-2.6.31/arch/mips/boot/compressed/head.S +--- linux-2.6.31-vanilla/arch/mips/boot/compressed/head.S 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/compressed/head.S 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,85 @@ ++/* ++ * linux/arch/mips/boot/compressed/head.S ++ * ++ * Copyright (C) 2005-2008 Ingenic Semiconductor Inc. ++ */ ++ ++#include <asm/asm.h> ++#include <asm/cacheops.h> ++#include <asm/cachectl.h> ++#include <asm/regdef.h> ++ ++#define IndexInvalidate_I 0x00 ++#define IndexWriteBack_D 0x01 ++ ++ .set noreorder ++ LEAF(startup) ++startup: ++ move s0, a0 /* Save the boot loader transfered args */ ++ move s1, a1 ++ move s2, a2 ++ move s3, a3 ++ ++ la a0, _edata ++ la a1, _end ++1: sw zero, 0(a0) /* Clear BSS section */ ++ bne a1, a0, 1b ++ addu a0, 4 ++ ++ la sp, (.stack + 8192) ++ ++ la a0, __image_begin ++ la a1, IMAGESIZE ++ la a2, LOADADDR ++ la ra, 1f ++ la k0, decompress_kernel ++ jr k0 ++ nop ++1: ++ ++ move a0, s0 ++ move a1, s1 ++ move a2, s2 ++ move a3, s3 ++ li k0, KERNEL_ENTRY ++ jr k0 ++ nop ++2: ++ b 32 ++ END(startup) ++ ++ ++ LEAF(flushcaches) ++ la t0, 1f ++ la t1, 0xa0000000 ++ or t0, t0, t1 ++ jr t0 ++ nop ++1: ++ li k0, 0x80000000 # start address ++ li k1, 0x80004000 # end address (16KB I-Cache) ++ subu k1, 128 ++ ++2: ++ .set mips3 ++ cache IndexWriteBack_D, 0(k0) ++ cache IndexWriteBack_D, 32(k0) ++ cache IndexWriteBack_D, 64(k0) ++ cache IndexWriteBack_D, 96(k0) ++ cache IndexInvalidate_I, 0(k0) ++ cache IndexInvalidate_I, 32(k0) ++ cache IndexInvalidate_I, 64(k0) ++ cache IndexInvalidate_I, 96(k0) ++ .set mips0 ++ ++ bne k0, k1, 2b ++ addu k0, k0, 128 ++ la t0, 3f ++ jr t0 ++ nop ++3: ++ jr ra ++ nop ++ END(flushcaches) ++ ++ .comm .stack,4096*2,4 +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/compressed/ld.script linux-2.6.31/arch/mips/boot/compressed/ld.script +--- linux-2.6.31-vanilla/arch/mips/boot/compressed/ld.script 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/compressed/ld.script 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,151 @@ ++OUTPUT_ARCH(mips) ++ENTRY(startup) ++SECTIONS ++{ ++ /* Read-only sections, merged into text segment: */ ++ ++ .init : { *(.init) } =0 ++ .text : ++ { ++ _ftext = . ; ++ *(.text) ++ *(.rodata) ++ *(.rodata1) ++ /* .gnu.warning sections are handled specially by elf32.em. */ ++ *(.gnu.warning) ++ } =0 ++ .kstrtab : { *(.kstrtab) } ++ ++ . = ALIGN(16); /* Exception table */ ++ __start___ex_table = .; ++ __ex_table : { *(__ex_table) } ++ __stop___ex_table = .; ++ ++ __start___dbe_table = .; /* Exception table for data bus errors */ ++ __dbe_table : { *(__dbe_table) } ++ __stop___dbe_table = .; ++ ++ __start___ksymtab = .; /* Kernel symbol table */ ++ __ksymtab : { *(__ksymtab) } ++ __stop___ksymtab = .; ++ ++ _etext = .; ++ ++ . = ALIGN(8192); ++ .data.init_task : { *(.data.init_task) } ++ ++ /* Startup code */ ++ . = ALIGN(4096); ++ __init_begin = .; ++ .text.init : { *(.text.init) } ++ .data.init : { *(.data.init) } ++ . = ALIGN(16); ++ __setup_start = .; ++ .setup.init : { *(.setup.init) } ++ __setup_end = .; ++ __initcall_start = .; ++ .initcall.init : { *(.initcall.init) } ++ __initcall_end = .; ++ . = ALIGN(4096); /* Align double page for init_task_union */ ++ __init_end = .; ++ ++ . = ALIGN(4096); ++ .data.page_aligned : { *(.data.idt) } ++ ++ . = ALIGN(32); ++ .data.cacheline_aligned : { *(.data.cacheline_aligned) } ++ ++ .fini : { *(.fini) } =0 ++ .reginfo : { *(.reginfo) } ++ /* Adjust the address for the data segment. We want to adjust up to ++ the same address within the page on the next page up. It would ++ be more correct to do this: ++ . = .; ++ The current expression does not correctly handle the case of a ++ text segment ending precisely at the end of a page; it causes the ++ data segment to skip a page. The above expression does not have ++ this problem, but it will currently (2/95) cause BFD to allocate ++ a single segment, combining both text and data, for this case. ++ This will prevent the text segment from being shared among ++ multiple executions of the program; I think that is more ++ important than losing a page of the virtual address space (note ++ that no actual memory is lost; the page which is skipped can not ++ be referenced). */ ++ . = .; ++ .data : ++ { ++ _fdata = . ; ++ *(.data) ++ ++ /* Put the compressed image here, so bss is on the end. */ ++ __image_begin = .; ++ *(.image) ++ __image_end = .; ++ /* Align the initial ramdisk image (INITRD) on page boundaries. */ ++ . = ALIGN(4096); ++ __ramdisk_begin = .; ++ *(.initrd) ++ __ramdisk_end = .; ++ . = ALIGN(4096); ++ ++ CONSTRUCTORS ++ } ++ .data1 : { *(.data1) } ++ _gp = . + 0x8000; ++ .lit8 : { *(.lit8) } ++ .lit4 : { *(.lit4) } ++ .ctors : { *(.ctors) } ++ .dtors : { *(.dtors) } ++ .got : { *(.got.plt) *(.got) } ++ .dynamic : { *(.dynamic) } ++ /* We want the small data sections together, so single-instruction offsets ++ can access them all, and initialized data all before uninitialized, so ++ we can shorten the on-disk segment size. */ ++ .sdata : { *(.sdata) } ++ . = ALIGN(4); ++ _edata = .; ++ PROVIDE (edata = .); ++ ++ __bss_start = .; ++ _fbss = .; ++ .sbss : { *(.sbss) *(.scommon) } ++ .bss : ++ { ++ *(.dynbss) ++ *(.bss) ++ *(COMMON) ++ . = ALIGN(4); ++ _end = . ; ++ PROVIDE (end = .); ++ } ++ ++ /* Sections to be discarded */ ++ /DISCARD/ : ++ { ++ *(.text.exit) ++ *(.data.exit) ++ *(.exitcall.exit) ++ } ++ ++ /* This is the MIPS specific mdebug section. */ ++ .mdebug : { *(.mdebug) } ++ /* These are needed for ELF backends which have not yet been ++ converted to the new style linker. */ ++ .stab 0 : { *(.stab) } ++ .stabstr 0 : { *(.stabstr) } ++ /* DWARF debug sections. ++ Symbols in the .debug DWARF section are relative to the beginning of the ++ section so we begin .debug at 0. It's not clear yet what needs to happen ++ for the others. */ ++ .debug 0 : { *(.debug) } ++ .debug_srcinfo 0 : { *(.debug_srcinfo) } ++ .debug_aranges 0 : { *(.debug_aranges) } ++ .debug_pubnames 0 : { *(.debug_pubnames) } ++ .debug_sfnames 0 : { *(.debug_sfnames) } ++ .line 0 : { *(.line) } ++ /* These must appear regardless of . */ ++ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } ++ .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } ++ .comment : { *(.comment) } ++ .note : { *(.note) } ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/compressed/misc.c linux-2.6.31/arch/mips/boot/compressed/misc.c +--- linux-2.6.31-vanilla/arch/mips/boot/compressed/misc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/compressed/misc.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,242 @@ ++/* ++ * linux/arch/mips/boot/compressed/misc.c ++ * ++ * This is a collection of several routines from gzip-1.0.3 ++ * adapted for Linux. ++ * ++ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 ++ * ++ * Adapted for JZSOC by Peter Wei, 2008 ++ * ++ */ ++ ++#define size_t int ++#define NULL 0 ++ ++/* ++ * gzip declarations ++ */ ++ ++#define OF(args) args ++#define STATIC static ++ ++#undef memset ++#undef memcpy ++#define memzero(s, n) memset ((s), 0, (n)) ++ ++typedef unsigned char uch; ++typedef unsigned short ush; ++typedef unsigned long ulg; ++ ++#define WSIZE 0x8000 /* Window size must be at least 32k, */ ++ /* and a power of two */ ++ ++static uch *inbuf; /* input buffer */ ++static uch window[WSIZE]; /* Sliding window buffer */ ++ ++static unsigned insize = 0; /* valid bytes in inbuf */ ++static unsigned inptr = 0; /* index of next byte to be processed in inbuf */ ++static unsigned outcnt = 0; /* bytes in output buffer */ ++ ++/* gzip flag byte */ ++#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */ ++#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ ++#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ ++#define ORIG_NAME 0x08 /* bit 3 set: original file name present */ ++#define COMMENT 0x10 /* bit 4 set: file comment present */ ++#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ ++#define RESERVED 0xC0 /* bit 6,7: reserved */ ++ ++#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) ++ ++/* Diagnostic functions */ ++#ifdef DEBUG ++# define Assert(cond,msg) {if(!(cond)) error(msg);} ++# define Trace(x) fprintf x ++# define Tracev(x) {if (verbose) fprintf x ;} ++# define Tracevv(x) {if (verbose>1) fprintf x ;} ++# define Tracec(c,x) {if (verbose && (c)) fprintf x ;} ++# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} ++#else ++# define Assert(cond,msg) ++# define Trace(x) ++# define Tracev(x) ++# define Tracevv(x) ++# define Tracec(c,x) ++# define Tracecv(c,x) ++#endif ++ ++static int fill_inbuf(void); ++static void flush_window(void); ++static void error(char *m); ++static void gzip_mark(void **); ++static void gzip_release(void **); ++ ++void* memset(void* s, int c, size_t n); ++void* memcpy(void* __dest, __const void* __src, size_t __n); ++ ++extern void flushcaches(void); /* defined in head.S */ ++ ++char *input_data; ++int input_len; ++ ++static long bytes_out = 0; ++static uch *output_data; ++static unsigned long output_ptr = 0; ++ ++ ++static void *malloc(int size); ++static void free(void *where); ++static void error(char *m); ++static void gzip_mark(void **); ++static void gzip_release(void **); ++ ++static void puts(const char *str) ++{ ++} ++ ++extern unsigned char _end[]; ++static unsigned long free_mem_ptr; ++static unsigned long free_mem_end_ptr; ++ ++#define HEAP_SIZE 0x10000 ++ ++#include "../../../../lib/inflate.c" ++ ++static void *malloc(int size) ++{ ++ void *p; ++ ++ if (size <0) error("Malloc error\n"); ++ if (free_mem_ptr == 0) error("Memory error\n"); ++ ++ free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ ++ ++ p = (void *)free_mem_ptr; ++ free_mem_ptr += size; ++ ++ if (free_mem_ptr >= free_mem_end_ptr) ++ error("\nOut of memory\n"); ++ ++ return p; ++} ++ ++static void free(void *where) ++{ /* Don't care */ ++} ++ ++static void gzip_mark(void **ptr) ++{ ++ *ptr = (void *) free_mem_ptr; ++} ++ ++static void gzip_release(void **ptr) ++{ ++ free_mem_ptr = (long) *ptr; ++} ++ ++void* memset(void* s, int c, size_t n) ++{ ++ int i; ++ char *ss = (char*)s; ++ ++ for (i=0;i<n;i++) ss[i] = c; ++ return s; ++} ++ ++void* memcpy(void* __dest, __const void* __src, size_t __n) ++{ ++ int i = 0; ++ unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; ++ ++ for (i = __n >> 3; i > 0; i--) { ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ } ++ ++ if (__n & 1 << 2) { ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ *d++ = *s++; ++ } ++ ++ if (__n & 1 << 1) { ++ *d++ = *s++; ++ *d++ = *s++; ++ } ++ ++ if (__n & 1) ++ *d++ = *s++; ++ ++ return __dest; ++} ++ ++/* =========================================================================== ++ * Fill the input buffer. This is called only when the buffer is empty ++ * and at least one byte is really needed. ++ */ ++static int fill_inbuf(void) ++{ ++ if (insize != 0) { ++ error("ran out of input data\n"); ++ } ++ ++ inbuf = input_data; ++ insize = input_len; ++ inptr = 1; ++ return inbuf[0]; ++} ++ ++/* =========================================================================== ++ * Write the output window window[0..outcnt-1] and update crc and bytes_out. ++ * (Used for the decompressed data only.) ++ */ ++static void flush_window(void) ++{ ++ ulg c = crc; /* temporary variable */ ++ unsigned n; ++ uch *in, *out, ch; ++ ++ in = window; ++ out = &output_data[output_ptr]; ++ for (n = 0; n < outcnt; n++) { ++ ch = *out++ = *in++; ++ c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); ++ } ++ crc = c; ++ bytes_out += (ulg)outcnt; ++ output_ptr += (ulg)outcnt; ++ outcnt = 0; ++} ++ ++static void error(char *x) ++{ ++ puts("\n\n"); ++ puts(x); ++ puts("\n\n -- System halted"); ++ ++ while(1); /* Halt */ ++} ++ ++void decompress_kernel(unsigned int imageaddr, unsigned int imagesize, unsigned int loadaddr) ++{ ++ input_data = (char *)imageaddr; ++ input_len = imagesize; ++ output_ptr = 0; ++ output_data = (uch *)loadaddr; ++ free_mem_ptr = (unsigned long)_end; ++ free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; ++ ++ makecrc(); ++ puts("Uncompressing Linux..."); ++ gunzip(); ++ flushcaches(); ++ puts("Ok, booting the kernel."); ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/tools/entry linux-2.6.31/arch/mips/boot/tools/entry +--- linux-2.6.31-vanilla/arch/mips/boot/tools/entry 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/tools/entry 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,12 @@ ++#!/bin/sh ++ ++# grab the kernel_entry address from the vmlinux elf image ++entry=`$1 $2 | grep kernel_entry` ++ ++fs=`echo $entry | grep ffffffff` # check toolchain output ++ ++if [ -n "$fs" ]; then ++ echo "0x"`$1 $2 | grep kernel_entry | cut -c9- | awk '{print $1}'` ++else ++ echo "0x"`$1 $2 | grep kernel_entry | cut -c1- | awk '{print $1}'` ++fi +diff -ruN linux-2.6.31-vanilla/arch/mips/boot/tools/filesize linux-2.6.31/arch/mips/boot/tools/filesize +--- linux-2.6.31-vanilla/arch/mips/boot/tools/filesize 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/boot/tools/filesize 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,7 @@ ++#!/bin/sh ++HOSTNAME=`uname` ++if [ "$HOSTNAME" = "Linux" ]; then ++echo `ls -l $1 | awk '{print $5}'` ++else ++echo `ls -l $1 | awk '{print $6}'` ++fi +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/jzsoc.h linux-2.6.31/arch/mips/include/asm/jzsoc.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/jzsoc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/jzsoc.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,26 @@ ++/* ++ * linux/include/asm-mips/jzsoc.h ++ * ++ * Ingenic's JZXXXX SoC common include. ++ * ++ * Copyright (C) 2006 - 2008 Ingenic Semiconductor Inc. ++ * ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZSOC_H__ ++#define __ASM_JZSOC_H__ ++ ++/* ++ * SoC include ++ */ ++ ++#ifdef CONFIG_SOC_JZ4740 ++#include <asm/mach-jz4740/jz4740.h> ++#endif ++ ++#endif /* __ASM_JZSOC_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-dipper.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-dipper.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-dipper.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-dipper.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,69 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/board-dipper.h ++ * ++ * JZ4725-based (16bit) Dipper board ver 1.x definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4725_DIPPER_H__ ++#define __ASM_JZ4725_DIPPER_H__ ++ ++/*====================================================================== ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++/*====================================================================== ++ * GPIO JZ4725 ++ */ ++#define GPIO_SD_VCC_EN_N 85 /* GPC21 */ ++#define GPIO_SD_CD_N 91 /* GPC27 */ ++#define GPIO_SD_WP 112 /* GPD16 */ ++#define GPIO_USB_DETE 124 /* GPD28 */ ++#define GPIO_DC_DETE_N 103 /* GPD7 */ ++#define GPIO_CHARG_STAT_N 86 /* GPC22 */ ++#define GPIO_DISP_OFF_N 118 /* GPD22 */ ++ ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++ ++/*====================================================================== ++ * MMC/SD ++ */ ++ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_DIPPER_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-leo.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-leo.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-leo.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-leo.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,56 @@ ++#ifndef __ASM_JZ4740_LEO_H__ ++#define __ASM_JZ4740_LEO_H__ ++ ++/* ++ * Define your board specific codes here !!! ++ */ ++ ++/*====================================================================== ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++ ++/*====================================================================== ++ * GPIO ++ */ ++#define GPIO_DISP_OFF_N 100 ++#define GPIO_SD_VCC_EN_N 119 ++#define GPIO_SD_CD_N 120 ++#define GPIO_SD_WP 111 ++ ++/*====================================================================== ++ * MMC/SD ++ */ ++ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++ if (__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_BOARD_LEO_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-lyra.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-lyra.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-lyra.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-lyra.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,70 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/board-lyra.h ++ * ++ * JZ4740-based LYRA board ver 2.x definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_LYRA_H__ ++#define __ASM_JZ4740_LYRA_H__ ++ ++/*====================================================================== ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++ ++/*====================================================================== ++ * GPIO ++ */ ++#define GPIO_SD_VCC_EN_N 113 /* GPD17 */ ++#define GPIO_SD_CD_N 110 /* GPD14 */ ++#define GPIO_SD_WP 112 /* GPD16 */ ++#define GPIO_USB_DETE 102 /* GPD6 */ ++#define GPIO_DC_DETE_N 103 /* GPD7 */ ++#define GPIO_CHARG_STAT_N 111 /* GPD15 */ ++#define GPIO_DISP_OFF_N 118 /* GPD22 */ ++#define GPIO_LED_EN 124 /* GPD28 */ ++ ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++/*====================================================================== ++ * MMC/SD ++ */ ++ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (!(__gpio_get_pin(GPIO_SD_CD_N))) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_LYRA_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-pavo.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-pavo.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-pavo.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-pavo.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,70 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/board-pavo.h ++ * ++ * JZ4730-based PAVO board ver 2.x definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_PAVO_H__ ++#define __ASM_JZ4740_PAVO_H__ ++ ++/*====================================================================== ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++ ++/*====================================================================== ++ * GPIO ++ */ ++#define GPIO_SD_VCC_EN_N 113 /* GPD17 */ ++#define GPIO_SD_CD_N 110 /* GPD14 */ ++#define GPIO_SD_WP 112 /* GPD16 */ ++#define GPIO_USB_DETE 102 /* GPD6 */ ++#define GPIO_DC_DETE_N 103 /* GPD7 */ ++#define GPIO_CHARG_STAT_N 111 /* GPD15 */ ++#define GPIO_DISP_OFF_N 118 /* GPD22 */ ++#define GPIO_LED_EN 124 /* GPD28 */ ++ ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++/*====================================================================== ++ * MMC/SD ++ */ ++ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_PAVO_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,88 @@ ++/* ++ * Copyright (c) 2009 Qi Hardware Inc., ++ * Author: Xiangfu Liu <xiangfu@qi-hardware.com> ++ * ++ * This program is free software: you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation, either version 3 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ */ ++ ++#ifndef __ASM_JZ4740_QI_LB60_H__ ++#define __ASM_JZ4740_QI_LB60_H__ ++ ++#include <linux/gpio.h> ++/* ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL_RTC 32768 /* RTC extal freq: 32.768 KHz */ ++ ++/* ++ * GPIO ++ */ ++#define GPIO_DC_DETE_N JZ_GPIO_PORTC(26) ++#define GPIO_CHARG_STAT_N JZ_GPIO_PORTC(27) ++#define GPIO_LED_EN JZ_GPIO_PORTC(28) ++#define GPIO_LCD_CS JZ_GPIO_PORTC(21) ++#define GPIO_DISP_OFF_N JZ_GPIO_PORTD(21) ++#define GPIO_PWM JZ_GPIO_PORTD(27) ++#define GPIO_WAKEUP_N JZ_GPIO_PORTD(29) ++ ++#define GPIO_AMP_EN JZ_GPIO_PORTD(4) ++ ++#define GPIO_SD_CD_N JZ_GPIO_PORTD(0) ++#define GPIO_SD_VCC_EN_N JZ_GPIO_PORTD(2) ++#define GPIO_SD_WP JZ_GPIO_PORTD(16) ++ ++#define GPIO_USB_DETE JZ_GPIO_PORTD(28) ++#define GPIO_BUZZ_PWM JZ_GPIO_PORTD(27) ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++ ++#define GPIO_AUDIO_POP JZ_GPIO_PORTB(29) ++#define GPIO_COB_TEST JZ_GPIO_PORTB(30) ++ ++#define GPIO_KEYOUT_BASE JZ_GPIO_PORTC(10) ++#define GPIO_KEYIN_BASE JZ_GPIO_PORTD(18) ++#define GPIO_KEYIN_8 JZ_GPIO_PORTD(26) ++ ++/* ++ * MMC/SD ++ */ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (!__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_QI_LB60_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-virgo.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-virgo.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/board-virgo.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/board-virgo.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,67 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/board-virgo.h ++ * ++ * JZ4720-based VIRGO board ver 1.x definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4720_VIRGO_H__ ++#define __ASM_JZ4720_VIRGO_H__ ++ ++/*====================================================================== ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++/*====================================================================== ++ * GPIO VIRGO(JZ4720) ++ */ ++#define GPIO_SD_VCC_EN_N 115 /* GPD19 */ ++#define GPIO_SD_CD_N 116 /* GPD20 */ ++#define GPIO_USB_DETE 114 /* GPD18 */ ++#define GPIO_DC_DETE_N 120 /* GPD24 */ ++#define GPIO_DISP_OFF_N 118 /* GPD22 */ ++#define GPIO_LED_EN 117 /* GPD21 */ ++ ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++ ++/*====================================================================== ++ * MMC/SD ++ */ ++ ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4720_VIRGO_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/clock.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/clock.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/clock.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/clock.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,175 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/clock.h ++ * ++ * JZ4740 clocks definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_CLOCK_H__ ++#define __ASM_JZ4740_CLOCK_H__ ++ ++#ifndef JZ_EXTAL ++//#define JZ_EXTAL 3686400 /* 3.6864 MHz */ ++#define JZ_EXTAL 12000000 /* 3.6864 MHz */ ++#endif ++#ifndef JZ_EXTAL2 ++#define JZ_EXTAL2 32768 /* 32.768 KHz */ ++#endif ++ ++/* ++ * JZ4740 clocks structure ++ */ ++typedef struct { ++ unsigned int cclk; /* CPU clock */ ++ unsigned int hclk; /* System bus clock */ ++ unsigned int pclk; /* Peripheral bus clock */ ++ unsigned int mclk; /* Flash/SRAM/SDRAM clock */ ++ unsigned int lcdclk; /* LCDC module clock */ ++ unsigned int pixclk; /* LCD pixel clock */ ++ unsigned int i2sclk; /* AIC module clock */ ++ unsigned int usbclk; /* USB module clock */ ++ unsigned int mscclk; /* MSC module clock */ ++ unsigned int extalclk; /* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */ ++ unsigned int rtcclk; /* RTC clock for CPM,INTC,RTC,TCU,WDT */ ++} jz_clocks_t; ++ ++extern jz_clocks_t jz_clocks; ++ ++ ++/* PLL output frequency */ ++static __inline__ unsigned int __cpm_get_pllout(void) ++{ ++ unsigned long m, n, no, pllout; ++ unsigned long cppcr = REG_CPM_CPPCR; ++ unsigned long od[4] = {1, 2, 2, 4}; ++ if ((cppcr & CPM_CPPCR_PLLEN) && !(cppcr & CPM_CPPCR_PLLBP)) { ++ m = __cpm_get_pllm() + 2; ++ n = __cpm_get_plln() + 2; ++ no = od[__cpm_get_pllod()]; ++ pllout = ((JZ_EXTAL) / (n * no)) * m; ++ } else ++ pllout = JZ_EXTAL; ++ return pllout; ++} ++ ++/* PLL output frequency for MSC/I2S/LCD/USB */ ++static __inline__ unsigned int __cpm_get_pllout2(void) ++{ ++ if (REG_CPM_CPCCR & CPM_CPCCR_PCS) ++ return __cpm_get_pllout(); ++ else ++ return __cpm_get_pllout()/2; ++} ++ ++/* CPU core clock */ ++static __inline__ unsigned int __cpm_get_cclk(void) ++{ ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ ++ return __cpm_get_pllout() / div[__cpm_get_cdiv()]; ++} ++ ++/* AHB system bus clock */ ++static __inline__ unsigned int __cpm_get_hclk(void) ++{ ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ ++ return __cpm_get_pllout() / div[__cpm_get_hdiv()]; ++} ++ ++/* Memory bus clock */ ++static __inline__ unsigned int __cpm_get_mclk(void) ++{ ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ ++ return __cpm_get_pllout() / div[__cpm_get_mdiv()]; ++} ++ ++/* APB peripheral bus clock */ ++static __inline__ unsigned int __cpm_get_pclk(void) ++{ ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ ++ return __cpm_get_pllout() / div[__cpm_get_pdiv()]; ++} ++ ++/* LCDC module clock */ ++static __inline__ unsigned int __cpm_get_lcdclk(void) ++{ ++ return __cpm_get_pllout2() / (__cpm_get_ldiv() + 1); ++} ++ ++/* LCD pixel clock */ ++static __inline__ unsigned int __cpm_get_pixclk(void) ++{ ++ return __cpm_get_pllout2() / (__cpm_get_pixdiv() + 1); ++} ++ ++/* I2S clock */ ++static __inline__ unsigned int __cpm_get_i2sclk(void) ++{ ++ if (REG_CPM_CPCCR & CPM_CPCCR_I2CS) { ++ return __cpm_get_pllout2() / (__cpm_get_i2sdiv() + 1); ++ } ++ else { ++ return JZ_EXTAL; ++ } ++} ++ ++/* USB clock */ ++static __inline__ unsigned int __cpm_get_usbclk(void) ++{ ++ if (REG_CPM_CPCCR & CPM_CPCCR_UCS) { ++ return __cpm_get_pllout2() / (__cpm_get_udiv() + 1); ++ } ++ else { ++ return JZ_EXTAL; ++ } ++} ++ ++/* MSC clock */ ++static __inline__ unsigned int __cpm_get_mscclk(void) ++{ ++ return __cpm_get_pllout2() / (__cpm_get_mscdiv() + 1); ++} ++ ++/* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */ ++static __inline__ unsigned int __cpm_get_extalclk(void) ++{ ++ return JZ_EXTAL; ++} ++ ++/* RTC clock for CPM,INTC,RTC,TCU,WDT */ ++static __inline__ unsigned int __cpm_get_rtcclk(void) ++{ ++ return JZ_EXTAL2; ++} ++ ++/* ++ * Output 24MHz for SD and 16MHz for MMC. ++ */ ++static inline void __cpm_select_msc_clk(int sd) ++{ ++ unsigned int pllout2 = __cpm_get_pllout2(); ++ unsigned int div = 0; ++ ++ if (sd) { ++ div = pllout2 / 24000000; ++ } ++ else { ++ div = pllout2 / 16000000; ++ } ++ ++ REG_CPM_MSCCDR = div - 1; ++} ++ ++int jz_init_clocks(unsigned long ext_rate); ++ ++#endif /* __ASM_JZ4740_CLOCK_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/dma.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/dma.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/dma.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/dma.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,265 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/dma.h ++ * ++ * JZ4740 DMA definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_DMA_H__ ++#define __ASM_JZ4740_DMA_H__ ++ ++#include <linux/interrupt.h> ++#include <asm/io.h> /* need byte IO */ ++#include <linux/spinlock.h> /* And spinlocks */ ++#include <linux/delay.h> ++#include <asm/system.h> ++ ++/* ++ * Descriptor structure for JZ4740 DMA engine ++ * Note: this structure must always be aligned to a 16-bytes boundary. ++ */ ++ ++typedef struct { ++ volatile u32 dcmd; /* DCMD value for the current transfer */ ++ volatile u32 dsadr; /* DSAR value for the current transfer */ ++ volatile u32 dtadr; /* DTAR value for the current transfer */ ++ volatile u32 ddadr; /* Points to the next descriptor + transfer count */ ++} jz_dma_desc; ++ ++ ++/* DMA Device ID's follow */ ++enum { ++ DMA_ID_UART0_TX = 0, ++ DMA_ID_UART0_RX, ++ DMA_ID_SSI_TX, ++ DMA_ID_SSI_RX, ++ DMA_ID_AIC_TX, ++ DMA_ID_AIC_RX, ++ DMA_ID_MSC_TX, ++ DMA_ID_MSC_RX, ++ DMA_ID_TCU_OVERFLOW, ++ DMA_ID_AUTO, ++ DMA_ID_RAW_SET, ++ DMA_ID_MAX ++}; ++ ++/* DMA modes, simulated by sw */ ++#define DMA_MODE_READ 0x0 /* I/O to memory, no autoinit, increment, single mode */ ++#define DMA_MODE_WRITE 0x1 /* memory to I/O, no autoinit, increment, single mode */ ++#define DMA_AUTOINIT 0x2 ++#define DMA_MODE_MASK 0x3 ++ ++struct jz_dma_chan { ++ int dev_id; /* DMA ID: this channel is allocated if >=0, free otherwise */ ++ unsigned int io; /* DMA channel number */ ++ const char *dev_str; /* string describes the DMA channel */ ++ int irq; /* DMA irq number */ ++ void *irq_dev; /* DMA private device structure */ ++ unsigned int fifo_addr; /* physical fifo address of the requested device */ ++ unsigned int cntl; /* DMA controll */ ++ unsigned int mode; /* DMA configuration */ ++ unsigned int source; /* DMA request source */ ++}; ++ ++extern struct jz_dma_chan jz_dma_table[]; ++ ++ ++#define DMA_8BIT_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_8BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_8BIT_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \ ++ DMAC_DCMD_DS_8BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_16BIT_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_16BIT_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_16 | \ ++ DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_32BIT_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_32BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_32BIT_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_32BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_16BYTE_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_16BYTE_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_32BYTE_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_32BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_32BYTE_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_8 | \ ++ DMAC_DCMD_DS_32BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_32_16BYTE_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_32_16BYTE_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_16BIT_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \ ++ DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_16BIT_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \ ++ DMAC_DCMD_DS_16BIT | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_16BYTE_RX_CMD \ ++ DMAC_DCMD_DAI | \ ++ DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++#define DMA_AIC_16BYTE_TX_CMD \ ++ DMAC_DCMD_SAI | \ ++ DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \ ++ DMAC_DCMD_DS_16BYTE | DMAC_DCMD_RDIL_IGN ++ ++extern int jz_request_dma(int dev_id, ++ const char *dev_str, ++ irqreturn_t (*irqhandler)(int, void *), ++ unsigned long irqflags, ++ void *irq_dev_id); ++extern void jz_free_dma(unsigned int dmanr); ++ ++extern int jz_dma_read_proc(char *buf, char **start, off_t fpos, ++ int length, int *eof, void *data); ++extern void dump_jz_dma_channel(unsigned int dmanr); ++ ++extern void enable_dma(unsigned int dmanr); ++extern void disable_dma(unsigned int dmanr); ++extern void set_dma_addr(unsigned int dmanr, unsigned int phyaddr); ++extern void set_dma_count(unsigned int dmanr, unsigned int bytecnt); ++extern void set_dma_mode(unsigned int dmanr, unsigned int mode); ++extern void jz_set_oss_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt); ++extern void jz_set_alsa_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt); ++extern unsigned int get_dma_residue(unsigned int dmanr); ++ ++extern spinlock_t dma_spin_lock; ++ ++static __inline__ unsigned long claim_dma_lock(void) ++{ ++ unsigned long flags; ++ spin_lock_irqsave(&dma_spin_lock, flags); ++ return flags; ++} ++ ++static __inline__ void release_dma_lock(unsigned long flags) ++{ ++ spin_unlock_irqrestore(&dma_spin_lock, flags); ++} ++ ++/* Clear the 'DMA Pointer Flip Flop'. ++ * Write 0 for LSB/MSB, 1 for MSB/LSB access. ++ */ ++#define clear_dma_ff(channel) ++ ++static __inline__ struct jz_dma_chan *get_dma_chan(unsigned int dmanr) ++{ ++ if (dmanr > MAX_DMA_NUM ++ || jz_dma_table[dmanr].dev_id < 0) ++ return NULL; ++ return &jz_dma_table[dmanr]; ++} ++ ++static __inline__ int dma_halted(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return 1; ++ return __dmac_channel_transmit_halt_detected(dmanr) ? 1 : 0; ++} ++ ++static __inline__ unsigned int get_dma_mode(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return 0; ++ return chan->mode; ++} ++ ++static __inline__ void clear_dma_done(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return; ++ REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR); ++} ++ ++static __inline__ void clear_dma_halt(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return; ++ REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT); ++ REG_DMAC_DMACR &= ~(DMAC_DMACR_HLT); ++} ++ ++static __inline__ void clear_dma_flag(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return; ++ REG_DMAC_DCCSR(chan->io) &= ~(DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR); ++ REG_DMAC_DMACR &= ~(DMAC_DMACR_HLT | DMAC_DMACR_AR); ++} ++ ++static __inline__ void set_dma_page(unsigned int dmanr, char pagenr) ++{ ++} ++ ++static __inline__ unsigned int get_dma_done_status(unsigned int dmanr) ++{ ++ unsigned long dccsr; ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return 0; ++ dccsr = REG_DMAC_DCCSR(chan->io); ++ return dccsr & (DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR); ++} ++ ++static __inline__ int get_dma_done_irq(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return -1; ++ return chan->irq; ++} ++ ++#endif /* __ASM_JZ4740_DMA_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/gpio.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/gpio.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/gpio.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/gpio.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,386 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ7420/JZ4740 GPIO pin definitions ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#ifndef _JZ_GPIO_H ++#define _JZ_GPIO_H ++ ++#include <linux/types.h> ++ ++enum jz_gpio_function { ++ JZ_GPIO_FUNC_NONE, ++ JZ_GPIO_FUNC1, ++ JZ_GPIO_FUNC2, ++ JZ_GPIO_FUNC3, ++}; ++ ++ ++/* ++ Usually a driver for a SoC component has to request several gpio pins and ++ configure them as funcion pins. ++ jz_gpio_bulk_request can be used to ease this process. ++ Usually one would do something like: ++ ++ const static struct jz_gpio_bulk_request i2c_pins[] = { ++ JZ_GPIO_BULK_PIN(I2C_SDA), ++ JZ_GPIO_BULK_PIN(I2C_SCK), ++ }; ++ ++ inside the probe function: ++ ++ ret = jz_gpio_bulk_request(i2c_pins, ARRAY_SIZE(i2c_pins)); ++ if (ret) { ++ ... ++ ++ inside the remove function: ++ ++ jz_gpio_bulk_free(i2c_pins, ARRAY_SIZE(i2c_pins)); ++ ++ ++*/ ++struct jz_gpio_bulk_request { ++ int gpio; ++ const char *name; ++ enum jz_gpio_function function; ++}; ++ ++#define JZ_GPIO_BULK_PIN(pin) { \ ++ .gpio = JZ_GPIO_ ## pin, \ ++ .name = #pin, \ ++ .function = JZ_GPIO_FUNC_ ## pin \ ++} ++ ++int jz_gpio_bulk_request(const struct jz_gpio_bulk_request *request, size_t num); ++void jz_gpio_bulk_free(const struct jz_gpio_bulk_request *request, size_t num); ++void jz_gpio_enable_pullup(unsigned gpio); ++void jz_gpio_disable_pullup(unsigned gpio); ++int jz_gpio_set_function(int gpio, enum jz_gpio_function function); ++ ++#include <asm/mach-generic/gpio.h> ++ ++#define JZ_GPIO_PORTA(x) (x + 32 * 0) ++#define JZ_GPIO_PORTB(x) (x + 32 * 1) ++#define JZ_GPIO_PORTC(x) (x + 32 * 2) ++#define JZ_GPIO_PORTD(x) (x + 32 * 3) ++ ++/* Port A function pins */ ++#define JZ_GPIO_MEM_DATA0 JZ_GPIO_PORTA(0) ++#define JZ_GPIO_MEM_DATA1 JZ_GPIO_PORTA(1) ++#define JZ_GPIO_MEM_DATA2 JZ_GPIO_PORTA(2) ++#define JZ_GPIO_MEM_DATA3 JZ_GPIO_PORTA(3) ++#define JZ_GPIO_MEM_DATA4 JZ_GPIO_PORTA(4) ++#define JZ_GPIO_MEM_DATA5 JZ_GPIO_PORTA(5) ++#define JZ_GPIO_MEM_DATA6 JZ_GPIO_PORTA(6) ++#define JZ_GPIO_MEM_DATA7 JZ_GPIO_PORTA(7) ++#define JZ_GPIO_MEM_DATA8 JZ_GPIO_PORTA(8) ++#define JZ_GPIO_MEM_DATA9 JZ_GPIO_PORTA(9) ++#define JZ_GPIO_MEM_DATA10 JZ_GPIO_PORTA(10) ++#define JZ_GPIO_MEM_DATA11 JZ_GPIO_PORTA(11) ++#define JZ_GPIO_MEM_DATA12 JZ_GPIO_PORTA(12) ++#define JZ_GPIO_MEM_DATA13 JZ_GPIO_PORTA(13) ++#define JZ_GPIO_MEM_DATA14 JZ_GPIO_PORTA(14) ++#define JZ_GPIO_MEM_DATA15 JZ_GPIO_PORTA(15) ++#define JZ_GPIO_MEM_DATA16 JZ_GPIO_PORTA(16) ++#define JZ_GPIO_MEM_DATA17 JZ_GPIO_PORTA(17) ++#define JZ_GPIO_MEM_DATA18 JZ_GPIO_PORTA(18) ++#define JZ_GPIO_MEM_DATA19 JZ_GPIO_PORTA(19) ++#define JZ_GPIO_MEM_DATA20 JZ_GPIO_PORTA(20) ++#define JZ_GPIO_MEM_DATA21 JZ_GPIO_PORTA(21) ++#define JZ_GPIO_MEM_DATA22 JZ_GPIO_PORTA(22) ++#define JZ_GPIO_MEM_DATA23 JZ_GPIO_PORTA(23) ++#define JZ_GPIO_MEM_DATA24 JZ_GPIO_PORTA(24) ++#define JZ_GPIO_MEM_DATA25 JZ_GPIO_PORTA(25) ++#define JZ_GPIO_MEM_DATA26 JZ_GPIO_PORTA(26) ++#define JZ_GPIO_MEM_DATA27 JZ_GPIO_PORTA(27) ++#define JZ_GPIO_MEM_DATA28 JZ_GPIO_PORTA(28) ++#define JZ_GPIO_MEM_DATA29 JZ_GPIO_PORTA(29) ++#define JZ_GPIO_MEM_DATA30 JZ_GPIO_PORTA(30) ++#define JZ_GPIO_MEM_DATA31 JZ_GPIO_PORTA(31) ++ ++#define JZ_GPIO_FUNC_MEM_DATA0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA4 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA5 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA6 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA7 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA8 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA9 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA10 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA11 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA12 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA13 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA14 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA15 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA16 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA17 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA18 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA19 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA20 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA21 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA22 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA23 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA24 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA25 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA26 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA27 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA28 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA29 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA30 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DATA31 JZ_GPIO_FUNC1 ++ ++/* Port B function pins */ ++#define JZ_GPIO_MEM_ADDR0 JZ_GPIO_PORTB(0) ++#define JZ_GPIO_MEM_ADDR1 JZ_GPIO_PORTB(1) ++#define JZ_GPIO_MEM_ADDR2 JZ_GPIO_PORTB(2) ++#define JZ_GPIO_MEM_ADDR3 JZ_GPIO_PORTB(3) ++#define JZ_GPIO_MEM_ADDR4 JZ_GPIO_PORTB(4) ++#define JZ_GPIO_MEM_ADDR5 JZ_GPIO_PORTB(5) ++#define JZ_GPIO_MEM_ADDR6 JZ_GPIO_PORTB(6) ++#define JZ_GPIO_MEM_ADDR7 JZ_GPIO_PORTB(7) ++#define JZ_GPIO_MEM_ADDR8 JZ_GPIO_PORTB(8) ++#define JZ_GPIO_MEM_ADDR9 JZ_GPIO_PORTB(9) ++#define JZ_GPIO_MEM_ADDR10 JZ_GPIO_PORTB(10) ++#define JZ_GPIO_MEM_ADDR11 JZ_GPIO_PORTB(11) ++#define JZ_GPIO_MEM_ADDR12 JZ_GPIO_PORTB(12) ++#define JZ_GPIO_MEM_ADDR13 JZ_GPIO_PORTB(13) ++#define JZ_GPIO_MEM_ADDR14 JZ_GPIO_PORTB(14) ++#define JZ_GPIO_MEM_ADDR15 JZ_GPIO_PORTB(15) ++#define JZ_GPIO_MEM_ADDR16 JZ_GPIO_PORTB(16) ++#define JZ_GPIO_MEM_CLS JZ_GPIO_PORTB(17) ++#define JZ_GPIO_MEM_SPL JZ_GPIO_PORTB(18) ++#define JZ_GPIO_MEM_DCS JZ_GPIO_PORTB(19) ++#define JZ_GPIO_MEM_RAS JZ_GPIO_PORTB(20) ++#define JZ_GPIO_MEM_CAS JZ_GPIO_PORTB(21) ++#define JZ_GPIO_MEM_SDWE JZ_GPIO_PORTB(22) ++#define JZ_GPIO_MEM_CKE JZ_GPIO_PORTB(23) ++#define JZ_GPIO_MEM_CKO JZ_GPIO_PORTB(24) ++#define JZ_GPIO_MEM_CS0 JZ_GPIO_PORTB(25) ++#define JZ_GPIO_MEM_CS1 JZ_GPIO_PORTB(26) ++#define JZ_GPIO_MEM_CS2 JZ_GPIO_PORTB(27) ++#define JZ_GPIO_MEM_CS3 JZ_GPIO_PORTB(28) ++#define JZ_GPIO_MEM_RD JZ_GPIO_PORTB(29) ++#define JZ_GPIO_MEM_WR JZ_GPIO_PORTB(30) ++#define JZ_GPIO_MEM_WE0 JZ_GPIO_PORTB(31) ++ ++#define JZ_GPIO_FUNC_MEM_ADDR0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR4 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR5 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR6 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR7 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR8 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR9 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR10 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR11 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR12 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR13 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR14 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR15 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_ADDR16 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CLS JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_SPL JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_DCS JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_RAS JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CAS JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_SDWE JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CKE JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CKO JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CS0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CS1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CS2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_CS3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_RD JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WR JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WE0 JZ_GPIO_FUNC1 ++ ++ ++#define JZ_GPIO_MEM_ADDR21 JZ_GPIO_PORTB(17) ++#define JZ_GPIO_MEM_ADDR22 JZ_GPIO_PORTB(18) ++ ++#define JZ_GPIO_FUNC_MEM_ADDR21 JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_ADDR22 JZ_GPIO_FUNC2 ++ ++/* Port C function pins */ ++#define JZ_GPIO_LCD_DATA0 JZ_GPIO_PORTC(0) ++#define JZ_GPIO_LCD_DATA1 JZ_GPIO_PORTC(1) ++#define JZ_GPIO_LCD_DATA2 JZ_GPIO_PORTC(2) ++#define JZ_GPIO_LCD_DATA3 JZ_GPIO_PORTC(3) ++#define JZ_GPIO_LCD_DATA4 JZ_GPIO_PORTC(4) ++#define JZ_GPIO_LCD_DATA5 JZ_GPIO_PORTC(5) ++#define JZ_GPIO_LCD_DATA6 JZ_GPIO_PORTC(6) ++#define JZ_GPIO_LCD_DATA7 JZ_GPIO_PORTC(7) ++#define JZ_GPIO_LCD_DATA8 JZ_GPIO_PORTC(8) ++#define JZ_GPIO_LCD_DATA9 JZ_GPIO_PORTC(9) ++#define JZ_GPIO_LCD_DATA10 JZ_GPIO_PORTC(10) ++#define JZ_GPIO_LCD_DATA11 JZ_GPIO_PORTC(11) ++#define JZ_GPIO_LCD_DATA12 JZ_GPIO_PORTC(12) ++#define JZ_GPIO_LCD_DATA13 JZ_GPIO_PORTC(13) ++#define JZ_GPIO_LCD_DATA14 JZ_GPIO_PORTC(14) ++#define JZ_GPIO_LCD_DATA15 JZ_GPIO_PORTC(15) ++#define JZ_GPIO_LCD_DATA16 JZ_GPIO_PORTC(16) ++#define JZ_GPIO_LCD_DATA17 JZ_GPIO_PORTC(17) ++#define JZ_GPIO_LCD_PCLK JZ_GPIO_PORTC(18) ++#define JZ_GPIO_LCD_HSYNC JZ_GPIO_PORTC(19) ++#define JZ_GPIO_LCD_VSYNC JZ_GPIO_PORTC(20) ++#define JZ_GPIO_LCD_DE JZ_GPIO_PORTC(21) ++#define JZ_GPIO_LCD_PS JZ_GPIO_PORTC(22) ++#define JZ_GPIO_LCD_REV JZ_GPIO_PORTC(23) ++#define JZ_GPIO_MEM_WE1 JZ_GPIO_PORTC(24) ++#define JZ_GPIO_MEM_WE2 JZ_GPIO_PORTC(25) ++#define JZ_GPIO_MEM_WE3 JZ_GPIO_PORTC(26) ++#define JZ_GPIO_MEM_WAIT JZ_GPIO_PORTC(27) ++#define JZ_GPIO_MEM_FRE JZ_GPIO_PORTC(28) ++#define JZ_GPIO_MEM_FWE JZ_GPIO_PORTC(29) ++ ++#define JZ_GPIO_FUNC_LCD_DATA0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA4 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA5 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA6 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA7 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA8 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA9 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA10 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA11 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA12 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA13 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA14 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA15 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA16 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DATA17 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_PCLK JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_VSYNC JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_HSYNC JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_DE JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_PS JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_LCD_REV JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WE1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WE2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WE3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_WAIT JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_FRE JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MEM_FWE JZ_GPIO_FUNC1 ++ ++ ++#define JZ_GPIO_MEM_ADDR19 JZ_GPIO_PORTB(22) ++#define JZ_GPIO_MEM_ADDR20 JZ_GPIO_PORTB(23) ++ ++#define JZ_GPIO_FUNC_MEM_ADDR19 JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_ADDR20 JZ_GPIO_FUNC2 ++ ++/* Port D function pins */ ++#define JZ_GPIO_CIM_DATA0 JZ_GPIO_PORTD(0) ++#define JZ_GPIO_CIM_DATA1 JZ_GPIO_PORTD(1) ++#define JZ_GPIO_CIM_DATA2 JZ_GPIO_PORTD(2) ++#define JZ_GPIO_CIM_DATA3 JZ_GPIO_PORTD(3) ++#define JZ_GPIO_CIM_DATA4 JZ_GPIO_PORTD(4) ++#define JZ_GPIO_CIM_DATA5 JZ_GPIO_PORTD(5) ++#define JZ_GPIO_CIM_DATA6 JZ_GPIO_PORTD(6) ++#define JZ_GPIO_CIM_DATA7 JZ_GPIO_PORTD(7) ++#define JZ_GPIO_MSC_CMD JZ_GPIO_PORTD(8) ++#define JZ_GPIO_MSC_CLK JZ_GPIO_PORTD(9) ++#define JZ_GPIO_MSC_DATA0 JZ_GPIO_PORTD(10) ++#define JZ_GPIO_MSC_DATA1 JZ_GPIO_PORTD(11) ++#define JZ_GPIO_MSC_DATA2 JZ_GPIO_PORTD(12) ++#define JZ_GPIO_MSC_DATA3 JZ_GPIO_PORTD(13) ++#define JZ_GPIO_CIM_MCLK JZ_GPIO_PORTD(14) ++#define JZ_GPIO_CIM_PCLK JZ_GPIO_PORTD(15) ++#define JZ_GPIO_CIM_VSYNC JZ_GPIO_PORTD(16) ++#define JZ_GPIO_CIM_HSYNC JZ_GPIO_PORTD(17) ++#define JZ_GPIO_SPI_CLK JZ_GPIO_PORTD(18) ++#define JZ_GPIO_SPI_CE0 JZ_GPIO_PORTD(19) ++#define JZ_GPIO_SPI_DT JZ_GPIO_PORTD(20) ++#define JZ_GPIO_SPI_DR JZ_GPIO_PORTD(21) ++#define JZ_GPIO_SPI_CE1 JZ_GPIO_PORTD(22) ++#define JZ_GPIO_PWM0 JZ_GPIO_PORTD(23) ++#define JZ_GPIO_PWM1 JZ_GPIO_PORTD(24) ++#define JZ_GPIO_PWM2 JZ_GPIO_PORTD(25) ++#define JZ_GPIO_PWM3 JZ_GPIO_PORTD(26) ++#define JZ_GPIO_PWM4 JZ_GPIO_PORTD(27) ++#define JZ_GPIO_PWM5 JZ_GPIO_PORTD(28) ++#define JZ_GPIO_PWM6 JZ_GPIO_PORTD(30) ++#define JZ_GPIO_PWM7 JZ_GPIO_PORTD(31) ++ ++#define JZ_GPIO_FUNC_CIM_DATA0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA4 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA5 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA6 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_DATA7 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_CMD JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_CLK JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_DATA0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_DATA1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_DATA2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_MSC_DATA3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_MCLK JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_PCLK JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_VSYNC JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_CIM_HSYNC JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_SPI_CLK JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_SPI_CE0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_SPI_DT JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_SPI_DR JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_SPI_CE1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM0 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM1 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM2 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM3 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM4 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM5 JZ_GPIO_FUNC1 ++#define JZ_GPIO_FUNC_PWM6 JZ_GPIO_FUNC1 ++ ++#define JZ_GPIO_MEM_SCLK_RSTN JZ_GPIO_PORTD(18) ++#define JZ_GPIO_MEM_BCLK JZ_GPIO_PORTD(19) ++#define JZ_GPIO_MEM_SDATO JZ_GPIO_PORTD(20) ++#define JZ_GPIO_MEM_SDATI JZ_GPIO_PORTD(21) ++#define JZ_GPIO_MEM_SYNC JZ_GPIO_PORTD(22) ++#define JZ_GPIO_I2C_SDA JZ_GPIO_PORTD(23) ++#define JZ_GPIO_I2C_SCK JZ_GPIO_PORTD(24) ++#define JZ_GPIO_UART0_TXD JZ_GPIO_PORTD(25) ++#define JZ_GPIO_UART0_RXD JZ_GPIO_PORTD(26) ++#define JZ_GPIO_MEM_ADDR17 JZ_GPIO_PORTD(27) ++#define JZ_GPIO_MEM_ADDR18 JZ_GPIO_PORTD(28) ++#define JZ_GPIO_UART0_CTS JZ_GPIO_PORTD(30) ++#define JZ_GPIO_UART0_RTS JZ_GPIO_PORTD(31) ++ ++#define JZ_GPIO_FUNC_MEM_SCLK_RSTN JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_BCLK JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_SDATO JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_SDATI JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_SYNC JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_I2C_SDA JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_I2C_SCK JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_UART0_TXD JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_UART0_RXD JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_ADDR17 JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_MEM_ADDR18 JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_UART0_CTS JZ_GPIO_FUNC2 ++#define JZ_GPIO_FUNC_UART0_RTS JZ_GPIO_FUNC2 ++ ++#define JZ_GPIO_UART1_RXD JZ_GPIO_PORTD(30) ++#define JZ_GPIO_UART1_TXD JZ_GPIO_PORTD(31) ++ ++#define JZ_GPIO_FUNC_UART1_RXD JZ_GPIO_FUNC3 ++#define JZ_GPIO_FUNC_UART1_TXD JZ_GPIO_FUNC3 ++ ++#endif +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/jz4740.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/jz4740.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/jz4740.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/jz4740.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,60 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/jz4740.h ++ * ++ * JZ4740 common definition. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_H__ ++#define __ASM_JZ4740_H__ ++ ++#include <asm/mach-jz4740/regs.h> ++#include <asm/mach-jz4740/ops.h> ++#include <asm/mach-jz4740/dma.h> ++#include <asm/mach-jz4740/misc.h> ++ ++/*------------------------------------------------------------------ ++ * Platform definitions ++ */ ++#ifdef CONFIG_JZ4740_PAVO ++#include <asm/mach-jz4740/board-pavo.h> ++#endif ++ ++#ifdef CONFIG_JZ4740_LEO ++#include <asm/mach-jz4740/board-leo.h> ++#endif ++ ++#ifdef CONFIG_JZ4740_LYRA ++#include <asm/mach-jz4740/board-lyra.h> ++#endif ++ ++#ifdef CONFIG_JZ4725_DIPPER ++#include <asm/mach-jz4740/board-dipper.h> ++#endif ++ ++#ifdef CONFIG_JZ4720_VIRGO ++#include <asm/mach-jz4740/board-virgo.h> ++#endif ++ ++#ifdef CONFIG_JZ4740_QI_LB60 ++#include <asm/mach-jz4740/board-qi_lb60.h> ++#endif ++ ++/* Add other platform definition here ... */ ++ ++ ++/*------------------------------------------------------------------ ++ * Follows are related to platform definitions ++ */ ++ ++#include <asm/mach-jz4740/clock.h> ++#include <asm/mach-jz4740/serial.h> ++ ++#endif /* __ASM_JZ4740_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/misc.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/misc.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/misc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/misc.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,43 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/misc.h ++ * ++ * Ingenic's JZ4740 common include. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <yliu@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_MISC_H__ ++#define __ASM_JZ4740_MISC_H__ ++ ++/*========================================================== ++ * I2C ++ *===========================================================*/ ++ ++#define I2C_EEPROM_DEV 0xA /* b'1010 */ ++#define I2C_RTC_DEV 0xD /* b'1101 */ ++#define DIMM0_SPD_ADDR 0 ++#define DIMM1_SPD_ADDR 1 ++#define DIMM2_SPD_ADDR 2 ++#define DIMM3_SPD_ADDR 3 ++#define JZ_HCI_ADDR 7 ++ ++#define DIMM_SPD_LEN 128 ++#define JZ_HCI_LEN 512 /* 4K bits E2PROM */ ++#define I2C_RTC_LEN 16 ++#define HCI_MAC_OFFSET 64 ++ ++extern void i2c_open(void); ++extern void i2c_close(void); ++extern void i2c_setclk(unsigned int i2cclk); ++extern int i2c_read(unsigned char device, unsigned char *buf, ++ unsigned char address, int count); ++extern int i2c_write(unsigned char device, unsigned char *buf, ++ unsigned char address, int count); ++ ++#endif /* __ASM_JZ4740_MISC_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/ops.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/ops.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/ops.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/ops.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,2224 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/ops.h ++ * ++ * Ingenic's JZ4740 common include. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <yliu@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++ ++#ifndef __JZ4740_OPS_H__ ++#define __JZ4740_OPS_H__ ++ ++/* ++ * Definition of Module Operations ++ */ ++ ++/*************************************************************************** ++ * GPIO ++ ***************************************************************************/ ++ ++//------------------------------------------------------ ++// GPIO Pins Description ++// ++// PORT 0: ++// ++// PIN/BIT N FUNC0 FUNC1 ++// 0 D0 - ++// 1 D1 - ++// 2 D2 - ++// 3 D3 - ++// 4 D4 - ++// 5 D5 - ++// 6 D6 - ++// 7 D7 - ++// 8 D8 - ++// 9 D9 - ++// 10 D10 - ++// 11 D11 - ++// 12 D12 - ++// 13 D13 - ++// 14 D14 - ++// 15 D15 - ++// 16 D16 - ++// 17 D17 - ++// 18 D18 - ++// 19 D19 - ++// 20 D20 - ++// 21 D21 - ++// 22 D22 - ++// 23 D23 - ++// 24 D24 - ++// 25 D25 - ++// 26 D26 - ++// 27 D27 - ++// 28 D28 - ++// 29 D29 - ++// 30 D30 - ++// 31 D31 - ++// ++//------------------------------------------------------ ++// PORT 1: ++// ++// PIN/BIT N FUNC0 FUNC1 ++// 0 A0 - ++// 1 A1 - ++// 2 A2 - ++// 3 A3 - ++// 4 A4 - ++// 5 A5 - ++// 6 A6 - ++// 7 A7 - ++// 8 A8 - ++// 9 A9 - ++// 10 A10 - ++// 11 A11 - ++// 12 A12 - ++// 13 A13 - ++// 14 A14 - ++// 15 A15/CL - ++// 16 A16/AL - ++// 17 LCD_CLS A21 ++// 18 LCD_SPL A22 ++// 19 DCS# - ++// 20 RAS# - ++// 21 CAS# - ++// 22 RDWE#/BUFD# - ++// 23 CKE - ++// 24 CKO - ++// 25 CS1# - ++// 26 CS2# - ++// 27 CS3# - ++// 28 CS4# - ++// 29 RD# - ++// 30 WR# - ++// 31 WE0# - ++// ++// Note: PIN15&16 are CL&AL when connecting to NAND flash. ++//------------------------------------------------------ ++// PORT 2: ++// ++// PIN/BIT N FUNC0 FUNC1 ++// 0 LCD_D0 - ++// 1 LCD_D1 - ++// 2 LCD_D2 - ++// 3 LCD_D3 - ++// 4 LCD_D4 - ++// 5 LCD_D5 - ++// 6 LCD_D6 - ++// 7 LCD_D7 - ++// 8 LCD_D8 - ++// 9 LCD_D9 - ++// 10 LCD_D10 - ++// 11 LCD_D11 - ++// 12 LCD_D12 - ++// 13 LCD_D13 - ++// 14 LCD_D14 - ++// 15 LCD_D15 - ++// 16 LCD_D16 - ++// 17 LCD_D17 - ++// 18 LCD_PCLK - ++// 19 LCD_HSYNC - ++// 20 LCD_VSYNC - ++// 21 LCD_DE - ++// 22 LCD_PS A19 ++// 23 LCD_REV A20 ++// 24 WE1# - ++// 25 WE2# - ++// 26 WE3# - ++// 27 WAIT# - ++// 28 FRE# - ++// 29 FWE# - ++// 30(NOTE:FRB#) - - ++// 31 - - ++// ++// NOTE(1): PIN30 is used for FRB# when connecting to NAND flash. ++//------------------------------------------------------ ++// PORT 3: ++// ++// PIN/BIT N FUNC0 FUNC1 ++// 0 CIM_D0 - ++// 1 CIM_D1 - ++// 2 CIM_D2 - ++// 3 CIM_D3 - ++// 4 CIM_D4 - ++// 5 CIM_D5 - ++// 6 CIM_D6 - ++// 7 CIM_D7 - ++// 8 MSC_CMD - ++// 9 MSC_CLK - ++// 10 MSC_D0 - ++// 11 MSC_D1 - ++// 12 MSC_D2 - ++// 13 MSC_D3 - ++// 14 CIM_MCLK - ++// 15 CIM_PCLK - ++// 16 CIM_VSYNC - ++// 17 CIM_HSYNC - ++// 18 SSI_CLK SCLK_RSTN ++// 19 SSI_CE0# BIT_CLK(AIC) ++// 20 SSI_DT SDATA_OUT(AIC) ++// 21 SSI_DR SDATA_IN(AIC) ++// 22 SSI_CE1#&GPC SYNC(AIC) ++// 23 PWM0 I2C_SDA ++// 24 PWM1 I2C_SCK ++// 25 PWM2 UART0_TxD ++// 26 PWM3 UART0_RxD ++// 27 PWM4 A17 ++// 28 PWM5 A18 ++// 29 - - ++// 30 PWM6 UART0_CTS/UART1_RxD ++// 31 PWM7 UART0_RTS/UART1_TxD ++// ++////////////////////////////////////////////////////////// ++ ++/* ++ * p is the port number (0,1,2,3) ++ * o is the pin offset (0-31) inside the port ++ * n is the absolute number of a pin (0-127), regardless of the port ++ */ ++ ++//------------------------------------------- ++// Function Pins Mode ++ ++#define __gpio_as_func0(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXFUNS(p) = (1 << o); \ ++ REG_GPIO_PXSELC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_as_func1(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXFUNS(p) = (1 << o); \ ++ REG_GPIO_PXSELS(p) = (1 << o); \ ++} while (0) ++ ++/* ++ * D0 ~ D31, A0 ~ A16, DCS#, RAS#, CAS#, CKE#, ++ * RDWE#, CKO#, WE0#, WE1#, WE2#, WE3# ++ */ ++#define __gpio_as_sdram_32bit() \ ++do { \ ++ REG_GPIO_PXFUNS(0) = 0xffffffff; \ ++ REG_GPIO_PXSELC(0) = 0xffffffff; \ ++ REG_GPIO_PXPES(0) = 0xffffffff; \ ++ REG_GPIO_PXFUNS(1) = 0x81f9ffff; \ ++ REG_GPIO_PXSELC(1) = 0x81f9ffff; \ ++ REG_GPIO_PXPES(1) = 0x81f9ffff; \ ++ REG_GPIO_PXFUNS(2) = 0x07000000; \ ++ REG_GPIO_PXSELC(2) = 0x07000000; \ ++ REG_GPIO_PXPES(2) = 0x07000000; \ ++} while (0) ++ ++/* ++ * D0 ~ D15, A0 ~ A16, DCS#, RAS#, CAS#, CKE#, ++ * RDWE#, CKO#, WE0#, WE1# ++ */ ++#define __gpio_as_sdram_16bit() \ ++do { \ ++ REG_GPIO_PXFUNS(0) = 0x5442bfaa; \ ++ REG_GPIO_PXSELC(0) = 0x5442bfaa; \ ++ REG_GPIO_PXPES(0) = 0x5442bfaa; \ ++ REG_GPIO_PXFUNS(1) = 0x81f9ffff; \ ++ REG_GPIO_PXSELC(1) = 0x81f9ffff; \ ++ REG_GPIO_PXPES(1) = 0x81f9ffff; \ ++ REG_GPIO_PXFUNS(2) = 0x01000000; \ ++ REG_GPIO_PXSELC(2) = 0x01000000; \ ++ REG_GPIO_PXPES(2) = 0x01000000; \ ++} while (0) ++ ++/* ++ * CS1#, CLE, ALE, FRE#, FWE#, FRB#, RDWE#/BUFD# ++ */ ++#define __gpio_as_nand() \ ++do { \ ++ REG_GPIO_PXFUNS(1) = 0x02018000; \ ++ REG_GPIO_PXSELC(1) = 0x02018000; \ ++ REG_GPIO_PXPES(1) = 0x02018000; \ ++ REG_GPIO_PXFUNS(2) = 0x30000000; \ ++ REG_GPIO_PXSELC(2) = 0x30000000; \ ++ REG_GPIO_PXPES(2) = 0x30000000; \ ++ REG_GPIO_PXFUNC(2) = 0x40000000; \ ++ REG_GPIO_PXSELC(2) = 0x40000000; \ ++ REG_GPIO_PXDIRC(2) = 0x40000000; \ ++ REG_GPIO_PXPES(2) = 0x40000000; \ ++ REG_GPIO_PXFUNS(1) = 0x00400000; \ ++ REG_GPIO_PXSELC(1) = 0x00400000; \ ++} while (0) ++ ++/* ++ * CS4#, RD#, WR#, WAIT#, A0 ~ A22, D0 ~ D7 ++ */ ++#define __gpio_as_nor_8bit() \ ++do { \ ++ REG_GPIO_PXFUNS(0) = 0x000000ff; \ ++ REG_GPIO_PXSELC(0) = 0x000000ff; \ ++ REG_GPIO_PXPES(0) = 0x000000ff; \ ++ REG_GPIO_PXFUNS(1) = 0x7041ffff; \ ++ REG_GPIO_PXSELC(1) = 0x7041ffff; \ ++ REG_GPIO_PXPES(1) = 0x7041ffff; \ ++ REG_GPIO_PXFUNS(1) = 0x00060000; \ ++ REG_GPIO_PXSELS(1) = 0x00060000; \ ++ REG_GPIO_PXPES(1) = 0x00060000; \ ++ REG_GPIO_PXFUNS(2) = 0x08000000; \ ++ REG_GPIO_PXSELC(2) = 0x08000000; \ ++ REG_GPIO_PXPES(2) = 0x08000000; \ ++ REG_GPIO_PXFUNS(2) = 0x00c00000; \ ++ REG_GPIO_PXSELS(2) = 0x00c00000; \ ++ REG_GPIO_PXPES(2) = 0x00c00000; \ ++ REG_GPIO_PXFUNS(3) = 0x18000000; \ ++ REG_GPIO_PXSELS(3) = 0x18000000; \ ++ REG_GPIO_PXPES(3) = 0x18000000; \ ++} while (0) ++ ++/* ++ * CS4#, RD#, WR#, WAIT#, A0 ~ A22, D0 ~ D15 ++ */ ++#define __gpio_as_nor_16bit() \ ++do { \ ++ REG_GPIO_PXFUNS(0) = 0x0000ffff; \ ++ REG_GPIO_PXSELC(0) = 0x0000ffff; \ ++ REG_GPIO_PXPES(0) = 0x0000ffff; \ ++ REG_GPIO_PXFUNS(1) = 0x7041ffff; \ ++ REG_GPIO_PXSELC(1) = 0x7041ffff; \ ++ REG_GPIO_PXPES(1) = 0x7041ffff; \ ++ REG_GPIO_PXFUNS(1) = 0x00060000; \ ++ REG_GPIO_PXSELS(1) = 0x00060000; \ ++ REG_GPIO_PXPES(1) = 0x00060000; \ ++ REG_GPIO_PXFUNS(2) = 0x08000000; \ ++ REG_GPIO_PXSELC(2) = 0x08000000; \ ++ REG_GPIO_PXPES(2) = 0x08000000; \ ++ REG_GPIO_PXFUNS(2) = 0x00c00000; \ ++ REG_GPIO_PXSELS(2) = 0x00c00000; \ ++ REG_GPIO_PXPES(2) = 0x00c00000; \ ++ REG_GPIO_PXFUNS(3) = 0x18000000; \ ++ REG_GPIO_PXSELS(3) = 0x18000000; \ ++ REG_GPIO_PXPES(3) = 0x18000000; \ ++} while (0) ++ ++/* ++ * UART0_TxD, UART_RxD0 ++ */ ++#define __gpio_as_uart0() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x06000000; \ ++ REG_GPIO_PXSELS(3) = 0x06000000; \ ++ REG_GPIO_PXPES(3) = 0x06000000; \ ++} while (0) ++ ++/* ++ * UART0_CTS, UART0_RTS ++ */ ++#define __gpio_as_ctsrts() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0xc0000000; \ ++ REG_GPIO_PXSELS(3) = 0xc0000000; \ ++ REG_GPIO_PXTRGC(3) = 0xc0000000; \ ++ REG_GPIO_PXPES(3) = 0xc0000000; \ ++} while (0) ++ ++/* ++ * UART1_TxD, UART1_RxD1 ++ */ ++#define __gpio_as_uart1() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0xc0000000; \ ++ REG_GPIO_PXSELC(3) = 0xc0000000; \ ++ REG_GPIO_PXTRGS(3) = 0xc0000000; \ ++ REG_GPIO_PXPES(3) = 0xc0000000; \ ++} while (0) ++ ++/* ++ * LCD_D0~LCD_D15, LCD_PCLK, LCD_HSYNC, LCD_VSYNC, LCD_DE ++ */ ++#define __gpio_as_lcd_16bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x003cffff; \ ++ REG_GPIO_PXSELC(2) = 0x003cffff; \ ++ REG_GPIO_PXPES(2) = 0x003cffff; \ ++} while (0) ++ ++/* ++ * LCD_D0~LCD_D17, LCD_PCLK, LCD_HSYNC, LCD_VSYNC, LCD_DE ++ */ ++#define __gpio_as_lcd_18bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x003fffff; \ ++ REG_GPIO_PXSELC(2) = 0x003fffff; \ ++ REG_GPIO_PXPES(2) = 0x003fffff; \ ++} while (0) ++ ++/* ++ * LCD_PS, LCD_REV, LCD_CLS, LCD_SPL ++ */ ++#define __gpio_as_lcd_special() \ ++do { \ ++ REG_GPIO_PXFUNS(1) = 0x00060000; \ ++ REG_GPIO_PXSELC(1) = 0x00060000; \ ++ REG_GPIO_PXPES(1) = 0x00060000; \ ++ REG_GPIO_PXFUNS(2) = 0x00c00000; \ ++ REG_GPIO_PXSELC(2) = 0x00c00000; \ ++ REG_GPIO_PXPES(2) = 0x00c00000; \ ++} while (0) ++ ++/* LCD_D0~LCD_D7, SLCD_RS, SLCD_CS */ ++#define __gpio_as_slcd_8bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x001800ff; \ ++ REG_GPIO_PXSELC(2) = 0x001800ff; \ ++} while (0) ++ ++/* LCD_D0~LCD_D7, SLCD_RS, SLCD_CS */ ++#define __gpio_as_slcd_9bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x001801ff; \ ++ REG_GPIO_PXSELC(2) = 0x001801ff; \ ++} while (0) ++ ++/* LCD_D0~LCD_D15, SLCD_RS, SLCD_CS */ ++#define __gpio_as_slcd_16bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x0018ffff; \ ++ REG_GPIO_PXSELC(2) = 0x0018ffff; \ ++} while (0) ++ ++/* LCD_D0~LCD_D17, SLCD_RS, SLCD_CS */ ++#define __gpio_as_slcd_18bit() \ ++do { \ ++ REG_GPIO_PXFUNS(2) = 0x001bffff; \ ++ REG_GPIO_PXSELC(2) = 0x001bffff; \ ++} while (0) ++ ++/* ++ * CIM_D0~CIM_D7, CIM_MCLK, CIM_PCLK, CIM_VSYNC, CIM_HSYNC ++ */ ++#define __gpio_as_cim() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x0003c0ff; \ ++ REG_GPIO_PXSELC(3) = 0x0003c0ff; \ ++ REG_GPIO_PXPES(3) = 0x0003c0ff; \ ++} while (0) ++ ++/* ++ * SDATA_OUT, SDATA_IN, BIT_CLK, SYNC, SCLK_RESET ++ */ ++#define __gpio_as_aic() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x007c0000; \ ++ REG_GPIO_PXSELS(3) = 0x007c0000; \ ++ REG_GPIO_PXPES(3) = 0x007c0000; \ ++} while (0) ++ ++/* ++ * MSC_CMD, MSC_CLK, MSC_D0 ~ MSC_D3 ++ */ ++#define __gpio_as_msc() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x00003f00; \ ++ REG_GPIO_PXSELC(3) = 0x00003f00; \ ++ REG_GPIO_PXPES(3) = 0x00003f00; \ ++} while (0) ++ ++/* ++ * SSI_CS0, SSI_CLK, SSI_DT, SSI_DR ++ */ ++#define __gpio_as_ssi() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x003c0000; \ ++ REG_GPIO_PXSELC(3) = 0x003c0000; \ ++ REG_GPIO_PXPES(3) = 0x003c0000; \ ++} while (0) ++ ++/* ++ * I2C_SCK, I2C_SDA ++ */ ++#define __gpio_as_i2c() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x01800000; \ ++ REG_GPIO_PXSELS(3) = 0x01800000; \ ++ REG_GPIO_PXPES(3) = 0x01800000; \ ++} while (0) ++ ++/* ++ * PWM0 ++ */ ++#define __gpio_as_pwm0() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x00800000; \ ++ REG_GPIO_PXSELC(3) = 0x00800000; \ ++ REG_GPIO_PXPES(3) = 0x00800000; \ ++} while (0) ++ ++/* ++ * PWM1 ++ */ ++#define __gpio_as_pwm1() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x01000000; \ ++ REG_GPIO_PXSELC(3) = 0x01000000; \ ++ REG_GPIO_PXPES(3) = 0x01000000; \ ++} while (0) ++ ++/* ++ * PWM2 ++ */ ++#define __gpio_as_pwm2() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x02000000; \ ++ REG_GPIO_PXSELC(3) = 0x02000000; \ ++ REG_GPIO_PXPES(3) = 0x02000000; \ ++} while (0) ++ ++/* ++ * PWM3 ++ */ ++#define __gpio_as_pwm3() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x04000000; \ ++ REG_GPIO_PXSELC(3) = 0x04000000; \ ++ REG_GPIO_PXPES(3) = 0x04000000; \ ++} while (0) ++ ++/* ++ * PWM4 ++ */ ++#define __gpio_as_pwm4() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x08000000; \ ++ REG_GPIO_PXSELC(3) = 0x08000000; \ ++ REG_GPIO_PXPES(3) = 0x08000000; \ ++} while (0) ++ ++/* ++ * PWM5 ++ */ ++#define __gpio_as_pwm5() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x10000000; \ ++ REG_GPIO_PXSELC(3) = 0x10000000; \ ++ REG_GPIO_PXPES(3) = 0x10000000; \ ++} while (0) ++ ++/* ++ * PWM6 ++ */ ++#define __gpio_as_pwm6() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x40000000; \ ++ REG_GPIO_PXSELC(3) = 0x40000000; \ ++ REG_GPIO_PXPES(3) = 0x40000000; \ ++} while (0) ++ ++/* ++ * PWM7 ++ */ ++#define __gpio_as_pwm7() \ ++do { \ ++ REG_GPIO_PXFUNS(3) = 0x80000000; \ ++ REG_GPIO_PXSELC(3) = 0x80000000; \ ++ REG_GPIO_PXPES(3) = 0x80000000; \ ++} while (0) ++ ++/* ++ * n = 0 ~ 7 ++ */ ++#define __gpio_as_pwm(n) __gpio_as_pwm##n() ++ ++//------------------------------------------- ++// GPIO or Interrupt Mode ++ ++#define __gpio_get_port(p) (REG_GPIO_PXPIN(p)) ++ ++#define __gpio_port_as_output(p, o) \ ++do { \ ++ REG_GPIO_PXFUNC(p) = (1 << (o)); \ ++ REG_GPIO_PXSELC(p) = (1 << (o)); \ ++ REG_GPIO_PXDIRS(p) = (1 << (o)); \ ++} while (0) ++ ++#define __gpio_port_as_input(p, o) \ ++do { \ ++ REG_GPIO_PXFUNC(p) = (1 << (o)); \ ++ REG_GPIO_PXSELC(p) = (1 << (o)); \ ++ REG_GPIO_PXDIRC(p) = (1 << (o)); \ ++} while (0) ++ ++#define __gpio_as_output(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ __gpio_port_as_output(p, o); \ ++} while (0) ++ ++#define __gpio_as_input(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ __gpio_port_as_input(p, o); \ ++} while (0) ++ ++#define __gpio_set_pin(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXDATS(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_clear_pin(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXDATC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_get_pin(n) \ ++({ \ ++ unsigned int p, o, v; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ if (__gpio_get_port(p) & (1 << o)) \ ++ v = 1; \ ++ else \ ++ v = 0; \ ++ v; \ ++}) ++ ++#define __gpio_as_irq_high_level(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMS(p) = (1 << o); \ ++ REG_GPIO_PXTRGC(p) = (1 << o); \ ++ REG_GPIO_PXFUNC(p) = (1 << o); \ ++ REG_GPIO_PXSELS(p) = (1 << o); \ ++ REG_GPIO_PXDIRS(p) = (1 << o); \ ++ REG_GPIO_PXFLGC(p) = (1 << o); \ ++ REG_GPIO_PXIMC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_as_irq_low_level(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMS(p) = (1 << o); \ ++ REG_GPIO_PXTRGC(p) = (1 << o); \ ++ REG_GPIO_PXFUNC(p) = (1 << o); \ ++ REG_GPIO_PXSELS(p) = (1 << o); \ ++ REG_GPIO_PXDIRC(p) = (1 << o); \ ++ REG_GPIO_PXFLGC(p) = (1 << o); \ ++ REG_GPIO_PXIMC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_as_irq_rise_edge(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMS(p) = (1 << o); \ ++ REG_GPIO_PXTRGS(p) = (1 << o); \ ++ REG_GPIO_PXFUNC(p) = (1 << o); \ ++ REG_GPIO_PXSELS(p) = (1 << o); \ ++ REG_GPIO_PXDIRS(p) = (1 << o); \ ++ REG_GPIO_PXFLGC(p) = (1 << o); \ ++ REG_GPIO_PXIMC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_as_irq_fall_edge(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMS(p) = (1 << o); \ ++ REG_GPIO_PXTRGS(p) = (1 << o); \ ++ REG_GPIO_PXFUNC(p) = (1 << o); \ ++ REG_GPIO_PXSELS(p) = (1 << o); \ ++ REG_GPIO_PXDIRC(p) = (1 << o); \ ++ REG_GPIO_PXFLGC(p) = (1 << o); \ ++ REG_GPIO_PXIMC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_mask_irq(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMS(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_unmask_irq(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXIMC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_ack_irq(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXFLGC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_get_irq() \ ++({ \ ++ unsigned int p, i, tmp, v = 0; \ ++ for (p = 3; p >= 0; p--) { \ ++ tmp = REG_GPIO_PXFLG(p); \ ++ for (i = 0; i < 32; i++) \ ++ if (tmp & (1 << i)) \ ++ v = (32*p + i); \ ++ } \ ++ v; \ ++}) ++ ++#define __gpio_group_irq(n) \ ++({ \ ++ register int tmp, i; \ ++ tmp = REG_GPIO_PXFLG((n)); \ ++ for (i=31;i>=0;i--) \ ++ if (tmp & (1 << i)) \ ++ break; \ ++ i; \ ++}) ++ ++#define __gpio_enable_pull(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXPEC(p) = (1 << o); \ ++} while (0) ++ ++#define __gpio_disable_pull(n) \ ++do { \ ++ unsigned int p, o; \ ++ p = (n) / 32; \ ++ o = (n) % 32; \ ++ REG_GPIO_PXPES(p) = (1 << o); \ ++} while (0) ++ ++ ++/*************************************************************************** ++ * CPM ++ ***************************************************************************/ ++#define __cpm_get_pllm() \ ++ ((REG_CPM_CPPCR & CPM_CPPCR_PLLM_MASK) >> CPM_CPPCR_PLLM_BIT) ++#define __cpm_get_plln() \ ++ ((REG_CPM_CPPCR & CPM_CPPCR_PLLN_MASK) >> CPM_CPPCR_PLLN_BIT) ++#define __cpm_get_pllod() \ ++ ((REG_CPM_CPPCR & CPM_CPPCR_PLLOD_MASK) >> CPM_CPPCR_PLLOD_BIT) ++ ++#define __cpm_get_cdiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_CDIV_MASK) >> CPM_CPCCR_CDIV_BIT) ++#define __cpm_get_hdiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_HDIV_MASK) >> CPM_CPCCR_HDIV_BIT) ++#define __cpm_get_pdiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_PDIV_MASK) >> CPM_CPCCR_PDIV_BIT) ++#define __cpm_get_mdiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_MDIV_MASK) >> CPM_CPCCR_MDIV_BIT) ++#define __cpm_get_ldiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_LDIV_MASK) >> CPM_CPCCR_LDIV_BIT) ++#define __cpm_get_udiv() \ ++ ((REG_CPM_CPCCR & CPM_CPCCR_UDIV_MASK) >> CPM_CPCCR_UDIV_BIT) ++#define __cpm_get_i2sdiv() \ ++ ((REG_CPM_I2SCDR & CPM_I2SCDR_I2SDIV_MASK) >> CPM_I2SCDR_I2SDIV_BIT) ++#define __cpm_get_pixdiv() \ ++ ((REG_CPM_LPCDR & CPM_LPCDR_PIXDIV_MASK) >> CPM_LPCDR_PIXDIV_BIT) ++#define __cpm_get_mscdiv() \ ++ ((REG_CPM_MSCCDR & CPM_MSCCDR_MSCDIV_MASK) >> CPM_MSCCDR_MSCDIV_BIT) ++#define __cpm_get_uhcdiv() \ ++ ((REG_CPM_UHCCDR & CPM_UHCCDR_UHCDIV_MASK) >> CPM_UHCCDR_UHCDIV_BIT) ++#define __cpm_get_ssidiv() \ ++ ((REG_CPM_SSICCDR & CPM_SSICDR_SSICDIV_MASK) >> CPM_SSICDR_SSIDIV_BIT) ++ ++#define __cpm_set_cdiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_CDIV_MASK) | ((v) << (CPM_CPCCR_CDIV_BIT))) ++#define __cpm_set_hdiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_HDIV_MASK) | ((v) << (CPM_CPCCR_HDIV_BIT))) ++#define __cpm_set_pdiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_PDIV_MASK) | ((v) << (CPM_CPCCR_PDIV_BIT))) ++#define __cpm_set_mdiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_MDIV_MASK) | ((v) << (CPM_CPCCR_MDIV_BIT))) ++#define __cpm_set_ldiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_LDIV_MASK) | ((v) << (CPM_CPCCR_LDIV_BIT))) ++#define __cpm_set_udiv(v) \ ++ (REG_CPM_CPCCR = (REG_CPM_CPCCR & ~CPM_CPCCR_UDIV_MASK) | ((v) << (CPM_CPCCR_UDIV_BIT))) ++#define __cpm_set_i2sdiv(v) \ ++ (REG_CPM_I2SCDR = (REG_CPM_I2SCDR & ~CPM_I2SCDR_I2SDIV_MASK) | ((v) << (CPM_I2SCDR_I2SDIV_BIT))) ++#define __cpm_set_pixdiv(v) \ ++ (REG_CPM_LPCDR = (REG_CPM_LPCDR & ~CPM_LPCDR_PIXDIV_MASK) | ((v) << (CPM_LPCDR_PIXDIV_BIT))) ++#define __cpm_set_mscdiv(v) \ ++ (REG_CPM_MSCCDR = (REG_CPM_MSCCDR & ~CPM_MSCCDR_MSCDIV_MASK) | ((v) << (CPM_MSCCDR_MSCDIV_BIT))) ++#define __cpm_set_uhcdiv(v) \ ++ (REG_CPM_UHCCDR = (REG_CPM_UHCCDR & ~CPM_UHCCDR_UHCDIV_MASK) | ((v) << (CPM_UHCCDR_UHCDIV_BIT))) ++#define __cpm_ssiclk_select_exclk() \ ++ (REG_CPM_SSICDR &= ~CPM_SSICDR_SCS) ++#define __cpm_ssiclk_select_pllout() \ ++ (REG_CPM_SSICDR |= CPM_SSICDR_SCS) ++#define __cpm_set_ssidiv(v) \ ++ (REG_CPM_SSICDR = (REG_CPM_SSICDR & ~CPM_SSICDR_SSIDIV_MASK) | ((v) << (CPM_SSICDR_SSIDIV_BIT))) ++ ++#define __cpm_select_i2sclk_exclk() (REG_CPM_CPCCR &= ~CPM_CPCCR_I2CS) ++#define __cpm_select_i2sclk_pll() (REG_CPM_CPCCR |= CPM_CPCCR_I2CS) ++#define __cpm_enable_cko() (REG_CPM_CPCCR |= CPM_CPCCR_CLKOEN) ++#define __cpm_select_usbclk_exclk() (REG_CPM_CPCCR &= ~CPM_CPCCR_UCS) ++#define __cpm_select_usbclk_pll() (REG_CPM_CPCCR |= CPM_CPCCR_UCS) ++#define __cpm_enable_pll_change() (REG_CPM_CPCCR |= CPM_CPCCR_CE) ++#define __cpm_pllout_direct() (REG_CPM_CPCCR |= CPM_CPCCR_PCS) ++#define __cpm_pllout_div2() (REG_CPM_CPCCR &= ~CPM_CPCCR_PCS) ++ ++#define __cpm_pll_is_on() (REG_CPM_CPPCR & CPM_CPPCR_PLLS) ++#define __cpm_pll_bypass() (REG_CPM_CPPCR |= CPM_CPPCR_PLLBP) ++#define __cpm_pll_enable() (REG_CPM_CPPCR |= CPM_CPPCR_PLLEN) ++ ++#define __cpm_get_cclk_doze_duty() \ ++ ((REG_CPM_LCR & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT) ++#define __cpm_set_cclk_doze_duty(v) \ ++ (REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_DOZE_DUTY_MASK) | ((v) << (CPM_LCR_DOZE_DUTY_BIT))) ++ ++#define __cpm_doze_mode() (REG_CPM_LCR |= CPM_LCR_DOZE_ON) ++#define __cpm_idle_mode() \ ++ (REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_LPM_MASK) | CPM_LCR_LPM_IDLE) ++#define __cpm_sleep_mode() \ ++ (REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_LPM_MASK) | CPM_LCR_LPM_SLEEP) ++ ++#define __cpm_stop_all() (REG_CPM_CLKGR = 0x7fff) ++#define __cpm_stop_uart1() (REG_CPM_CLKGR |= CPM_CLKGR_UART1) ++#define __cpm_stop_uhc() (REG_CPM_CLKGR |= CPM_CLKGR_UHC) ++#define __cpm_stop_ipu() (REG_CPM_CLKGR |= CPM_CLKGR_IPU) ++#define __cpm_stop_dmac() (REG_CPM_CLKGR |= CPM_CLKGR_DMAC) ++#define __cpm_stop_udc() (REG_CPM_CLKGR |= CPM_CLKGR_UDC) ++#define __cpm_stop_lcd() (REG_CPM_CLKGR |= CPM_CLKGR_LCD) ++#define __cpm_stop_cim() (REG_CPM_CLKGR |= CPM_CLKGR_CIM) ++#define __cpm_stop_sadc() (REG_CPM_CLKGR |= CPM_CLKGR_SADC) ++#define __cpm_stop_msc() (REG_CPM_CLKGR |= CPM_CLKGR_MSC) ++#define __cpm_stop_aic1() (REG_CPM_CLKGR |= CPM_CLKGR_AIC1) ++#define __cpm_stop_aic2() (REG_CPM_CLKGR |= CPM_CLKGR_AIC2) ++#define __cpm_stop_ssi() (REG_CPM_CLKGR |= CPM_CLKGR_SSI) ++#define __cpm_stop_i2c() (REG_CPM_CLKGR |= CPM_CLKGR_I2C) ++#define __cpm_stop_rtc() (REG_CPM_CLKGR |= CPM_CLKGR_RTC) ++#define __cpm_stop_tcu() (REG_CPM_CLKGR |= CPM_CLKGR_TCU) ++#define __cpm_stop_uart0() (REG_CPM_CLKGR |= CPM_CLKGR_UART0) ++ ++#define __cpm_start_all() (REG_CPM_CLKGR = 0x0) ++#define __cpm_start_uart1() (REG_CPM_CLKGR &= ~CPM_CLKGR_UART1) ++#define __cpm_start_uhc() (REG_CPM_CLKGR &= ~CPM_CLKGR_UHC) ++#define __cpm_start_ipu() (REG_CPM_CLKGR &= ~CPM_CLKGR_IPU) ++#define __cpm_start_dmac() (REG_CPM_CLKGR &= ~CPM_CLKGR_DMAC) ++#define __cpm_start_udc() (REG_CPM_CLKGR &= ~CPM_CLKGR_UDC) ++#define __cpm_start_lcd() (REG_CPM_CLKGR &= ~CPM_CLKGR_LCD) ++#define __cpm_start_cim() (REG_CPM_CLKGR &= ~CPM_CLKGR_CIM) ++#define __cpm_start_sadc() (REG_CPM_CLKGR &= ~CPM_CLKGR_SADC) ++#define __cpm_start_msc() (REG_CPM_CLKGR &= ~CPM_CLKGR_MSC) ++#define __cpm_start_aic1() (REG_CPM_CLKGR &= ~CPM_CLKGR_AIC1) ++#define __cpm_start_aic2() (REG_CPM_CLKGR &= ~CPM_CLKGR_AIC2) ++#define __cpm_start_ssi() (REG_CPM_CLKGR &= ~CPM_CLKGR_SSI) ++#define __cpm_start_i2c() (REG_CPM_CLKGR &= ~CPM_CLKGR_I2C) ++#define __cpm_start_rtc() (REG_CPM_CLKGR &= ~CPM_CLKGR_RTC) ++#define __cpm_start_tcu() (REG_CPM_CLKGR &= ~CPM_CLKGR_TCU) ++#define __cpm_start_uart0() (REG_CPM_CLKGR &= ~CPM_CLKGR_UART0) ++ ++#define __cpm_get_o1st() \ ++ ((REG_CPM_SCR & CPM_SCR_O1ST_MASK) >> CPM_SCR_O1ST_BIT) ++#define __cpm_set_o1st(v) \ ++ (REG_CPM_SCR = (REG_CPM_SCR & ~CPM_SCR_O1ST_MASK) | ((v) << (CPM_SCR_O1ST_BIT))) ++#define __cpm_suspend_usbphy() (REG_CPM_SCR |= CPM_SCR_USBPHY_SUSPEND) ++#define __cpm_enable_osc_in_sleep() (REG_CPM_SCR |= CPM_SCR_OSC_ENABLE) ++ ++ ++/*************************************************************************** ++ * TCU ++ ***************************************************************************/ ++// where 'n' is the TCU channel ++#define __tcu_select_extalclk(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~(TCU_TCSR_EXT_EN | TCU_TCSR_RTC_EN | TCU_TCSR_PCK_EN)) | TCU_TCSR_EXT_EN) ++#define __tcu_select_rtcclk(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~(TCU_TCSR_EXT_EN | TCU_TCSR_RTC_EN | TCU_TCSR_PCK_EN)) | TCU_TCSR_RTC_EN) ++#define __tcu_select_pclk(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~(TCU_TCSR_EXT_EN | TCU_TCSR_RTC_EN | TCU_TCSR_PCK_EN)) | TCU_TCSR_PCK_EN) ++ ++#define __tcu_select_clk_div1(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE1) ++#define __tcu_select_clk_div4(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE4) ++#define __tcu_select_clk_div16(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE16) ++#define __tcu_select_clk_div64(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE64) ++#define __tcu_select_clk_div256(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE256) ++#define __tcu_select_clk_div1024(n) \ ++ (REG_TCU_TCSR((n)) = (REG_TCU_TCSR((n)) & ~TCU_TCSR_PRESCALE_MASK) | TCU_TCSR_PRESCALE1024) ++ ++#define __tcu_enable_pwm_output(n) ( REG_TCU_TCSR((n)) |= TCU_TCSR_PWM_EN ) ++#define __tcu_disable_pwm_output(n) ( REG_TCU_TCSR((n)) &= ~TCU_TCSR_PWM_EN ) ++ ++#define __tcu_init_pwm_output_high(n) ( REG_TCU_TCSR((n)) |= TCU_TCSR_PWM_INITL_HIGH ) ++#define __tcu_init_pwm_output_low(n) ( REG_TCU_TCSR((n)) &= ~TCU_TCSR_PWM_INITL_HIGH ) ++ ++#define __tcu_set_pwm_output_shutdown_graceful(n) ( REG_TCU_TCSR((n)) &= ~TCU_TCSR_PWM_SD ) ++#define __tcu_set_pwm_output_shutdown_abrupt(n) ( REG_TCU_TCSR((n)) |= TCU_TCSR_PWM_SD ) ++ ++#define __tcu_start_counter(n) ( REG_TCU_TESR |= (1 << (n)) ) ++#define __tcu_stop_counter(n) ( REG_TCU_TECR |= (1 << (n)) ) ++ ++#define __tcu_half_match_flag(n) ( REG_TCU_TFR & (1 << ((n) + 16)) ) ++#define __tcu_full_match_flag(n) ( REG_TCU_TFR & (1 << (n)) ) ++#define __tcu_set_half_match_flag(n) ( REG_TCU_TFSR = (1 << ((n) + 16)) ) ++#define __tcu_set_full_match_flag(n) ( REG_TCU_TFSR = (1 << (n)) ) ++#define __tcu_clear_half_match_flag(n) ( REG_TCU_TFCR = (1 << ((n) + 16)) ) ++#define __tcu_clear_full_match_flag(n) ( REG_TCU_TFCR = (1 << (n)) ) ++#define __tcu_mask_half_match_irq(n) ( REG_TCU_TMSR = (1 << ((n) + 16)) ) ++#define __tcu_mask_full_match_irq(n) ( REG_TCU_TMSR = (1 << (n)) ) ++#define __tcu_unmask_half_match_irq(n) ( REG_TCU_TMCR = (1 << ((n) + 16)) ) ++#define __tcu_unmask_full_match_irq(n) ( REG_TCU_TMCR = (1 << (n)) ) ++ ++#define __tcu_wdt_clock_stopped() ( REG_TCU_TSR & TCU_TSSR_WDTSC ) ++#define __tcu_timer_clock_stopped(n) ( REG_TCU_TSR & (1 << (n)) ) ++ ++#define __tcu_start_wdt_clock() ( REG_TCU_TSCR = TCU_TSSR_WDTSC ) ++#define __tcu_start_timer_clock(n) ( REG_TCU_TSCR = (1 << (n)) ) ++ ++#define __tcu_stop_wdt_clock() ( REG_TCU_TSSR = TCU_TSSR_WDTSC ) ++#define __tcu_stop_timer_clock(n) ( REG_TCU_TSSR = (1 << (n)) ) ++ ++#define __tcu_get_count(n) ( REG_TCU_TCNT((n)) ) ++#define __tcu_set_count(n,v) ( REG_TCU_TCNT((n)) = (v) ) ++#define __tcu_set_full_data(n,v) ( REG_TCU_TDFR((n)) = (v) ) ++#define __tcu_set_half_data(n,v) ( REG_TCU_TDHR((n)) = (v) ) ++ ++ ++/*************************************************************************** ++ * WDT ++ ***************************************************************************/ ++#define __wdt_start() ( REG_WDT_TCER |= WDT_TCER_TCEN ) ++#define __wdt_stop() ( REG_WDT_TCER &= ~WDT_TCER_TCEN ) ++#define __wdt_set_count(v) ( REG_WDT_TCNT = (v) ) ++#define __wdt_set_data(v) ( REG_WDT_TDR = (v) ) ++ ++#define __wdt_select_extalclk() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~(WDT_TCSR_EXT_EN | WDT_TCSR_RTC_EN | WDT_TCSR_PCK_EN)) | WDT_TCSR_EXT_EN) ++#define __wdt_select_rtcclk() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~(WDT_TCSR_EXT_EN | WDT_TCSR_RTC_EN | WDT_TCSR_PCK_EN)) | WDT_TCSR_RTC_EN) ++#define __wdt_select_pclk() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~(WDT_TCSR_EXT_EN | WDT_TCSR_RTC_EN | WDT_TCSR_PCK_EN)) | WDT_TCSR_PCK_EN) ++ ++#define __wdt_select_clk_div1() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE1) ++#define __wdt_select_clk_div4() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE4) ++#define __wdt_select_clk_div16() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE16) ++#define __wdt_select_clk_div64() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE64) ++#define __wdt_select_clk_div256() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE256) ++#define __wdt_select_clk_div1024() \ ++ (REG_WDT_TCSR = (REG_WDT_TCSR & ~WDT_TCSR_PRESCALE_MASK) | WDT_TCSR_PRESCALE1024) ++ ++ ++/*************************************************************************** ++ * UART ++ ***************************************************************************/ ++ ++#define __uart_enable(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_FCR) |= UARTFCR_UUE | UARTFCR_FE ) ++#define __uart_disable(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_FCR) = ~UARTFCR_UUE ) ++ ++#define __uart_enable_transmit_irq(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_IER) |= UARTIER_TIE ) ++#define __uart_disable_transmit_irq(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_IER) &= ~UARTIER_TIE ) ++ ++#define __uart_enable_receive_irq(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_IER) |= UARTIER_RIE | UARTIER_RLIE | UARTIER_RTIE ) ++#define __uart_disable_receive_irq(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_IER) &= ~(UARTIER_RIE | UARTIER_RLIE | UARTIER_RTIE) ) ++ ++#define __uart_enable_loopback(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_MCR) |= UARTMCR_LOOP ) ++#define __uart_disable_loopback(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_MCR) &= ~UARTMCR_LOOP ) ++ ++#define __uart_set_8n1(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_LCR) = UARTLCR_WLEN_8 ) ++ ++#define __uart_set_baud(n, devclk, baud) \ ++ do { \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_LCR) |= UARTLCR_DLAB; \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_DLLR) = (devclk / 16 / baud) & 0xff; \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_DLHR) = ((devclk / 16 / baud) >> 8) & 0xff; \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_LCR) &= ~UARTLCR_DLAB; \ ++ } while (0) ++ ++#define __uart_parity_error(n) \ ++ ( (REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) & UARTLSR_PER) != 0 ) ++ ++#define __uart_clear_errors(n) \ ++ ( REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) &= ~(UARTLSR_ORER | UARTLSR_BRK | UARTLSR_FER | UARTLSR_PER | UARTLSR_RFER) ) ++ ++#define __uart_transmit_fifo_empty(n) \ ++ ( (REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) & UARTLSR_TDRQ) != 0 ) ++ ++#define __uart_transmit_end(n) \ ++ ( (REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) & UARTLSR_TEMT) != 0 ) ++ ++#define __uart_transmit_char(n, ch) \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_TDR) = (ch) ++ ++#define __uart_receive_fifo_full(n) \ ++ ( (REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) & UARTLSR_DR) != 0 ) ++ ++#define __uart_receive_ready(n) \ ++ ( (REG8(UART_BASE + UART_OFF*(n) + OFF_LSR) & UARTLSR_DR) != 0 ) ++ ++#define __uart_receive_char(n) \ ++ REG8(UART_BASE + UART_OFF*(n) + OFF_RDR) ++ ++#define __uart_disable_irda() \ ++ ( REG8(IRDA_BASE + OFF_SIRCR) &= ~(SIRCR_TSIRE | SIRCR_RSIRE) ) ++#define __uart_enable_irda() \ ++ /* Tx high pulse as 0, Rx low pulse as 0 */ \ ++ ( REG8(IRDA_BASE + OFF_SIRCR) = SIRCR_TSIRE | SIRCR_RSIRE | SIRCR_RXPL | SIRCR_TPWS ) ++ ++ ++/*************************************************************************** ++ * DMAC ++ ***************************************************************************/ ++ ++/* n is the DMA channel (0 - 5) */ ++ ++#define __dmac_enable_module() \ ++ ( REG_DMAC_DMACR |= DMAC_DMACR_DMAE | DMAC_DMACR_PR_RR ) ++#define __dmac_disable_module() \ ++ ( REG_DMAC_DMACR &= ~DMAC_DMACR_DMAE ) ++ ++/* p=0,1,2,3 */ ++#define __dmac_set_priority(p) \ ++do { \ ++ REG_DMAC_DMACR &= ~DMAC_DMACR_PR_MASK; \ ++ REG_DMAC_DMACR |= ((p) << DMAC_DMACR_PR_BIT); \ ++} while (0) ++ ++#define __dmac_test_halt_error() ( REG_DMAC_DMACR & DMAC_DMACR_HLT ) ++#define __dmac_test_addr_error() ( REG_DMAC_DMACR & DMAC_DMACR_AR ) ++ ++#define __dmac_enable_descriptor(n) \ ++ ( REG_DMAC_DCCSR((n)) &= ~DMAC_DCCSR_NDES ) ++#define __dmac_disable_descriptor(n) \ ++ ( REG_DMAC_DCCSR((n)) |= DMAC_DCCSR_NDES ) ++ ++#define __dmac_enable_channel(n) \ ++ ( REG_DMAC_DCCSR((n)) |= DMAC_DCCSR_EN ) ++#define __dmac_disable_channel(n) \ ++ ( REG_DMAC_DCCSR((n)) &= ~DMAC_DCCSR_EN ) ++#define __dmac_channel_enabled(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_EN ) ++ ++#define __dmac_channel_enable_irq(n) \ ++ ( REG_DMAC_DCMD((n)) |= DMAC_DCMD_TIE ) ++#define __dmac_channel_disable_irq(n) \ ++ ( REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_TIE ) ++ ++#define __dmac_channel_transmit_halt_detected(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_HLT ) ++#define __dmac_channel_transmit_end_detected(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_TT ) ++#define __dmac_channel_address_error_detected(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_AR ) ++#define __dmac_channel_count_terminated_detected(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_CT ) ++#define __dmac_channel_descriptor_invalid_detected(n) \ ++ ( REG_DMAC_DCCSR((n)) & DMAC_DCCSR_INV ) ++ ++#define __dmac_channel_clear_transmit_halt(n) \ ++ ( REG_DMAC_DCCSR(n) &= ~DMAC_DCCSR_HLT ) ++#define __dmac_channel_clear_transmit_end(n) \ ++ ( REG_DMAC_DCCSR(n) &= ~DMAC_DCCSR_TT ) ++#define __dmac_channel_clear_address_error(n) \ ++ ( REG_DMAC_DCCSR(n) &= ~DMAC_DCCSR_AR ) ++#define __dmac_channel_clear_count_terminated(n) \ ++ ( REG_DMAC_DCCSR((n)) &= ~DMAC_DCCSR_CT ) ++#define __dmac_channel_clear_descriptor_invalid(n) \ ++ ( REG_DMAC_DCCSR((n)) &= ~DMAC_DCCSR_INV ) ++ ++#define __dmac_channel_set_single_mode(n) \ ++ ( REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_TM ) ++#define __dmac_channel_set_block_mode(n) \ ++ ( REG_DMAC_DCMD((n)) |= DMAC_DCMD_TM ) ++ ++#define __dmac_channel_set_transfer_unit_32bit(n) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DS_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DS_32BIT; \ ++} while (0) ++ ++#define __dmac_channel_set_transfer_unit_16bit(n) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DS_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DS_16BIT; \ ++} while (0) ++ ++#define __dmac_channel_set_transfer_unit_8bit(n) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DS_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DS_8BIT; \ ++} while (0) ++ ++#define __dmac_channel_set_transfer_unit_16byte(n) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DS_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DS_16BYTE; \ ++} while (0) ++ ++#define __dmac_channel_set_transfer_unit_32byte(n) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DS_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DS_32BYTE; \ ++} while (0) ++ ++/* w=8,16,32 */ ++#define __dmac_channel_set_dest_port_width(n,w) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DWDH_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_DWDH_##w; \ ++} while (0) ++ ++/* w=8,16,32 */ ++#define __dmac_channel_set_src_port_width(n,w) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_SWDH_MASK; \ ++ REG_DMAC_DCMD((n)) |= DMAC_DCMD_SWDH_##w; \ ++} while (0) ++ ++/* v=0-15 */ ++#define __dmac_channel_set_rdil(n,v) \ ++do { \ ++ REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_RDIL_MASK; \ ++ REG_DMAC_DCMD((n) |= ((v) << DMAC_DCMD_RDIL_BIT); \ ++} while (0) ++ ++#define __dmac_channel_dest_addr_fixed(n) \ ++ ( REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_DAI ) ++#define __dmac_channel_dest_addr_increment(n) \ ++ ( REG_DMAC_DCMD((n)) |= DMAC_DCMD_DAI ) ++ ++#define __dmac_channel_src_addr_fixed(n) \ ++ ( REG_DMAC_DCMD((n)) &= ~DMAC_DCMD_SAI ) ++#define __dmac_channel_src_addr_increment(n) \ ++ ( REG_DMAC_DCMD((n)) |= DMAC_DCMD_SAI ) ++ ++#define __dmac_channel_set_doorbell(n) \ ++ ( REG_DMAC_DMADBSR = (1 << (n)) ) ++ ++#define __dmac_channel_irq_detected(n) ( REG_DMAC_DMAIPR & (1 << (n)) ) ++#define __dmac_channel_ack_irq(n) ( REG_DMAC_DMAIPR &= ~(1 << (n)) ) ++ ++static __inline__ int __dmac_get_irq(void) ++{ ++ int i; ++ for (i = 0; i < MAX_DMA_NUM; i++) ++ if (__dmac_channel_irq_detected(i)) ++ return i; ++ return -1; ++} ++ ++ ++/*************************************************************************** ++ * AIC (AC'97 & I2S Controller) ++ ***************************************************************************/ ++ ++#define __aic_enable() ( REG_AIC_FR |= AIC_FR_ENB ) ++#define __aic_disable() ( REG_AIC_FR &= ~AIC_FR_ENB ) ++ ++#define __aic_select_ac97() ( REG_AIC_FR &= ~AIC_FR_AUSEL ) ++#define __aic_select_i2s() ( REG_AIC_FR |= AIC_FR_AUSEL ) ++ ++#define __aic_play_zero() ( REG_AIC_FR &= ~AIC_FR_LSMP ) ++#define __aic_play_lastsample() ( REG_AIC_FR |= AIC_FR_LSMP ) ++ ++#define __i2s_as_master() ( REG_AIC_FR |= AIC_FR_BCKD | AIC_FR_SYNCD ) ++#define __i2s_as_slave() ( REG_AIC_FR &= ~(AIC_FR_BCKD | AIC_FR_SYNCD) ) ++#define __aic_reset_status() ( REG_AIC_FR & AIC_FR_RST ) ++ ++#define __aic_reset() \ ++do { \ ++ REG_AIC_FR |= AIC_FR_RST; \ ++} while(0) ++ ++ ++#define __aic_set_transmit_trigger(n) \ ++do { \ ++ REG_AIC_FR &= ~AIC_FR_TFTH_MASK; \ ++ REG_AIC_FR |= ((n) << AIC_FR_TFTH_BIT); \ ++} while(0) ++ ++#define __aic_set_receive_trigger(n) \ ++do { \ ++ REG_AIC_FR &= ~AIC_FR_RFTH_MASK; \ ++ REG_AIC_FR |= ((n) << AIC_FR_RFTH_BIT); \ ++} while(0) ++ ++#define __aic_enable_record() ( REG_AIC_CR |= AIC_CR_EREC ) ++#define __aic_disable_record() ( REG_AIC_CR &= ~AIC_CR_EREC ) ++#define __aic_enable_replay() ( REG_AIC_CR |= AIC_CR_ERPL ) ++#define __aic_disable_replay() ( REG_AIC_CR &= ~AIC_CR_ERPL ) ++#define __aic_enable_loopback() ( REG_AIC_CR |= AIC_CR_ENLBF ) ++#define __aic_disable_loopback() ( REG_AIC_CR &= ~AIC_CR_ENLBF ) ++ ++#define __aic_flush_fifo() ( REG_AIC_CR |= AIC_CR_FLUSH ) ++#define __aic_unflush_fifo() ( REG_AIC_CR &= ~AIC_CR_FLUSH ) ++ ++#define __aic_enable_transmit_intr() \ ++ ( REG_AIC_CR |= (AIC_CR_ETFS | AIC_CR_ETUR) ) ++#define __aic_disable_transmit_intr() \ ++ ( REG_AIC_CR &= ~(AIC_CR_ETFS | AIC_CR_ETUR) ) ++#define __aic_enable_receive_intr() \ ++ ( REG_AIC_CR |= (AIC_CR_ERFS | AIC_CR_EROR) ) ++#define __aic_disable_receive_intr() \ ++ ( REG_AIC_CR &= ~(AIC_CR_ERFS | AIC_CR_EROR) ) ++ ++#define __aic_enable_transmit_dma() ( REG_AIC_CR |= AIC_CR_TDMS ) ++#define __aic_disable_transmit_dma() ( REG_AIC_CR &= ~AIC_CR_TDMS ) ++#define __aic_enable_receive_dma() ( REG_AIC_CR |= AIC_CR_RDMS ) ++#define __aic_disable_receive_dma() ( REG_AIC_CR &= ~AIC_CR_RDMS ) ++ ++#define __aic_enable_mono2stereo() ( REG_AIC_CR |= AIC_CR_M2S ) ++#define __aic_disable_mono2stereo() ( REG_AIC_CR &= ~AIC_CR_M2S ) ++#define __aic_enable_byteswap() ( REG_AIC_CR |= AIC_CR_ENDSW ) ++#define __aic_disable_byteswap() ( REG_AIC_CR &= ~AIC_CR_ENDSW ) ++#define __aic_enable_unsignadj() ( REG_AIC_CR |= AIC_CR_AVSTSU ) ++#define __aic_disable_unsignadj() ( REG_AIC_CR &= ~AIC_CR_AVSTSU ) ++ ++#define AC97_PCM_XS_L_FRONT AIC_ACCR1_XS_SLOT3 ++#define AC97_PCM_XS_R_FRONT AIC_ACCR1_XS_SLOT4 ++#define AC97_PCM_XS_CENTER AIC_ACCR1_XS_SLOT6 ++#define AC97_PCM_XS_L_SURR AIC_ACCR1_XS_SLOT7 ++#define AC97_PCM_XS_R_SURR AIC_ACCR1_XS_SLOT8 ++#define AC97_PCM_XS_LFE AIC_ACCR1_XS_SLOT9 ++ ++#define AC97_PCM_RS_L_FRONT AIC_ACCR1_RS_SLOT3 ++#define AC97_PCM_RS_R_FRONT AIC_ACCR1_RS_SLOT4 ++#define AC97_PCM_RS_CENTER AIC_ACCR1_RS_SLOT6 ++#define AC97_PCM_RS_L_SURR AIC_ACCR1_RS_SLOT7 ++#define AC97_PCM_RS_R_SURR AIC_ACCR1_RS_SLOT8 ++#define AC97_PCM_RS_LFE AIC_ACCR1_RS_SLOT9 ++ ++#define __ac97_set_xs_none() ( REG_AIC_ACCR1 &= ~AIC_ACCR1_XS_MASK ) ++#define __ac97_set_xs_mono() \ ++do { \ ++ REG_AIC_ACCR1 &= ~AIC_ACCR1_XS_MASK; \ ++ REG_AIC_ACCR1 |= AC97_PCM_XS_R_FRONT; \ ++} while(0) ++#define __ac97_set_xs_stereo() \ ++do { \ ++ REG_AIC_ACCR1 &= ~AIC_ACCR1_XS_MASK; \ ++ REG_AIC_ACCR1 |= AC97_PCM_XS_L_FRONT | AC97_PCM_XS_R_FRONT; \ ++} while(0) ++ ++/* In fact, only stereo is support now. */ ++#define __ac97_set_rs_none() ( REG_AIC_ACCR1 &= ~AIC_ACCR1_RS_MASK ) ++#define __ac97_set_rs_mono() \ ++do { \ ++ REG_AIC_ACCR1 &= ~AIC_ACCR1_RS_MASK; \ ++ REG_AIC_ACCR1 |= AC97_PCM_RS_R_FRONT; \ ++} while(0) ++#define __ac97_set_rs_stereo() \ ++do { \ ++ REG_AIC_ACCR1 &= ~AIC_ACCR1_RS_MASK; \ ++ REG_AIC_ACCR1 |= AC97_PCM_RS_L_FRONT | AC97_PCM_RS_R_FRONT; \ ++} while(0) ++ ++#define __ac97_warm_reset_codec() \ ++ do { \ ++ REG_AIC_ACCR2 |= AIC_ACCR2_SA; \ ++ REG_AIC_ACCR2 |= AIC_ACCR2_SS; \ ++ udelay(2); \ ++ REG_AIC_ACCR2 &= ~AIC_ACCR2_SS; \ ++ REG_AIC_ACCR2 &= ~AIC_ACCR2_SA; \ ++ } while (0) ++ ++#define __ac97_cold_reset_codec() \ ++ do { \ ++ REG_AIC_ACCR2 |= AIC_ACCR2_SR; \ ++ udelay(2); \ ++ REG_AIC_ACCR2 &= ~AIC_ACCR2_SR; \ ++ } while (0) ++ ++/* n=8,16,18,20 */ ++#define __ac97_set_iass(n) \ ++ ( REG_AIC_ACCR2 = (REG_AIC_ACCR2 & ~AIC_ACCR2_IASS_MASK) | AIC_ACCR2_IASS_##n##BIT ) ++#define __ac97_set_oass(n) \ ++ ( REG_AIC_ACCR2 = (REG_AIC_ACCR2 & ~AIC_ACCR2_OASS_MASK) | AIC_ACCR2_OASS_##n##BIT ) ++ ++#define __i2s_select_i2s() ( REG_AIC_I2SCR &= ~AIC_I2SCR_AMSL ) ++#define __i2s_select_msbjustified() ( REG_AIC_I2SCR |= AIC_I2SCR_AMSL ) ++ ++/* n=8,16,18,20,24 */ ++/*#define __i2s_set_sample_size(n) \ ++ ( REG_AIC_I2SCR |= (REG_AIC_I2SCR & ~AIC_I2SCR_WL_MASK) | AIC_I2SCR_WL_##n##BIT )*/ ++ ++#define __i2s_set_oss_sample_size(n) \ ++ ( REG_AIC_CR = (REG_AIC_CR & ~AIC_CR_OSS_MASK) | AIC_CR_OSS_##n##BIT ) ++#define __i2s_set_iss_sample_size(n) \ ++ ( REG_AIC_CR = (REG_AIC_CR & ~AIC_CR_ISS_MASK) | AIC_CR_ISS_##n##BIT ) ++ ++#define __i2s_stop_bitclk() ( REG_AIC_I2SCR |= AIC_I2SCR_STPBK ) ++#define __i2s_start_bitclk() ( REG_AIC_I2SCR &= ~AIC_I2SCR_STPBK ) ++ ++#define __aic_transmit_request() ( REG_AIC_SR & AIC_SR_TFS ) ++#define __aic_receive_request() ( REG_AIC_SR & AIC_SR_RFS ) ++#define __aic_transmit_underrun() ( REG_AIC_SR & AIC_SR_TUR ) ++#define __aic_receive_overrun() ( REG_AIC_SR & AIC_SR_ROR ) ++ ++#define __aic_clear_errors() ( REG_AIC_SR &= ~(AIC_SR_TUR | AIC_SR_ROR) ) ++ ++#define __aic_get_transmit_resident() \ ++ ( (REG_AIC_SR & AIC_SR_TFL_MASK) >> AIC_SR_TFL_BIT ) ++#define __aic_get_receive_count() \ ++ ( (REG_AIC_SR & AIC_SR_RFL_MASK) >> AIC_SR_RFL_BIT ) ++ ++#define __ac97_command_transmitted() ( REG_AIC_ACSR & AIC_ACSR_CADT ) ++#define __ac97_status_received() ( REG_AIC_ACSR & AIC_ACSR_SADR ) ++#define __ac97_status_receive_timeout() ( REG_AIC_ACSR & AIC_ACSR_RSTO ) ++#define __ac97_codec_is_low_power_mode() ( REG_AIC_ACSR & AIC_ACSR_CLPM ) ++#define __ac97_codec_is_ready() ( REG_AIC_ACSR & AIC_ACSR_CRDY ) ++#define __ac97_slot_error_detected() ( REG_AIC_ACSR & AIC_ACSR_SLTERR ) ++#define __ac97_clear_slot_error() ( REG_AIC_ACSR &= ~AIC_ACSR_SLTERR ) ++ ++#define __i2s_is_busy() ( REG_AIC_I2SSR & AIC_I2SSR_BSY ) ++ ++#define CODEC_READ_CMD (1 << 19) ++#define CODEC_WRITE_CMD (0 << 19) ++#define CODEC_REG_INDEX_BIT 12 ++#define CODEC_REG_INDEX_MASK (0x7f << CODEC_REG_INDEX_BIT) /* 18:12 */ ++#define CODEC_REG_DATA_BIT 4 ++#define CODEC_REG_DATA_MASK (0x0ffff << 4) /* 19:4 */ ++ ++#define __ac97_out_rcmd_addr(reg) \ ++do { \ ++ REG_AIC_ACCAR = CODEC_READ_CMD | ((reg) << CODEC_REG_INDEX_BIT); \ ++} while (0) ++ ++#define __ac97_out_wcmd_addr(reg) \ ++do { \ ++ REG_AIC_ACCAR = CODEC_WRITE_CMD | ((reg) << CODEC_REG_INDEX_BIT); \ ++} while (0) ++ ++#define __ac97_out_data(value) \ ++do { \ ++ REG_AIC_ACCDR = ((value) << CODEC_REG_DATA_BIT); \ ++} while (0) ++ ++#define __ac97_in_data() \ ++ ( (REG_AIC_ACSDR & CODEC_REG_DATA_MASK) >> CODEC_REG_DATA_BIT ) ++ ++#define __ac97_in_status_addr() \ ++ ( (REG_AIC_ACSAR & CODEC_REG_INDEX_MASK) >> CODEC_REG_INDEX_BIT ) ++ ++#define __i2s_set_sample_rate(i2sclk, sync) \ ++ ( REG_AIC_I2SDIV = ((i2sclk) / (4*64)) / (sync) ) ++ ++#define __aic_write_tfifo(v) ( REG_AIC_DR = (v) ) ++#define __aic_read_rfifo() ( REG_AIC_DR ) ++ ++#define __aic_internal_codec() ( REG_AIC_FR |= AIC_FR_ICDC ) ++#define __aic_external_codec() ( REG_AIC_FR &= ~AIC_FR_ICDC ) ++ ++// ++// Define next ops for AC97 compatible ++// ++ ++#define AC97_ACSR AIC_ACSR ++ ++#define __ac97_enable() __aic_enable(); __aic_select_ac97() ++#define __ac97_disable() __aic_disable() ++#define __ac97_reset() __aic_reset() ++ ++#define __ac97_set_transmit_trigger(n) __aic_set_transmit_trigger(n) ++#define __ac97_set_receive_trigger(n) __aic_set_receive_trigger(n) ++ ++#define __ac97_enable_record() __aic_enable_record() ++#define __ac97_disable_record() __aic_disable_record() ++#define __ac97_enable_replay() __aic_enable_replay() ++#define __ac97_disable_replay() __aic_disable_replay() ++#define __ac97_enable_loopback() __aic_enable_loopback() ++#define __ac97_disable_loopback() __aic_disable_loopback() ++ ++#define __ac97_enable_transmit_dma() __aic_enable_transmit_dma() ++#define __ac97_disable_transmit_dma() __aic_disable_transmit_dma() ++#define __ac97_enable_receive_dma() __aic_enable_receive_dma() ++#define __ac97_disable_receive_dma() __aic_disable_receive_dma() ++ ++#define __ac97_transmit_request() __aic_transmit_request() ++#define __ac97_receive_request() __aic_receive_request() ++#define __ac97_transmit_underrun() __aic_transmit_underrun() ++#define __ac97_receive_overrun() __aic_receive_overrun() ++ ++#define __ac97_clear_errors() __aic_clear_errors() ++ ++#define __ac97_get_transmit_resident() __aic_get_transmit_resident() ++#define __ac97_get_receive_count() __aic_get_receive_count() ++ ++#define __ac97_enable_transmit_intr() __aic_enable_transmit_intr() ++#define __ac97_disable_transmit_intr() __aic_disable_transmit_intr() ++#define __ac97_enable_receive_intr() __aic_enable_receive_intr() ++#define __ac97_disable_receive_intr() __aic_disable_receive_intr() ++ ++#define __ac97_write_tfifo(v) __aic_write_tfifo(v) ++#define __ac97_read_rfifo() __aic_read_rfifo() ++ ++// ++// Define next ops for I2S compatible ++// ++ ++#define I2S_ACSR AIC_I2SSR ++ ++#define __i2s_enable() __aic_enable(); __aic_select_i2s() ++#define __i2s_disable() __aic_disable() ++#define __i2s_reset() __aic_reset() ++ ++#define __i2s_set_transmit_trigger(n) __aic_set_transmit_trigger(n) ++#define __i2s_set_receive_trigger(n) __aic_set_receive_trigger(n) ++ ++#define __i2s_enable_record() __aic_enable_record() ++#define __i2s_disable_record() __aic_disable_record() ++#define __i2s_enable_replay() __aic_enable_replay() ++#define __i2s_disable_replay() __aic_disable_replay() ++#define __i2s_enable_loopback() __aic_enable_loopback() ++#define __i2s_disable_loopback() __aic_disable_loopback() ++ ++#define __i2s_enable_transmit_dma() __aic_enable_transmit_dma() ++#define __i2s_disable_transmit_dma() __aic_disable_transmit_dma() ++#define __i2s_enable_receive_dma() __aic_enable_receive_dma() ++#define __i2s_disable_receive_dma() __aic_disable_receive_dma() ++ ++#define __i2s_transmit_request() __aic_transmit_request() ++#define __i2s_receive_request() __aic_receive_request() ++#define __i2s_transmit_underrun() __aic_transmit_underrun() ++#define __i2s_receive_overrun() __aic_receive_overrun() ++ ++#define __i2s_clear_errors() __aic_clear_errors() ++ ++#define __i2s_get_transmit_resident() __aic_get_transmit_resident() ++#define __i2s_get_receive_count() __aic_get_receive_count() ++ ++#define __i2s_enable_transmit_intr() __aic_enable_transmit_intr() ++#define __i2s_disable_transmit_intr() __aic_disable_transmit_intr() ++#define __i2s_enable_receive_intr() __aic_enable_receive_intr() ++#define __i2s_disable_receive_intr() __aic_disable_receive_intr() ++ ++#define __i2s_write_tfifo(v) __aic_write_tfifo(v) ++#define __i2s_read_rfifo() __aic_read_rfifo() ++ ++#define __i2s_reset_codec() \ ++ do { \ ++ } while (0) ++ ++ ++/*************************************************************************** ++ * ICDC ++ ***************************************************************************/ ++#define __i2s_internal_codec() __aic_internal_codec() ++#define __i2s_external_codec() __aic_external_codec() ++ ++/*************************************************************************** ++ * INTC ++ ***************************************************************************/ ++#define __intc_unmask_irq(n) ( REG_INTC_IMCR = (1 << (n)) ) ++#define __intc_mask_irq(n) ( REG_INTC_IMSR = (1 << (n)) ) ++#define __intc_ack_irq(n) ( REG_INTC_IPR = (1 << (n)) ) ++ ++ ++/*************************************************************************** ++ * I2C ++ ***************************************************************************/ ++ ++#define __i2c_enable() ( REG_I2C_CR |= I2C_CR_I2CE ) ++#define __i2c_disable() ( REG_I2C_CR &= ~I2C_CR_I2CE ) ++ ++#define __i2c_send_start() ( REG_I2C_CR |= I2C_CR_STA ) ++#define __i2c_send_stop() ( REG_I2C_CR |= I2C_CR_STO ) ++#define __i2c_send_ack() ( REG_I2C_CR &= ~I2C_CR_AC ) ++#define __i2c_send_nack() ( REG_I2C_CR |= I2C_CR_AC ) ++ ++#define __i2c_set_drf() ( REG_I2C_SR |= I2C_SR_DRF ) ++#define __i2c_clear_drf() ( REG_I2C_SR &= ~I2C_SR_DRF ) ++#define __i2c_check_drf() ( REG_I2C_SR & I2C_SR_DRF ) ++ ++#define __i2c_received_ack() ( !(REG_I2C_SR & I2C_SR_ACKF) ) ++#define __i2c_is_busy() ( REG_I2C_SR & I2C_SR_BUSY ) ++#define __i2c_transmit_ended() ( REG_I2C_SR & I2C_SR_TEND ) ++ ++#define __i2c_set_clk(dev_clk, i2c_clk) \ ++ ( REG_I2C_GR = (dev_clk) / (16*(i2c_clk)) - 1 ) ++ ++#define __i2c_read() ( REG_I2C_DR ) ++#define __i2c_write(val) ( REG_I2C_DR = (val) ) ++ ++ ++/*************************************************************************** ++ * MSC ++ ***************************************************************************/ ++ ++#define __msc_start_op() \ ++ ( REG_MSC_STRPCL = MSC_STRPCL_START_OP | MSC_STRPCL_CLOCK_CONTROL_START ) ++ ++#define __msc_set_resto(to) ( REG_MSC_RESTO = to ) ++#define __msc_set_rdto(to) ( REG_MSC_RDTO = to ) ++#define __msc_set_cmd(cmd) ( REG_MSC_CMD = cmd ) ++#define __msc_set_arg(arg) ( REG_MSC_ARG = arg ) ++#define __msc_set_nob(nob) ( REG_MSC_NOB = nob ) ++#define __msc_get_nob() ( REG_MSC_NOB ) ++#define __msc_set_blklen(len) ( REG_MSC_BLKLEN = len ) ++#define __msc_set_cmdat(cmdat) ( REG_MSC_CMDAT = cmdat ) ++#define __msc_set_cmdat_ioabort() ( REG_MSC_CMDAT |= MSC_CMDAT_IO_ABORT ) ++#define __msc_clear_cmdat_ioabort() ( REG_MSC_CMDAT &= ~MSC_CMDAT_IO_ABORT ) ++ ++#define __msc_set_cmdat_bus_width1() \ ++do { \ ++ REG_MSC_CMDAT &= ~MSC_CMDAT_BUS_WIDTH_MASK; \ ++ REG_MSC_CMDAT |= MSC_CMDAT_BUS_WIDTH_1BIT; \ ++} while(0) ++ ++#define __msc_set_cmdat_bus_width4() \ ++do { \ ++ REG_MSC_CMDAT &= ~MSC_CMDAT_BUS_WIDTH_MASK; \ ++ REG_MSC_CMDAT |= MSC_CMDAT_BUS_WIDTH_4BIT; \ ++} while(0) ++ ++#define __msc_set_cmdat_dma_en() ( REG_MSC_CMDAT |= MSC_CMDAT_DMA_EN ) ++#define __msc_set_cmdat_init() ( REG_MSC_CMDAT |= MSC_CMDAT_INIT ) ++#define __msc_set_cmdat_busy() ( REG_MSC_CMDAT |= MSC_CMDAT_BUSY ) ++#define __msc_set_cmdat_stream() ( REG_MSC_CMDAT |= MSC_CMDAT_STREAM_BLOCK ) ++#define __msc_set_cmdat_block() ( REG_MSC_CMDAT &= ~MSC_CMDAT_STREAM_BLOCK ) ++#define __msc_set_cmdat_read() ( REG_MSC_CMDAT &= ~MSC_CMDAT_WRITE_READ ) ++#define __msc_set_cmdat_write() ( REG_MSC_CMDAT |= MSC_CMDAT_WRITE_READ ) ++#define __msc_set_cmdat_data_en() ( REG_MSC_CMDAT |= MSC_CMDAT_DATA_EN ) ++ ++/* r is MSC_CMDAT_RESPONSE_FORMAT_Rx or MSC_CMDAT_RESPONSE_FORMAT_NONE */ ++#define __msc_set_cmdat_res_format(r) \ ++do { \ ++ REG_MSC_CMDAT &= ~MSC_CMDAT_RESPONSE_FORMAT_MASK; \ ++ REG_MSC_CMDAT |= (r); \ ++} while(0) ++ ++#define __msc_clear_cmdat() \ ++ REG_MSC_CMDAT &= ~( MSC_CMDAT_IO_ABORT | MSC_CMDAT_DMA_EN | MSC_CMDAT_INIT| \ ++ MSC_CMDAT_BUSY | MSC_CMDAT_STREAM_BLOCK | MSC_CMDAT_WRITE_READ | \ ++ MSC_CMDAT_DATA_EN | MSC_CMDAT_RESPONSE_FORMAT_MASK ) ++ ++#define __msc_get_imask() ( REG_MSC_IMASK ) ++#define __msc_mask_all_intrs() ( REG_MSC_IMASK = 0xff ) ++#define __msc_unmask_all_intrs() ( REG_MSC_IMASK = 0x00 ) ++#define __msc_mask_rd() ( REG_MSC_IMASK |= MSC_IMASK_RXFIFO_RD_REQ ) ++#define __msc_unmask_rd() ( REG_MSC_IMASK &= ~MSC_IMASK_RXFIFO_RD_REQ ) ++#define __msc_mask_wr() ( REG_MSC_IMASK |= MSC_IMASK_TXFIFO_WR_REQ ) ++#define __msc_unmask_wr() ( REG_MSC_IMASK &= ~MSC_IMASK_TXFIFO_WR_REQ ) ++#define __msc_mask_endcmdres() ( REG_MSC_IMASK |= MSC_IMASK_END_CMD_RES ) ++#define __msc_unmask_endcmdres() ( REG_MSC_IMASK &= ~MSC_IMASK_END_CMD_RES ) ++#define __msc_mask_datatrandone() ( REG_MSC_IMASK |= MSC_IMASK_DATA_TRAN_DONE ) ++#define __msc_unmask_datatrandone() ( REG_MSC_IMASK &= ~MSC_IMASK_DATA_TRAN_DONE ) ++#define __msc_mask_prgdone() ( REG_MSC_IMASK |= MSC_IMASK_PRG_DONE ) ++#define __msc_unmask_prgdone() ( REG_MSC_IMASK &= ~MSC_IMASK_PRG_DONE ) ++ ++/* n=0,1,2,3,4,5,6,7 */ ++#define __msc_set_clkrt(n) \ ++do { \ ++ REG_MSC_CLKRT = n; \ ++} while(0) ++ ++#define __msc_get_ireg() ( REG_MSC_IREG ) ++#define __msc_ireg_rd() ( REG_MSC_IREG & MSC_IREG_RXFIFO_RD_REQ ) ++#define __msc_ireg_wr() ( REG_MSC_IREG & MSC_IREG_TXFIFO_WR_REQ ) ++#define __msc_ireg_end_cmd_res() ( REG_MSC_IREG & MSC_IREG_END_CMD_RES ) ++#define __msc_ireg_data_tran_done() ( REG_MSC_IREG & MSC_IREG_DATA_TRAN_DONE ) ++#define __msc_ireg_prg_done() ( REG_MSC_IREG & MSC_IREG_PRG_DONE ) ++#define __msc_ireg_clear_end_cmd_res() ( REG_MSC_IREG = MSC_IREG_END_CMD_RES ) ++#define __msc_ireg_clear_data_tran_done() ( REG_MSC_IREG = MSC_IREG_DATA_TRAN_DONE ) ++#define __msc_ireg_clear_prg_done() ( REG_MSC_IREG = MSC_IREG_PRG_DONE ) ++ ++#define __msc_get_stat() ( REG_MSC_STAT ) ++#define __msc_stat_not_end_cmd_res() ( (REG_MSC_STAT & MSC_STAT_END_CMD_RES) == 0) ++#define __msc_stat_crc_err() \ ++ ( REG_MSC_STAT & (MSC_STAT_CRC_RES_ERR | MSC_STAT_CRC_READ_ERROR | MSC_STAT_CRC_WRITE_ERROR_YES) ) ++#define __msc_stat_res_crc_err() ( REG_MSC_STAT & MSC_STAT_CRC_RES_ERR ) ++#define __msc_stat_rd_crc_err() ( REG_MSC_STAT & MSC_STAT_CRC_READ_ERROR ) ++#define __msc_stat_wr_crc_err() ( REG_MSC_STAT & MSC_STAT_CRC_WRITE_ERROR_YES ) ++#define __msc_stat_resto_err() ( REG_MSC_STAT & MSC_STAT_TIME_OUT_RES ) ++#define __msc_stat_rdto_err() ( REG_MSC_STAT & MSC_STAT_TIME_OUT_READ ) ++ ++#define __msc_rd_resfifo() ( REG_MSC_RES ) ++#define __msc_rd_rxfifo() ( REG_MSC_RXFIFO ) ++#define __msc_wr_txfifo(v) ( REG_MSC_TXFIFO = v ) ++ ++#define __msc_reset() \ ++do { \ ++ REG_MSC_STRPCL = MSC_STRPCL_RESET; \ ++ while (REG_MSC_STAT & MSC_STAT_IS_RESETTING); \ ++} while (0) ++ ++#define __msc_start_clk() \ ++do { \ ++ REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START; \ ++} while (0) ++ ++#define __msc_stop_clk() \ ++do { \ ++ REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_STOP; \ ++} while (0) ++ ++#define MMC_CLK 19169200 ++#define SD_CLK 24576000 ++ ++/* msc_clk should little than pclk and little than clk retrieve from card */ ++#define __msc_calc_clk_divisor(type,dev_clk,msc_clk,lv) \ ++do { \ ++ unsigned int rate, pclk, i; \ ++ pclk = dev_clk; \ ++ rate = type?SD_CLK:MMC_CLK; \ ++ if (msc_clk && msc_clk < pclk) \ ++ pclk = msc_clk; \ ++ i = 0; \ ++ while (pclk < rate) \ ++ { \ ++ i ++; \ ++ rate >>= 1; \ ++ } \ ++ lv = i; \ ++} while(0) ++ ++/* divide rate to little than or equal to 400kHz */ ++#define __msc_calc_slow_clk_divisor(type, lv) \ ++do { \ ++ unsigned int rate, i; \ ++ rate = (type?SD_CLK:MMC_CLK)/1000/400; \ ++ i = 0; \ ++ while (rate > 0) \ ++ { \ ++ rate >>= 1; \ ++ i ++; \ ++ } \ ++ lv = i; \ ++} while(0) ++ ++ ++/*************************************************************************** ++ * SSI ++ ***************************************************************************/ ++ ++#define __ssi_enable() ( REG_SSI_CR0 |= SSI_CR0_SSIE ) ++#define __ssi_disable() ( REG_SSI_CR0 &= ~SSI_CR0_SSIE ) ++#define __ssi_select_ce() ( REG_SSI_CR0 &= ~SSI_CR0_FSEL ) ++ ++#define __ssi_normal_mode() ( REG_SSI_ITR &= ~SSI_ITR_IVLTM_MASK ) ++ ++#define __ssi_select_ce2() \ ++do { \ ++ REG_SSI_CR0 |= SSI_CR0_FSEL; \ ++ REG_SSI_CR1 &= ~SSI_CR1_MULTS; \ ++} while (0) ++ ++#define __ssi_select_gpc() \ ++do { \ ++ REG_SSI_CR0 &= ~SSI_CR0_FSEL; \ ++ REG_SSI_CR1 |= SSI_CR1_MULTS; \ ++} while (0) ++ ++#define __ssi_enable_tx_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_TIE | SSI_CR0_TEIE ) ++ ++#define __ssi_disable_tx_intr() \ ++ ( REG_SSI_CR0 &= ~(SSI_CR0_TIE | SSI_CR0_TEIE) ) ++ ++#define __ssi_enable_rx_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_RIE | SSI_CR0_REIE ) ++ ++#define __ssi_disable_rx_intr() \ ++ ( REG_SSI_CR0 &= ~(SSI_CR0_RIE | SSI_CR0_REIE) ) ++ ++#define __ssi_enable_txfifo_half_empty_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_TIE ) ++#define __ssi_disable_txfifo_half_empty_intr() \ ++ ( REG_SSI_CR0 &= ~SSI_CR0_TIE ) ++#define __ssi_enable_tx_error_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_TEIE ) ++#define __ssi_disable_tx_error_intr() \ ++ ( REG_SSI_CR0 &= ~SSI_CR0_TEIE ) ++ ++#define __ssi_enable_rxfifo_half_full_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_RIE ) ++#define __ssi_disable_rxfifo_half_full_intr() \ ++ ( REG_SSI_CR0 &= ~SSI_CR0_RIE ) ++#define __ssi_enable_rx_error_intr() \ ++ ( REG_SSI_CR0 |= SSI_CR0_REIE ) ++#define __ssi_disable_rx_error_intr() \ ++ ( REG_SSI_CR0 &= ~SSI_CR0_REIE ) ++ ++#define __ssi_enable_loopback() ( REG_SSI_CR0 |= SSI_CR0_LOOP ) ++#define __ssi_disable_loopback() ( REG_SSI_CR0 &= ~SSI_CR0_LOOP ) ++ ++#define __ssi_enable_receive() ( REG_SSI_CR0 &= ~SSI_CR0_DISREV ) ++#define __ssi_disable_receive() ( REG_SSI_CR0 |= SSI_CR0_DISREV ) ++ ++#define __ssi_finish_receive() \ ++ ( REG_SSI_CR0 |= (SSI_CR0_RFINE | SSI_CR0_RFINC) ) ++ ++#define __ssi_disable_recvfinish() \ ++ ( REG_SSI_CR0 &= ~(SSI_CR0_RFINE | SSI_CR0_RFINC) ) ++ ++#define __ssi_flush_txfifo() ( REG_SSI_CR0 |= SSI_CR0_TFLUSH ) ++#define __ssi_flush_rxfifo() ( REG_SSI_CR0 |= SSI_CR0_RFLUSH ) ++ ++#define __ssi_flush_fifo() \ ++ ( REG_SSI_CR0 |= SSI_CR0_TFLUSH | SSI_CR0_RFLUSH ) ++ ++#define __ssi_finish_transmit() ( REG_SSI_CR1 &= ~SSI_CR1_UNFIN ) ++#define __ssi_wait_transmit() ( REG_SSI_CR1 |= SSI_CR1_UNFIN ) ++ ++#define __ssi_spi_format() \ ++do { \ ++ REG_SSI_CR1 &= ~SSI_CR1_FMAT_MASK; \ ++ REG_SSI_CR1 |= SSI_CR1_FMAT_SPI; \ ++ REG_SSI_CR1 &= ~(SSI_CR1_TFVCK_MASK|SSI_CR1_TCKFI_MASK);\ ++ REG_SSI_CR1 |= (SSI_CR1_TFVCK_1 | SSI_CR1_TCKFI_1); \ ++} while (0) ++ ++/* TI's SSP format, must clear SSI_CR1.UNFIN */ ++#define __ssi_ssp_format() \ ++do { \ ++ REG_SSI_CR1 &= ~(SSI_CR1_FMAT_MASK | SSI_CR1_UNFIN); \ ++ REG_SSI_CR1 |= SSI_CR1_FMAT_SSP; \ ++} while (0) ++ ++/* National's Microwire format, must clear SSI_CR0.RFINE, and set max delay */ ++#define __ssi_microwire_format() \ ++do { \ ++ REG_SSI_CR1 &= ~SSI_CR1_FMAT_MASK; \ ++ REG_SSI_CR1 |= SSI_CR1_FMAT_MW1; \ ++ REG_SSI_CR1 &= ~(SSI_CR1_TFVCK_MASK|SSI_CR1_TCKFI_MASK);\ ++ REG_SSI_CR1 |= (SSI_CR1_TFVCK_3 | SSI_CR1_TCKFI_3); \ ++ REG_SSI_CR0 &= ~SSI_CR0_RFINE; \ ++} while (0) ++ ++/* CE# level (FRMHL), CE# in interval time (ITFRM), ++ clock phase and polarity (PHA POL), ++ interval time (SSIITR), interval characters/frame (SSIICR) */ ++ ++ /* frmhl,endian,mcom,flen,pha,pol MASK */ ++#define SSICR1_MISC_MASK \ ++ ( SSI_CR1_FRMHL_MASK | SSI_CR1_LFST | SSI_CR1_MCOM_MASK \ ++ | SSI_CR1_FLEN_MASK | SSI_CR1_PHA | SSI_CR1_POL ) \ ++ ++#define __ssi_spi_set_misc(frmhl,endian,flen,mcom,pha,pol) \ ++do { \ ++ REG_SSI_CR1 &= ~SSICR1_MISC_MASK; \ ++ REG_SSI_CR1 |= ((frmhl) << 30) | ((endian) << 25) | \ ++ (((mcom) - 1) << 12) | (((flen) - 2) << 4) | \ ++ ((pha) << 1) | (pol); \ ++} while(0) ++ ++/* Transfer with MSB or LSB first */ ++#define __ssi_set_msb() ( REG_SSI_CR1 &= ~SSI_CR1_LFST ) ++#define __ssi_set_lsb() ( REG_SSI_CR1 |= SSI_CR1_LFST ) ++ ++#define __ssi_set_frame_length(n) \ ++ REG_SSI_CR1 = (REG_SSI_CR1 & ~SSI_CR1_FLEN_MASK) | (((n) - 2) << 4) ++ ++/* n = 1 - 16 */ ++#define __ssi_set_microwire_command_length(n) \ ++ ( REG_SSI_CR1 = ((REG_SSI_CR1 & ~SSI_CR1_MCOM_MASK) | SSI_CR1_MCOM_##n##BIT) ) ++ ++/* Set the clock phase for SPI */ ++#define __ssi_set_spi_clock_phase(n) \ ++ ( REG_SSI_CR1 = ((REG_SSI_CR1 & ~SSI_CR1_PHA) | ((n&0x1)<< 1))) ++ ++/* Set the clock polarity for SPI */ ++#define __ssi_set_spi_clock_polarity(n) \ ++ ( REG_SSI_CR1 = ((REG_SSI_CR1 & ~SSI_CR1_POL) | (n&0x1)) ) ++ ++/* n = ix8 */ ++#define __ssi_set_tx_trigger(n) \ ++do { \ ++ REG_SSI_CR1 &= ~SSI_CR1_TTRG_MASK; \ ++ REG_SSI_CR1 |= (n/8)<<SSI_CR1_TTRG_BIT; \ ++} while (0) ++ ++/* n = ix8 */ ++#define __ssi_set_rx_trigger(n) \ ++do { \ ++ REG_SSI_CR1 &= ~SSI_CR1_RTRG_MASK; \ ++ REG_SSI_CR1 |= (n/8)<<SSI_CR1_RTRG_BIT; \ ++} while (0) ++ ++#define __ssi_get_txfifo_count() \ ++ ( (REG_SSI_SR & SSI_SR_TFIFONUM_MASK) >> SSI_SR_TFIFONUM_BIT ) ++ ++#define __ssi_get_rxfifo_count() \ ++ ( (REG_SSI_SR & SSI_SR_RFIFONUM_MASK) >> SSI_SR_RFIFONUM_BIT ) ++ ++#define __ssi_transfer_end() ( REG_SSI_SR & SSI_SR_END ) ++#define __ssi_is_busy() ( REG_SSI_SR & SSI_SR_BUSY ) ++ ++#define __ssi_txfifo_full() ( REG_SSI_SR & SSI_SR_TFF ) ++#define __ssi_rxfifo_empty() ( REG_SSI_SR & SSI_SR_RFE ) ++#define __ssi_rxfifo_half_full() ( REG_SSI_SR & SSI_SR_RFHF ) ++#define __ssi_txfifo_half_empty() ( REG_SSI_SR & SSI_SR_TFHE ) ++#define __ssi_underrun() ( REG_SSI_SR & SSI_SR_UNDR ) ++#define __ssi_overrun() ( REG_SSI_SR & SSI_SR_OVER ) ++#define __ssi_clear_underrun() ( REG_SSI_SR = ~SSI_SR_UNDR ) ++#define __ssi_clear_overrun() ( REG_SSI_SR = ~SSI_SR_OVER ) ++#define __ssi_clear_errors() \ ++ ( REG_SSI_SR &= ~(SSI_SR_UNDR | SSI_SR_OVER) ) ++ ++ ++#define __ssi_set_clk(dev_clk, ssi_clk) \ ++ ( REG_SSI_GR = (dev_clk) / (2*(ssi_clk)) - 1 ) ++ ++#define __ssi_receive_data() REG_SSI_DR ++#define __ssi_transmit_data(v) ( REG_SSI_DR = (v) ) ++ ++ ++/*************************************************************************** ++ * CIM ++ ***************************************************************************/ ++ ++#define __cim_enable() ( REG_CIM_CTRL |= CIM_CTRL_ENA ) ++#define __cim_disable() ( REG_CIM_CTRL &= ~CIM_CTRL_ENA ) ++ ++#define __cim_input_data_inverse() ( REG_CIM_CFG |= CIM_CFG_INV_DAT ) ++#define __cim_input_data_normal() ( REG_CIM_CFG &= ~CIM_CFG_INV_DAT ) ++ ++#define __cim_vsync_active_low() ( REG_CIM_CFG |= CIM_CFG_VSP ) ++#define __cim_vsync_active_high() ( REG_CIM_CFG &= ~CIM_CFG_VSP ) ++ ++#define __cim_hsync_active_low() ( REG_CIM_CFG |= CIM_CFG_HSP ) ++#define __cim_hsync_active_high() ( REG_CIM_CFG &= ~CIM_CFG_HSP ) ++ ++#define __cim_sample_data_at_pclk_falling_edge() \ ++ ( REG_CIM_CFG |= CIM_CFG_PCP ) ++#define __cim_sample_data_at_pclk_rising_edge() \ ++ ( REG_CIM_CFG &= ~CIM_CFG_PCP ) ++ ++#define __cim_enable_dummy_zero() ( REG_CIM_CFG |= CIM_CFG_DUMMY_ZERO ) ++#define __cim_disable_dummy_zero() ( REG_CIM_CFG &= ~CIM_CFG_DUMMY_ZERO ) ++ ++#define __cim_select_external_vsync() ( REG_CIM_CFG |= CIM_CFG_EXT_VSYNC ) ++#define __cim_select_internal_vsync() ( REG_CIM_CFG &= ~CIM_CFG_EXT_VSYNC ) ++ ++/* n=0-7 */ ++#define __cim_set_data_packing_mode(n) \ ++do { \ ++ REG_CIM_CFG &= ~CIM_CFG_PACK_MASK; \ ++ REG_CIM_CFG |= (CIM_CFG_PACK_##n); \ ++} while (0) ++ ++#define __cim_enable_ccir656_progressive_mode() \ ++do { \ ++ REG_CIM_CFG &= ~CIM_CFG_DSM_MASK; \ ++ REG_CIM_CFG |= CIM_CFG_DSM_CPM; \ ++} while (0) ++ ++#define __cim_enable_ccir656_interlace_mode() \ ++do { \ ++ REG_CIM_CFG &= ~CIM_CFG_DSM_MASK; \ ++ REG_CIM_CFG |= CIM_CFG_DSM_CIM; \ ++} while (0) ++ ++#define __cim_enable_gated_clock_mode() \ ++do { \ ++ REG_CIM_CFG &= ~CIM_CFG_DSM_MASK; \ ++ REG_CIM_CFG |= CIM_CFG_DSM_GCM; \ ++} while (0) ++ ++#define __cim_enable_nongated_clock_mode() \ ++do { \ ++ REG_CIM_CFG &= ~CIM_CFG_DSM_MASK; \ ++ REG_CIM_CFG |= CIM_CFG_DSM_NGCM; \ ++} while (0) ++ ++/* sclk:system bus clock ++ * mclk: CIM master clock ++ */ ++#define __cim_set_master_clk(sclk, mclk) \ ++do { \ ++ REG_CIM_CTRL &= ~CIM_CTRL_MCLKDIV_MASK; \ ++ REG_CIM_CTRL |= (((sclk)/(mclk) - 1) << CIM_CTRL_MCLKDIV_BIT); \ ++} while (0) ++ ++#define __cim_enable_sof_intr() \ ++ ( REG_CIM_CTRL |= CIM_CTRL_DMA_SOFM ) ++#define __cim_disable_sof_intr() \ ++ ( REG_CIM_CTRL &= ~CIM_CTRL_DMA_SOFM ) ++ ++#define __cim_enable_eof_intr() \ ++ ( REG_CIM_CTRL |= CIM_CTRL_DMA_EOFM ) ++#define __cim_disable_eof_intr() \ ++ ( REG_CIM_CTRL &= ~CIM_CTRL_DMA_EOFM ) ++ ++#define __cim_enable_stop_intr() \ ++ ( REG_CIM_CTRL |= CIM_CTRL_DMA_STOPM ) ++#define __cim_disable_stop_intr() \ ++ ( REG_CIM_CTRL &= ~CIM_CTRL_DMA_STOPM ) ++ ++#define __cim_enable_trig_intr() \ ++ ( REG_CIM_CTRL |= CIM_CTRL_RXF_TRIGM ) ++#define __cim_disable_trig_intr() \ ++ ( REG_CIM_CTRL &= ~CIM_CTRL_RXF_TRIGM ) ++ ++#define __cim_enable_rxfifo_overflow_intr() \ ++ ( REG_CIM_CTRL |= CIM_CTRL_RXF_OFM ) ++#define __cim_disable_rxfifo_overflow_intr() \ ++ ( REG_CIM_CTRL &= ~CIM_CTRL_RXF_OFM ) ++ ++/* n=1-16 */ ++#define __cim_set_frame_rate(n) \ ++do { \ ++ REG_CIM_CTRL &= ~CIM_CTRL_FRC_MASK; \ ++ REG_CIM_CTRL |= CIM_CTRL_FRC_##n; \ ++} while (0) ++ ++#define __cim_enable_dma() ( REG_CIM_CTRL |= CIM_CTRL_DMA_EN ) ++#define __cim_disable_dma() ( REG_CIM_CTRL &= ~CIM_CTRL_DMA_EN ) ++ ++#define __cim_reset_rxfifo() ( REG_CIM_CTRL |= CIM_CTRL_RXF_RST ) ++#define __cim_unreset_rxfifo() ( REG_CIM_CTRL &= ~CIM_CTRL_RXF_RST ) ++ ++/* n=4,8,12,16,20,24,28,32 */ ++#define __cim_set_rxfifo_trigger(n) \ ++do { \ ++ REG_CIM_CTRL &= ~CIM_CTRL_RXF_TRIG_MASK; \ ++ REG_CIM_CTRL |= CIM_CTRL_RXF_TRIG_##n; \ ++} while (0) ++ ++#define __cim_clear_state() ( REG_CIM_STATE = 0 ) ++ ++#define __cim_disable_done() ( REG_CIM_STATE & CIM_STATE_VDD ) ++#define __cim_rxfifo_empty() ( REG_CIM_STATE & CIM_STATE_RXF_EMPTY ) ++#define __cim_rxfifo_reach_trigger() ( REG_CIM_STATE & CIM_STATE_RXF_TRIG ) ++#define __cim_rxfifo_overflow() ( REG_CIM_STATE & CIM_STATE_RXF_OF ) ++#define __cim_clear_rxfifo_overflow() ( REG_CIM_STATE &= ~CIM_STATE_RXF_OF ) ++#define __cim_dma_stop() ( REG_CIM_STATE & CIM_STATE_DMA_STOP ) ++#define __cim_dma_eof() ( REG_CIM_STATE & CIM_STATE_DMA_EOF ) ++#define __cim_dma_sof() ( REG_CIM_STATE & CIM_STATE_DMA_SOF ) ++ ++#define __cim_get_iid() ( REG_CIM_IID ) ++#define __cim_get_image_data() ( REG_CIM_RXFIFO ) ++#define __cim_get_dam_cmd() ( REG_CIM_CMD ) ++ ++#define __cim_set_da(a) ( REG_CIM_DA = (a) ) ++ ++/*************************************************************************** ++ * LCD ++ ***************************************************************************/ ++#define __lcd_as_smart_lcd() ( REG_LCD_CFG |= (1<<LCD_CFG_LCDPIN_BIT) ) ++#define __lcd_as_general_lcd() ( REG_LCD_CFG &= ~(1<<LCD_CFG_LCDPIN_BIT) ) ++ ++#define __lcd_set_dis() ( REG_LCD_CTRL |= LCD_CTRL_DIS ) ++#define __lcd_clr_dis() ( REG_LCD_CTRL &= ~LCD_CTRL_DIS ) ++ ++#define __lcd_set_ena() ( REG_LCD_CTRL |= LCD_CTRL_ENA ) ++#define __lcd_clr_ena() ( REG_LCD_CTRL &= ~LCD_CTRL_ENA ) ++ ++/* n=1,2,4,8,16 */ ++#define __lcd_set_bpp(n) \ ++ ( REG_LCD_CTRL = (REG_LCD_CTRL & ~LCD_CTRL_BPP_MASK) | LCD_CTRL_BPP_##n ) ++ ++/* n=4,8,16 */ ++#define __lcd_set_burst_length(n) \ ++do { \ ++ REG_LCD_CTRL &= ~LCD_CTRL_BST_MASK; \ ++ REG_LCD_CTRL |= LCD_CTRL_BST_n##; \ ++} while (0) ++ ++#define __lcd_select_rgb565() ( REG_LCD_CTRL &= ~LCD_CTRL_RGB555 ) ++#define __lcd_select_rgb555() ( REG_LCD_CTRL |= LCD_CTRL_RGB555 ) ++ ++#define __lcd_set_ofup() ( REG_LCD_CTRL |= LCD_CTRL_OFUP ) ++#define __lcd_clr_ofup() ( REG_LCD_CTRL &= ~LCD_CTRL_OFUP ) ++ ++/* n=2,4,16 */ ++#define __lcd_set_stn_frc(n) \ ++do { \ ++ REG_LCD_CTRL &= ~LCD_CTRL_FRC_MASK; \ ++ REG_LCD_CTRL |= LCD_CTRL_FRC_n##; \ ++} while (0) ++ ++ ++#define __lcd_pixel_endian_little() ( REG_LCD_CTRL |= LCD_CTRL_PEDN ) ++#define __lcd_pixel_endian_big() ( REG_LCD_CTRL &= ~LCD_CTRL_PEDN ) ++ ++#define __lcd_reverse_byte_endian() ( REG_LCD_CTRL |= LCD_CTRL_BEDN ) ++#define __lcd_normal_byte_endian() ( REG_LCD_CTRL &= ~LCD_CTRL_BEDN ) ++ ++#define __lcd_enable_eof_intr() ( REG_LCD_CTRL |= LCD_CTRL_EOFM ) ++#define __lcd_disable_eof_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_EOFM ) ++ ++#define __lcd_enable_sof_intr() ( REG_LCD_CTRL |= LCD_CTRL_SOFM ) ++#define __lcd_disable_sof_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_SOFM ) ++ ++#define __lcd_enable_ofu_intr() ( REG_LCD_CTRL |= LCD_CTRL_OFUM ) ++#define __lcd_disable_ofu_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_OFUM ) ++ ++#define __lcd_enable_ifu0_intr() ( REG_LCD_CTRL |= LCD_CTRL_IFUM0 ) ++#define __lcd_disable_ifu0_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_IFUM0 ) ++ ++#define __lcd_enable_ifu1_intr() ( REG_LCD_CTRL |= LCD_CTRL_IFUM1 ) ++#define __lcd_disable_ifu1_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_IFUM1 ) ++ ++#define __lcd_enable_ldd_intr() ( REG_LCD_CTRL |= LCD_CTRL_LDDM ) ++#define __lcd_disable_ldd_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_LDDM ) ++ ++#define __lcd_enable_qd_intr() ( REG_LCD_CTRL |= LCD_CTRL_QDM ) ++#define __lcd_disable_qd_intr() ( REG_LCD_CTRL &= ~LCD_CTRL_QDM ) ++ ++ ++/* LCD status register indication */ ++ ++#define __lcd_quick_disable_done() ( REG_LCD_STATE & LCD_STATE_QD ) ++#define __lcd_disable_done() ( REG_LCD_STATE & LCD_STATE_LDD ) ++#define __lcd_infifo0_underrun() ( REG_LCD_STATE & LCD_STATE_IFU0 ) ++#define __lcd_infifo1_underrun() ( REG_LCD_STATE & LCD_STATE_IFU1 ) ++#define __lcd_outfifo_underrun() ( REG_LCD_STATE & LCD_STATE_OFU ) ++#define __lcd_start_of_frame() ( REG_LCD_STATE & LCD_STATE_SOF ) ++#define __lcd_end_of_frame() ( REG_LCD_STATE & LCD_STATE_EOF ) ++ ++#define __lcd_clr_outfifounderrun() ( REG_LCD_STATE &= ~LCD_STATE_OFU ) ++#define __lcd_clr_sof() ( REG_LCD_STATE &= ~LCD_STATE_SOF ) ++#define __lcd_clr_eof() ( REG_LCD_STATE &= ~LCD_STATE_EOF ) ++ ++#define __lcd_panel_white() ( REG_LCD_CFG |= LCD_CFG_WHITE ) ++#define __lcd_panel_black() ( REG_LCD_CFG &= ~LCD_CFG_WHITE ) ++ ++/* n=1,2,4,8 for single mono-STN ++ * n=4,8 for dual mono-STN ++ */ ++#define __lcd_set_panel_datawidth(n) \ ++do { \ ++ REG_LCD_CFG &= ~LCD_CFG_PDW_MASK; \ ++ REG_LCD_CFG |= LCD_CFG_PDW_n##; \ ++} while (0) ++ ++/* m=LCD_CFG_MODE_GENERUIC_TFT_xxx */ ++#define __lcd_set_panel_mode(m) \ ++do { \ ++ REG_LCD_CFG &= ~LCD_CFG_MODE_MASK; \ ++ REG_LCD_CFG |= (m); \ ++} while(0) ++ ++/* n = 0-255 */ ++#define __lcd_disable_ac_bias() ( REG_LCD_IO = 0xff ) ++#define __lcd_set_ac_bias(n) \ ++do { \ ++ REG_LCD_IO &= ~LCD_IO_ACB_MASK; \ ++ REG_LCD_IO |= ((n) << LCD_IO_ACB_BIT); \ ++} while(0) ++ ++#define __lcd_io_set_dir() ( REG_LCD_IO |= LCD_IO_DIR ) ++#define __lcd_io_clr_dir() ( REG_LCD_IO &= ~LCD_IO_DIR ) ++ ++#define __lcd_io_set_dep() ( REG_LCD_IO |= LCD_IO_DEP ) ++#define __lcd_io_clr_dep() ( REG_LCD_IO &= ~LCD_IO_DEP ) ++ ++#define __lcd_io_set_vsp() ( REG_LCD_IO |= LCD_IO_VSP ) ++#define __lcd_io_clr_vsp() ( REG_LCD_IO &= ~LCD_IO_VSP ) ++ ++#define __lcd_io_set_hsp() ( REG_LCD_IO |= LCD_IO_HSP ) ++#define __lcd_io_clr_hsp() ( REG_LCD_IO &= ~LCD_IO_HSP ) ++ ++#define __lcd_io_set_pcp() ( REG_LCD_IO |= LCD_IO_PCP ) ++#define __lcd_io_clr_pcp() ( REG_LCD_IO &= ~LCD_IO_PCP ) ++ ++#define __lcd_vsync_get_vps() \ ++ ( (REG_LCD_VSYNC & LCD_VSYNC_VPS_MASK) >> LCD_VSYNC_VPS_BIT ) ++ ++#define __lcd_vsync_get_vpe() \ ++ ( (REG_LCD_VSYNC & LCD_VSYNC_VPE_MASK) >> LCD_VSYNC_VPE_BIT ) ++#define __lcd_vsync_set_vpe(n) \ ++do { \ ++ REG_LCD_VSYNC &= ~LCD_VSYNC_VPE_MASK; \ ++ REG_LCD_VSYNC |= (n) << LCD_VSYNC_VPE_BIT; \ ++} while (0) ++ ++#define __lcd_hsync_get_hps() \ ++ ( (REG_LCD_HSYNC & LCD_HSYNC_HPS_MASK) >> LCD_HSYNC_HPS_BIT ) ++#define __lcd_hsync_set_hps(n) \ ++do { \ ++ REG_LCD_HSYNC &= ~LCD_HSYNC_HPS_MASK; \ ++ REG_LCD_HSYNC |= (n) << LCD_HSYNC_HPS_BIT; \ ++} while (0) ++ ++#define __lcd_hsync_get_hpe() \ ++ ( (REG_LCD_HSYNC & LCD_HSYNC_HPE_MASK) >> LCD_VSYNC_HPE_BIT ) ++#define __lcd_hsync_set_hpe(n) \ ++do { \ ++ REG_LCD_HSYNC &= ~LCD_HSYNC_HPE_MASK; \ ++ REG_LCD_HSYNC |= (n) << LCD_HSYNC_HPE_BIT; \ ++} while (0) ++ ++#define __lcd_vat_get_ht() \ ++ ( (REG_LCD_VAT & LCD_VAT_HT_MASK) >> LCD_VAT_HT_BIT ) ++#define __lcd_vat_set_ht(n) \ ++do { \ ++ REG_LCD_VAT &= ~LCD_VAT_HT_MASK; \ ++ REG_LCD_VAT |= (n) << LCD_VAT_HT_BIT; \ ++} while (0) ++ ++#define __lcd_vat_get_vt() \ ++ ( (REG_LCD_VAT & LCD_VAT_VT_MASK) >> LCD_VAT_VT_BIT ) ++#define __lcd_vat_set_vt(n) \ ++do { \ ++ REG_LCD_VAT &= ~LCD_VAT_VT_MASK; \ ++ REG_LCD_VAT |= (n) << LCD_VAT_VT_BIT; \ ++} while (0) ++ ++#define __lcd_dah_get_hds() \ ++ ( (REG_LCD_DAH & LCD_DAH_HDS_MASK) >> LCD_DAH_HDS_BIT ) ++#define __lcd_dah_set_hds(n) \ ++do { \ ++ REG_LCD_DAH &= ~LCD_DAH_HDS_MASK; \ ++ REG_LCD_DAH |= (n) << LCD_DAH_HDS_BIT; \ ++} while (0) ++ ++#define __lcd_dah_get_hde() \ ++ ( (REG_LCD_DAH & LCD_DAH_HDE_MASK) >> LCD_DAH_HDE_BIT ) ++#define __lcd_dah_set_hde(n) \ ++do { \ ++ REG_LCD_DAH &= ~LCD_DAH_HDE_MASK; \ ++ REG_LCD_DAH |= (n) << LCD_DAH_HDE_BIT; \ ++} while (0) ++ ++#define __lcd_dav_get_vds() \ ++ ( (REG_LCD_DAV & LCD_DAV_VDS_MASK) >> LCD_DAV_VDS_BIT ) ++#define __lcd_dav_set_vds(n) \ ++do { \ ++ REG_LCD_DAV &= ~LCD_DAV_VDS_MASK; \ ++ REG_LCD_DAV |= (n) << LCD_DAV_VDS_BIT; \ ++} while (0) ++ ++#define __lcd_dav_get_vde() \ ++ ( (REG_LCD_DAV & LCD_DAV_VDE_MASK) >> LCD_DAV_VDE_BIT ) ++#define __lcd_dav_set_vde(n) \ ++do { \ ++ REG_LCD_DAV &= ~LCD_DAV_VDE_MASK; \ ++ REG_LCD_DAV |= (n) << LCD_DAV_VDE_BIT; \ ++} while (0) ++ ++#define __lcd_cmd0_set_sofint() ( REG_LCD_CMD0 |= LCD_CMD_SOFINT ) ++#define __lcd_cmd0_clr_sofint() ( REG_LCD_CMD0 &= ~LCD_CMD_SOFINT ) ++#define __lcd_cmd1_set_sofint() ( REG_LCD_CMD1 |= LCD_CMD_SOFINT ) ++#define __lcd_cmd1_clr_sofint() ( REG_LCD_CMD1 &= ~LCD_CMD_SOFINT ) ++ ++#define __lcd_cmd0_set_eofint() ( REG_LCD_CMD0 |= LCD_CMD_EOFINT ) ++#define __lcd_cmd0_clr_eofint() ( REG_LCD_CMD0 &= ~LCD_CMD_EOFINT ) ++#define __lcd_cmd1_set_eofint() ( REG_LCD_CMD1 |= LCD_CMD_EOFINT ) ++#define __lcd_cmd1_clr_eofint() ( REG_LCD_CMD1 &= ~LCD_CMD_EOFINT ) ++ ++#define __lcd_cmd0_set_pal() ( REG_LCD_CMD0 |= LCD_CMD_PAL ) ++#define __lcd_cmd0_clr_pal() ( REG_LCD_CMD0 &= ~LCD_CMD_PAL ) ++ ++#define __lcd_cmd0_get_len() \ ++ ( (REG_LCD_CMD0 & LCD_CMD_LEN_MASK) >> LCD_CMD_LEN_BIT ) ++#define __lcd_cmd1_get_len() \ ++ ( (REG_LCD_CMD1 & LCD_CMD_LEN_MASK) >> LCD_CMD_LEN_BIT ) ++ ++/******************************************************* ++ * SMART LCD ++ *******************************************************/ ++ ++#define __slcd_dma_enable() (REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN) ++#define __slcd_dma_disable() \ ++do {\ ++ while (REG_SLCD_STATE & SLCD_STATE_BUSY); \ ++ REG_SLCD_CTRL &= ~SLCD_CTRL_DMA_EN; \ ++} while(0) ++ ++/******************************************************* ++ * SMART LCD ++ *******************************************************/ ++ ++#define __slcd_dma_enable() (REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN) ++#define __slcd_dma_disable() \ ++do {\ ++ while (REG_SLCD_STATE & SLCD_STATE_BUSY); \ ++ REG_SLCD_CTRL &= ~SLCD_CTRL_DMA_EN; \ ++} while(0) ++ ++/*************************************************************************** ++ * RTC ops ++ ***************************************************************************/ ++ ++#define __rtc_write_ready() ( (REG_RTC_RCR & RTC_RCR_WRDY) >> RTC_RCR_WRDY_BIT ) ++#define __rtc_enabled() ( REG_RTC_RCR |= RTC_RCR_RTCE ) ++#define __rtc_disabled() ( REG_RTC_RCR &= ~RTC_RCR_RTCE ) ++#define __rtc_enable_alarm() ( REG_RTC_RCR |= RTC_RCR_AE ) ++#define __rtc_disable_alarm() ( REG_RTC_RCR &= ~RTC_RCR_AE ) ++#define __rtc_enable_alarm_irq() ( REG_RTC_RCR |= RTC_RCR_AIE ) ++#define __rtc_disable_alarm_irq() ( REG_RTC_RCR &= ~RTC_RCR_AIE ) ++#define __rtc_enable_1Hz_irq() ( REG_RTC_RCR |= RTC_RCR_1HZIE ) ++#define __rtc_disable_1Hz_irq() ( REG_RTC_RCR &= ~RTC_RCR_1HZIE ) ++ ++#define __rtc_get_1Hz_flag() ( (REG_RTC_RCR >> RTC_RCR_1HZ_BIT) & 0x1 ) ++#define __rtc_clear_1Hz_flag() ( REG_RTC_RCR &= ~RTC_RCR_1HZ ) ++#define __rtc_get_alarm_flag() ( (REG_RTC_RCR >> RTC_RCR_AF_BIT) & 0x1 ) ++#define __rtc_clear_alarm_flag() ( REG_RTC_RCR &= ~RTC_RCR_AF ) ++ ++#define __rtc_get_second() ( REG_RTC_RSR ) ++#define __rtc_set_second(v) ( REG_RTC_RSR = v ) ++ ++#define __rtc_get_alarm_second() ( REG_RTC_RSAR ) ++#define __rtc_set_alarm_second(v) ( REG_RTC_RSAR = v ) ++ ++#define __rtc_RGR_is_locked() ( (REG_RTC_RGR >> RTC_RGR_LOCK) ) ++#define __rtc_lock_RGR() ( REG_RTC_RGR |= RTC_RGR_LOCK ) ++#define __rtc_unlock_RGR() ( REG_RTC_RGR &= ~RTC_RGR_LOCK ) ++#define __rtc_get_adjc_val() ( (REG_RTC_RGR & RTC_RGR_ADJC_MASK) >> RTC_RGR_ADJC_BIT ) ++#define __rtc_set_adjc_val(v) \ ++ ( REG_RTC_RGR = ( (REG_RTC_RGR & ~RTC_RGR_ADJC_MASK) | (v << RTC_RGR_ADJC_BIT) )) ++#define __rtc_get_nc1Hz_val() ( (REG_RTC_RGR & RTC_RGR_NC1HZ_MASK) >> RTC_RGR_NC1HZ_BIT ) ++#define __rtc_set_nc1Hz_val(v) \ ++ ( REG_RTC_RGR = ( (REG_RTC_RGR & ~RTC_RGR_NC1HZ_MASK) | (v << RTC_RGR_NC1HZ_BIT) )) ++ ++#define __rtc_power_down() ( REG_RTC_HCR |= RTC_HCR_PD ) ++ ++#define __rtc_get_hwfcr_val() ( REG_RTC_HWFCR & RTC_HWFCR_MASK ) ++#define __rtc_set_hwfcr_val(v) ( REG_RTC_HWFCR = (v) & RTC_HWFCR_MASK ) ++#define __rtc_get_hrcr_val() ( REG_RTC_HRCR & RTC_HRCR_MASK ) ++#define __rtc_set_hrcr_val(v) ( REG_RTC_HRCR = (v) & RTC_HRCR_MASK ) ++ ++#define __rtc_enable_alarm_wakeup() ( REG_RTC_HWCR |= RTC_HWCR_EALM ) ++#define __rtc_disable_alarm_wakeup() ( REG_RTC_HWCR &= ~RTC_HWCR_EALM ) ++ ++#define __rtc_status_hib_reset_occur() ( (REG_RTC_HWRSR >> RTC_HWRSR_HR) & 0x1 ) ++#define __rtc_status_ppr_reset_occur() ( (REG_RTC_HWRSR >> RTC_HWRSR_PPR) & 0x1 ) ++#define __rtc_status_wakeup_pin_waken_up() ( (REG_RTC_HWRSR >> RTC_HWRSR_PIN) & 0x1 ) ++#define __rtc_status_alarm_waken_up() ( (REG_RTC_HWRSR >> RTC_HWRSR_ALM) & 0x1 ) ++#define __rtc_clear_hib_stat_all() ( REG_RTC_HWRSR = 0 ) ++ ++#define __rtc_get_scratch_pattern() (REG_RTC_HSPR) ++#define __rtc_set_scratch_pattern(n) (REG_RTC_HSPR = n ) ++ ++ ++ ++#endif /* __JZ4740_OPS_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/platform.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/platform.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/platform.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/platform.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,19 @@ ++ ++#ifndef __JZ4740_PLATFORM_H ++#define __JZ4740_PLATFORM_H ++ ++#include <linux/platform_device.h> ++ ++extern struct platform_device jz4740_usb_ohci_device; ++extern struct platform_device jz4740_usb_gdt_device; ++extern struct platform_device jz4740_mmc_device; ++extern struct platform_device jz4740_rtc_device; ++extern struct platform_device jz4740_i2c_device; ++extern struct platform_device jz4740_nand_device; ++extern struct platform_device jz4740_framebuffer_device; ++extern struct platform_device jz4740_i2s_device; ++extern struct platform_device jz4740_codec_device; ++extern struct platform_device jz4740_adc_device; ++extern struct platform_device jz4740_battery_device; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/regs.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/regs.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/regs.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/regs.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,2397 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/regs.h ++ * ++ * Ingenic's JZ4740 common include. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <yliu@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __JZ4740_REGS_H__ ++#define __JZ4740_REGS_H__ ++ ++#if defined(__ASSEMBLY__) || defined(__LANGUAGE_ASSEMBLY) ++#define REG8(addr) (addr) ++#define REG16(addr) (addr) ++#define REG32(addr) (addr) ++#else ++#define REG8(addr) *((volatile unsigned char *)(addr)) ++#define REG16(addr) *((volatile unsigned short *)(addr)) ++#define REG32(addr) *((volatile unsigned int *)(addr)) ++#endif ++ ++/* ++ * Define the module base addresses ++ */ ++#define CPM_BASE 0xB0000000 ++#define INTC_BASE 0xB0001000 ++#define TCU_BASE 0xB0002000 ++#define WDT_BASE 0xB0002000 ++#define RTC_BASE 0xB0003000 ++#define GPIO_BASE 0xB0010000 ++#define AIC_BASE 0xB0020000 ++#define ICDC_BASE 0xB0020000 ++#define MSC_BASE 0xB0021000 ++#define UART0_BASE 0xB0030000 ++#define UART1_BASE 0xB0031000 ++#define I2C_BASE 0xB0042000 ++#define SSI_BASE 0xB0043000 ++#define SADC_BASE 0xB0070000 ++#define EMC_BASE 0xB3010000 ++#define DMAC_BASE 0xB3020000 ++#define UHC_BASE 0xB3030000 ++#define UDC_BASE 0xB3040000 ++#define LCD_BASE 0xB3050000 ++#define SLCD_BASE 0xB3050000 ++#define CIM_BASE 0xB3060000 ++#define IPU_BASE 0xB3080000 ++#define ETH_BASE 0xB3100000 ++ ++ ++/************************************************************************* ++ * INTC (Interrupt Controller) ++ *************************************************************************/ ++#define INTC_ISR (INTC_BASE + 0x00) ++#define INTC_IMR (INTC_BASE + 0x04) ++#define INTC_IMSR (INTC_BASE + 0x08) ++#define INTC_IMCR (INTC_BASE + 0x0c) ++#define INTC_IPR (INTC_BASE + 0x10) ++ ++#define REG_INTC_ISR REG32(INTC_ISR) ++#define REG_INTC_IMR REG32(INTC_IMR) ++#define REG_INTC_IMSR REG32(INTC_IMSR) ++#define REG_INTC_IMCR REG32(INTC_IMCR) ++#define REG_INTC_IPR REG32(INTC_IPR) ++ ++// 1st-level interrupts ++#define JZ_IRQ_BASE 8 ++#define JZ_IRQ(x) (JZ_IRQ_BASE + (x)) ++#define JZ_IRQ_I2C JZ_IRQ(1) ++#define JZ_IRQ_UHC JZ_IRQ(3) ++#define JZ_IRQ_UART1 JZ_IRQ(8) ++#define JZ_IRQ_UART0 JZ_IRQ(9) ++#define JZ_IRQ_SADC JZ_IRQ(12) ++#define JZ_IRQ_MSC JZ_IRQ(14) ++#define JZ_IRQ_RTC JZ_IRQ(15) ++#define JZ_IRQ_SSI JZ_IRQ(16) ++#define JZ_IRQ_CIM JZ_IRQ(17) ++#define JZ_IRQ_AIC JZ_IRQ(18) ++#define JZ_IRQ_ETH JZ_IRQ(19) ++#define JZ_IRQ_DMAC JZ_IRQ(20) ++#define JZ_IRQ_TCU2 JZ_IRQ(21) ++#define JZ_IRQ_TCU1 JZ_IRQ(22) ++#define JZ_IRQ_TCU0 JZ_IRQ(23) ++#define JZ_IRQ_UDC JZ_IRQ(24) ++#define JZ_IRQ_GPIO3 JZ_IRQ(25) ++#define JZ_IRQ_GPIO2 JZ_IRQ(26) ++#define JZ_IRQ_GPIO1 JZ_IRQ(27) ++#define JZ_IRQ_GPIO0 JZ_IRQ(28) ++#define JZ_IRQ_IPU JZ_IRQ(29) ++#define JZ_IRQ_LCD JZ_IRQ(30) ++ ++/* 2nd-level interrupts */ ++#define JZ_IRQ_DMA(x) ((x) + JZ_IRQ(32)) /* 32 to 37 for DMAC channel 0 to 5 */ ++#define IRQ_GPIO_0 JZ_IRQ(48) /* 48 to 175 for GPIO pin 0 to 127 */ ++ ++#define JZ_IRQ_INTC_GPIO(x) (JZ_IRQ_GPIO0 - (x)) ++#define JZ_IRQ_GPIO(x) (IRQ_GPIO_0 + (x)) ++ ++#define NUM_DMA 6 ++#define NUM_GPIO 128 ++/************************************************************************* ++ * RTC ++ *************************************************************************/ ++#define RTC_RCR (RTC_BASE + 0x00) /* RTC Control Register */ ++#define RTC_RSR (RTC_BASE + 0x04) /* RTC Second Register */ ++#define RTC_RSAR (RTC_BASE + 0x08) /* RTC Second Alarm Register */ ++#define RTC_RGR (RTC_BASE + 0x0c) /* RTC Regulator Register */ ++ ++#define RTC_HCR (RTC_BASE + 0x20) /* Hibernate Control Register */ ++#define RTC_HWFCR (RTC_BASE + 0x24) /* Hibernate Wakeup Filter Counter Reg */ ++#define RTC_HRCR (RTC_BASE + 0x28) /* Hibernate Reset Counter Register */ ++#define RTC_HWCR (RTC_BASE + 0x2c) /* Hibernate Wakeup Control Register */ ++#define RTC_HWRSR (RTC_BASE + 0x30) /* Hibernate Wakeup Status Register */ ++#define RTC_HSPR (RTC_BASE + 0x34) /* Hibernate Scratch Pattern Register */ ++ ++#define REG_RTC_RCR REG32(RTC_RCR) ++#define REG_RTC_RSR REG32(RTC_RSR) ++#define REG_RTC_RSAR REG32(RTC_RSAR) ++#define REG_RTC_RGR REG32(RTC_RGR) ++#define REG_RTC_HCR REG32(RTC_HCR) ++#define REG_RTC_HWFCR REG32(RTC_HWFCR) ++#define REG_RTC_HRCR REG32(RTC_HRCR) ++#define REG_RTC_HWCR REG32(RTC_HWCR) ++#define REG_RTC_HWRSR REG32(RTC_HWRSR) ++#define REG_RTC_HSPR REG32(RTC_HSPR) ++ ++/* RTC Control Register */ ++#define RTC_RCR_WRDY_BIT 7 ++#define RTC_RCR_WRDY (1 << 7) /* Write Ready Flag */ ++#define RTC_RCR_1HZ_BIT 6 ++#define RTC_RCR_1HZ (1 << RTC_RCR_1HZ_BIT) /* 1Hz Flag */ ++#define RTC_RCR_1HZIE (1 << 5) /* 1Hz Interrupt Enable */ ++#define RTC_RCR_AF_BIT 4 ++#define RTC_RCR_AF (1 << RTC_RCR_AF_BIT) /* Alarm Flag */ ++#define RTC_RCR_AIE (1 << 3) /* Alarm Interrupt Enable */ ++#define RTC_RCR_AE (1 << 2) /* Alarm Enable */ ++#define RTC_RCR_RTCE (1 << 0) /* RTC Enable */ ++ ++/* RTC Regulator Register */ ++#define RTC_RGR_LOCK (1 << 31) /* Lock Bit */ ++#define RTC_RGR_ADJC_BIT 16 ++#define RTC_RGR_ADJC_MASK (0x3ff << RTC_RGR_ADJC_BIT) ++#define RTC_RGR_NC1HZ_BIT 0 ++#define RTC_RGR_NC1HZ_MASK (0xffff << RTC_RGR_NC1HZ_BIT) ++ ++/* Hibernate Control Register */ ++#define RTC_HCR_PD (1 << 0) /* Power Down */ ++ ++/* Hibernate Wakeup Filter Counter Register */ ++#define RTC_HWFCR_BIT 5 ++#define RTC_HWFCR_MASK (0x7ff << RTC_HWFCR_BIT) ++ ++/* Hibernate Reset Counter Register */ ++#define RTC_HRCR_BIT 5 ++#define RTC_HRCR_MASK (0x7f << RTC_HRCR_BIT) ++ ++/* Hibernate Wakeup Control Register */ ++#define RTC_HWCR_EALM (1 << 0) /* RTC alarm wakeup enable */ ++ ++/* Hibernate Wakeup Status Register */ ++#define RTC_HWRSR_HR (1 << 5) /* Hibernate reset */ ++#define RTC_HWRSR_PPR (1 << 4) /* PPR reset */ ++#define RTC_HWRSR_PIN (1 << 1) /* Wakeup pin status bit */ ++#define RTC_HWRSR_ALM (1 << 0) /* RTC alarm status bit */ ++ ++ ++/************************************************************************* ++ * CPM (Clock reset and Power control Management) ++ *************************************************************************/ ++#define CPM_CPCCR (CPM_BASE+0x00) ++#define CPM_CPPCR (CPM_BASE+0x10) ++#define CPM_I2SCDR (CPM_BASE+0x60) ++#define CPM_LPCDR (CPM_BASE+0x64) ++#define CPM_MSCCDR (CPM_BASE+0x68) ++#define CPM_UHCCDR (CPM_BASE+0x6C) ++#define CPM_SSICDR (CPM_BASE+0x74) ++ ++#define CPM_LCR (CPM_BASE+0x04) ++#define CPM_CLKGR (CPM_BASE+0x20) ++#define CPM_SCR (CPM_BASE+0x24) ++ ++#define CPM_HCR (CPM_BASE+0x30) ++#define CPM_HWFCR (CPM_BASE+0x34) ++#define CPM_HRCR (CPM_BASE+0x38) ++#define CPM_HWCR (CPM_BASE+0x3c) ++#define CPM_HWSR (CPM_BASE+0x40) ++#define CPM_HSPR (CPM_BASE+0x44) ++ ++#define CPM_RSR (CPM_BASE+0x08) ++ ++ ++#define REG_CPM_CPCCR REG32(CPM_CPCCR) ++#define REG_CPM_CPPCR REG32(CPM_CPPCR) ++#define REG_CPM_I2SCDR REG32(CPM_I2SCDR) ++#define REG_CPM_LPCDR REG32(CPM_LPCDR) ++#define REG_CPM_MSCCDR REG32(CPM_MSCCDR) ++#define REG_CPM_UHCCDR REG32(CPM_UHCCDR) ++#define REG_CPM_SSICDR REG32(CPM_SSICDR) ++ ++#define REG_CPM_LCR REG32(CPM_LCR) ++#define REG_CPM_CLKGR REG32(CPM_CLKGR) ++#define REG_CPM_SCR REG32(CPM_SCR) ++#define REG_CPM_HCR REG32(CPM_HCR) ++#define REG_CPM_HWFCR REG32(CPM_HWFCR) ++#define REG_CPM_HRCR REG32(CPM_HRCR) ++#define REG_CPM_HWCR REG32(CPM_HWCR) ++#define REG_CPM_HWSR REG32(CPM_HWSR) ++#define REG_CPM_HSPR REG32(CPM_HSPR) ++ ++#define REG_CPM_RSR REG32(CPM_RSR) ++ ++ ++/* Clock Control Register */ ++#define CPM_CPCCR_I2CS (1 << 31) ++#define CPM_CPCCR_CLKOEN (1 << 30) ++#define CPM_CPCCR_UCS (1 << 29) ++#define CPM_CPCCR_UDIV_BIT 23 ++#define CPM_CPCCR_UDIV_MASK (0x3f << CPM_CPCCR_UDIV_BIT) ++#define CPM_CPCCR_CE (1 << 22) ++#define CPM_CPCCR_PCS (1 << 21) ++#define CPM_CPCCR_LDIV_BIT 16 ++#define CPM_CPCCR_LDIV_MASK (0x1f << CPM_CPCCR_LDIV_BIT) ++#define CPM_CPCCR_MDIV_BIT 12 ++#define CPM_CPCCR_MDIV_MASK (0x0f << CPM_CPCCR_MDIV_BIT) ++#define CPM_CPCCR_PDIV_BIT 8 ++#define CPM_CPCCR_PDIV_MASK (0x0f << CPM_CPCCR_PDIV_BIT) ++#define CPM_CPCCR_HDIV_BIT 4 ++#define CPM_CPCCR_HDIV_MASK (0x0f << CPM_CPCCR_HDIV_BIT) ++#define CPM_CPCCR_CDIV_BIT 0 ++#define CPM_CPCCR_CDIV_MASK (0x0f << CPM_CPCCR_CDIV_BIT) ++ ++/* I2S Clock Divider Register */ ++#define CPM_I2SCDR_I2SDIV_BIT 0 ++#define CPM_I2SCDR_I2SDIV_MASK (0x1ff << CPM_I2SCDR_I2SDIV_BIT) ++ ++/* LCD Pixel Clock Divider Register */ ++#define CPM_LPCDR_PIXDIV_BIT 0 ++#define CPM_LPCDR_PIXDIV_MASK (0x7ff << CPM_LPCDR_PIXDIV_BIT) ++ ++/* MSC Clock Divider Register */ ++#define CPM_MSCCDR_MSCDIV_BIT 0 ++#define CPM_MSCCDR_MSCDIV_MASK (0x1f << CPM_MSCCDR_MSCDIV_BIT) ++ ++/* UHC Clock Divider Register */ ++#define CPM_UHCCDR_UHCDIV_BIT 0 ++#define CPM_UHCCDR_UHCDIV_MASK (0xf << CPM_UHCCDR_UHCDIV_BIT) ++ ++/* SSI Clock Divider Register */ ++#define CPM_SSICDR_SCS (1<<31) /* SSI clock source selection, 0:EXCLK, 1: PLL */ ++#define CPM_SSICDR_SSIDIV_BIT 0 ++#define CPM_SSICDR_SSIDIV_MASK (0xf << CPM_SSICDR_SSIDIV_BIT) ++ ++/* PLL Control Register */ ++#define CPM_CPPCR_PLLM_BIT 23 ++#define CPM_CPPCR_PLLM_MASK (0x1ff << CPM_CPPCR_PLLM_BIT) ++#define CPM_CPPCR_PLLN_BIT 18 ++#define CPM_CPPCR_PLLN_MASK (0x1f << CPM_CPPCR_PLLN_BIT) ++#define CPM_CPPCR_PLLOD_BIT 16 ++#define CPM_CPPCR_PLLOD_MASK (0x03 << CPM_CPPCR_PLLOD_BIT) ++#define CPM_CPPCR_PLLS (1 << 10) ++#define CPM_CPPCR_PLLBP (1 << 9) ++#define CPM_CPPCR_PLLEN (1 << 8) ++#define CPM_CPPCR_PLLST_BIT 0 ++#define CPM_CPPCR_PLLST_MASK (0xff << CPM_CPPCR_PLLST_BIT) ++ ++/* Low Power Control Register */ ++#define CPM_LCR_DOZE_DUTY_BIT 3 ++#define CPM_LCR_DOZE_DUTY_MASK (0x1f << CPM_LCR_DOZE_DUTY_BIT) ++#define CPM_LCR_DOZE_ON (1 << 2) ++#define CPM_LCR_LPM_BIT 0 ++#define CPM_LCR_LPM_MASK (0x3 << CPM_LCR_LPM_BIT) ++ #define CPM_LCR_LPM_IDLE (0x0 << CPM_LCR_LPM_BIT) ++ #define CPM_LCR_LPM_SLEEP (0x1 << CPM_LCR_LPM_BIT) ++ ++/* Clock Gate Register */ ++#define CPM_CLKGR_UART1 (1 << 15) ++#define CPM_CLKGR_UHC (1 << 14) ++#define CPM_CLKGR_IPU (1 << 13) ++#define CPM_CLKGR_DMAC (1 << 12) ++#define CPM_CLKGR_UDC (1 << 11) ++#define CPM_CLKGR_LCD (1 << 10) ++#define CPM_CLKGR_CIM (1 << 9) ++#define CPM_CLKGR_SADC (1 << 8) ++#define CPM_CLKGR_MSC (1 << 7) ++#define CPM_CLKGR_AIC1 (1 << 6) ++#define CPM_CLKGR_AIC2 (1 << 5) ++#define CPM_CLKGR_SSI (1 << 4) ++#define CPM_CLKGR_I2C (1 << 3) ++#define CPM_CLKGR_RTC (1 << 2) ++#define CPM_CLKGR_TCU (1 << 1) ++#define CPM_CLKGR_UART0 (1 << 0) ++ ++/* Sleep Control Register */ ++#define CPM_SCR_O1ST_BIT 8 ++#define CPM_SCR_O1ST_MASK (0xff << CPM_SCR_O1ST_BIT) ++#define CPM_SCR_USBPHY_ENABLE (1 << 6) ++#define CPM_SCR_OSC_ENABLE (1 << 4) ++ ++/* Hibernate Control Register */ ++#define CPM_HCR_PD (1 << 0) ++ ++/* Wakeup Filter Counter Register in Hibernate Mode */ ++#define CPM_HWFCR_TIME_BIT 0 ++#define CPM_HWFCR_TIME_MASK (0x3ff << CPM_HWFCR_TIME_BIT) ++ ++/* Reset Counter Register in Hibernate Mode */ ++#define CPM_HRCR_TIME_BIT 0 ++#define CPM_HRCR_TIME_MASK (0x7f << CPM_HRCR_TIME_BIT) ++ ++/* Wakeup Control Register in Hibernate Mode */ ++#define CPM_HWCR_WLE_LOW (0 << 2) ++#define CPM_HWCR_WLE_HIGH (1 << 2) ++#define CPM_HWCR_PIN_WAKEUP (1 << 1) ++#define CPM_HWCR_RTC_WAKEUP (1 << 0) ++ ++/* Wakeup Status Register in Hibernate Mode */ ++#define CPM_HWSR_WSR_PIN (1 << 1) ++#define CPM_HWSR_WSR_RTC (1 << 0) ++ ++/* Reset Status Register */ ++#define CPM_RSR_HR (1 << 2) ++#define CPM_RSR_WR (1 << 1) ++#define CPM_RSR_PR (1 << 0) ++ ++ ++/************************************************************************* ++ * TCU (Timer Counter Unit) ++ *************************************************************************/ ++#define TCU_TSR (TCU_BASE + 0x1C) /* Timer Stop Register */ ++#define TCU_TSSR (TCU_BASE + 0x2C) /* Timer Stop Set Register */ ++#define TCU_TSCR (TCU_BASE + 0x3C) /* Timer Stop Clear Register */ ++#define TCU_TER (TCU_BASE + 0x10) /* Timer Counter Enable Register */ ++#define TCU_TESR (TCU_BASE + 0x14) /* Timer Counter Enable Set Register */ ++#define TCU_TECR (TCU_BASE + 0x18) /* Timer Counter Enable Clear Register */ ++#define TCU_TFR (TCU_BASE + 0x20) /* Timer Flag Register */ ++#define TCU_TFSR (TCU_BASE + 0x24) /* Timer Flag Set Register */ ++#define TCU_TFCR (TCU_BASE + 0x28) /* Timer Flag Clear Register */ ++#define TCU_TMR (TCU_BASE + 0x30) /* Timer Mask Register */ ++#define TCU_TMSR (TCU_BASE + 0x34) /* Timer Mask Set Register */ ++#define TCU_TMCR (TCU_BASE + 0x38) /* Timer Mask Clear Register */ ++#define TCU_TDFR0 (TCU_BASE + 0x40) /* Timer Data Full Register */ ++#define TCU_TDHR0 (TCU_BASE + 0x44) /* Timer Data Half Register */ ++#define TCU_TCNT0 (TCU_BASE + 0x48) /* Timer Counter Register */ ++#define TCU_TCSR0 (TCU_BASE + 0x4C) /* Timer Control Register */ ++#define TCU_TDFR1 (TCU_BASE + 0x50) ++#define TCU_TDHR1 (TCU_BASE + 0x54) ++#define TCU_TCNT1 (TCU_BASE + 0x58) ++#define TCU_TCSR1 (TCU_BASE + 0x5C) ++#define TCU_TDFR2 (TCU_BASE + 0x60) ++#define TCU_TDHR2 (TCU_BASE + 0x64) ++#define TCU_TCNT2 (TCU_BASE + 0x68) ++#define TCU_TCSR2 (TCU_BASE + 0x6C) ++#define TCU_TDFR3 (TCU_BASE + 0x70) ++#define TCU_TDHR3 (TCU_BASE + 0x74) ++#define TCU_TCNT3 (TCU_BASE + 0x78) ++#define TCU_TCSR3 (TCU_BASE + 0x7C) ++#define TCU_TDFR4 (TCU_BASE + 0x80) ++#define TCU_TDHR4 (TCU_BASE + 0x84) ++#define TCU_TCNT4 (TCU_BASE + 0x88) ++#define TCU_TCSR4 (TCU_BASE + 0x8C) ++#define TCU_TDFR5 (TCU_BASE + 0x90) ++#define TCU_TDHR5 (TCU_BASE + 0x94) ++#define TCU_TCNT5 (TCU_BASE + 0x98) ++#define TCU_TCSR5 (TCU_BASE + 0x9C) ++ ++#define REG_TCU_TSR REG32(TCU_TSR) ++#define REG_TCU_TSSR REG32(TCU_TSSR) ++#define REG_TCU_TSCR REG32(TCU_TSCR) ++#define REG_TCU_TER REG8(TCU_TER) ++#define REG_TCU_TESR REG8(TCU_TESR) ++#define REG_TCU_TECR REG8(TCU_TECR) ++#define REG_TCU_TFR REG32(TCU_TFR) ++#define REG_TCU_TFSR REG32(TCU_TFSR) ++#define REG_TCU_TFCR REG32(TCU_TFCR) ++#define REG_TCU_TMR REG32(TCU_TMR) ++#define REG_TCU_TMSR REG32(TCU_TMSR) ++#define REG_TCU_TMCR REG32(TCU_TMCR) ++#define REG_TCU_TDFR0 REG16(TCU_TDFR0) ++#define REG_TCU_TDHR0 REG16(TCU_TDHR0) ++#define REG_TCU_TCNT0 REG16(TCU_TCNT0) ++#define REG_TCU_TCSR0 REG16(TCU_TCSR0) ++#define REG_TCU_TDFR1 REG16(TCU_TDFR1) ++#define REG_TCU_TDHR1 REG16(TCU_TDHR1) ++#define REG_TCU_TCNT1 REG16(TCU_TCNT1) ++#define REG_TCU_TCSR1 REG16(TCU_TCSR1) ++#define REG_TCU_TDFR2 REG16(TCU_TDFR2) ++#define REG_TCU_TDHR2 REG16(TCU_TDHR2) ++#define REG_TCU_TCNT2 REG16(TCU_TCNT2) ++#define REG_TCU_TCSR2 REG16(TCU_TCSR2) ++#define REG_TCU_TDFR3 REG16(TCU_TDFR3) ++#define REG_TCU_TDHR3 REG16(TCU_TDHR3) ++#define REG_TCU_TCNT3 REG16(TCU_TCNT3) ++#define REG_TCU_TCSR3 REG16(TCU_TCSR3) ++#define REG_TCU_TDFR4 REG16(TCU_TDFR4) ++#define REG_TCU_TDHR4 REG16(TCU_TDHR4) ++#define REG_TCU_TCNT4 REG16(TCU_TCNT4) ++#define REG_TCU_TCSR4 REG16(TCU_TCSR4) ++ ++// n = 0,1,2,3,4,5 ++#define TCU_TDFR(n) (TCU_BASE + (0x40 + (n)*0x10)) /* Timer Data Full Reg */ ++#define TCU_TDHR(n) (TCU_BASE + (0x44 + (n)*0x10)) /* Timer Data Half Reg */ ++#define TCU_TCNT(n) (TCU_BASE + (0x48 + (n)*0x10)) /* Timer Counter Reg */ ++#define TCU_TCSR(n) (TCU_BASE + (0x4C + (n)*0x10)) /* Timer Control Reg */ ++ ++#define REG_TCU_TDFR(n) REG16(TCU_TDFR((n))) ++#define REG_TCU_TDHR(n) REG16(TCU_TDHR((n))) ++#define REG_TCU_TCNT(n) REG16(TCU_TCNT((n))) ++#define REG_TCU_TCSR(n) REG16(TCU_TCSR((n))) ++ ++// Register definitions ++#define TCU_TCSR_PWM_SD (1 << 9) ++#define TCU_TCSR_PWM_INITL_HIGH (1 << 8) ++#define TCU_TCSR_PWM_EN (1 << 7) ++#define TCU_TCSR_PRESCALE_BIT 3 ++#define TCU_TCSR_PRESCALE_MASK (0x7 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE1 (0x0 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE4 (0x1 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE16 (0x2 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE64 (0x3 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE256 (0x4 << TCU_TCSR_PRESCALE_BIT) ++ #define TCU_TCSR_PRESCALE1024 (0x5 << TCU_TCSR_PRESCALE_BIT) ++#define TCU_TCSR_EXT_EN (1 << 2) ++#define TCU_TCSR_RTC_EN (1 << 1) ++#define TCU_TCSR_PCK_EN (1 << 0) ++ ++#define TCU_TER_TCEN5 (1 << 5) ++#define TCU_TER_TCEN4 (1 << 4) ++#define TCU_TER_TCEN3 (1 << 3) ++#define TCU_TER_TCEN2 (1 << 2) ++#define TCU_TER_TCEN1 (1 << 1) ++#define TCU_TER_TCEN0 (1 << 0) ++ ++#define TCU_TESR_TCST5 (1 << 5) ++#define TCU_TESR_TCST4 (1 << 4) ++#define TCU_TESR_TCST3 (1 << 3) ++#define TCU_TESR_TCST2 (1 << 2) ++#define TCU_TESR_TCST1 (1 << 1) ++#define TCU_TESR_TCST0 (1 << 0) ++ ++#define TCU_TECR_TCCL5 (1 << 5) ++#define TCU_TECR_TCCL4 (1 << 4) ++#define TCU_TECR_TCCL3 (1 << 3) ++#define TCU_TECR_TCCL2 (1 << 2) ++#define TCU_TECR_TCCL1 (1 << 1) ++#define TCU_TECR_TCCL0 (1 << 0) ++ ++#define TCU_TFR_HFLAG5 (1 << 21) ++#define TCU_TFR_HFLAG4 (1 << 20) ++#define TCU_TFR_HFLAG3 (1 << 19) ++#define TCU_TFR_HFLAG2 (1 << 18) ++#define TCU_TFR_HFLAG1 (1 << 17) ++#define TCU_TFR_HFLAG0 (1 << 16) ++#define TCU_TFR_FFLAG5 (1 << 5) ++#define TCU_TFR_FFLAG4 (1 << 4) ++#define TCU_TFR_FFLAG3 (1 << 3) ++#define TCU_TFR_FFLAG2 (1 << 2) ++#define TCU_TFR_FFLAG1 (1 << 1) ++#define TCU_TFR_FFLAG0 (1 << 0) ++ ++#define TCU_TFSR_HFLAG5 (1 << 21) ++#define TCU_TFSR_HFLAG4 (1 << 20) ++#define TCU_TFSR_HFLAG3 (1 << 19) ++#define TCU_TFSR_HFLAG2 (1 << 18) ++#define TCU_TFSR_HFLAG1 (1 << 17) ++#define TCU_TFSR_HFLAG0 (1 << 16) ++#define TCU_TFSR_FFLAG5 (1 << 5) ++#define TCU_TFSR_FFLAG4 (1 << 4) ++#define TCU_TFSR_FFLAG3 (1 << 3) ++#define TCU_TFSR_FFLAG2 (1 << 2) ++#define TCU_TFSR_FFLAG1 (1 << 1) ++#define TCU_TFSR_FFLAG0 (1 << 0) ++ ++#define TCU_TFCR_HFLAG5 (1 << 21) ++#define TCU_TFCR_HFLAG4 (1 << 20) ++#define TCU_TFCR_HFLAG3 (1 << 19) ++#define TCU_TFCR_HFLAG2 (1 << 18) ++#define TCU_TFCR_HFLAG1 (1 << 17) ++#define TCU_TFCR_HFLAG0 (1 << 16) ++#define TCU_TFCR_FFLAG5 (1 << 5) ++#define TCU_TFCR_FFLAG4 (1 << 4) ++#define TCU_TFCR_FFLAG3 (1 << 3) ++#define TCU_TFCR_FFLAG2 (1 << 2) ++#define TCU_TFCR_FFLAG1 (1 << 1) ++#define TCU_TFCR_FFLAG0 (1 << 0) ++ ++#define TCU_TMR_HMASK5 (1 << 21) ++#define TCU_TMR_HMASK4 (1 << 20) ++#define TCU_TMR_HMASK3 (1 << 19) ++#define TCU_TMR_HMASK2 (1 << 18) ++#define TCU_TMR_HMASK1 (1 << 17) ++#define TCU_TMR_HMASK0 (1 << 16) ++#define TCU_TMR_FMASK5 (1 << 5) ++#define TCU_TMR_FMASK4 (1 << 4) ++#define TCU_TMR_FMASK3 (1 << 3) ++#define TCU_TMR_FMASK2 (1 << 2) ++#define TCU_TMR_FMASK1 (1 << 1) ++#define TCU_TMR_FMASK0 (1 << 0) ++ ++#define TCU_TMSR_HMST5 (1 << 21) ++#define TCU_TMSR_HMST4 (1 << 20) ++#define TCU_TMSR_HMST3 (1 << 19) ++#define TCU_TMSR_HMST2 (1 << 18) ++#define TCU_TMSR_HMST1 (1 << 17) ++#define TCU_TMSR_HMST0 (1 << 16) ++#define TCU_TMSR_FMST5 (1 << 5) ++#define TCU_TMSR_FMST4 (1 << 4) ++#define TCU_TMSR_FMST3 (1 << 3) ++#define TCU_TMSR_FMST2 (1 << 2) ++#define TCU_TMSR_FMST1 (1 << 1) ++#define TCU_TMSR_FMST0 (1 << 0) ++ ++#define TCU_TMCR_HMCL5 (1 << 21) ++#define TCU_TMCR_HMCL4 (1 << 20) ++#define TCU_TMCR_HMCL3 (1 << 19) ++#define TCU_TMCR_HMCL2 (1 << 18) ++#define TCU_TMCR_HMCL1 (1 << 17) ++#define TCU_TMCR_HMCL0 (1 << 16) ++#define TCU_TMCR_FMCL5 (1 << 5) ++#define TCU_TMCR_FMCL4 (1 << 4) ++#define TCU_TMCR_FMCL3 (1 << 3) ++#define TCU_TMCR_FMCL2 (1 << 2) ++#define TCU_TMCR_FMCL1 (1 << 1) ++#define TCU_TMCR_FMCL0 (1 << 0) ++ ++#define TCU_TSR_WDTS (1 << 16) ++#define TCU_TSR_STOP5 (1 << 5) ++#define TCU_TSR_STOP4 (1 << 4) ++#define TCU_TSR_STOP3 (1 << 3) ++#define TCU_TSR_STOP2 (1 << 2) ++#define TCU_TSR_STOP1 (1 << 1) ++#define TCU_TSR_STOP0 (1 << 0) ++ ++#define TCU_TSSR_WDTSS (1 << 16) ++#define TCU_TSSR_STPS5 (1 << 5) ++#define TCU_TSSR_STPS4 (1 << 4) ++#define TCU_TSSR_STPS3 (1 << 3) ++#define TCU_TSSR_STPS2 (1 << 2) ++#define TCU_TSSR_STPS1 (1 << 1) ++#define TCU_TSSR_STPS0 (1 << 0) ++ ++#define TCU_TSSR_WDTSC (1 << 16) ++#define TCU_TSSR_STPC5 (1 << 5) ++#define TCU_TSSR_STPC4 (1 << 4) ++#define TCU_TSSR_STPC3 (1 << 3) ++#define TCU_TSSR_STPC2 (1 << 2) ++#define TCU_TSSR_STPC1 (1 << 1) ++#define TCU_TSSR_STPC0 (1 << 0) ++ ++ ++/************************************************************************* ++ * WDT (WatchDog Timer) ++ *************************************************************************/ ++#define WDT_TDR (WDT_BASE + 0x00) ++#define WDT_TCER (WDT_BASE + 0x04) ++#define WDT_TCNT (WDT_BASE + 0x08) ++#define WDT_TCSR (WDT_BASE + 0x0C) ++ ++#define REG_WDT_TDR REG16(WDT_TDR) ++#define REG_WDT_TCER REG8(WDT_TCER) ++#define REG_WDT_TCNT REG16(WDT_TCNT) ++#define REG_WDT_TCSR REG16(WDT_TCSR) ++ ++// Register definition ++#define WDT_TCSR_PRESCALE_BIT 3 ++#define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT) ++ #define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT) ++#define WDT_TCSR_EXT_EN (1 << 2) ++#define WDT_TCSR_RTC_EN (1 << 1) ++#define WDT_TCSR_PCK_EN (1 << 0) ++ ++#define WDT_TCER_TCEN (1 << 0) ++ ++ ++/************************************************************************* ++ * DMAC (DMA Controller) ++ *************************************************************************/ ++ ++#define MAX_DMA_NUM 6 /* max 6 channels */ ++ ++#define DMAC_DSAR(n) (DMAC_BASE + (0x00 + (n) * 0x20)) /* DMA source address */ ++#define DMAC_DTAR(n) (DMAC_BASE + (0x04 + (n) * 0x20)) /* DMA target address */ ++#define DMAC_DTCR(n) (DMAC_BASE + (0x08 + (n) * 0x20)) /* DMA transfer count */ ++#define DMAC_DRSR(n) (DMAC_BASE + (0x0c + (n) * 0x20)) /* DMA request source */ ++#define DMAC_DCCSR(n) (DMAC_BASE + (0x10 + (n) * 0x20)) /* DMA control/status */ ++#define DMAC_DCMD(n) (DMAC_BASE + (0x14 + (n) * 0x20)) /* DMA command */ ++#define DMAC_DDA(n) (DMAC_BASE + (0x18 + (n) * 0x20)) /* DMA descriptor address */ ++#define DMAC_DMACR (DMAC_BASE + 0x0300) /* DMA control register */ ++#define DMAC_DMAIPR (DMAC_BASE + 0x0304) /* DMA interrupt pending */ ++#define DMAC_DMADBR (DMAC_BASE + 0x0308) /* DMA doorbell */ ++#define DMAC_DMADBSR (DMAC_BASE + 0x030C) /* DMA doorbell set */ ++ ++// channel 0 ++#define DMAC_DSAR0 DMAC_DSAR(0) ++#define DMAC_DTAR0 DMAC_DTAR(0) ++#define DMAC_DTCR0 DMAC_DTCR(0) ++#define DMAC_DRSR0 DMAC_DRSR(0) ++#define DMAC_DCCSR0 DMAC_DCCSR(0) ++#define DMAC_DCMD0 DMAC_DCMD(0) ++#define DMAC_DDA0 DMAC_DDA(0) ++ ++// channel 1 ++#define DMAC_DSAR1 DMAC_DSAR(1) ++#define DMAC_DTAR1 DMAC_DTAR(1) ++#define DMAC_DTCR1 DMAC_DTCR(1) ++#define DMAC_DRSR1 DMAC_DRSR(1) ++#define DMAC_DCCSR1 DMAC_DCCSR(1) ++#define DMAC_DCMD1 DMAC_DCMD(1) ++#define DMAC_DDA1 DMAC_DDA(1) ++ ++// channel 2 ++#define DMAC_DSAR2 DMAC_DSAR(2) ++#define DMAC_DTAR2 DMAC_DTAR(2) ++#define DMAC_DTCR2 DMAC_DTCR(2) ++#define DMAC_DRSR2 DMAC_DRSR(2) ++#define DMAC_DCCSR2 DMAC_DCCSR(2) ++#define DMAC_DCMD2 DMAC_DCMD(2) ++#define DMAC_DDA2 DMAC_DDA(2) ++ ++// channel 3 ++#define DMAC_DSAR3 DMAC_DSAR(3) ++#define DMAC_DTAR3 DMAC_DTAR(3) ++#define DMAC_DTCR3 DMAC_DTCR(3) ++#define DMAC_DRSR3 DMAC_DRSR(3) ++#define DMAC_DCCSR3 DMAC_DCCSR(3) ++#define DMAC_DCMD3 DMAC_DCMD(3) ++#define DMAC_DDA3 DMAC_DDA(3) ++ ++// channel 4 ++#define DMAC_DSAR4 DMAC_DSAR(4) ++#define DMAC_DTAR4 DMAC_DTAR(4) ++#define DMAC_DTCR4 DMAC_DTCR(4) ++#define DMAC_DRSR4 DMAC_DRSR(4) ++#define DMAC_DCCSR4 DMAC_DCCSR(4) ++#define DMAC_DCMD4 DMAC_DCMD(4) ++#define DMAC_DDA4 DMAC_DDA(4) ++ ++// channel 5 ++#define DMAC_DSAR5 DMAC_DSAR(5) ++#define DMAC_DTAR5 DMAC_DTAR(5) ++#define DMAC_DTCR5 DMAC_DTCR(5) ++#define DMAC_DRSR5 DMAC_DRSR(5) ++#define DMAC_DCCSR5 DMAC_DCCSR(5) ++#define DMAC_DCMD5 DMAC_DCMD(5) ++#define DMAC_DDA5 DMAC_DDA(5) ++ ++#define REG_DMAC_DSAR(n) REG32(DMAC_DSAR((n))) ++#define REG_DMAC_DTAR(n) REG32(DMAC_DTAR((n))) ++#define REG_DMAC_DTCR(n) REG32(DMAC_DTCR((n))) ++#define REG_DMAC_DRSR(n) REG32(DMAC_DRSR((n))) ++#define REG_DMAC_DCCSR(n) REG32(DMAC_DCCSR((n))) ++#define REG_DMAC_DCMD(n) REG32(DMAC_DCMD((n))) ++#define REG_DMAC_DDA(n) REG32(DMAC_DDA((n))) ++#define REG_DMAC_DMACR REG32(DMAC_DMACR) ++#define REG_DMAC_DMAIPR REG32(DMAC_DMAIPR) ++#define REG_DMAC_DMADBR REG32(DMAC_DMADBR) ++#define REG_DMAC_DMADBSR REG32(DMAC_DMADBSR) ++ ++// DMA request source register ++#define DMAC_DRSR_RS_BIT 0 ++#define DMAC_DRSR_RS_MASK (0x1f << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_AUTO (8 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_UART0OUT (20 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_UART0IN (21 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_SSIOUT (22 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_SSIIN (23 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_AICOUT (24 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_AICIN (25 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_MSCOUT (26 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_MSCIN (27 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_TCU (28 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_SADC (29 << DMAC_DRSR_RS_BIT) ++ #define DMAC_DRSR_RS_SLCD (30 << DMAC_DRSR_RS_BIT) ++ ++// DMA channel control/status register ++#define DMAC_DCCSR_NDES (1 << 31) /* descriptor (0) or not (1) ? */ ++#define DMAC_DCCSR_CDOA_BIT 16 /* copy of DMA offset address */ ++#define DMAC_DCCSR_CDOA_MASK (0xff << DMAC_DCCSR_CDOA_BIT) ++#define DMAC_DCCSR_INV (1 << 6) /* descriptor invalid */ ++#define DMAC_DCCSR_AR (1 << 4) /* address error */ ++#define DMAC_DCCSR_TT (1 << 3) /* transfer terminated */ ++#define DMAC_DCCSR_HLT (1 << 2) /* DMA halted */ ++#define DMAC_DCCSR_CT (1 << 1) /* count terminated */ ++#define DMAC_DCCSR_EN (1 << 0) /* channel enable bit */ ++ ++// DMA channel command register ++#define DMAC_DCMD_SAI (1 << 23) /* source address increment */ ++#define DMAC_DCMD_DAI (1 << 22) /* dest address increment */ ++#define DMAC_DCMD_RDIL_BIT 16 /* request detection interval length */ ++#define DMAC_DCMD_RDIL_MASK (0x0f << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_IGN (0 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_2 (1 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_4 (2 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_8 (3 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_12 (4 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_16 (5 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_20 (6 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_24 (7 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_28 (8 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_32 (9 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_48 (10 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_60 (11 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_64 (12 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_124 (13 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_128 (14 << DMAC_DCMD_RDIL_BIT) ++ #define DMAC_DCMD_RDIL_200 (15 << DMAC_DCMD_RDIL_BIT) ++#define DMAC_DCMD_SWDH_BIT 14 /* source port width */ ++#define DMAC_DCMD_SWDH_MASK (0x03 << DMAC_DCMD_SWDH_BIT) ++ #define DMAC_DCMD_SWDH_32 (0 << DMAC_DCMD_SWDH_BIT) ++ #define DMAC_DCMD_SWDH_8 (1 << DMAC_DCMD_SWDH_BIT) ++ #define DMAC_DCMD_SWDH_16 (2 << DMAC_DCMD_SWDH_BIT) ++#define DMAC_DCMD_DWDH_BIT 12 /* dest port width */ ++#define DMAC_DCMD_DWDH_MASK (0x03 << DMAC_DCMD_DWDH_BIT) ++ #define DMAC_DCMD_DWDH_32 (0 << DMAC_DCMD_DWDH_BIT) ++ #define DMAC_DCMD_DWDH_8 (1 << DMAC_DCMD_DWDH_BIT) ++ #define DMAC_DCMD_DWDH_16 (2 << DMAC_DCMD_DWDH_BIT) ++#define DMAC_DCMD_DS_BIT 8 /* transfer data size of a data unit */ ++#define DMAC_DCMD_DS_MASK (0x07 << DMAC_DCMD_DS_BIT) ++ #define DMAC_DCMD_DS_32BIT (0 << DMAC_DCMD_DS_BIT) ++ #define DMAC_DCMD_DS_8BIT (1 << DMAC_DCMD_DS_BIT) ++ #define DMAC_DCMD_DS_16BIT (2 << DMAC_DCMD_DS_BIT) ++ #define DMAC_DCMD_DS_16BYTE (3 << DMAC_DCMD_DS_BIT) ++ #define DMAC_DCMD_DS_32BYTE (4 << DMAC_DCMD_DS_BIT) ++#define DMAC_DCMD_TM (1 << 7) /* transfer mode: 0-single 1-block */ ++#define DMAC_DCMD_DES_V (1 << 4) /* descriptor valid flag */ ++#define DMAC_DCMD_DES_VM (1 << 3) /* descriptor valid mask: 1:support V-bit */ ++#define DMAC_DCMD_DES_VIE (1 << 2) /* DMA valid error interrupt enable */ ++#define DMAC_DCMD_TIE (1 << 1) /* DMA transfer interrupt enable */ ++#define DMAC_DCMD_LINK (1 << 0) /* descriptor link enable */ ++ ++// DMA descriptor address register ++#define DMAC_DDA_BASE_BIT 12 /* descriptor base address */ ++#define DMAC_DDA_BASE_MASK (0x0fffff << DMAC_DDA_BASE_BIT) ++#define DMAC_DDA_OFFSET_BIT 4 /* descriptor offset address */ ++#define DMAC_DDA_OFFSET_MASK (0x0ff << DMAC_DDA_OFFSET_BIT) ++ ++// DMA control register ++#define DMAC_DMACR_PR_BIT 8 /* channel priority mode */ ++#define DMAC_DMACR_PR_MASK (0x03 << DMAC_DMACR_PR_BIT) ++ #define DMAC_DMACR_PR_012345 (0 << DMAC_DMACR_PR_BIT) ++ #define DMAC_DMACR_PR_023145 (1 << DMAC_DMACR_PR_BIT) ++ #define DMAC_DMACR_PR_201345 (2 << DMAC_DMACR_PR_BIT) ++ #define DMAC_DMACR_PR_RR (3 << DMAC_DMACR_PR_BIT) /* round robin */ ++#define DMAC_DMACR_HLT (1 << 3) /* DMA halt flag */ ++#define DMAC_DMACR_AR (1 << 2) /* address error flag */ ++#define DMAC_DMACR_DMAE (1 << 0) /* DMA enable bit */ ++ ++// DMA doorbell register ++#define DMAC_DMADBR_DB5 (1 << 5) /* doorbell for channel 5 */ ++#define DMAC_DMADBR_DB4 (1 << 5) /* doorbell for channel 4 */ ++#define DMAC_DMADBR_DB3 (1 << 5) /* doorbell for channel 3 */ ++#define DMAC_DMADBR_DB2 (1 << 5) /* doorbell for channel 2 */ ++#define DMAC_DMADBR_DB1 (1 << 5) /* doorbell for channel 1 */ ++#define DMAC_DMADBR_DB0 (1 << 5) /* doorbell for channel 0 */ ++ ++// DMA doorbell set register ++#define DMAC_DMADBSR_DBS5 (1 << 5) /* enable doorbell for channel 5 */ ++#define DMAC_DMADBSR_DBS4 (1 << 5) /* enable doorbell for channel 4 */ ++#define DMAC_DMADBSR_DBS3 (1 << 5) /* enable doorbell for channel 3 */ ++#define DMAC_DMADBSR_DBS2 (1 << 5) /* enable doorbell for channel 2 */ ++#define DMAC_DMADBSR_DBS1 (1 << 5) /* enable doorbell for channel 1 */ ++#define DMAC_DMADBSR_DBS0 (1 << 5) /* enable doorbell for channel 0 */ ++ ++// DMA interrupt pending register ++#define DMAC_DMAIPR_CIRQ5 (1 << 5) /* irq pending status for channel 5 */ ++#define DMAC_DMAIPR_CIRQ4 (1 << 4) /* irq pending status for channel 4 */ ++#define DMAC_DMAIPR_CIRQ3 (1 << 3) /* irq pending status for channel 3 */ ++#define DMAC_DMAIPR_CIRQ2 (1 << 2) /* irq pending status for channel 2 */ ++#define DMAC_DMAIPR_CIRQ1 (1 << 1) /* irq pending status for channel 1 */ ++#define DMAC_DMAIPR_CIRQ0 (1 << 0) /* irq pending status for channel 0 */ ++ ++ ++/************************************************************************* ++ * GPIO (General-Purpose I/O Ports) ++ *************************************************************************/ ++#define MAX_GPIO_NUM 128 ++ ++//n = 0,1,2,3 ++#define GPIO_PXPIN(n) (GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */ ++#define GPIO_PXDAT(n) (GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */ ++#define GPIO_PXDATS(n) (GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */ ++#define GPIO_PXDATC(n) (GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */ ++#define GPIO_PXIM(n) (GPIO_BASE + (0x20 + (n)*0x100)) /* Interrupt Mask Register */ ++#define GPIO_PXIMS(n) (GPIO_BASE + (0x24 + (n)*0x100)) /* Interrupt Mask Set Reg */ ++#define GPIO_PXIMC(n) (GPIO_BASE + (0x28 + (n)*0x100)) /* Interrupt Mask Clear Reg */ ++#define GPIO_PXPE(n) (GPIO_BASE + (0x30 + (n)*0x100)) /* Pull Enable Register */ ++#define GPIO_PXPES(n) (GPIO_BASE + (0x34 + (n)*0x100)) /* Pull Enable Set Reg. */ ++#define GPIO_PXPEC(n) (GPIO_BASE + (0x38 + (n)*0x100)) /* Pull Enable Clear Reg. */ ++#define GPIO_PXFUN(n) (GPIO_BASE + (0x40 + (n)*0x100)) /* Function Register */ ++#define GPIO_PXFUNS(n) (GPIO_BASE + (0x44 + (n)*0x100)) /* Function Set Register */ ++#define GPIO_PXFUNC(n) (GPIO_BASE + (0x48 + (n)*0x100)) /* Function Clear Register */ ++#define GPIO_PXSEL(n) (GPIO_BASE + (0x50 + (n)*0x100)) /* Select Register */ ++#define GPIO_PXSELS(n) (GPIO_BASE + (0x54 + (n)*0x100)) /* Select Set Register */ ++#define GPIO_PXSELC(n) (GPIO_BASE + (0x58 + (n)*0x100)) /* Select Clear Register */ ++#define GPIO_PXDIR(n) (GPIO_BASE + (0x60 + (n)*0x100)) /* Direction Register */ ++#define GPIO_PXDIRS(n) (GPIO_BASE + (0x64 + (n)*0x100)) /* Direction Set Register */ ++#define GPIO_PXDIRC(n) (GPIO_BASE + (0x68 + (n)*0x100)) /* Direction Clear Register */ ++#define GPIO_PXTRG(n) (GPIO_BASE + (0x70 + (n)*0x100)) /* Trigger Register */ ++#define GPIO_PXTRGS(n) (GPIO_BASE + (0x74 + (n)*0x100)) /* Trigger Set Register */ ++#define GPIO_PXTRGC(n) (GPIO_BASE + (0x78 + (n)*0x100)) /* Trigger Set Register */ ++#define GPIO_PXFLG(n) (GPIO_BASE + (0x80 + (n)*0x100)) /* Port Flag Register */ ++#define GPIO_PXFLGC(n) (GPIO_BASE + (0x14 + (n)*0x100)) /* Port Flag Clear Register */ ++ ++#define REG_GPIO_PXPIN(n) REG32(GPIO_PXPIN((n))) /* PIN level */ ++#define REG_GPIO_PXDAT(n) REG32(GPIO_PXDAT((n))) /* 1: interrupt pending */ ++#define REG_GPIO_PXDATS(n) REG32(GPIO_PXDATS((n))) ++#define REG_GPIO_PXDATC(n) REG32(GPIO_PXDATC((n))) ++#define REG_GPIO_PXIM(n) REG32(GPIO_PXIM((n))) /* 1: mask pin interrupt */ ++#define REG_GPIO_PXIMS(n) REG32(GPIO_PXIMS((n))) ++#define REG_GPIO_PXIMC(n) REG32(GPIO_PXIMC((n))) ++#define REG_GPIO_PXPE(n) REG32(GPIO_PXPE((n))) /* 1: disable pull up/down */ ++#define REG_GPIO_PXPES(n) REG32(GPIO_PXPES((n))) ++#define REG_GPIO_PXPEC(n) REG32(GPIO_PXPEC((n))) ++#define REG_GPIO_PXFUN(n) REG32(GPIO_PXFUN((n))) /* 0:GPIO or intr, 1:FUNC */ ++#define REG_GPIO_PXFUNS(n) REG32(GPIO_PXFUNS((n))) ++#define REG_GPIO_PXFUNC(n) REG32(GPIO_PXFUNC((n))) ++#define REG_GPIO_PXSEL(n) REG32(GPIO_PXSEL((n))) /* 0:GPIO/Fun0,1:intr/fun1*/ ++#define REG_GPIO_PXSELS(n) REG32(GPIO_PXSELS((n))) ++#define REG_GPIO_PXSELC(n) REG32(GPIO_PXSELC((n))) ++#define REG_GPIO_PXDIR(n) REG32(GPIO_PXDIR((n))) /* 0:input/low-level-trig/falling-edge-trig, 1:output/high-level-trig/rising-edge-trig */ ++#define REG_GPIO_PXDIRS(n) REG32(GPIO_PXDIRS((n))) ++#define REG_GPIO_PXDIRC(n) REG32(GPIO_PXDIRC((n))) ++#define REG_GPIO_PXTRG(n) REG32(GPIO_PXTRG((n))) /* 0:level-trigger, 1:edge-trigger */ ++#define REG_GPIO_PXTRGS(n) REG32(GPIO_PXTRGS((n))) ++#define REG_GPIO_PXTRGC(n) REG32(GPIO_PXTRGC((n))) ++#define REG_GPIO_PXFLG(n) REG32(GPIO_PXFLG((n))) /* interrupt flag */ ++#define REG_GPIO_PXFLGC(n) REG32(GPIO_PXFLGC((n))) /* interrupt flag */ ++ ++ ++/************************************************************************* ++ * UART ++ *************************************************************************/ ++ ++#define IRDA_BASE UART0_BASE ++#define UART_BASE UART0_BASE ++#define UART_OFF 0x1000 ++ ++/* Register Offset */ ++#define OFF_RDR (0x00) /* R 8b H'xx */ ++#define OFF_TDR (0x00) /* W 8b H'xx */ ++#define OFF_DLLR (0x00) /* RW 8b H'00 */ ++#define OFF_DLHR (0x04) /* RW 8b H'00 */ ++#define OFF_IER (0x04) /* RW 8b H'00 */ ++#define OFF_ISR (0x08) /* R 8b H'01 */ ++#define OFF_FCR (0x08) /* W 8b H'00 */ ++#define OFF_LCR (0x0C) /* RW 8b H'00 */ ++#define OFF_MCR (0x10) /* RW 8b H'00 */ ++#define OFF_LSR (0x14) /* R 8b H'00 */ ++#define OFF_MSR (0x18) /* R 8b H'00 */ ++#define OFF_SPR (0x1C) /* RW 8b H'00 */ ++#define OFF_SIRCR (0x20) /* RW 8b H'00, UART0 */ ++#define OFF_UMR (0x24) /* RW 8b H'00, UART M Register */ ++#define OFF_UACR (0x28) /* RW 8b H'00, UART Add Cycle Register */ ++ ++/* Register Address */ ++#define UART0_RDR (UART0_BASE + OFF_RDR) ++#define UART0_TDR (UART0_BASE + OFF_TDR) ++#define UART0_DLLR (UART0_BASE + OFF_DLLR) ++#define UART0_DLHR (UART0_BASE + OFF_DLHR) ++#define UART0_IER (UART0_BASE + OFF_IER) ++#define UART0_ISR (UART0_BASE + OFF_ISR) ++#define UART0_FCR (UART0_BASE + OFF_FCR) ++#define UART0_LCR (UART0_BASE + OFF_LCR) ++#define UART0_MCR (UART0_BASE + OFF_MCR) ++#define UART0_LSR (UART0_BASE + OFF_LSR) ++#define UART0_MSR (UART0_BASE + OFF_MSR) ++#define UART0_SPR (UART0_BASE + OFF_SPR) ++#define UART0_SIRCR (UART0_BASE + OFF_SIRCR) ++#define UART0_UMR (UART0_BASE + OFF_UMR) ++#define UART0_UACR (UART0_BASE + OFF_UACR) ++ ++/* ++ * Define macros for UARTIER ++ * UART Interrupt Enable Register ++ */ ++#define UARTIER_RIE (1 << 0) /* 0: receive fifo full interrupt disable */ ++#define UARTIER_TIE (1 << 1) /* 0: transmit fifo empty interrupt disable */ ++#define UARTIER_RLIE (1 << 2) /* 0: receive line status interrupt disable */ ++#define UARTIER_MIE (1 << 3) /* 0: modem status interrupt disable */ ++#define UARTIER_RTIE (1 << 4) /* 0: receive timeout interrupt disable */ ++ ++/* ++ * Define macros for UARTISR ++ * UART Interrupt Status Register ++ */ ++#define UARTISR_IP (1 << 0) /* 0: interrupt is pending 1: no interrupt */ ++#define UARTISR_IID (7 << 1) /* Source of Interrupt */ ++#define UARTISR_IID_MSI (0 << 1) /* Modem status interrupt */ ++#define UARTISR_IID_THRI (1 << 1) /* Transmitter holding register empty */ ++#define UARTISR_IID_RDI (2 << 1) /* Receiver data interrupt */ ++#define UARTISR_IID_RLSI (3 << 1) /* Receiver line status interrupt */ ++#define UARTISR_IID_RTO (6 << 1) /* Receive timeout */ ++#define UARTISR_FFMS (3 << 6) /* FIFO mode select, set when UARTFCR.FE is set to 1 */ ++#define UARTISR_FFMS_NO_FIFO (0 << 6) ++#define UARTISR_FFMS_FIFO_MODE (3 << 6) ++ ++/* ++ * Define macros for UARTFCR ++ * UART FIFO Control Register ++ */ ++#define UARTFCR_FE (1 << 0) /* 0: non-FIFO mode 1: FIFO mode */ ++#define UARTFCR_RFLS (1 << 1) /* write 1 to flush receive FIFO */ ++#define UARTFCR_TFLS (1 << 2) /* write 1 to flush transmit FIFO */ ++#define UARTFCR_DMS (1 << 3) /* 0: disable DMA mode */ ++#define UARTFCR_UUE (1 << 4) /* 0: disable UART */ ++#define UARTFCR_RTRG (3 << 6) /* Receive FIFO Data Trigger */ ++#define UARTFCR_RTRG_1 (0 << 6) ++#define UARTFCR_RTRG_4 (1 << 6) ++#define UARTFCR_RTRG_8 (2 << 6) ++#define UARTFCR_RTRG_15 (3 << 6) ++ ++/* ++ * Define macros for UARTLCR ++ * UART Line Control Register ++ */ ++#define UARTLCR_WLEN (3 << 0) /* word length */ ++#define UARTLCR_WLEN_5 (0 << 0) ++#define UARTLCR_WLEN_6 (1 << 0) ++#define UARTLCR_WLEN_7 (2 << 0) ++#define UARTLCR_WLEN_8 (3 << 0) ++#define UARTLCR_STOP (1 << 2) /* 0: 1 stop bit when word length is 5,6,7,8 ++ 1: 1.5 stop bits when 5; 2 stop bits when 6,7,8 */ ++#define UARTLCR_STOP1 (0 << 2) ++#define UARTLCR_STOP2 (1 << 2) ++#define UARTLCR_PE (1 << 3) /* 0: parity disable */ ++#define UARTLCR_PROE (1 << 4) /* 0: even parity 1: odd parity */ ++#define UARTLCR_SPAR (1 << 5) /* 0: sticky parity disable */ ++#define UARTLCR_SBRK (1 << 6) /* write 0 normal, write 1 send break */ ++#define UARTLCR_DLAB (1 << 7) /* 0: access UARTRDR/TDR/IER 1: access UARTDLLR/DLHR */ ++ ++/* ++ * Define macros for UARTLSR ++ * UART Line Status Register ++ */ ++#define UARTLSR_DR (1 << 0) /* 0: receive FIFO is empty 1: receive data is ready */ ++#define UARTLSR_ORER (1 << 1) /* 0: no overrun error */ ++#define UARTLSR_PER (1 << 2) /* 0: no parity error */ ++#define UARTLSR_FER (1 << 3) /* 0; no framing error */ ++#define UARTLSR_BRK (1 << 4) /* 0: no break detected 1: receive a break signal */ ++#define UARTLSR_TDRQ (1 << 5) /* 1: transmit FIFO half "empty" */ ++#define UARTLSR_TEMT (1 << 6) /* 1: transmit FIFO and shift registers empty */ ++#define UARTLSR_RFER (1 << 7) /* 0: no receive error 1: receive error in FIFO mode */ ++ ++/* ++ * Define macros for UARTMCR ++ * UART Modem Control Register ++ */ ++#define UARTMCR_RTS (1 << 1) /* 0: RTS_ output high, 1: RTS_ output low */ ++#define UARTMCR_LOOP (1 << 4) /* 0: normal 1: loopback mode */ ++#define UARTMCR_MCE (1 << 7) /* 0: modem function is disable */ ++ ++/* ++ * Define macros for UARTMSR ++ * UART Modem Status Register ++ */ ++#define UARTMSR_CCTS (1 << 0) /* 1: a change on CTS_ pin */ ++#define UARTMSR_CTS (1 << 4) /* 0: CTS_ pin is high */ ++ ++/* ++ * Define macros for SIRCR ++ * Slow IrDA Control Register ++ */ ++#define SIRCR_TSIRE (1 << 0) /* 0: transmitter is in UART mode 1: SIR mode */ ++#define SIRCR_RSIRE (1 << 1) /* 0: receiver is in UART mode 1: SIR mode */ ++#define SIRCR_TPWS (1 << 2) /* 0: transmit 0 pulse width is 3/16 of bit length ++ 1: 0 pulse width is 1.6us for 115.2Kbps */ ++#define SIRCR_TDPL (1 << 3) /* 0: encoder generates a positive pulse for 0 */ ++#define SIRCR_RDPL (1 << 4) /* 0: decoder interprets positive pulse as 0 */ ++ ++ ++/************************************************************************* ++ * AIC (AC97/I2S Controller) ++ *************************************************************************/ ++#define AIC_FR (AIC_BASE + 0x000) ++#define AIC_CR (AIC_BASE + 0x004) ++#define AIC_ACCR1 (AIC_BASE + 0x008) ++#define AIC_ACCR2 (AIC_BASE + 0x00C) ++#define AIC_I2SCR (AIC_BASE + 0x010) ++#define AIC_SR (AIC_BASE + 0x014) ++#define AIC_ACSR (AIC_BASE + 0x018) ++#define AIC_I2SSR (AIC_BASE + 0x01C) ++#define AIC_ACCAR (AIC_BASE + 0x020) ++#define AIC_ACCDR (AIC_BASE + 0x024) ++#define AIC_ACSAR (AIC_BASE + 0x028) ++#define AIC_ACSDR (AIC_BASE + 0x02C) ++#define AIC_I2SDIV (AIC_BASE + 0x030) ++#define AIC_DR (AIC_BASE + 0x034) ++ ++#define REG_AIC_FR REG32(AIC_FR) ++#define REG_AIC_CR REG32(AIC_CR) ++#define REG_AIC_ACCR1 REG32(AIC_ACCR1) ++#define REG_AIC_ACCR2 REG32(AIC_ACCR2) ++#define REG_AIC_I2SCR REG32(AIC_I2SCR) ++#define REG_AIC_SR REG32(AIC_SR) ++#define REG_AIC_ACSR REG32(AIC_ACSR) ++#define REG_AIC_I2SSR REG32(AIC_I2SSR) ++#define REG_AIC_ACCAR REG32(AIC_ACCAR) ++#define REG_AIC_ACCDR REG32(AIC_ACCDR) ++#define REG_AIC_ACSAR REG32(AIC_ACSAR) ++#define REG_AIC_ACSDR REG32(AIC_ACSDR) ++#define REG_AIC_I2SDIV REG32(AIC_I2SDIV) ++#define REG_AIC_DR REG32(AIC_DR) ++ ++/* AIC Controller Configuration Register (AIC_FR) */ ++ ++#define AIC_FR_RFTH_BIT 12 /* Receive FIFO Threshold */ ++#define AIC_FR_RFTH_MASK (0xf << AIC_FR_RFTH_BIT) ++#define AIC_FR_TFTH_BIT 8 /* Transmit FIFO Threshold */ ++#define AIC_FR_TFTH_MASK (0xf << AIC_FR_TFTH_BIT) ++#define AIC_FR_LSMP (1 << 6) /* Play Zero sample or last sample */ ++#define AIC_FR_ICDC (1 << 5) /* External(0) or Internal CODEC(1) */ ++#define AIC_FR_AUSEL (1 << 4) /* AC97(0) or I2S/MSB-justified(1) */ ++#define AIC_FR_RST (1 << 3) /* AIC registers reset */ ++#define AIC_FR_BCKD (1 << 2) /* I2S BIT_CLK direction, 0:input,1:output */ ++#define AIC_FR_SYNCD (1 << 1) /* I2S SYNC direction, 0:input,1:output */ ++#define AIC_FR_ENB (1 << 0) /* AIC enable bit */ ++ ++/* AIC Controller Common Control Register (AIC_CR) */ ++ ++#define AIC_CR_OSS_BIT 19 /* Output Sample Size from memory (AIC V2 only) */ ++#define AIC_CR_OSS_MASK (0x7 << AIC_CR_OSS_BIT) ++ #define AIC_CR_OSS_8BIT (0x0 << AIC_CR_OSS_BIT) ++ #define AIC_CR_OSS_16BIT (0x1 << AIC_CR_OSS_BIT) ++ #define AIC_CR_OSS_18BIT (0x2 << AIC_CR_OSS_BIT) ++ #define AIC_CR_OSS_20BIT (0x3 << AIC_CR_OSS_BIT) ++ #define AIC_CR_OSS_24BIT (0x4 << AIC_CR_OSS_BIT) ++#define AIC_CR_ISS_BIT 16 /* Input Sample Size from memory (AIC V2 only) */ ++#define AIC_CR_ISS_MASK (0x7 << AIC_CR_ISS_BIT) ++ #define AIC_CR_ISS_8BIT (0x0 << AIC_CR_ISS_BIT) ++ #define AIC_CR_ISS_16BIT (0x1 << AIC_CR_ISS_BIT) ++ #define AIC_CR_ISS_18BIT (0x2 << AIC_CR_ISS_BIT) ++ #define AIC_CR_ISS_20BIT (0x3 << AIC_CR_ISS_BIT) ++ #define AIC_CR_ISS_24BIT (0x4 << AIC_CR_ISS_BIT) ++#define AIC_CR_RDMS (1 << 15) /* Receive DMA enable */ ++#define AIC_CR_TDMS (1 << 14) /* Transmit DMA enable */ ++#define AIC_CR_M2S (1 << 11) /* Mono to Stereo enable */ ++#define AIC_CR_ENDSW (1 << 10) /* Endian switch enable */ ++#define AIC_CR_AVSTSU (1 << 9) /* Signed <-> Unsigned toggle enable */ ++#define AIC_CR_FLUSH (1 << 8) /* Flush FIFO */ ++#define AIC_CR_EROR (1 << 6) /* Enable ROR interrupt */ ++#define AIC_CR_ETUR (1 << 5) /* Enable TUR interrupt */ ++#define AIC_CR_ERFS (1 << 4) /* Enable RFS interrupt */ ++#define AIC_CR_ETFS (1 << 3) /* Enable TFS interrupt */ ++#define AIC_CR_ENLBF (1 << 2) /* Enable Loopback Function */ ++#define AIC_CR_ERPL (1 << 1) /* Enable Playback Function */ ++#define AIC_CR_EREC (1 << 0) /* Enable Record Function */ ++ ++/* AIC Controller AC-link Control Register 1 (AIC_ACCR1) */ ++ ++#define AIC_ACCR1_RS_BIT 16 /* Receive Valid Slots */ ++#define AIC_ACCR1_RS_MASK (0x3ff << AIC_ACCR1_RS_BIT) ++ #define AIC_ACCR1_RS_SLOT12 (1 << 25) /* Slot 12 valid bit */ ++ #define AIC_ACCR1_RS_SLOT11 (1 << 24) /* Slot 11 valid bit */ ++ #define AIC_ACCR1_RS_SLOT10 (1 << 23) /* Slot 10 valid bit */ ++ #define AIC_ACCR1_RS_SLOT9 (1 << 22) /* Slot 9 valid bit, LFE */ ++ #define AIC_ACCR1_RS_SLOT8 (1 << 21) /* Slot 8 valid bit, Surround Right */ ++ #define AIC_ACCR1_RS_SLOT7 (1 << 20) /* Slot 7 valid bit, Surround Left */ ++ #define AIC_ACCR1_RS_SLOT6 (1 << 19) /* Slot 6 valid bit, PCM Center */ ++ #define AIC_ACCR1_RS_SLOT5 (1 << 18) /* Slot 5 valid bit */ ++ #define AIC_ACCR1_RS_SLOT4 (1 << 17) /* Slot 4 valid bit, PCM Right */ ++ #define AIC_ACCR1_RS_SLOT3 (1 << 16) /* Slot 3 valid bit, PCM Left */ ++#define AIC_ACCR1_XS_BIT 0 /* Transmit Valid Slots */ ++#define AIC_ACCR1_XS_MASK (0x3ff << AIC_ACCR1_XS_BIT) ++ #define AIC_ACCR1_XS_SLOT12 (1 << 9) /* Slot 12 valid bit */ ++ #define AIC_ACCR1_XS_SLOT11 (1 << 8) /* Slot 11 valid bit */ ++ #define AIC_ACCR1_XS_SLOT10 (1 << 7) /* Slot 10 valid bit */ ++ #define AIC_ACCR1_XS_SLOT9 (1 << 6) /* Slot 9 valid bit, LFE */ ++ #define AIC_ACCR1_XS_SLOT8 (1 << 5) /* Slot 8 valid bit, Surround Right */ ++ #define AIC_ACCR1_XS_SLOT7 (1 << 4) /* Slot 7 valid bit, Surround Left */ ++ #define AIC_ACCR1_XS_SLOT6 (1 << 3) /* Slot 6 valid bit, PCM Center */ ++ #define AIC_ACCR1_XS_SLOT5 (1 << 2) /* Slot 5 valid bit */ ++ #define AIC_ACCR1_XS_SLOT4 (1 << 1) /* Slot 4 valid bit, PCM Right */ ++ #define AIC_ACCR1_XS_SLOT3 (1 << 0) /* Slot 3 valid bit, PCM Left */ ++ ++/* AIC Controller AC-link Control Register 2 (AIC_ACCR2) */ ++ ++#define AIC_ACCR2_ERSTO (1 << 18) /* Enable RSTO interrupt */ ++#define AIC_ACCR2_ESADR (1 << 17) /* Enable SADR interrupt */ ++#define AIC_ACCR2_ECADT (1 << 16) /* Enable CADT interrupt */ ++#define AIC_ACCR2_OASS_BIT 8 /* Output Sample Size for AC-link */ ++#define AIC_ACCR2_OASS_MASK (0x3 << AIC_ACCR2_OASS_BIT) ++ #define AIC_ACCR2_OASS_20BIT (0 << AIC_ACCR2_OASS_BIT) /* Output Audio Sample Size is 20-bit */ ++ #define AIC_ACCR2_OASS_18BIT (1 << AIC_ACCR2_OASS_BIT) /* Output Audio Sample Size is 18-bit */ ++ #define AIC_ACCR2_OASS_16BIT (2 << AIC_ACCR2_OASS_BIT) /* Output Audio Sample Size is 16-bit */ ++ #define AIC_ACCR2_OASS_8BIT (3 << AIC_ACCR2_OASS_BIT) /* Output Audio Sample Size is 8-bit */ ++#define AIC_ACCR2_IASS_BIT 6 /* Output Sample Size for AC-link */ ++#define AIC_ACCR2_IASS_MASK (0x3 << AIC_ACCR2_IASS_BIT) ++ #define AIC_ACCR2_IASS_20BIT (0 << AIC_ACCR2_IASS_BIT) /* Input Audio Sample Size is 20-bit */ ++ #define AIC_ACCR2_IASS_18BIT (1 << AIC_ACCR2_IASS_BIT) /* Input Audio Sample Size is 18-bit */ ++ #define AIC_ACCR2_IASS_16BIT (2 << AIC_ACCR2_IASS_BIT) /* Input Audio Sample Size is 16-bit */ ++ #define AIC_ACCR2_IASS_8BIT (3 << AIC_ACCR2_IASS_BIT) /* Input Audio Sample Size is 8-bit */ ++#define AIC_ACCR2_SO (1 << 3) /* SDATA_OUT output value */ ++#define AIC_ACCR2_SR (1 << 2) /* RESET# pin level */ ++#define AIC_ACCR2_SS (1 << 1) /* SYNC pin level */ ++#define AIC_ACCR2_SA (1 << 0) /* SYNC and SDATA_OUT alternation */ ++ ++/* AIC Controller I2S/MSB-justified Control Register (AIC_I2SCR) */ ++ ++#define AIC_I2SCR_STPBK (1 << 12) /* Stop BIT_CLK for I2S/MSB-justified */ ++#define AIC_I2SCR_WL_BIT 1 /* Input/Output Sample Size for I2S/MSB-justified */ ++#define AIC_I2SCR_WL_MASK (0x7 << AIC_I2SCR_WL_BIT) ++ #define AIC_I2SCR_WL_24BIT (0 << AIC_I2SCR_WL_BIT) /* Word Length is 24 bit */ ++ #define AIC_I2SCR_WL_20BIT (1 << AIC_I2SCR_WL_BIT) /* Word Length is 20 bit */ ++ #define AIC_I2SCR_WL_18BIT (2 << AIC_I2SCR_WL_BIT) /* Word Length is 18 bit */ ++ #define AIC_I2SCR_WL_16BIT (3 << AIC_I2SCR_WL_BIT) /* Word Length is 16 bit */ ++ #define AIC_I2SCR_WL_8BIT (4 << AIC_I2SCR_WL_BIT) /* Word Length is 8 bit */ ++#define AIC_I2SCR_AMSL (1 << 0) /* 0:I2S, 1:MSB-justified */ ++ ++/* AIC Controller FIFO Status Register (AIC_SR) */ ++ ++#define AIC_SR_RFL_BIT 24 /* Receive FIFO Level */ ++#define AIC_SR_RFL_MASK (0x3f << AIC_SR_RFL_BIT) ++#define AIC_SR_TFL_BIT 8 /* Transmit FIFO level */ ++#define AIC_SR_TFL_MASK (0x3f << AIC_SR_TFL_BIT) ++#define AIC_SR_ROR (1 << 6) /* Receive FIFO Overrun */ ++#define AIC_SR_TUR (1 << 5) /* Transmit FIFO Underrun */ ++#define AIC_SR_RFS (1 << 4) /* Receive FIFO Service Request */ ++#define AIC_SR_TFS (1 << 3) /* Transmit FIFO Service Request */ ++ ++/* AIC Controller AC-link Status Register (AIC_ACSR) */ ++ ++#define AIC_ACSR_SLTERR (1 << 21) /* Slot Error Flag */ ++#define AIC_ACSR_CRDY (1 << 20) /* External CODEC Ready Flag */ ++#define AIC_ACSR_CLPM (1 << 19) /* External CODEC low power mode flag */ ++#define AIC_ACSR_RSTO (1 << 18) /* External CODEC regs read status timeout */ ++#define AIC_ACSR_SADR (1 << 17) /* External CODEC regs status addr and data received */ ++#define AIC_ACSR_CADT (1 << 16) /* Command Address and Data Transmitted */ ++ ++/* AIC Controller I2S/MSB-justified Status Register (AIC_I2SSR) */ ++ ++#define AIC_I2SSR_BSY (1 << 2) /* AIC Busy in I2S/MSB-justified format */ ++ ++/* AIC Controller AC97 codec Command Address Register (AIC_ACCAR) */ ++ ++#define AIC_ACCAR_CAR_BIT 0 ++#define AIC_ACCAR_CAR_MASK (0xfffff << AIC_ACCAR_CAR_BIT) ++ ++/* AIC Controller AC97 codec Command Data Register (AIC_ACCDR) */ ++ ++#define AIC_ACCDR_CDR_BIT 0 ++#define AIC_ACCDR_CDR_MASK (0xfffff << AIC_ACCDR_CDR_BIT) ++ ++/* AIC Controller AC97 codec Status Address Register (AIC_ACSAR) */ ++ ++#define AIC_ACSAR_SAR_BIT 0 ++#define AIC_ACSAR_SAR_MASK (0xfffff << AIC_ACSAR_SAR_BIT) ++ ++/* AIC Controller AC97 codec Status Data Register (AIC_ACSDR) */ ++ ++#define AIC_ACSDR_SDR_BIT 0 ++#define AIC_ACSDR_SDR_MASK (0xfffff << AIC_ACSDR_SDR_BIT) ++ ++/* AIC Controller I2S/MSB-justified Clock Divider Register (AIC_I2SDIV) */ ++ ++#define AIC_I2SDIV_DIV_BIT 0 ++#define AIC_I2SDIV_DIV_MASK (0x7f << AIC_I2SDIV_DIV_BIT) ++ #define AIC_I2SDIV_BITCLK_3072KHZ (0x0C << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 3.072MHz */ ++ #define AIC_I2SDIV_BITCLK_2836KHZ (0x0D << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 2.836MHz */ ++ #define AIC_I2SDIV_BITCLK_1418KHZ (0x1A << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 1.418MHz */ ++ #define AIC_I2SDIV_BITCLK_1024KHZ (0x24 << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 1.024MHz */ ++ #define AIC_I2SDIV_BITCLK_7089KHZ (0x34 << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 708.92KHz */ ++ #define AIC_I2SDIV_BITCLK_512KHZ (0x48 << AIC_I2SDIV_DIV_BIT) /* BIT_CLK of 512.00KHz */ ++ ++ ++/************************************************************************* ++ * ICDC (Internal CODEC) ++ *************************************************************************/ ++#define ICDC_CR (ICDC_BASE + 0x0400) /* ICDC Control Register */ ++#define ICDC_APWAIT (ICDC_BASE + 0x0404) /* Anti-Pop WAIT Stage Timing Control Register */ ++#define ICDC_APPRE (ICDC_BASE + 0x0408) /* Anti-Pop HPEN-PRE Stage Timing Control Register */ ++#define ICDC_APHPEN (ICDC_BASE + 0x040C) /* Anti-Pop HPEN Stage Timing Control Register */ ++#define ICDC_APSR (ICDC_BASE + 0x0410) /* Anti-Pop Status Register */ ++#define ICDC_CDCCR1 (ICDC_BASE + 0x0080) ++#define ICDC_CDCCR2 (ICDC_BASE + 0x0084) ++ ++#define REG_ICDC_CR REG32(ICDC_CR) ++#define REG_ICDC_APWAIT REG32(ICDC_APWAIT) ++#define REG_ICDC_APPRE REG32(ICDC_APPRE) ++#define REG_ICDC_APHPEN REG32(ICDC_APHPEN) ++#define REG_ICDC_APSR REG32(ICDC_APSR) ++#define REG_ICDC_CDCCR1 REG32(ICDC_CDCCR1) ++#define REG_ICDC_CDCCR2 REG32(ICDC_CDCCR2) ++ ++/* ICDC Control Register */ ++#define ICDC_CR_LINVOL_BIT 24 /* LINE Input Volume Gain: GAIN=LINVOL*1.5-34.5 */ ++#define ICDC_CR_LINVOL_MASK (0x1f << ICDC_CR_LINVOL_BIT) ++#define ICDC_CR_ASRATE_BIT 20 /* Audio Sample Rate */ ++#define ICDC_CR_ASRATE_MASK (0x0f << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_8000 (0x0 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_11025 (0x1 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_12000 (0x2 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_16000 (0x3 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_22050 (0x4 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_24000 (0x5 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_32000 (0x6 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_44100 (0x7 << ICDC_CR_ASRATE_BIT) ++ #define ICDC_CR_ASRATE_48000 (0x8 << ICDC_CR_ASRATE_BIT) ++#define ICDC_CR_MICBG_BIT 18 /* MIC Boost Gain */ ++#define ICDC_CR_MICBG_MASK (0x3 << ICDC_CR_MICBG_BIT) ++ #define ICDC_CR_MICBG_0DB (0x0 << ICDC_CR_MICBG_BIT) ++ #define ICDC_CR_MICBG_6DB (0x1 << ICDC_CR_MICBG_BIT) ++ #define ICDC_CR_MICBG_12DB (0x2 << ICDC_CR_MICBG_BIT) ++ #define ICDC_CR_MICBG_20DB (0x3 << ICDC_CR_MICBG_BIT) ++#define ICDC_CR_HPVOL_BIT 16 /* Headphone Volume Gain */ ++#define ICDC_CR_HPVOL_MASK (0x3 << ICDC_CR_HPVOL_BIT) ++ #define ICDC_CR_HPVOL_0DB (0x0 << ICDC_CR_HPVOL_BIT) ++ #define ICDC_CR_HPVOL_2DB (0x1 << ICDC_CR_HPVOL_BIT) ++ #define ICDC_CR_HPVOL_4DB (0x2 << ICDC_CR_HPVOL_BIT) ++ #define ICDC_CR_HPVOL_6DB (0x3 << ICDC_CR_HPVOL_BIT) ++#define ICDC_CR_ELINEIN (1 << 13) /* Enable LINE Input */ ++#define ICDC_CR_EMIC (1 << 12) /* Enable MIC Input */ ++#define ICDC_CR_SW1ON (1 << 11) /* Switch 1 in CODEC is on */ ++#define ICDC_CR_EADC (1 << 10) /* Enable ADC */ ++#define ICDC_CR_SW2ON (1 << 9) /* Switch 2 in CODEC is on */ ++#define ICDC_CR_EDAC (1 << 8) /* Enable DAC */ ++#define ICDC_CR_HPMUTE (1 << 5) /* Headphone Mute */ ++#define ICDC_CR_HPTON (1 << 4) /* Headphone Amplifier Trun On */ ++#define ICDC_CR_HPTOFF (1 << 3) /* Headphone Amplifier Trun Off */ ++#define ICDC_CR_TAAP (1 << 2) /* Turn Around of the Anti-Pop Procedure */ ++#define ICDC_CR_EAP (1 << 1) /* Enable Anti-Pop Procedure */ ++#define ICDC_CR_SUSPD (1 << 0) /* CODEC Suspend */ ++ ++/* Anti-Pop WAIT Stage Timing Control Register */ ++#define ICDC_APWAIT_WAITSN_BIT 0 ++#define ICDC_APWAIT_WAITSN_MASK (0x7ff << ICDC_APWAIT_WAITSN_BIT) ++ ++/* Anti-Pop HPEN-PRE Stage Timing Control Register */ ++#define ICDC_APPRE_PRESN_BIT 0 ++#define ICDC_APPRE_PRESN_MASK (0x1ff << ICDC_APPRE_PRESN_BIT) ++ ++/* Anti-Pop HPEN Stage Timing Control Register */ ++#define ICDC_APHPEN_HPENSN_BIT 0 ++#define ICDC_APHPEN_HPENSN_MASK (0x3fff << ICDC_APHPEN_HPENSN_BIT) ++ ++/* Anti-Pop Status Register */ ++#define ICDC_SR_HPST_BIT 14 /* Headphone Amplifier State */ ++#define ICDC_SR_HPST_MASK (0x7 << ICDC_SR_HPST_BIT) ++#define ICDC_SR_HPST_HP_OFF (0x0 << ICDC_SR_HPST_BIT) /* HP amplifier is off */ ++#define ICDC_SR_HPST_TON_WAIT (0x1 << ICDC_SR_HPST_BIT) /* wait state in turn-on */ ++ #define ICDC_SR_HPST_TON_PRE (0x2 << ICDC_SR_HPST_BIT) /* pre-enable state in turn-on */ ++#define ICDC_SR_HPST_TON_HPEN (0x3 << ICDC_SR_HPST_BIT) /* HP enable state in turn-on */ ++ #define ICDC_SR_HPST_TOFF_HPEN (0x4 << ICDC_SR_HPST_BIT) /* HP enable state in turn-off */ ++ #define ICDC_SR_HPST_TOFF_PRE (0x5 << ICDC_SR_HPST_BIT) /* pre-enable state in turn-off */ ++ #define ICDC_SR_HPST_TOFF_WAIT (0x6 << ICDC_SR_HPST_BIT) /* wait state in turn-off */ ++ #define ICDC_SR_HPST_HP_ON (0x7 << ICDC_SR_HPST_BIT) /* HP amplifier is on */ ++#define ICDC_SR_SNCNT_BIT 0 /* Sample Number Counter */ ++#define ICDC_SR_SNCNT_MASK (0x3fff << ICDC_SR_SNCNT_BIT) ++ ++ ++/************************************************************************* ++ * I2C ++ *************************************************************************/ ++#define I2C_DR (I2C_BASE + 0x000) ++#define I2C_CR (I2C_BASE + 0x004) ++#define I2C_SR (I2C_BASE + 0x008) ++#define I2C_GR (I2C_BASE + 0x00C) ++ ++#define REG_I2C_DR REG8(I2C_DR) ++#define REG_I2C_CR REG8(I2C_CR) ++#define REG_I2C_SR REG8(I2C_SR) ++#define REG_I2C_GR REG16(I2C_GR) ++ ++/* I2C Control Register (I2C_CR) */ ++ ++#define I2C_CR_IEN (1 << 4) ++#define I2C_CR_STA (1 << 3) ++#define I2C_CR_STO (1 << 2) ++#define I2C_CR_AC (1 << 1) ++#define I2C_CR_I2CE (1 << 0) ++ ++/* I2C Status Register (I2C_SR) */ ++ ++#define I2C_SR_STX (1 << 4) ++#define I2C_SR_BUSY (1 << 3) ++#define I2C_SR_TEND (1 << 2) ++#define I2C_SR_DRF (1 << 1) ++#define I2C_SR_ACKF (1 << 0) ++ ++ ++/************************************************************************* ++ * SSI ++ *************************************************************************/ ++#define SSI_DR (SSI_BASE + 0x000) ++#define SSI_CR0 (SSI_BASE + 0x004) ++#define SSI_CR1 (SSI_BASE + 0x008) ++#define SSI_SR (SSI_BASE + 0x00C) ++#define SSI_ITR (SSI_BASE + 0x010) ++#define SSI_ICR (SSI_BASE + 0x014) ++#define SSI_GR (SSI_BASE + 0x018) ++ ++#define REG_SSI_DR REG32(SSI_DR) ++#define REG_SSI_CR0 REG16(SSI_CR0) ++#define REG_SSI_CR1 REG32(SSI_CR1) ++#define REG_SSI_SR REG32(SSI_SR) ++#define REG_SSI_ITR REG16(SSI_ITR) ++#define REG_SSI_ICR REG8(SSI_ICR) ++#define REG_SSI_GR REG16(SSI_GR) ++ ++/* SSI Data Register (SSI_DR) */ ++ ++#define SSI_DR_GPC_BIT 0 ++#define SSI_DR_GPC_MASK (0x1ff << SSI_DR_GPC_BIT) ++ ++/* SSI Control Register 0 (SSI_CR0) */ ++ ++#define SSI_CR0_SSIE (1 << 15) ++#define SSI_CR0_TIE (1 << 14) ++#define SSI_CR0_RIE (1 << 13) ++#define SSI_CR0_TEIE (1 << 12) ++#define SSI_CR0_REIE (1 << 11) ++#define SSI_CR0_LOOP (1 << 10) ++#define SSI_CR0_RFINE (1 << 9) ++#define SSI_CR0_RFINC (1 << 8) ++#define SSI_CR0_FSEL (1 << 6) ++#define SSI_CR0_TFLUSH (1 << 2) ++#define SSI_CR0_RFLUSH (1 << 1) ++#define SSI_CR0_DISREV (1 << 0) ++ ++/* SSI Control Register 1 (SSI_CR1) */ ++ ++#define SSI_CR1_FRMHL_BIT 30 ++#define SSI_CR1_FRMHL_MASK (0x3 << SSI_CR1_FRMHL_BIT) ++ #define SSI_CR1_FRMHL_CELOW_CE2LOW (0 << SSI_CR1_FRMHL_BIT) /* SSI_CE_ is low valid and SSI_CE2_ is low valid */ ++ #define SSI_CR1_FRMHL_CEHIGH_CE2LOW (1 << SSI_CR1_FRMHL_BIT) /* SSI_CE_ is high valid and SSI_CE2_ is low valid */ ++ #define SSI_CR1_FRMHL_CELOW_CE2HIGH (2 << SSI_CR1_FRMHL_BIT) /* SSI_CE_ is low valid and SSI_CE2_ is high valid */ ++ #define SSI_CR1_FRMHL_CEHIGH_CE2HIGH (3 << SSI_CR1_FRMHL_BIT) /* SSI_CE_ is high valid and SSI_CE2_ is high valid */ ++#define SSI_CR1_TFVCK_BIT 28 ++#define SSI_CR1_TFVCK_MASK (0x3 << SSI_CR1_TFVCK_BIT) ++ #define SSI_CR1_TFVCK_0 (0 << SSI_CR1_TFVCK_BIT) ++ #define SSI_CR1_TFVCK_1 (1 << SSI_CR1_TFVCK_BIT) ++ #define SSI_CR1_TFVCK_2 (2 << SSI_CR1_TFVCK_BIT) ++ #define SSI_CR1_TFVCK_3 (3 << SSI_CR1_TFVCK_BIT) ++#define SSI_CR1_TCKFI_BIT 26 ++#define SSI_CR1_TCKFI_MASK (0x3 << SSI_CR1_TCKFI_BIT) ++ #define SSI_CR1_TCKFI_0 (0 << SSI_CR1_TCKFI_BIT) ++ #define SSI_CR1_TCKFI_1 (1 << SSI_CR1_TCKFI_BIT) ++ #define SSI_CR1_TCKFI_2 (2 << SSI_CR1_TCKFI_BIT) ++ #define SSI_CR1_TCKFI_3 (3 << SSI_CR1_TCKFI_BIT) ++#define SSI_CR1_LFST (1 << 25) ++#define SSI_CR1_ITFRM (1 << 24) ++#define SSI_CR1_UNFIN (1 << 23) ++#define SSI_CR1_MULTS (1 << 22) ++#define SSI_CR1_FMAT_BIT 20 ++#define SSI_CR1_FMAT_MASK (0x3 << SSI_CR1_FMAT_BIT) ++ #define SSI_CR1_FMAT_SPI (0 << SSI_CR1_FMAT_BIT) /* Motorola¡¯s SPI format */ ++ #define SSI_CR1_FMAT_SSP (1 << SSI_CR1_FMAT_BIT) /* TI's SSP format */ ++ #define SSI_CR1_FMAT_MW1 (2 << SSI_CR1_FMAT_BIT) /* National Microwire 1 format */ ++ #define SSI_CR1_FMAT_MW2 (3 << SSI_CR1_FMAT_BIT) /* National Microwire 2 format */ ++#define SSI_CR1_TTRG_BIT 16 ++#define SSI_CR1_TTRG_MASK (0xf << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_1 (0 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_8 (1 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_16 (2 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_24 (3 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_32 (4 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_40 (5 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_48 (6 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_56 (7 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_64 (8 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_72 (9 << SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_80 (10<< SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_88 (11<< SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_96 (12<< SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_104 (13<< SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_112 (14<< SSI_CR1_TTRG_BIT) ++ #define SSI_CR1_TTRG_120 (15<< SSI_CR1_TTRG_BIT) ++#define SSI_CR1_MCOM_BIT 12 ++#define SSI_CR1_MCOM_MASK (0xf << SSI_CR1_MCOM_BIT) ++ #define SSI_CR1_MCOM_1BIT (0x0 << SSI_CR1_MCOM_BIT) /* 1-bit command selected */ ++ #define SSI_CR1_MCOM_2BIT (0x1 << SSI_CR1_MCOM_BIT) /* 2-bit command selected */ ++ #define SSI_CR1_MCOM_3BIT (0x2 << SSI_CR1_MCOM_BIT) /* 3-bit command selected */ ++ #define SSI_CR1_MCOM_4BIT (0x3 << SSI_CR1_MCOM_BIT) /* 4-bit command selected */ ++ #define SSI_CR1_MCOM_5BIT (0x4 << SSI_CR1_MCOM_BIT) /* 5-bit command selected */ ++ #define SSI_CR1_MCOM_6BIT (0x5 << SSI_CR1_MCOM_BIT) /* 6-bit command selected */ ++ #define SSI_CR1_MCOM_7BIT (0x6 << SSI_CR1_MCOM_BIT) /* 7-bit command selected */ ++ #define SSI_CR1_MCOM_8BIT (0x7 << SSI_CR1_MCOM_BIT) /* 8-bit command selected */ ++ #define SSI_CR1_MCOM_9BIT (0x8 << SSI_CR1_MCOM_BIT) /* 9-bit command selected */ ++ #define SSI_CR1_MCOM_10BIT (0x9 << SSI_CR1_MCOM_BIT) /* 10-bit command selected */ ++ #define SSI_CR1_MCOM_11BIT (0xA << SSI_CR1_MCOM_BIT) /* 11-bit command selected */ ++ #define SSI_CR1_MCOM_12BIT (0xB << SSI_CR1_MCOM_BIT) /* 12-bit command selected */ ++ #define SSI_CR1_MCOM_13BIT (0xC << SSI_CR1_MCOM_BIT) /* 13-bit command selected */ ++ #define SSI_CR1_MCOM_14BIT (0xD << SSI_CR1_MCOM_BIT) /* 14-bit command selected */ ++ #define SSI_CR1_MCOM_15BIT (0xE << SSI_CR1_MCOM_BIT) /* 15-bit command selected */ ++ #define SSI_CR1_MCOM_16BIT (0xF << SSI_CR1_MCOM_BIT) /* 16-bit command selected */ ++#define SSI_CR1_RTRG_BIT 8 ++#define SSI_CR1_RTRG_MASK (0xf << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_1 (0 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_8 (1 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_16 (2 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_24 (3 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_32 (4 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_40 (5 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_48 (6 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_56 (7 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_64 (8 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_72 (9 << SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_80 (10<< SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_88 (11<< SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_96 (12<< SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_104 (13<< SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_112 (14<< SSI_CR1_RTRG_BIT) ++ #define SSI_CR1_RTRG_120 (15<< SSI_CR1_RTRG_BIT) ++#define SSI_CR1_FLEN_BIT 4 ++#define SSI_CR1_FLEN_MASK (0xf << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_2BIT (0x0 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_3BIT (0x1 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_4BIT (0x2 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_5BIT (0x3 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_6BIT (0x4 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_7BIT (0x5 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_8BIT (0x6 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_9BIT (0x7 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_10BIT (0x8 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_11BIT (0x9 << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_12BIT (0xA << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_13BIT (0xB << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_14BIT (0xC << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_15BIT (0xD << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_16BIT (0xE << SSI_CR1_FLEN_BIT) ++ #define SSI_CR1_FLEN_17BIT (0xF << SSI_CR1_FLEN_BIT) ++#define SSI_CR1_PHA (1 << 1) ++#define SSI_CR1_POL (1 << 0) ++ ++/* SSI Status Register (SSI_SR) */ ++ ++#define SSI_SR_TFIFONUM_BIT 16 ++#define SSI_SR_TFIFONUM_MASK (0xff << SSI_SR_TFIFONUM_BIT) ++#define SSI_SR_RFIFONUM_BIT 8 ++#define SSI_SR_RFIFONUM_MASK (0xff << SSI_SR_RFIFONUM_BIT) ++#define SSI_SR_END (1 << 7) ++#define SSI_SR_BUSY (1 << 6) ++#define SSI_SR_TFF (1 << 5) ++#define SSI_SR_RFE (1 << 4) ++#define SSI_SR_TFHE (1 << 3) ++#define SSI_SR_RFHF (1 << 2) ++#define SSI_SR_UNDR (1 << 1) ++#define SSI_SR_OVER (1 << 0) ++ ++/* SSI Interval Time Control Register (SSI_ITR) */ ++ ++#define SSI_ITR_CNTCLK (1 << 15) ++#define SSI_ITR_IVLTM_BIT 0 ++#define SSI_ITR_IVLTM_MASK (0x7fff << SSI_ITR_IVLTM_BIT) ++ ++ ++/************************************************************************* ++ * MSC ++ *************************************************************************/ ++#define MSC_STRPCL (MSC_BASE + 0x000) ++#define MSC_STAT (MSC_BASE + 0x004) ++#define MSC_CLKRT (MSC_BASE + 0x008) ++#define MSC_CMDAT (MSC_BASE + 0x00C) ++#define MSC_RESTO (MSC_BASE + 0x010) ++#define MSC_RDTO (MSC_BASE + 0x014) ++#define MSC_BLKLEN (MSC_BASE + 0x018) ++#define MSC_NOB (MSC_BASE + 0x01C) ++#define MSC_SNOB (MSC_BASE + 0x020) ++#define MSC_IMASK (MSC_BASE + 0x024) ++#define MSC_IREG (MSC_BASE + 0x028) ++#define MSC_CMD (MSC_BASE + 0x02C) ++#define MSC_ARG (MSC_BASE + 0x030) ++#define MSC_RES (MSC_BASE + 0x034) ++#define MSC_RXFIFO (MSC_BASE + 0x038) ++#define MSC_TXFIFO (MSC_BASE + 0x03C) ++ ++#define REG_MSC_STRPCL REG16(MSC_STRPCL) ++#define REG_MSC_STAT REG32(MSC_STAT) ++#define REG_MSC_CLKRT REG16(MSC_CLKRT) ++#define REG_MSC_CMDAT REG32(MSC_CMDAT) ++#define REG_MSC_RESTO REG16(MSC_RESTO) ++#define REG_MSC_RDTO REG16(MSC_RDTO) ++#define REG_MSC_BLKLEN REG16(MSC_BLKLEN) ++#define REG_MSC_NOB REG16(MSC_NOB) ++#define REG_MSC_SNOB REG16(MSC_SNOB) ++#define REG_MSC_IMASK REG16(MSC_IMASK) ++#define REG_MSC_IREG REG16(MSC_IREG) ++#define REG_MSC_CMD REG8(MSC_CMD) ++#define REG_MSC_ARG REG32(MSC_ARG) ++#define REG_MSC_RES REG16(MSC_RES) ++#define REG_MSC_RXFIFO REG32(MSC_RXFIFO) ++#define REG_MSC_TXFIFO REG32(MSC_TXFIFO) ++ ++/* MSC Clock and Control Register (MSC_STRPCL) */ ++ ++#define MSC_STRPCL_EXIT_MULTIPLE (1 << 7) ++#define MSC_STRPCL_EXIT_TRANSFER (1 << 6) ++#define MSC_STRPCL_START_READWAIT (1 << 5) ++#define MSC_STRPCL_STOP_READWAIT (1 << 4) ++#define MSC_STRPCL_RESET (1 << 3) ++#define MSC_STRPCL_START_OP (1 << 2) ++#define MSC_STRPCL_CLOCK_CONTROL_BIT 0 ++#define MSC_STRPCL_CLOCK_CONTROL_MASK (0x3 << MSC_STRPCL_CLOCK_CONTROL_BIT) ++ #define MSC_STRPCL_CLOCK_CONTROL_STOP (0x1 << MSC_STRPCL_CLOCK_CONTROL_BIT) /* Stop MMC/SD clock */ ++ #define MSC_STRPCL_CLOCK_CONTROL_START (0x2 << MSC_STRPCL_CLOCK_CONTROL_BIT) /* Start MMC/SD clock */ ++ ++/* MSC Status Register (MSC_STAT) */ ++ ++#define MSC_STAT_IS_RESETTING (1 << 15) ++#define MSC_STAT_SDIO_INT_ACTIVE (1 << 14) ++#define MSC_STAT_PRG_DONE (1 << 13) ++#define MSC_STAT_DATA_TRAN_DONE (1 << 12) ++#define MSC_STAT_END_CMD_RES (1 << 11) ++#define MSC_STAT_DATA_FIFO_AFULL (1 << 10) ++#define MSC_STAT_IS_READWAIT (1 << 9) ++#define MSC_STAT_CLK_EN (1 << 8) ++#define MSC_STAT_DATA_FIFO_FULL (1 << 7) ++#define MSC_STAT_DATA_FIFO_EMPTY (1 << 6) ++#define MSC_STAT_CRC_RES_ERR (1 << 5) ++#define MSC_STAT_CRC_READ_ERROR (1 << 4) ++#define MSC_STAT_CRC_WRITE_ERROR_BIT 2 ++#define MSC_STAT_CRC_WRITE_ERROR_MASK (0x3 << MSC_STAT_CRC_WRITE_ERROR_BIT) ++ #define MSC_STAT_CRC_WRITE_ERROR_NO (0 << MSC_STAT_CRC_WRITE_ERROR_BIT) /* No error on transmission of data */ ++ #define MSC_STAT_CRC_WRITE_ERROR (1 << MSC_STAT_CRC_WRITE_ERROR_BIT) /* Card observed erroneous transmission of data */ ++ #define MSC_STAT_CRC_WRITE_ERROR_NOSTS (2 << MSC_STAT_CRC_WRITE_ERROR_BIT) /* No CRC status is sent back */ ++#define MSC_STAT_TIME_OUT_RES (1 << 1) ++#define MSC_STAT_TIME_OUT_READ (1 << 0) ++ ++/* MSC Bus Clock Control Register (MSC_CLKRT) */ ++ ++#define MSC_CLKRT_CLK_RATE_BIT 0 ++#define MSC_CLKRT_CLK_RATE_MASK (0x7 << MSC_CLKRT_CLK_RATE_BIT) ++ #define MSC_CLKRT_CLK_RATE_DIV_1 (0x0 << MSC_CLKRT_CLK_RATE_BIT) /* CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_2 (0x1 << MSC_CLKRT_CLK_RATE_BIT) /* 1/2 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_4 (0x2 << MSC_CLKRT_CLK_RATE_BIT) /* 1/4 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_8 (0x3 << MSC_CLKRT_CLK_RATE_BIT) /* 1/8 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_16 (0x4 << MSC_CLKRT_CLK_RATE_BIT) /* 1/16 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_32 (0x5 << MSC_CLKRT_CLK_RATE_BIT) /* 1/32 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_64 (0x6 << MSC_CLKRT_CLK_RATE_BIT) /* 1/64 of CLK_SRC */ ++ #define MSC_CLKRT_CLK_RATE_DIV_128 (0x7 << MSC_CLKRT_CLK_RATE_BIT) /* 1/128 of CLK_SRC */ ++ ++/* MSC Command Sequence Control Register (MSC_CMDAT) */ ++ ++#define MSC_CMDAT_IO_ABORT (1 << 11) ++#define MSC_CMDAT_BUS_WIDTH_BIT 9 ++#define MSC_CMDAT_BUS_WIDTH_MASK (0x3 << MSC_CMDAT_BUS_WIDTH_BIT) ++ #define MSC_CMDAT_BUS_WIDTH_1BIT (0x0 << MSC_CMDAT_BUS_WIDTH_BIT) /* 1-bit data bus */ ++ #define MSC_CMDAT_BUS_WIDTH_4BIT (0x2 << MSC_CMDAT_BUS_WIDTH_BIT) /* 4-bit data bus */ ++ #define CMDAT_BUS_WIDTH1 (0x0 << MSC_CMDAT_BUS_WIDTH_BIT) ++ #define CMDAT_BUS_WIDTH4 (0x2 << MSC_CMDAT_BUS_WIDTH_BIT) ++#define MSC_CMDAT_DMA_EN (1 << 8) ++#define MSC_CMDAT_INIT (1 << 7) ++#define MSC_CMDAT_BUSY (1 << 6) ++#define MSC_CMDAT_STREAM_BLOCK (1 << 5) ++#define MSC_CMDAT_WRITE (1 << 4) ++#define MSC_CMDAT_READ (0 << 4) ++#define MSC_CMDAT_DATA_EN (1 << 3) ++#define MSC_CMDAT_RESPONSE_BIT 0 ++#define MSC_CMDAT_RESPONSE_MASK (0x7 << MSC_CMDAT_RESPONSE_BIT) ++ #define MSC_CMDAT_RESPONSE_NONE (0x0 << MSC_CMDAT_RESPONSE_BIT) /* No response */ ++ #define MSC_CMDAT_RESPONSE_R1 (0x1 << MSC_CMDAT_RESPONSE_BIT) /* Format R1 and R1b */ ++ #define MSC_CMDAT_RESPONSE_R2 (0x2 << MSC_CMDAT_RESPONSE_BIT) /* Format R2 */ ++ #define MSC_CMDAT_RESPONSE_R3 (0x3 << MSC_CMDAT_RESPONSE_BIT) /* Format R3 */ ++ #define MSC_CMDAT_RESPONSE_R4 (0x4 << MSC_CMDAT_RESPONSE_BIT) /* Format R4 */ ++ #define MSC_CMDAT_RESPONSE_R5 (0x5 << MSC_CMDAT_RESPONSE_BIT) /* Format R5 */ ++ #define MSC_CMDAT_RESPONSE_R6 (0x6 << MSC_CMDAT_RESPONSE_BIT) /* Format R6 */ ++ ++#define CMDAT_DMA_EN (1 << 8) ++#define CMDAT_INIT (1 << 7) ++#define CMDAT_BUSY (1 << 6) ++#define CMDAT_STREAM (1 << 5) ++#define CMDAT_WRITE (1 << 4) ++#define CMDAT_DATA_EN (1 << 3) ++ ++/* MSC Interrupts Mask Register (MSC_IMASK) */ ++ ++#define MSC_IMASK_SDIO (1 << 7) ++#define MSC_IMASK_TXFIFO_WR_REQ (1 << 6) ++#define MSC_IMASK_RXFIFO_RD_REQ (1 << 5) ++#define MSC_IMASK_END_CMD_RES (1 << 2) ++#define MSC_IMASK_PRG_DONE (1 << 1) ++#define MSC_IMASK_DATA_TRAN_DONE (1 << 0) ++ ++ ++/* MSC Interrupts Status Register (MSC_IREG) */ ++ ++#define MSC_IREG_SDIO (1 << 7) ++#define MSC_IREG_TXFIFO_WR_REQ (1 << 6) ++#define MSC_IREG_RXFIFO_RD_REQ (1 << 5) ++#define MSC_IREG_END_CMD_RES (1 << 2) ++#define MSC_IREG_PRG_DONE (1 << 1) ++#define MSC_IREG_DATA_TRAN_DONE (1 << 0) ++ ++ ++/************************************************************************* ++ * EMC (External Memory Controller) ++ *************************************************************************/ ++#define EMC_SMCR0 (EMC_BASE + 0x10) /* Static Memory Control Register 0 */ ++#define EMC_SMCR1 (EMC_BASE + 0x14) /* Static Memory Control Register 1 */ ++#define EMC_SMCR2 (EMC_BASE + 0x18) /* Static Memory Control Register 2 */ ++#define EMC_SMCR3 (EMC_BASE + 0x1c) /* Static Memory Control Register 3 */ ++#define EMC_SMCR4 (EMC_BASE + 0x20) /* Static Memory Control Register 4 */ ++#define EMC_SACR0 (EMC_BASE + 0x30) /* Static Memory Bank 0 Addr Config Reg */ ++#define EMC_SACR1 (EMC_BASE + 0x34) /* Static Memory Bank 1 Addr Config Reg */ ++#define EMC_SACR2 (EMC_BASE + 0x38) /* Static Memory Bank 2 Addr Config Reg */ ++#define EMC_SACR3 (EMC_BASE + 0x3c) /* Static Memory Bank 3 Addr Config Reg */ ++#define EMC_SACR4 (EMC_BASE + 0x40) /* Static Memory Bank 4 Addr Config Reg */ ++ ++#define EMC_NFCSR (EMC_BASE + 0x050) /* NAND Flash Control/Status Register */ ++#define EMC_NFECR (EMC_BASE + 0x100) /* NAND Flash ECC Control Register */ ++#define EMC_NFECC (EMC_BASE + 0x104) /* NAND Flash ECC Data Register */ ++#define EMC_NFPAR0 (EMC_BASE + 0x108) /* NAND Flash RS Parity 0 Register */ ++#define EMC_NFPAR1 (EMC_BASE + 0x10c) /* NAND Flash RS Parity 1 Register */ ++#define EMC_NFPAR2 (EMC_BASE + 0x110) /* NAND Flash RS Parity 2 Register */ ++#define EMC_NFINTS (EMC_BASE + 0x114) /* NAND Flash Interrupt Status Register */ ++#define EMC_NFINTE (EMC_BASE + 0x118) /* NAND Flash Interrupt Enable Register */ ++#define EMC_NFERR0 (EMC_BASE + 0x11c) /* NAND Flash RS Error Report 0 Register */ ++#define EMC_NFERR1 (EMC_BASE + 0x120) /* NAND Flash RS Error Report 1 Register */ ++#define EMC_NFERR2 (EMC_BASE + 0x124) /* NAND Flash RS Error Report 2 Register */ ++#define EMC_NFERR3 (EMC_BASE + 0x128) /* NAND Flash RS Error Report 3 Register */ ++ ++#define EMC_DMCR (EMC_BASE + 0x80) /* DRAM Control Register */ ++#define EMC_RTCSR (EMC_BASE + 0x84) /* Refresh Time Control/Status Register */ ++#define EMC_RTCNT (EMC_BASE + 0x88) /* Refresh Timer Counter */ ++#define EMC_RTCOR (EMC_BASE + 0x8c) /* Refresh Time Constant Register */ ++#define EMC_DMAR0 (EMC_BASE + 0x90) /* SDRAM Bank 0 Addr Config Register */ ++#define EMC_SDMR0 (EMC_BASE + 0xa000) /* Mode Register of SDRAM bank 0 */ ++ ++ ++#define REG_EMC_SMCR0 REG32(EMC_SMCR0) ++#define REG_EMC_SMCR1 REG32(EMC_SMCR1) ++#define REG_EMC_SMCR2 REG32(EMC_SMCR2) ++#define REG_EMC_SMCR3 REG32(EMC_SMCR3) ++#define REG_EMC_SMCR4 REG32(EMC_SMCR4) ++#define REG_EMC_SACR0 REG32(EMC_SACR0) ++#define REG_EMC_SACR1 REG32(EMC_SACR1) ++#define REG_EMC_SACR2 REG32(EMC_SACR2) ++#define REG_EMC_SACR3 REG32(EMC_SACR3) ++#define REG_EMC_SACR4 REG32(EMC_SACR4) ++ ++#define REG_EMC_NFCSR REG32(EMC_NFCSR) ++#define REG_EMC_NFECR REG32(EMC_NFECR) ++#define REG_EMC_NFECC REG32(EMC_NFECC) ++#define REG_EMC_NFPAR0 REG32(EMC_NFPAR0) ++#define REG_EMC_NFPAR1 REG32(EMC_NFPAR1) ++#define REG_EMC_NFPAR2 REG32(EMC_NFPAR2) ++#define REG_EMC_NFINTS REG32(EMC_NFINTS) ++#define REG_EMC_NFINTE REG32(EMC_NFINTE) ++#define REG_EMC_NFERR0 REG32(EMC_NFERR0) ++#define REG_EMC_NFERR1 REG32(EMC_NFERR1) ++#define REG_EMC_NFERR2 REG32(EMC_NFERR2) ++#define REG_EMC_NFERR3 REG32(EMC_NFERR3) ++ ++#define REG_EMC_DMCR REG32(EMC_DMCR) ++#define REG_EMC_RTCSR REG16(EMC_RTCSR) ++#define REG_EMC_RTCNT REG16(EMC_RTCNT) ++#define REG_EMC_RTCOR REG16(EMC_RTCOR) ++#define REG_EMC_DMAR0 REG32(EMC_DMAR0) ++ ++/* Static Memory Control Register */ ++#define EMC_SMCR_STRV_BIT 24 ++#define EMC_SMCR_STRV_MASK (0x0f << EMC_SMCR_STRV_BIT) ++#define EMC_SMCR_TAW_BIT 20 ++#define EMC_SMCR_TAW_MASK (0x0f << EMC_SMCR_TAW_BIT) ++#define EMC_SMCR_TBP_BIT 16 ++#define EMC_SMCR_TBP_MASK (0x0f << EMC_SMCR_TBP_BIT) ++#define EMC_SMCR_TAH_BIT 12 ++#define EMC_SMCR_TAH_MASK (0x07 << EMC_SMCR_TAH_BIT) ++#define EMC_SMCR_TAS_BIT 8 ++#define EMC_SMCR_TAS_MASK (0x07 << EMC_SMCR_TAS_BIT) ++#define EMC_SMCR_BW_BIT 6 ++#define EMC_SMCR_BW_MASK (0x03 << EMC_SMCR_BW_BIT) ++ #define EMC_SMCR_BW_8BIT (0 << EMC_SMCR_BW_BIT) ++ #define EMC_SMCR_BW_16BIT (1 << EMC_SMCR_BW_BIT) ++ #define EMC_SMCR_BW_32BIT (2 << EMC_SMCR_BW_BIT) ++#define EMC_SMCR_BCM (1 << 3) ++#define EMC_SMCR_BL_BIT 1 ++#define EMC_SMCR_BL_MASK (0x03 << EMC_SMCR_BL_BIT) ++ #define EMC_SMCR_BL_4 (0 << EMC_SMCR_BL_BIT) ++ #define EMC_SMCR_BL_8 (1 << EMC_SMCR_BL_BIT) ++ #define EMC_SMCR_BL_16 (2 << EMC_SMCR_BL_BIT) ++ #define EMC_SMCR_BL_32 (3 << EMC_SMCR_BL_BIT) ++#define EMC_SMCR_SMT (1 << 0) ++ ++/* Static Memory Bank Addr Config Reg */ ++#define EMC_SACR_BASE_BIT 8 ++#define EMC_SACR_BASE_MASK (0xff << EMC_SACR_BASE_BIT) ++#define EMC_SACR_MASK_BIT 0 ++#define EMC_SACR_MASK_MASK (0xff << EMC_SACR_MASK_BIT) ++ ++/* NAND Flash Control/Status Register */ ++#define EMC_NFCSR_NFCE4 (1 << 7) /* NAND Flash Enable */ ++#define EMC_NFCSR_NFE4 (1 << 6) /* NAND Flash FCE# Assertion Enable */ ++#define EMC_NFCSR_NFCE3 (1 << 5) ++#define EMC_NFCSR_NFE3 (1 << 4) ++#define EMC_NFCSR_NFCE2 (1 << 3) ++#define EMC_NFCSR_NFE2 (1 << 2) ++#define EMC_NFCSR_NFCE1 (1 << 1) ++#define EMC_NFCSR_NFE1 (1 << 0) ++ ++/* NAND Flash ECC Control Register */ ++#define EMC_NFECR_PRDY (1 << 4) /* Parity Ready */ ++#define EMC_NFECR_RS_DECODING (0 << 3) /* RS is in decoding phase */ ++#define EMC_NFECR_RS_ENCODING (1 << 3) /* RS is in encoding phase */ ++#define EMC_NFECR_HAMMING (0 << 2) /* Select HAMMING Correction Algorithm */ ++#define EMC_NFECR_RS (1 << 2) /* Select RS Correction Algorithm */ ++#define EMC_NFECR_ERST (1 << 1) /* ECC Reset */ ++#define EMC_NFECR_ECCE (1 << 0) /* ECC Enable */ ++ ++/* NAND Flash ECC Data Register */ ++#define EMC_NFECC_ECC2_BIT 16 ++#define EMC_NFECC_ECC2_MASK (0xff << EMC_NFECC_ECC2_BIT) ++#define EMC_NFECC_ECC1_BIT 8 ++#define EMC_NFECC_ECC1_MASK (0xff << EMC_NFECC_ECC1_BIT) ++#define EMC_NFECC_ECC0_BIT 0 ++#define EMC_NFECC_ECC0_MASK (0xff << EMC_NFECC_ECC0_BIT) ++ ++/* NAND Flash Interrupt Status Register */ ++#define EMC_NFINTS_ERRCNT_BIT 29 /* Error Count */ ++#define EMC_NFINTS_ERRCNT_MASK (0x7 << EMC_NFINTS_ERRCNT_BIT) ++#define EMC_NFINTS_PADF (1 << 4) /* Padding Finished */ ++#define EMC_NFINTS_DECF (1 << 3) /* Decoding Finished */ ++#define EMC_NFINTS_ENCF (1 << 2) /* Encoding Finished */ ++#define EMC_NFINTS_UNCOR (1 << 1) /* Uncorrectable Error Occurred */ ++#define EMC_NFINTS_ERR (1 << 0) /* Error Occurred */ ++ ++/* NAND Flash Interrupt Enable Register */ ++#define EMC_NFINTE_PADFE (1 << 4) /* Padding Finished Interrupt Enable */ ++#define EMC_NFINTE_DECFE (1 << 3) /* Decoding Finished Interrupt Enable */ ++#define EMC_NFINTE_ENCFE (1 << 2) /* Encoding Finished Interrupt Enable */ ++#define EMC_NFINTE_UNCORE (1 << 1) /* Uncorrectable Error Occurred Intr Enable */ ++#define EMC_NFINTE_ERRE (1 << 0) /* Error Occurred Interrupt */ ++ ++/* NAND Flash RS Error Report Register */ ++#define EMC_NFERR_INDEX_BIT 16 /* Error Symbol Index */ ++#define EMC_NFERR_INDEX_MASK (0x1ff << EMC_NFERR_INDEX_BIT) ++#define EMC_NFERR_MASK_BIT 0 /* Error Symbol Value */ ++#define EMC_NFERR_MASK_MASK (0x1ff << EMC_NFERR_MASK_BIT) ++ ++ ++/* DRAM Control Register */ ++#define EMC_DMCR_BW_BIT 31 ++#define EMC_DMCR_BW (1 << EMC_DMCR_BW_BIT) ++#define EMC_DMCR_CA_BIT 26 ++#define EMC_DMCR_CA_MASK (0x07 << EMC_DMCR_CA_BIT) ++ #define EMC_DMCR_CA_8 (0 << EMC_DMCR_CA_BIT) ++ #define EMC_DMCR_CA_9 (1 << EMC_DMCR_CA_BIT) ++ #define EMC_DMCR_CA_10 (2 << EMC_DMCR_CA_BIT) ++ #define EMC_DMCR_CA_11 (3 << EMC_DMCR_CA_BIT) ++ #define EMC_DMCR_CA_12 (4 << EMC_DMCR_CA_BIT) ++#define EMC_DMCR_RMODE (1 << 25) ++#define EMC_DMCR_RFSH (1 << 24) ++#define EMC_DMCR_MRSET (1 << 23) ++#define EMC_DMCR_RA_BIT 20 ++#define EMC_DMCR_RA_MASK (0x03 << EMC_DMCR_RA_BIT) ++ #define EMC_DMCR_RA_11 (0 << EMC_DMCR_RA_BIT) ++ #define EMC_DMCR_RA_12 (1 << EMC_DMCR_RA_BIT) ++ #define EMC_DMCR_RA_13 (2 << EMC_DMCR_RA_BIT) ++#define EMC_DMCR_BA_BIT 19 ++#define EMC_DMCR_BA (1 << EMC_DMCR_BA_BIT) ++#define EMC_DMCR_PDM (1 << 18) ++#define EMC_DMCR_EPIN (1 << 17) ++#define EMC_DMCR_TRAS_BIT 13 ++#define EMC_DMCR_TRAS_MASK (0x07 << EMC_DMCR_TRAS_BIT) ++#define EMC_DMCR_RCD_BIT 11 ++#define EMC_DMCR_RCD_MASK (0x03 << EMC_DMCR_RCD_BIT) ++#define EMC_DMCR_TPC_BIT 8 ++#define EMC_DMCR_TPC_MASK (0x07 << EMC_DMCR_TPC_BIT) ++#define EMC_DMCR_TRWL_BIT 5 ++#define EMC_DMCR_TRWL_MASK (0x03 << EMC_DMCR_TRWL_BIT) ++#define EMC_DMCR_TRC_BIT 2 ++#define EMC_DMCR_TRC_MASK (0x07 << EMC_DMCR_TRC_BIT) ++#define EMC_DMCR_TCL_BIT 0 ++#define EMC_DMCR_TCL_MASK (0x03 << EMC_DMCR_TCL_BIT) ++ ++/* Refresh Time Control/Status Register */ ++#define EMC_RTCSR_CMF (1 << 7) ++#define EMC_RTCSR_CKS_BIT 0 ++#define EMC_RTCSR_CKS_MASK (0x07 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_DISABLE (0 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_4 (1 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_16 (2 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_64 (3 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_256 (4 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_1024 (5 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_2048 (6 << EMC_RTCSR_CKS_BIT) ++ #define EMC_RTCSR_CKS_4096 (7 << EMC_RTCSR_CKS_BIT) ++ ++/* SDRAM Bank Address Configuration Register */ ++#define EMC_DMAR_BASE_BIT 8 ++#define EMC_DMAR_BASE_MASK (0xff << EMC_DMAR_BASE_BIT) ++#define EMC_DMAR_MASK_BIT 0 ++#define EMC_DMAR_MASK_MASK (0xff << EMC_DMAR_MASK_BIT) ++ ++/* Mode Register of SDRAM bank 0 */ ++#define EMC_SDMR_BM (1 << 9) /* Write Burst Mode */ ++#define EMC_SDMR_OM_BIT 7 /* Operating Mode */ ++#define EMC_SDMR_OM_MASK (3 << EMC_SDMR_OM_BIT) ++ #define EMC_SDMR_OM_NORMAL (0 << EMC_SDMR_OM_BIT) ++#define EMC_SDMR_CAS_BIT 4 /* CAS Latency */ ++#define EMC_SDMR_CAS_MASK (7 << EMC_SDMR_CAS_BIT) ++ #define EMC_SDMR_CAS_1 (1 << EMC_SDMR_CAS_BIT) ++ #define EMC_SDMR_CAS_2 (2 << EMC_SDMR_CAS_BIT) ++ #define EMC_SDMR_CAS_3 (3 << EMC_SDMR_CAS_BIT) ++#define EMC_SDMR_BT_BIT 3 /* Burst Type */ ++#define EMC_SDMR_BT_MASK (1 << EMC_SDMR_BT_BIT) ++ #define EMC_SDMR_BT_SEQ (0 << EMC_SDMR_BT_BIT) /* Sequential */ ++ #define EMC_SDMR_BT_INT (1 << EMC_SDMR_BT_BIT) /* Interleave */ ++#define EMC_SDMR_BL_BIT 0 /* Burst Length */ ++#define EMC_SDMR_BL_MASK (7 << EMC_SDMR_BL_BIT) ++ #define EMC_SDMR_BL_1 (0 << EMC_SDMR_BL_BIT) ++ #define EMC_SDMR_BL_2 (1 << EMC_SDMR_BL_BIT) ++ #define EMC_SDMR_BL_4 (2 << EMC_SDMR_BL_BIT) ++ #define EMC_SDMR_BL_8 (3 << EMC_SDMR_BL_BIT) ++ ++#define EMC_SDMR_CAS2_16BIT \ ++ (EMC_SDMR_CAS_2 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_2) ++#define EMC_SDMR_CAS2_32BIT \ ++ (EMC_SDMR_CAS_2 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_4) ++#define EMC_SDMR_CAS3_16BIT \ ++ (EMC_SDMR_CAS_3 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_2) ++#define EMC_SDMR_CAS3_32BIT \ ++ (EMC_SDMR_CAS_3 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_4) ++ ++ ++/************************************************************************* ++ * CIM ++ *************************************************************************/ ++#define CIM_CFG (CIM_BASE + 0x0000) ++#define CIM_CTRL (CIM_BASE + 0x0004) ++#define CIM_STATE (CIM_BASE + 0x0008) ++#define CIM_IID (CIM_BASE + 0x000C) ++#define CIM_RXFIFO (CIM_BASE + 0x0010) ++#define CIM_DA (CIM_BASE + 0x0020) ++#define CIM_FA (CIM_BASE + 0x0024) ++#define CIM_FID (CIM_BASE + 0x0028) ++#define CIM_CMD (CIM_BASE + 0x002C) ++ ++#define REG_CIM_CFG REG32(CIM_CFG) ++#define REG_CIM_CTRL REG32(CIM_CTRL) ++#define REG_CIM_STATE REG32(CIM_STATE) ++#define REG_CIM_IID REG32(CIM_IID) ++#define REG_CIM_RXFIFO REG32(CIM_RXFIFO) ++#define REG_CIM_DA REG32(CIM_DA) ++#define REG_CIM_FA REG32(CIM_FA) ++#define REG_CIM_FID REG32(CIM_FID) ++#define REG_CIM_CMD REG32(CIM_CMD) ++ ++/* CIM Configuration Register (CIM_CFG) */ ++ ++#define CIM_CFG_INV_DAT (1 << 15) ++#define CIM_CFG_VSP (1 << 14) ++#define CIM_CFG_HSP (1 << 13) ++#define CIM_CFG_PCP (1 << 12) ++#define CIM_CFG_DUMMY_ZERO (1 << 9) ++#define CIM_CFG_EXT_VSYNC (1 << 8) ++#define CIM_CFG_PACK_BIT 4 ++#define CIM_CFG_PACK_MASK (0x7 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_0 (0 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_1 (1 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_2 (2 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_3 (3 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_4 (4 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_5 (5 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_6 (6 << CIM_CFG_PACK_BIT) ++ #define CIM_CFG_PACK_7 (7 << CIM_CFG_PACK_BIT) ++#define CIM_CFG_DSM_BIT 0 ++#define CIM_CFG_DSM_MASK (0x3 << CIM_CFG_DSM_BIT) ++ #define CIM_CFG_DSM_CPM (0 << CIM_CFG_DSM_BIT) /* CCIR656 Progressive Mode */ ++ #define CIM_CFG_DSM_CIM (1 << CIM_CFG_DSM_BIT) /* CCIR656 Interlace Mode */ ++ #define CIM_CFG_DSM_GCM (2 << CIM_CFG_DSM_BIT) /* Gated Clock Mode */ ++ #define CIM_CFG_DSM_NGCM (3 << CIM_CFG_DSM_BIT) /* Non-Gated Clock Mode */ ++ ++/* CIM Control Register (CIM_CTRL) */ ++ ++#define CIM_CTRL_MCLKDIV_BIT 24 ++#define CIM_CTRL_MCLKDIV_MASK (0xff << CIM_CTRL_MCLKDIV_BIT) ++#define CIM_CTRL_FRC_BIT 16 ++#define CIM_CTRL_FRC_MASK (0xf << CIM_CTRL_FRC_BIT) ++ #define CIM_CTRL_FRC_1 (0x0 << CIM_CTRL_FRC_BIT) /* Sample every frame */ ++ #define CIM_CTRL_FRC_2 (0x1 << CIM_CTRL_FRC_BIT) /* Sample 1/2 frame */ ++ #define CIM_CTRL_FRC_3 (0x2 << CIM_CTRL_FRC_BIT) /* Sample 1/3 frame */ ++ #define CIM_CTRL_FRC_4 (0x3 << CIM_CTRL_FRC_BIT) /* Sample 1/4 frame */ ++ #define CIM_CTRL_FRC_5 (0x4 << CIM_CTRL_FRC_BIT) /* Sample 1/5 frame */ ++ #define CIM_CTRL_FRC_6 (0x5 << CIM_CTRL_FRC_BIT) /* Sample 1/6 frame */ ++ #define CIM_CTRL_FRC_7 (0x6 << CIM_CTRL_FRC_BIT) /* Sample 1/7 frame */ ++ #define CIM_CTRL_FRC_8 (0x7 << CIM_CTRL_FRC_BIT) /* Sample 1/8 frame */ ++ #define CIM_CTRL_FRC_9 (0x8 << CIM_CTRL_FRC_BIT) /* Sample 1/9 frame */ ++ #define CIM_CTRL_FRC_10 (0x9 << CIM_CTRL_FRC_BIT) /* Sample 1/10 frame */ ++ #define CIM_CTRL_FRC_11 (0xA << CIM_CTRL_FRC_BIT) /* Sample 1/11 frame */ ++ #define CIM_CTRL_FRC_12 (0xB << CIM_CTRL_FRC_BIT) /* Sample 1/12 frame */ ++ #define CIM_CTRL_FRC_13 (0xC << CIM_CTRL_FRC_BIT) /* Sample 1/13 frame */ ++ #define CIM_CTRL_FRC_14 (0xD << CIM_CTRL_FRC_BIT) /* Sample 1/14 frame */ ++ #define CIM_CTRL_FRC_15 (0xE << CIM_CTRL_FRC_BIT) /* Sample 1/15 frame */ ++ #define CIM_CTRL_FRC_16 (0xF << CIM_CTRL_FRC_BIT) /* Sample 1/16 frame */ ++#define CIM_CTRL_VDDM (1 << 13) ++#define CIM_CTRL_DMA_SOFM (1 << 12) ++#define CIM_CTRL_DMA_EOFM (1 << 11) ++#define CIM_CTRL_DMA_STOPM (1 << 10) ++#define CIM_CTRL_RXF_TRIGM (1 << 9) ++#define CIM_CTRL_RXF_OFM (1 << 8) ++#define CIM_CTRL_RXF_TRIG_BIT 4 ++#define CIM_CTRL_RXF_TRIG_MASK (0x7 << CIM_CTRL_RXF_TRIG_BIT) ++ #define CIM_CTRL_RXF_TRIG_4 (0 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 4 */ ++ #define CIM_CTRL_RXF_TRIG_8 (1 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 8 */ ++ #define CIM_CTRL_RXF_TRIG_12 (2 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 12 */ ++ #define CIM_CTRL_RXF_TRIG_16 (3 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 16 */ ++ #define CIM_CTRL_RXF_TRIG_20 (4 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 20 */ ++ #define CIM_CTRL_RXF_TRIG_24 (5 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 24 */ ++ #define CIM_CTRL_RXF_TRIG_28 (6 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 28 */ ++ #define CIM_CTRL_RXF_TRIG_32 (7 << CIM_CTRL_RXF_TRIG_BIT) /* RXFIFO Trigger Value is 32 */ ++#define CIM_CTRL_DMA_EN (1 << 2) ++#define CIM_CTRL_RXF_RST (1 << 1) ++#define CIM_CTRL_ENA (1 << 0) ++ ++/* CIM State Register (CIM_STATE) */ ++ ++#define CIM_STATE_DMA_SOF (1 << 6) ++#define CIM_STATE_DMA_EOF (1 << 5) ++#define CIM_STATE_DMA_STOP (1 << 4) ++#define CIM_STATE_RXF_OF (1 << 3) ++#define CIM_STATE_RXF_TRIG (1 << 2) ++#define CIM_STATE_RXF_EMPTY (1 << 1) ++#define CIM_STATE_VDD (1 << 0) ++ ++/* CIM DMA Command Register (CIM_CMD) */ ++ ++#define CIM_CMD_SOFINT (1 << 31) ++#define CIM_CMD_EOFINT (1 << 30) ++#define CIM_CMD_STOP (1 << 28) ++#define CIM_CMD_LEN_BIT 0 ++#define CIM_CMD_LEN_MASK (0xffffff << CIM_CMD_LEN_BIT) ++ ++ ++/************************************************************************* ++ * SADC (Smart A/D Controller) ++ *************************************************************************/ ++ ++#define SADC_ENA (SADC_BASE + 0x00) /* ADC Enable Register */ ++#define SADC_CFG (SADC_BASE + 0x04) /* ADC Configure Register */ ++#define SADC_CTRL (SADC_BASE + 0x08) /* ADC Control Register */ ++#define SADC_STATE (SADC_BASE + 0x0C) /* ADC Status Register*/ ++#define SADC_SAMETIME (SADC_BASE + 0x10) /* ADC Same Point Time Register */ ++#define SADC_WAITTIME (SADC_BASE + 0x14) /* ADC Wait Time Register */ ++#define SADC_TSDAT (SADC_BASE + 0x18) /* ADC Touch Screen Data Register */ ++#define SADC_BATDAT (SADC_BASE + 0x1C) /* ADC PBAT Data Register */ ++#define SADC_SADDAT (SADC_BASE + 0x20) /* ADC SADCIN Data Register */ ++ ++#define REG_SADC_ENA REG8(SADC_ENA) ++#define REG_SADC_CFG REG32(SADC_CFG) ++#define REG_SADC_CTRL REG8(SADC_CTRL) ++#define REG_SADC_STATE REG8(SADC_STATE) ++#define REG_SADC_SAMETIME REG16(SADC_SAMETIME) ++#define REG_SADC_WAITTIME REG16(SADC_WAITTIME) ++#define REG_SADC_TSDAT REG32(SADC_TSDAT) ++#define REG_SADC_BATDAT REG16(SADC_BATDAT) ++#define REG_SADC_SADDAT REG16(SADC_SADDAT) ++ ++/* ADC Enable Register */ ++#define SADC_ENA_ADEN (1 << 7) /* Touch Screen Enable */ ++#define SADC_ENA_TSEN (1 << 2) /* Touch Screen Enable */ ++#define SADC_ENA_PBATEN (1 << 1) /* PBAT Enable */ ++#define SADC_ENA_SADCINEN (1 << 0) /* SADCIN Enable */ ++ ++/* ADC Configure Register */ ++#define SADC_CFG_EXIN (1 << 30) ++#define SADC_CFG_CLKOUT_NUM_BIT 16 ++#define SADC_CFG_CLKOUT_NUM_MASK (0x7 << SADC_CFG_CLKOUT_NUM_BIT) ++#define SADC_CFG_TS_DMA (1 << 15) /* Touch Screen DMA Enable */ ++#define SADC_CFG_XYZ_BIT 13 /* XYZ selection */ ++#define SADC_CFG_XYZ_MASK (0x3 << SADC_CFG_XYZ_BIT) ++ #define SADC_CFG_XY (0 << SADC_CFG_XYZ_BIT) ++ #define SADC_CFG_XYZ (1 << SADC_CFG_XYZ_BIT) ++ #define SADC_CFG_XYZ1Z2 (2 << SADC_CFG_XYZ_BIT) ++#define SADC_CFG_SNUM_BIT 10 /* Sample Number */ ++#define SADC_CFG_SNUM_MASK (0x7 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_1 (0x0 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_2 (0x1 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_3 (0x2 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_4 (0x3 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_5 (0x4 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_6 (0x5 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_8 (0x6 << SADC_CFG_SNUM_BIT) ++ #define SADC_CFG_SNUM_9 (0x7 << SADC_CFG_SNUM_BIT) ++#define SADC_CFG_CLKDIV_BIT 5 /* AD Converter frequency clock divider */ ++#define SADC_CFG_CLKDIV_MASK (0x1f << SADC_CFG_CLKDIV_BIT) ++#define SADC_CFG_PBAT_HIGH (0 << 4) /* PBAT >= 2.5V */ ++#define SADC_CFG_PBAT_LOW (1 << 4) /* PBAT < 2.5V */ ++#define SADC_CFG_CMD_BIT 0 /* ADC Command */ ++#define SADC_CFG_CMD_MASK (0xf << SADC_CFG_CMD_BIT) ++ #define SADC_CFG_CMD_X_SE (0x0 << SADC_CFG_CMD_BIT) /* X Single-End */ ++ #define SADC_CFG_CMD_Y_SE (0x1 << SADC_CFG_CMD_BIT) /* Y Single-End */ ++ #define SADC_CFG_CMD_X_DIFF (0x2 << SADC_CFG_CMD_BIT) /* X Differential */ ++ #define SADC_CFG_CMD_Y_DIFF (0x3 << SADC_CFG_CMD_BIT) /* Y Differential */ ++ #define SADC_CFG_CMD_Z1_DIFF (0x4 << SADC_CFG_CMD_BIT) /* Z1 Differential */ ++ #define SADC_CFG_CMD_Z2_DIFF (0x5 << SADC_CFG_CMD_BIT) /* Z2 Differential */ ++ #define SADC_CFG_CMD_Z3_DIFF (0x6 << SADC_CFG_CMD_BIT) /* Z3 Differential */ ++ #define SADC_CFG_CMD_Z4_DIFF (0x7 << SADC_CFG_CMD_BIT) /* Z4 Differential */ ++ #define SADC_CFG_CMD_TP_SE (0x8 << SADC_CFG_CMD_BIT) /* Touch Pressure */ ++ #define SADC_CFG_CMD_PBATH_SE (0x9 << SADC_CFG_CMD_BIT) /* PBAT >= 2.5V */ ++ #define SADC_CFG_CMD_PBATL_SE (0xa << SADC_CFG_CMD_BIT) /* PBAT < 2.5V */ ++ #define SADC_CFG_CMD_SADCIN_SE (0xb << SADC_CFG_CMD_BIT) /* Measure SADCIN */ ++ #define SADC_CFG_CMD_INT_PEN (0xc << SADC_CFG_CMD_BIT) /* INT_PEN Enable */ ++ ++/* ADC Control Register */ ++#define SADC_CTRL_PENDM (1 << 4) /* Pen Down Interrupt Mask */ ++#define SADC_CTRL_PENUM (1 << 3) /* Pen Up Interrupt Mask */ ++#define SADC_CTRL_TSRDYM (1 << 2) /* Touch Screen Data Ready Interrupt Mask */ ++#define SADC_CTRL_PBATRDYM (1 << 1) /* PBAT Data Ready Interrupt Mask */ ++#define SADC_CTRL_SRDYM (1 << 0) /* SADCIN Data Ready Interrupt Mask */ ++ ++/* ADC Status Register */ ++#define SADC_STATE_TSBUSY (1 << 7) /* TS A/D is working */ ++#define SADC_STATE_PBATBUSY (1 << 6) /* PBAT A/D is working */ ++#define SADC_STATE_SBUSY (1 << 5) /* SADCIN A/D is working */ ++#define SADC_STATE_PEND (1 << 4) /* Pen Down Interrupt Flag */ ++#define SADC_STATE_PENU (1 << 3) /* Pen Up Interrupt Flag */ ++#define SADC_STATE_TSRDY (1 << 2) /* Touch Screen Data Ready Interrupt Flag */ ++#define SADC_STATE_PBATRDY (1 << 1) /* PBAT Data Ready Interrupt Flag */ ++#define SADC_STATE_SRDY (1 << 0) /* SADCIN Data Ready Interrupt Flag */ ++ ++/* ADC Touch Screen Data Register */ ++#define SADC_TSDAT_DATA0_BIT 0 ++#define SADC_TSDAT_DATA0_MASK (0xfff << SADC_TSDAT_DATA0_BIT) ++#define SADC_TSDAT_TYPE0 (1 << 15) ++#define SADC_TSDAT_DATA1_BIT 16 ++#define SADC_TSDAT_DATA1_MASK (0xfff << SADC_TSDAT_DATA1_BIT) ++#define SADC_TSDAT_TYPE1 (1 << 31) ++ ++ ++/************************************************************************* ++ * SLCD (Smart LCD Controller) ++ *************************************************************************/ ++ ++#define SLCD_CFG (SLCD_BASE + 0xA0) /* SLCD Configure Register */ ++#define SLCD_CTRL (SLCD_BASE + 0xA4) /* SLCD Control Register */ ++#define SLCD_STATE (SLCD_BASE + 0xA8) /* SLCD Status Register */ ++#define SLCD_DATA (SLCD_BASE + 0xAC) /* SLCD Data Register */ ++#define SLCD_FIFO (SLCD_BASE + 0xB0) /* SLCD FIFO Register */ ++ ++#define REG_SLCD_CFG REG32(SLCD_CFG) ++#define REG_SLCD_CTRL REG8(SLCD_CTRL) ++#define REG_SLCD_STATE REG8(SLCD_STATE) ++#define REG_SLCD_DATA REG32(SLCD_DATA) ++#define REG_SLCD_FIFO REG32(SLCD_FIFO) ++ ++/* SLCD Configure Register */ ++#define SLCD_CFG_BURST_BIT 14 ++#define SLCD_CFG_BURST_MASK (0x3 << SLCD_CFG_BURST_BIT) ++ #define SLCD_CFG_BURST_4_WORD (0 << SLCD_CFG_BURST_BIT) ++ #define SLCD_CFG_BURST_8_WORD (1 << SLCD_CFG_BURST_BIT) ++#define SLCD_CFG_DWIDTH_BIT 10 ++#define SLCD_CFG_DWIDTH_MASK (0x7 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_18 (0 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_16 (1 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_8_x3 (2 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_8_x2 (3 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_8_x1 (4 << SLCD_CFG_DWIDTH_BIT) ++ #define SLCD_CFG_DWIDTH_9_x2 (7 << SLCD_CFG_DWIDTH_BIT) ++#define SLCD_CFG_CWIDTH_16BIT (0 << 8) ++#define SLCD_CFG_CWIDTH_8BIT (1 << 8) ++#define SLCD_CFG_CWIDTH_18BIT (2 << 8) ++#define SLCD_CFG_CS_ACTIVE_LOW (0 << 4) ++#define SLCD_CFG_CS_ACTIVE_HIGH (1 << 4) ++#define SLCD_CFG_RS_CMD_LOW (0 << 3) ++#define SLCD_CFG_RS_CMD_HIGH (1 << 3) ++#define SLCD_CFG_CLK_ACTIVE_FALLING (0 << 1) ++#define SLCD_CFG_CLK_ACTIVE_RISING (1 << 1) ++#define SLCD_CFG_TYPE_PARALLEL (0 << 0) ++#define SLCD_CFG_TYPE_SERIAL (1 << 0) ++ ++/* SLCD Control Register */ ++#define SLCD_CTRL_DMA_EN (1 << 0) ++ ++/* SLCD Status Register */ ++#define SLCD_STATE_BUSY (1 << 0) ++ ++/* SLCD Data Register */ ++#define SLCD_DATA_RS_DATA (0 << 31) ++#define SLCD_DATA_RS_COMMAND (1 << 31) ++ ++/* SLCD FIFO Register */ ++#define SLCD_FIFO_RS_DATA (0 << 31) ++#define SLCD_FIFO_RS_COMMAND (1 << 31) ++ ++ ++/************************************************************************* ++ * LCD (LCD Controller) ++ *************************************************************************/ ++#define LCD_CFG (LCD_BASE + 0x00) /* LCD Configure Register */ ++#define LCD_VSYNC (LCD_BASE + 0x04) /* Vertical Synchronize Register */ ++#define LCD_HSYNC (LCD_BASE + 0x08) /* Horizontal Synchronize Register */ ++#define LCD_VAT (LCD_BASE + 0x0c) /* Virtual Area Setting Register */ ++#define LCD_DAH (LCD_BASE + 0x10) /* Display Area Horizontal Start/End Point */ ++#define LCD_DAV (LCD_BASE + 0x14) /* Display Area Vertical Start/End Point */ ++#define LCD_PS (LCD_BASE + 0x18) /* PS Signal Setting */ ++#define LCD_CLS (LCD_BASE + 0x1c) /* CLS Signal Setting */ ++#define LCD_SPL (LCD_BASE + 0x20) /* SPL Signal Setting */ ++#define LCD_REV (LCD_BASE + 0x24) /* REV Signal Setting */ ++#define LCD_CTRL (LCD_BASE + 0x30) /* LCD Control Register */ ++#define LCD_STATE (LCD_BASE + 0x34) /* LCD Status Register */ ++#define LCD_IID (LCD_BASE + 0x38) /* Interrupt ID Register */ ++#define LCD_DA0 (LCD_BASE + 0x40) /* Descriptor Address Register 0 */ ++#define LCD_SA0 (LCD_BASE + 0x44) /* Source Address Register 0 */ ++#define LCD_FID0 (LCD_BASE + 0x48) /* Frame ID Register 0 */ ++#define LCD_CMD0 (LCD_BASE + 0x4c) /* DMA Command Register 0 */ ++#define LCD_DA1 (LCD_BASE + 0x50) /* Descriptor Address Register 1 */ ++#define LCD_SA1 (LCD_BASE + 0x54) /* Source Address Register 1 */ ++#define LCD_FID1 (LCD_BASE + 0x58) /* Frame ID Register 1 */ ++#define LCD_CMD1 (LCD_BASE + 0x5c) /* DMA Command Register 1 */ ++ ++#define REG_LCD_CFG REG32(LCD_CFG) ++#define REG_LCD_VSYNC REG32(LCD_VSYNC) ++#define REG_LCD_HSYNC REG32(LCD_HSYNC) ++#define REG_LCD_VAT REG32(LCD_VAT) ++#define REG_LCD_DAH REG32(LCD_DAH) ++#define REG_LCD_DAV REG32(LCD_DAV) ++#define REG_LCD_PS REG32(LCD_PS) ++#define REG_LCD_CLS REG32(LCD_CLS) ++#define REG_LCD_SPL REG32(LCD_SPL) ++#define REG_LCD_REV REG32(LCD_REV) ++#define REG_LCD_CTRL REG32(LCD_CTRL) ++#define REG_LCD_STATE REG32(LCD_STATE) ++#define REG_LCD_IID REG32(LCD_IID) ++#define REG_LCD_DA0 REG32(LCD_DA0) ++#define REG_LCD_SA0 REG32(LCD_SA0) ++#define REG_LCD_FID0 REG32(LCD_FID0) ++#define REG_LCD_CMD0 REG32(LCD_CMD0) ++#define REG_LCD_DA1 REG32(LCD_DA1) ++#define REG_LCD_SA1 REG32(LCD_SA1) ++#define REG_LCD_FID1 REG32(LCD_FID1) ++#define REG_LCD_CMD1 REG32(LCD_CMD1) ++ ++/* LCD Configure Register */ ++#define LCD_CFG_LCDPIN_BIT 31 /* LCD pins selection */ ++#define LCD_CFG_LCDPIN_MASK (0x1 << LCD_CFG_LCDPIN_BIT) ++ #define LCD_CFG_LCDPIN_LCD (0x0 << LCD_CFG_LCDPIN_BIT) ++ #define LCD_CFG_LCDPIN_SLCD (0x1 << LCD_CFG_LCDPIN_BIT) ++#define LCD_CFG_PSM (1 << 23) /* PS signal mode */ ++#define LCD_CFG_CLSM (1 << 22) /* CLS signal mode */ ++#define LCD_CFG_SPLM (1 << 21) /* SPL signal mode */ ++#define LCD_CFG_REVM (1 << 20) /* REV signal mode */ ++#define LCD_CFG_HSYNM (1 << 19) /* HSYNC signal mode */ ++#define LCD_CFG_PCLKM (1 << 18) /* PCLK signal mode */ ++#define LCD_CFG_INVDAT (1 << 17) /* Inverse output data */ ++#define LCD_CFG_SYNDIR_IN (1 << 16) /* VSYNC&HSYNC direction */ ++#define LCD_CFG_PSP (1 << 15) /* PS pin reset state */ ++#define LCD_CFG_CLSP (1 << 14) /* CLS pin reset state */ ++#define LCD_CFG_SPLP (1 << 13) /* SPL pin reset state */ ++#define LCD_CFG_REVP (1 << 12) /* REV pin reset state */ ++#define LCD_CFG_HSP (1 << 11) /* HSYNC pority:0-active high,1-active low */ ++#define LCD_CFG_PCP (1 << 10) /* PCLK pority:0-rising,1-falling */ ++#define LCD_CFG_DEP (1 << 9) /* DE pority:0-active high,1-active low */ ++#define LCD_CFG_VSP (1 << 8) /* VSYNC pority:0-rising,1-falling */ ++#define LCD_CFG_PDW_BIT 4 /* STN pins utilization */ ++#define LCD_CFG_PDW_MASK (0x3 << LCD_DEV_PDW_BIT) ++#define LCD_CFG_PDW_1 (0 << LCD_CFG_PDW_BIT) /* LCD_D[0] */ ++ #define LCD_CFG_PDW_2 (1 << LCD_CFG_PDW_BIT) /* LCD_D[0:1] */ ++ #define LCD_CFG_PDW_4 (2 << LCD_CFG_PDW_BIT) /* LCD_D[0:3]/LCD_D[8:11] */ ++ #define LCD_CFG_PDW_8 (3 << LCD_CFG_PDW_BIT) /* LCD_D[0:7]/LCD_D[8:15] */ ++#define LCD_CFG_MODE_BIT 0 /* Display Device Mode Select */ ++#define LCD_CFG_MODE_MASK (0x0f << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_GENERIC_TFT (0 << LCD_CFG_MODE_BIT) /* 16,18 bit TFT */ ++ #define LCD_CFG_MODE_SPECIAL_TFT_1 (1 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SPECIAL_TFT_2 (2 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SPECIAL_TFT_3 (3 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_NONINTER_CCIR656 (4 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_INTER_CCIR656 (6 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SINGLE_CSTN (8 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SINGLE_MSTN (9 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_DUAL_CSTN (10 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_DUAL_MSTN (11 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SERIAL_TFT (12 << LCD_CFG_MODE_BIT) ++ /* JZ47XX defines */ ++ #define LCD_CFG_MODE_SHARP_HR (1 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_CASIO_TFT (2 << LCD_CFG_MODE_BIT) ++ #define LCD_CFG_MODE_SAMSUNG_ALPHA (3 << LCD_CFG_MODE_BIT) ++ ++ ++ ++/* Vertical Synchronize Register */ ++#define LCD_VSYNC_VPS_BIT 16 /* VSYNC pulse start in line clock, fixed to 0 */ ++#define LCD_VSYNC_VPS_MASK (0xffff << LCD_VSYNC_VPS_BIT) ++#define LCD_VSYNC_VPE_BIT 0 /* VSYNC pulse end in line clock */ ++#define LCD_VSYNC_VPE_MASK (0xffff << LCD_VSYNC_VPS_BIT) ++ ++/* Horizontal Synchronize Register */ ++#define LCD_HSYNC_HPS_BIT 16 /* HSYNC pulse start position in dot clock */ ++#define LCD_HSYNC_HPS_MASK (0xffff << LCD_HSYNC_HPS_BIT) ++#define LCD_HSYNC_HPE_BIT 0 /* HSYNC pulse end position in dot clock */ ++#define LCD_HSYNC_HPE_MASK (0xffff << LCD_HSYNC_HPE_BIT) ++ ++/* Virtual Area Setting Register */ ++#define LCD_VAT_HT_BIT 16 /* Horizontal Total size in dot clock */ ++#define LCD_VAT_HT_MASK (0xffff << LCD_VAT_HT_BIT) ++#define LCD_VAT_VT_BIT 0 /* Vertical Total size in dot clock */ ++#define LCD_VAT_VT_MASK (0xffff << LCD_VAT_VT_BIT) ++ ++/* Display Area Horizontal Start/End Point Register */ ++#define LCD_DAH_HDS_BIT 16 /* Horizontal display area start in dot clock */ ++#define LCD_DAH_HDS_MASK (0xffff << LCD_DAH_HDS_BIT) ++#define LCD_DAH_HDE_BIT 0 /* Horizontal display area end in dot clock */ ++#define LCD_DAH_HDE_MASK (0xffff << LCD_DAH_HDE_BIT) ++ ++/* Display Area Vertical Start/End Point Register */ ++#define LCD_DAV_VDS_BIT 16 /* Vertical display area start in line clock */ ++#define LCD_DAV_VDS_MASK (0xffff << LCD_DAV_VDS_BIT) ++#define LCD_DAV_VDE_BIT 0 /* Vertical display area end in line clock */ ++#define LCD_DAV_VDE_MASK (0xffff << LCD_DAV_VDE_BIT) ++ ++/* PS Signal Setting */ ++#define LCD_PS_PSS_BIT 16 /* PS signal start position in dot clock */ ++#define LCD_PS_PSS_MASK (0xffff << LCD_PS_PSS_BIT) ++#define LCD_PS_PSE_BIT 0 /* PS signal end position in dot clock */ ++#define LCD_PS_PSE_MASK (0xffff << LCD_PS_PSE_BIT) ++ ++/* CLS Signal Setting */ ++#define LCD_CLS_CLSS_BIT 16 /* CLS signal start position in dot clock */ ++#define LCD_CLS_CLSS_MASK (0xffff << LCD_CLS_CLSS_BIT) ++#define LCD_CLS_CLSE_BIT 0 /* CLS signal end position in dot clock */ ++#define LCD_CLS_CLSE_MASK (0xffff << LCD_CLS_CLSE_BIT) ++ ++/* SPL Signal Setting */ ++#define LCD_SPL_SPLS_BIT 16 /* SPL signal start position in dot clock */ ++#define LCD_SPL_SPLS_MASK (0xffff << LCD_SPL_SPLS_BIT) ++#define LCD_SPL_SPLE_BIT 0 /* SPL signal end position in dot clock */ ++#define LCD_SPL_SPLE_MASK (0xffff << LCD_SPL_SPLE_BIT) ++ ++/* REV Signal Setting */ ++#define LCD_REV_REVS_BIT 16 /* REV signal start position in dot clock */ ++#define LCD_REV_REVS_MASK (0xffff << LCD_REV_REVS_BIT) ++ ++/* LCD Control Register */ ++#define LCD_CTRL_BST_BIT 28 /* Burst Length Selection */ ++#define LCD_CTRL_BST_MASK (0x03 << LCD_CTRL_BST_BIT) ++ #define LCD_CTRL_BST_4 (0 << LCD_CTRL_BST_BIT) /* 4-word */ ++ #define LCD_CTRL_BST_8 (1 << LCD_CTRL_BST_BIT) /* 8-word */ ++ #define LCD_CTRL_BST_16 (2 << LCD_CTRL_BST_BIT) /* 16-word */ ++#define LCD_CTRL_RGB565 (0 << 27) /* RGB565 mode */ ++#define LCD_CTRL_RGB555 (1 << 27) /* RGB555 mode */ ++#define LCD_CTRL_OFUP (1 << 26) /* Output FIFO underrun protection enable */ ++#define LCD_CTRL_FRC_BIT 24 /* STN FRC Algorithm Selection */ ++#define LCD_CTRL_FRC_MASK (0x03 << LCD_CTRL_FRC_BIT) ++ #define LCD_CTRL_FRC_16 (0 << LCD_CTRL_FRC_BIT) /* 16 grayscale */ ++ #define LCD_CTRL_FRC_4 (1 << LCD_CTRL_FRC_BIT) /* 4 grayscale */ ++ #define LCD_CTRL_FRC_2 (2 << LCD_CTRL_FRC_BIT) /* 2 grayscale */ ++#define LCD_CTRL_PDD_BIT 16 /* Load Palette Delay Counter */ ++#define LCD_CTRL_PDD_MASK (0xff << LCD_CTRL_PDD_BIT) ++#define LCD_CTRL_EOFM (1 << 13) /* EOF interrupt mask */ ++#define LCD_CTRL_SOFM (1 << 12) /* SOF interrupt mask */ ++#define LCD_CTRL_OFUM (1 << 11) /* Output FIFO underrun interrupt mask */ ++#define LCD_CTRL_IFUM0 (1 << 10) /* Input FIFO 0 underrun interrupt mask */ ++#define LCD_CTRL_IFUM1 (1 << 9) /* Input FIFO 1 underrun interrupt mask */ ++#define LCD_CTRL_LDDM (1 << 8) /* LCD disable done interrupt mask */ ++#define LCD_CTRL_QDM (1 << 7) /* LCD quick disable done interrupt mask */ ++#define LCD_CTRL_BEDN (1 << 6) /* Endian selection */ ++#define LCD_CTRL_PEDN (1 << 5) /* Endian in byte:0-msb first, 1-lsb first */ ++#define LCD_CTRL_DIS (1 << 4) /* Disable indicate bit */ ++#define LCD_CTRL_ENA (1 << 3) /* LCD enable bit */ ++#define LCD_CTRL_BPP_BIT 0 /* Bits Per Pixel */ ++#define LCD_CTRL_BPP_MASK (0x07 << LCD_CTRL_BPP_BIT) ++ #define LCD_CTRL_BPP_1 (0 << LCD_CTRL_BPP_BIT) /* 1 bpp */ ++ #define LCD_CTRL_BPP_2 (1 << LCD_CTRL_BPP_BIT) /* 2 bpp */ ++ #define LCD_CTRL_BPP_4 (2 << LCD_CTRL_BPP_BIT) /* 4 bpp */ ++ #define LCD_CTRL_BPP_8 (3 << LCD_CTRL_BPP_BIT) /* 8 bpp */ ++ #define LCD_CTRL_BPP_16 (4 << LCD_CTRL_BPP_BIT) /* 15/16 bpp */ ++ #define LCD_CTRL_BPP_18_24 (5 << LCD_CTRL_BPP_BIT) /* 18/24/32 bpp */ ++ ++/* LCD Status Register */ ++#define LCD_STATE_QD (1 << 7) /* Quick Disable Done */ ++#define LCD_STATE_EOF (1 << 5) /* EOF Flag */ ++#define LCD_STATE_SOF (1 << 4) /* SOF Flag */ ++#define LCD_STATE_OFU (1 << 3) /* Output FIFO Underrun */ ++#define LCD_STATE_IFU0 (1 << 2) /* Input FIFO 0 Underrun */ ++#define LCD_STATE_IFU1 (1 << 1) /* Input FIFO 1 Underrun */ ++#define LCD_STATE_LDD (1 << 0) /* LCD Disabled */ ++ ++/* DMA Command Register */ ++#define LCD_CMD_SOFINT (1 << 31) ++#define LCD_CMD_EOFINT (1 << 30) ++#define LCD_CMD_PAL (1 << 28) ++#define LCD_CMD_LEN_BIT 0 ++#define LCD_CMD_LEN_MASK (0xffffff << LCD_CMD_LEN_BIT) ++ ++ ++/************************************************************************* ++ * USB Device ++ *************************************************************************/ ++#define USB_BASE UDC_BASE ++ ++#define USB_REG_FADDR (USB_BASE + 0x00) /* Function Address 8-bit */ ++#define USB_REG_POWER (USB_BASE + 0x01) /* Power Managemetn 8-bit */ ++#define USB_REG_INTRIN (USB_BASE + 0x02) /* Interrupt IN 16-bit */ ++#define USB_REG_INTROUT (USB_BASE + 0x04) /* Interrupt OUT 16-bit */ ++#define USB_REG_INTRINE (USB_BASE + 0x06) /* Intr IN enable 16-bit */ ++#define USB_REG_INTROUTE (USB_BASE + 0x08) /* Intr OUT enable 16-bit */ ++#define USB_REG_INTRUSB (USB_BASE + 0x0a) /* Interrupt USB 8-bit */ ++#define USB_REG_INTRUSBE (USB_BASE + 0x0b) /* Interrupt USB Enable 8-bit */ ++#define USB_REG_FRAME (USB_BASE + 0x0c) /* Frame number 16-bit */ ++#define USB_REG_INDEX (USB_BASE + 0x0e) /* Index register 8-bit */ ++#define USB_REG_TESTMODE (USB_BASE + 0x0f) /* USB test mode 8-bit */ ++ ++#define USB_REG_CSR0 (USB_BASE + 0x12) /* EP0 CSR 8-bit */ ++#define USB_REG_INMAXP (USB_BASE + 0x10) /* EP1-2 IN Max Pkt Size 16-bit */ ++#define USB_REG_INCSR (USB_BASE + 0x12) /* EP1-2 IN CSR LSB 8/16bit */ ++#define USB_REG_INCSRH (USB_BASE + 0x13) /* EP1-2 IN CSR MSB 8-bit */ ++#define USB_REG_OUTMAXP (USB_BASE + 0x14) /* EP1 OUT Max Pkt Size 16-bit */ ++#define USB_REG_OUTCSR (USB_BASE + 0x16) /* EP1 OUT CSR LSB 8/16bit */ ++#define USB_REG_OUTCSRH (USB_BASE + 0x17) /* EP1 OUT CSR MSB 8-bit */ ++#define USB_REG_OUTCOUNT (USB_BASE + 0x18) /* bytes in EP0/1 OUT FIFO 16-bit */ ++ ++#define USB_FIFO_EP0 (USB_BASE + 0x20) ++#define USB_FIFO_EP1 (USB_BASE + 0x24) ++#define USB_FIFO_EP2 (USB_BASE + 0x28) ++ ++#define USB_REG_EPINFO (USB_BASE + 0x78) /* Endpoint information */ ++#define USB_REG_RAMINFO (USB_BASE + 0x79) /* RAM information */ ++ ++#define USB_REG_INTR (USB_BASE + 0x200) /* DMA pending interrupts */ ++#define USB_REG_CNTL1 (USB_BASE + 0x204) /* DMA channel 1 control */ ++#define USB_REG_ADDR1 (USB_BASE + 0x208) /* DMA channel 1 AHB memory addr */ ++#define USB_REG_COUNT1 (USB_BASE + 0x20c) /* DMA channel 1 byte count */ ++#define USB_REG_CNTL2 (USB_BASE + 0x214) /* DMA channel 2 control */ ++#define USB_REG_ADDR2 (USB_BASE + 0x218) /* DMA channel 2 AHB memory addr */ ++#define USB_REG_COUNT2 (USB_BASE + 0x21c) /* DMA channel 2 byte count */ ++ ++ ++/* Power register bit masks */ ++#define USB_POWER_SUSPENDM 0x01 ++#define USB_POWER_RESUME 0x04 ++#define USB_POWER_HSMODE 0x10 ++#define USB_POWER_HSENAB 0x20 ++#define USB_POWER_SOFTCONN 0x40 ++ ++/* Interrupt register bit masks */ ++#define USB_INTR_SUSPEND 0x01 ++#define USB_INTR_RESUME 0x02 ++#define USB_INTR_RESET 0x04 ++ ++#define USB_INTR_EP0 0x0001 ++#define USB_INTR_INEP1 0x0002 ++#define USB_INTR_INEP2 0x0004 ++#define USB_INTR_OUTEP1 0x0002 ++ ++/* CSR0 bit masks */ ++#define USB_CSR0_OUTPKTRDY 0x01 ++#define USB_CSR0_INPKTRDY 0x02 ++#define USB_CSR0_SENTSTALL 0x04 ++#define USB_CSR0_DATAEND 0x08 ++#define USB_CSR0_SETUPEND 0x10 ++#define USB_CSR0_SENDSTALL 0x20 ++#define USB_CSR0_SVDOUTPKTRDY 0x40 ++#define USB_CSR0_SVDSETUPEND 0x80 ++ ++/* Endpoint CSR register bits */ ++#define USB_INCSRH_AUTOSET 0x80 ++#define USB_INCSRH_ISO 0x40 ++#define USB_INCSRH_MODE 0x20 ++#define USB_INCSRH_DMAREQENAB 0x10 ++#define USB_INCSRH_DMAREQMODE 0x04 ++#define USB_INCSR_CDT 0x40 ++#define USB_INCSR_SENTSTALL 0x20 ++#define USB_INCSR_SENDSTALL 0x10 ++#define USB_INCSR_FF 0x08 ++#define USB_INCSR_UNDERRUN 0x04 ++#define USB_INCSR_FFNOTEMPT 0x02 ++#define USB_INCSR_INPKTRDY 0x01 ++#define USB_OUTCSRH_AUTOCLR 0x80 ++#define USB_OUTCSRH_ISO 0x40 ++#define USB_OUTCSRH_DMAREQENAB 0x20 ++#define USB_OUTCSRH_DNYT 0x10 ++#define USB_OUTCSRH_DMAREQMODE 0x08 ++#define USB_OUTCSR_CDT 0x80 ++#define USB_OUTCSR_SENTSTALL 0x40 ++#define USB_OUTCSR_SENDSTALL 0x20 ++#define USB_OUTCSR_FF 0x10 ++#define USB_OUTCSR_DATAERR 0x08 ++#define USB_OUTCSR_OVERRUN 0x04 ++#define USB_OUTCSR_FFFULL 0x02 ++#define USB_OUTCSR_OUTPKTRDY 0x01 ++ ++/* Testmode register bits */ ++#define USB_TEST_SE0NAK 0x01 ++#define USB_TEST_J 0x02 ++#define USB_TEST_K 0x04 ++#define USB_TEST_PACKET 0x08 ++ ++/* DMA control bits */ ++#define USB_CNTL_ENA 0x01 ++#define USB_CNTL_DIR_IN 0x02 ++#define USB_CNTL_MODE_1 0x04 ++#define USB_CNTL_INTR_EN 0x08 ++#define USB_CNTL_EP(n) ((n) << 4) ++#define USB_CNTL_BURST_0 (0 << 9) ++#define USB_CNTL_BURST_4 (1 << 9) ++#define USB_CNTL_BURST_8 (2 << 9) ++#define USB_CNTL_BURST_16 (3 << 9) ++ ++#endif /* __JZ4740_REGS_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/serial.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/serial.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/serial.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/serial.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,30 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/serial.h ++ * ++ * Ingenic's JZ4740 common include. ++ * ++ * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. ++ * ++ * Author: <yliu@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_BOARD_SERIAL_H__ ++#define __ASM_BOARD_SERIAL_H__ ++ ++#ifndef CONFIG_SERIAL_MANY_PORTS ++#undef RS_TABLE_SIZE ++#define RS_TABLE_SIZE 1 ++#endif ++ ++#define JZ_BASE_BAUD (12000000/16) ++ ++#define JZ_SERIAL_PORT_DEFNS \ ++ { .baud_base = JZ_BASE_BAUD, .irq = IRQ_UART0, \ ++ .flags = STD_COM_FLAGS, .iomem_base = (u8 *)UART0_BASE, \ ++ .iomem_reg_shift = 2, .io_type = SERIAL_IO_MEM }, ++ ++#endif /* __ASM_BORAD_SERIAL_H__ */ +diff -ruN linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/war.h linux-2.6.31/arch/mips/include/asm/mach-jz4740/war.h +--- linux-2.6.31-vanilla/arch/mips/include/asm/mach-jz4740/war.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/include/asm/mach-jz4740/war.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,25 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> ++ */ ++#ifndef __ASM_MIPS_MACH_JZ4740_WAR_H ++#define __ASM_MIPS_MACH_JZ4740_WAR_H ++ ++#define R4600_V1_INDEX_ICACHEOP_WAR 0 ++#define R4600_V1_HIT_CACHEOP_WAR 0 ++#define R4600_V2_HIT_CACHEOP_WAR 0 ++#define R5432_CP0_INTERRUPT_WAR 0 ++#define BCM1250_M3_WAR 0 ++#define SIBYTE_1956_WAR 0 ++#define MIPS4K_ICACHE_REFILL_WAR 0 ++#define MIPS_CACHE_SYNC_WAR 0 ++#define TX49XX_ICACHE_INDEX_INV_WAR 0 ++#define RM9000_CDEX_SMP_WAR 0 ++#define ICACHE_REFILLS_WORKAROUND_WAR 0 ++#define R10000_LLSC_WAR 0 ++#define MIPS34K_MISSED_ITLB_WAR 0 ++ ++#endif /* __ASM_MIPS_MACH_JZ4740_WAR_H */ +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/Kconfig linux-2.6.31/arch/mips/jz4740/Kconfig +--- linux-2.6.31-vanilla/arch/mips/jz4740/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/Kconfig 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,29 @@ ++choice ++ prompt "Machine type" ++ depends on MACH_JZ ++ default JZ4740_QI_LB60 ++ ++config JZ4740_QI_LB60 ++ bool "Qi Hardware Ben NanoNote" ++ select DMA_NONCOHERENT ++ select SOC_JZ4740 ++ ++endchoice ++ ++config SOC_JZ4740 ++ bool ++ select JZSOC ++ select GENERIC_GPIO ++ select ARCH_REQUIRE_GPIOLIB ++ select SYS_HAS_EARLY_PRINTK ++ select SYS_SUPPORTS_LITTLE_ENDIAN ++ select IRQ_CPU ++ ++config JZSOC ++ bool ++ select JZRISC ++ select SYS_HAS_CPU_MIPS32_R1 ++ select SYS_SUPPORTS_32BIT_KERNEL ++ ++config JZRISC ++ bool +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/Makefile linux-2.6.31/arch/mips/jz4740/Makefile +--- linux-2.6.31-vanilla/arch/mips/jz4740/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/Makefile 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,27 @@ ++# ++# Makefile for the Ingenic JZ4740. ++# ++ ++# Object file lists. ++ ++obj-y += prom.o irq.o time.o reset.o setup.o dma.o \ ++ gpio.o clock.o platform.o ++ ++obj-$(CONFIG_PROC_FS) += proc.o ++ ++# board specific support ++ ++obj-$(CONFIG_JZ4740_PAVO) += board-pavo.o ++obj-$(CONFIG_JZ4740_LEO) += board-leo.o ++obj-$(CONFIG_JZ4740_LYRA) += board-lyra.o ++obj-$(CONFIG_JZ4725_DIPPER) += board-dipper.o ++obj-$(CONFIG_JZ4720_VIRGO) += board-virgo.o ++obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o ++ ++# PM support ++ ++obj-$(CONFIG_PM) +=pm.o ++ ++# CPU Frequency scaling support ++ ++obj-$(CONFIG_CPU_FREQ_JZ) +=cpufreq.o +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/board-qi_lb60.c linux-2.6.31/arch/mips/jz4740/board-qi_lb60.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/board-qi_lb60.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/board-qi_lb60.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,389 @@ ++/* ++ * linux/arch/mips/jz4740/board-qi_lb60.c ++ * ++ * QI_LB60 setup routines. ++ * ++ * Copyright (c) 2009 Qi Hardware inc., ++ * Author: Xiangfu Liu <xiangfu@qi-hardware.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 3 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/gpio.h> ++ ++#include <asm/mach-jz4740/board-qi_lb60.h> ++#include <asm/mach-jz4740/platform.h> ++ ++#include <linux/input.h> ++#include <linux/gpio_keys.h> ++#include <linux/mtd/jz4740_nand.h> ++#include <linux/jz4740_fb.h> ++#include <linux/input/matrix_keypad.h> ++#include <linux/mtd/jz4740_nand.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/spi_gpio.h> ++#include <linux/power_supply.h> ++#include <linux/power/jz4740-battery.h> ++ ++ ++/* NAND */ ++static struct nand_ecclayout qi_lb60_ecclayout_1gb = { ++ .eccbytes = 36, ++ .eccpos = { ++ 6, 7, 8, 9, 10, 11, 12, 13, ++ 14, 15, 16, 17, 18, 19, 20, 21, ++ 22, 23, 24, 25, 26, 27, 28, 29, ++ 30, 31, 32, 33, 34, 35, 36, 37, ++ 38, 39, 40, 41}, ++ .oobfree = { ++ {.offset = 2, ++ .length = 4}, ++ {.offset = 42, ++ .length = 22}} ++}; ++ ++static struct mtd_partition qi_lb60_partitions_1gb[] = { ++ { .name = "NAND BOOT partition", ++ .offset = 0 * 0x100000, ++ .size = 4 * 0x100000, ++ }, ++ { .name = "NAND KERNEL partition", ++ .offset = 4 * 0x100000, ++ .size = 4 * 0x100000, ++ }, ++ { .name = "NAND ROOTFS partition", ++ .offset = 8 * 0x100000, ++ .size = 504 * 0x100000, ++ }, ++ { .name = "NAND DATA partition", ++ .offset = 512 * 0x100000, ++ .size = 512 * 0x100000, ++ }, ++}; ++ ++static struct nand_ecclayout qi_lb60_ecclayout_2gb = { ++ .eccbytes = 72, ++ .eccpos = { ++ 12, 13, 14, 15, 16, 17, 18, 19, ++ 20, 21, 22, 23, 24, 25, 26, 27, ++ 28, 29, 30, 31, 32, 33, 34, 35, ++ 36, 37, 38, 39, 40, 41, 42, 43, ++ 44, 45, 46, 47, 48, 49, 50, 51, ++ 52, 53, 54, 55, 56, 57, 58, 59, ++ 60, 61, 62, 63, 64, 65, 66, 67, ++ 68, 69, 70, 71, 72, 73, 74, 75, ++ 76, 77, 78, 79, 80, 81, 82, 83}, ++ .oobfree = { ++ {.offset = 2, ++ .length = 10}, ++ {.offset = 84, ++ .length = 44}} ++}; ++ ++static struct mtd_partition qi_lb60_partitions_2gb[] = { ++ { .name = "NAND BOOT partition", ++ .offset = 0 * 0x100000, ++ .size = 4 * 0x100000, ++ }, ++ { .name = "NAND KERNEL partition", ++ .offset = 4 * 0x100000, ++ .size = 4 * 0x100000, ++ }, ++ { .name = "NAND ROOTFS partition", ++ .offset = 8 * 0x100000, ++ .size = 504 * 0x100000, ++ }, ++ { .name = "NAND DATA partition", ++ .offset = 512 * 0x100000, ++ .size = (512 + 1024) * 0x100000, ++ }, ++}; ++ ++static void qi_lb60_nand_ident(struct platform_device *pdev, ++ struct nand_chip *chip, ++ struct mtd_partition **partitions, ++ int *num_partitions) ++{ ++ if (chip->page_shift == 12) { ++ chip->ecc.layout = &qi_lb60_ecclayout_2gb; ++ *partitions = qi_lb60_partitions_2gb; ++ *num_partitions = ARRAY_SIZE(qi_lb60_partitions_2gb); ++ } else { ++ chip->ecc.layout = &qi_lb60_ecclayout_1gb; ++ *partitions = qi_lb60_partitions_1gb; ++ *num_partitions = ARRAY_SIZE(qi_lb60_partitions_1gb); ++ } ++} ++ ++static struct jz_nand_platform_data qi_lb60_nand_pdata = { ++ .ident_callback = qi_lb60_nand_ident, ++ .busy_gpio = 94, ++}; ++ ++ ++/* Keyboard*/ ++ ++/* #define KEEP_UART_ALIVE ++ * don't define this. the keyboard and keyboard both work ++ */ ++ ++#define KEY_QI_QI KEY_F13 ++#define KEY_QI_UPRED KEY_RIGHTSHIFT ++#define KEY_QI_VOLUP KEY_F15 ++#define KEY_QI_VOLDOWN KEY_F16 ++#define KEY_QI_FN KEY_RIGHTCTRL ++ ++static const uint32_t qi_lb60_keymap[] = { ++ KEY(0, 0, KEY_F1), /* S2 */ ++ KEY(0, 1, KEY_F2), /* S3 */ ++ KEY(0, 2, KEY_F3), /* S4 */ ++ KEY(0, 3, KEY_F4), /* S5 */ ++ KEY(0, 4, KEY_F5), /* S6 */ ++ KEY(0, 5, KEY_F6), /* S7 */ ++ KEY(0, 6, KEY_F7), /* S8 */ ++ ++ KEY(1, 0, KEY_Q), /* S10 */ ++ KEY(1, 1, KEY_W), /* S11 */ ++ KEY(1, 2, KEY_E), /* S12 */ ++ KEY(1, 3, KEY_R), /* S13 */ ++ KEY(1, 4, KEY_T), /* S14 */ ++ KEY(1, 5, KEY_Y), /* S15 */ ++ KEY(1, 6, KEY_U), /* S16 */ ++ KEY(1, 7, KEY_I), /* S17 */ ++ KEY(2, 0, KEY_A), /* S18 */ ++ KEY(2, 1, KEY_S), /* S19 */ ++ KEY(2, 2, KEY_D), /* S20 */ ++ KEY(2, 3, KEY_F), /* S21 */ ++ KEY(2, 4, KEY_G), /* S22 */ ++ KEY(2, 5, KEY_H), /* S23 */ ++ KEY(2, 6, KEY_J), /* S24 */ ++ KEY(2, 7, KEY_K), /* S25 */ ++ KEY(3, 0, KEY_ESC), /* S26 */ ++ KEY(3, 1, KEY_Z), /* S27 */ ++ KEY(3, 2, KEY_X), /* S28 */ ++ KEY(3, 3, KEY_C), /* S29 */ ++ KEY(3, 4, KEY_V), /* S30 */ ++ KEY(3, 5, KEY_B), /* S31 */ ++ KEY(3, 6, KEY_N), /* S32 */ ++ KEY(3, 7, KEY_M), /* S33 */ ++ KEY(4, 0, KEY_TAB), /* S34 */ ++ KEY(4, 1, KEY_CAPSLOCK), /* S35 */ ++ KEY(4, 2, KEY_BACKSLASH), /* S36 */ ++ KEY(4, 3, KEY_APOSTROPHE), /* S37 */ ++ KEY(4, 4, KEY_COMMA), /* S38 */ ++ KEY(4, 5, KEY_DOT), /* S39 */ ++ KEY(4, 6, KEY_SLASH), /* S40 */ ++ KEY(4, 7, KEY_UP), /* S41 */ ++ KEY(5, 0, KEY_O), /* S42 */ ++ KEY(5, 1, KEY_L), /* S43 */ ++ KEY(5, 2, KEY_EQUAL), /* S44 */ ++ KEY(5, 3, KEY_QI_UPRED), /* S45 */ ++ KEY(5, 4, KEY_SPACE), /* S46 */ ++ KEY(5, 5, KEY_QI_QI), /* S47 */ ++ KEY(5, 6, KEY_LEFTCTRL), /* S48 */ ++ KEY(5, 7, KEY_LEFT), /* S49 */ ++ KEY(6, 0, KEY_F8), /* S50 */ ++ KEY(6, 1, KEY_P), /* S51 */ ++ KEY(6, 2, KEY_BACKSPACE),/* S52 */ ++ KEY(6, 3, KEY_ENTER), /* S53 */ ++ KEY(6, 4, KEY_QI_VOLUP), /* S54 */ ++ KEY(6, 5, KEY_QI_VOLDOWN), /* S55 */ ++ KEY(6, 6, KEY_DOWN), /* S56 */ ++ KEY(6, 7, KEY_RIGHT), /* S57 */ ++ ++#ifndef KEEP_UART_ALIVE ++ KEY(7, 0, KEY_LEFTSHIFT), /* S58 */ ++ KEY(7, 1, KEY_LEFTALT), /* S59 */ ++ KEY(7, 2, KEY_QI_FN), /* S60 */ ++#endif ++}; ++ ++static const struct matrix_keymap_data qi_lb60_keymap_data = { ++ .keymap = qi_lb60_keymap, ++ .keymap_size = ARRAY_SIZE(qi_lb60_keymap), ++}; ++ ++static const unsigned int qi_lb60_keypad_cols[] = { ++ 74, 75, 76, 77, 78, 79, 80, 81, ++}; ++ ++static const unsigned int qi_lb60_keypad_rows[] = { ++ 114, 115, 116, 117, 118, 119, 120, ++#ifndef KEEP_UART_ALIVE ++ 122, ++#endif ++}; ++ ++static struct matrix_keypad_platform_data qi_lb60_pdata = { ++ .keymap_data = &qi_lb60_keymap_data, ++ .col_gpios = qi_lb60_keypad_cols, ++ .row_gpios = qi_lb60_keypad_rows, ++ .num_col_gpios = ARRAY_SIZE(qi_lb60_keypad_cols), ++ .num_row_gpios = ARRAY_SIZE(qi_lb60_keypad_rows), ++ .col_scan_delay_us = 10, ++ .debounce_ms = 10, ++ .wakeup = 1, ++ .active_low = 1, ++}; ++ ++static struct platform_device qi_lb60_keypad = { ++ .name = "matrix-keypad", ++ .id = -1, ++ .dev = { ++ .platform_data = &qi_lb60_pdata, ++ }, ++}; ++ ++/* Display */ ++static struct fb_videomode qi_lb60_video_modes[] = { ++ { ++ .name = "320x240", ++ .xres = 320, ++ .yres = 240, ++ .pixclock = 700000, ++ .left_margin = 140, ++ .right_margin = 273, ++ .upper_margin = 20, ++ .lower_margin = 2, ++ .hsync_len = 1, ++ .vsync_len = 1, ++ .sync = 0, ++ .vmode = FB_VMODE_NONINTERLACED, ++ }, ++}; ++ ++static struct jz4740_fb_platform_data qi_lb60_fb_pdata = { ++ .width = 60, ++ .height = 45, ++ .num_modes = ARRAY_SIZE(qi_lb60_video_modes), ++ .modes = qi_lb60_video_modes, ++ .bpp = 24, ++ .lcd_type = JZ_LCD_TYPE_8BIT_SERIAL, ++}; ++ ++ ++struct spi_gpio_platform_data spigpio_platform_data = { ++ .sck = JZ_GPIO_PORTC(23), ++ .mosi = JZ_GPIO_PORTC(22), ++ .miso = JZ_GPIO_PORTC(22), ++ .num_chipselect = 1, ++}; ++ ++static struct platform_device spigpio_device = { ++ .name = "spi_gpio", ++ .id = 1, ++ .dev = { ++ .platform_data = &spigpio_platform_data, ++ }, ++}; ++ ++static struct spi_board_info qi_lb60_spi_board_info[] = { ++ { ++ .modalias = "gpm940b0", ++ .controller_data = (void*)JZ_GPIO_PORTC(21), ++ .chip_select = 0, ++ .bus_num = 1, ++ .max_speed_hz = 30 * 1000, ++ }, ++}; ++ ++/* Battery */ ++static struct jz_batt_info qi_lb60_battery_pdata = { ++ .dc_dect_gpio = GPIO_DC_DETE_N, ++ .usb_dect_gpio = GPIO_USB_DETE, ++ .charg_stat_gpio = GPIO_CHARG_STAT_N, ++ ++ .min_voltag = 3600000, ++ .max_voltag = 4200000, ++ .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO, ++}; ++ ++/* GPIO Key: power */ ++static struct gpio_keys_button qi_lb60_gpio_keys_buttons[] = { ++ [0] = { ++ .code = KEY_POWER, ++ .gpio = GPIO_WAKEUP_N, ++ .active_low = 1, ++ .desc = "Power", ++ .wakeup = 1, ++ }, ++}; ++ ++static struct gpio_keys_platform_data qi_lb60_gpio_keys_data = { ++ .nbuttons = ARRAY_SIZE(qi_lb60_gpio_keys_buttons), ++ .buttons = qi_lb60_gpio_keys_buttons, ++}; ++ ++static struct platform_device qi_lb60_gpio_keys = { ++ .name = "gpio-keys", ++ .id = -1, ++ .dev = { ++ .platform_data = &qi_lb60_gpio_keys_data, ++ } ++}; ++/* ++static struct jz_mmc_platform_data jz_mmc_pdata = { ++ .card_detect_gpio = JZ_GPIO_PORTD(0), ++ .read_only_gpio = JZ_GPIO_PORTD(16), ++ .power_gpio = JZ_GPIO_PORTD(2), ++};*/ ++ ++static struct platform_device *jz_platform_devices[] __initdata = { ++ &jz4740_usb_ohci_device, ++ &jz4740_usb_gdt_device, ++ &jz4740_mmc_device, ++ &jz4740_nand_device, ++ &qi_lb60_keypad, ++ &spigpio_device, ++ &jz4740_framebuffer_device, ++ &jz4740_i2s_device, ++ &jz4740_codec_device, ++ &jz4740_rtc_device, ++ &jz4740_adc_device, ++ &jz4740_battery_device, ++ &qi_lb60_gpio_keys, ++}; ++ ++static void __init board_gpio_setup(void) ++{ ++ /* We only need to enable/disable pullup here for pins used in generic ++ * drivers. Everything else is done by the drivers themselfs. */ ++ jz_gpio_disable_pullup(GPIO_SD_VCC_EN_N); ++ jz_gpio_disable_pullup(GPIO_SD_CD_N); ++ jz_gpio_disable_pullup(GPIO_SD_WP); ++} ++ ++static int __init qi_lb60_init_platform_devices(void) ++{ ++ jz4740_framebuffer_device.dev.platform_data = &qi_lb60_fb_pdata; ++ jz4740_nand_device.dev.platform_data = &qi_lb60_nand_pdata; ++ jz4740_battery_device.dev.platform_data = &qi_lb60_battery_pdata; ++ ++ spi_register_board_info(qi_lb60_spi_board_info, ++ ARRAY_SIZE(qi_lb60_spi_board_info)); ++ ++ return platform_add_devices(jz_platform_devices, ++ ARRAY_SIZE(jz_platform_devices)); ++ ++} ++extern int jz_gpiolib_init(void); ++ ++static int __init qi_lb60_board_setup(void) ++{ ++ printk("Qi Hardware JZ4740 QI_LB60 setup\n"); ++ if (jz_gpiolib_init()) ++ panic("Failed to initalize jz gpio\n"); ++ ++ board_gpio_setup(); ++ ++ if (qi_lb60_init_platform_devices()) ++ panic("Failed to initalize platform devices\n"); ++ ++ return 0; ++} ++ ++arch_initcall(qi_lb60_board_setup); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/clock.c linux-2.6.31/arch/mips/jz4740/clock.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/clock.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/clock.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,777 @@ ++ ++#include <linux/kernel.h> ++#include <linux/errno.h> ++#include <linux/clk.h> ++#include <linux/spinlock.h> ++#include <linux/io.h> ++#include <linux/module.h> ++#include <linux/list.h> ++#include <linux/err.h> ++ ++#define JZ_REG_CLOCK_CTRL 0x00 ++#define JZ_REG_CLOCK_PLL 0x10 ++#define JZ_REG_CLOCK_GATE 0x20 ++#define JZ_REG_CLOCK_I2S 0x60 ++#define JZ_REG_CLOCK_LCD 0x64 ++#define JZ_REG_CLOCK_MMC 0x68 ++#define JZ_REG_CLOCK_UHC 0x6C ++#define JZ_REG_CLOCK_SPI 0x74 ++ ++#define JZ_CLOCK_CTRL_I2S_SRC_PLL BIT(31) ++#define JZ_CLOCK_CTRL_KO_ENABLE BIT(30) ++#define JZ_CLOCK_CTRL_UDC_SRC_PLL BIT(29) ++#define JZ_CLOCK_CTRL_UDIV_MASK 0x1f800000 ++#define JZ_CLOCK_CTRL_CHANGE_ENABLE BIT(22) ++#define JZ_CLOCK_CTRL_PLL_HALF BIT(21) ++#define JZ_CLOCK_CTRL_LDIV_MASK 0x001f0000 ++#define JZ_CLOCK_CTRL_UDIV_OFFSET 23 ++#define JZ_CLOCK_CTRL_LDIV_OFFSET 16 ++#define JZ_CLOCK_CTRL_MDIV_OFFSET 12 ++#define JZ_CLOCK_CTRL_PDIV_OFFSET 8 ++#define JZ_CLOCK_CTRL_HDIV_OFFSET 4 ++#define JZ_CLOCK_CTRL_CDIV_OFFSET 0 ++ ++#define JZ_CLOCK_GATE_UART0 BIT(0) ++#define JZ_CLOCK_GATE_TCU BIT(1) ++#define JZ_CLOCK_GATE_RTC BIT(2) ++#define JZ_CLOCK_GATE_I2C BIT(3) ++#define JZ_CLOCK_GATE_SPI BIT(4) ++#define JZ_CLOCK_GATE_AIC_PCLK BIT(5) ++#define JZ_CLOCK_GATE_AIC BIT(6) ++#define JZ_CLOCK_GATE_MMC BIT(7) ++#define JZ_CLOCK_GATE_ADC BIT(8) ++#define JZ_CLOCK_GATE_CIM BIT(9) ++#define JZ_CLOCK_GATE_LCD BIT(10) ++#define JZ_CLOCK_GATE_UDC BIT(11) ++#define JZ_CLOCK_GATE_DMAC BIT(12) ++#define JZ_CLOCK_GATE_IPU BIT(13) ++#define JZ_CLOCK_GATE_UHC BIT(14) ++#define JZ_CLOCK_GATE_UART1 BIT(15) ++ ++#define JZ_CLOCK_I2S_DIV_MASK 0x01ff ++ ++#define JZ_CLOCK_LCD_DIV_MASK 0x01ff ++ ++#define JZ_CLOCK_MMC_DIV_MASK 0x001f ++ ++#define JZ_CLOCK_UHC_DIV_MASK 0x000f ++ ++#define JZ_CLOCK_SPI_SRC_PLL BIT(31) ++#define JZ_CLOCK_SPI_DIV_MASK 0x000f ++ ++#define JZ_CLOCK_PLL_M_MASK 0x01ff ++#define JZ_CLOCK_PLL_N_MASK 0x001f ++#define JZ_CLOCK_PLL_OD_MASK 0x0003 ++#define JZ_CLOCK_PLL_STABLE BIT(10) ++#define JZ_CLOCK_PLL_BYPASS BIT(9) ++#define JZ_CLOCK_PLL_ENABLED BIT(8) ++#define JZ_CLOCK_PLL_STABLIZE_MASK 0x000f ++#define JZ_CLOCK_PLL_M_OFFSET 23 ++#define JZ_CLOCK_PLL_N_OFFSET 18 ++#define JZ_CLOCK_PLL_OD_OFFSET 16 ++ ++static void __iomem *jz_clock_base; ++spinlock_t jz_clock_lock; ++static LIST_HEAD(jz_clocks); ++ ++struct clk { ++ const char *name; ++ struct clk* parent; ++ ++ uint32_t gate_bit; ++ ++ unsigned long (*get_rate)(struct clk* clk); ++ unsigned long (*round_rate)(struct clk *clk, unsigned long rate); ++ int (*set_rate)(struct clk* clk, unsigned long rate); ++ int (*enable)(struct clk* clk); ++ int (*disable)(struct clk* clk); ++ ++ int (*set_parent)(struct clk* clk, struct clk *parent); ++ struct list_head list; ++}; ++ ++struct main_clk { ++ struct clk clk; ++ uint32_t div_offset; ++}; ++ ++struct divided_clk { ++ struct clk clk; ++ uint32_t reg; ++ uint32_t mask; ++}; ++ ++struct static_clk { ++ struct clk clk; ++ unsigned long rate; ++}; ++ ++static uint32_t jz_clk_reg_read(int reg) ++{ ++ return readl(jz_clock_base + reg); ++} ++ ++static void jz_clk_reg_write_mask(int reg, uint32_t val, uint32_t mask) ++{ ++ uint32_t val2; ++ ++ spin_lock(&jz_clock_lock); ++ val2 = readl(jz_clock_base + reg); ++ val2 &= ~mask; ++ val2 |= val; ++ writel(val2, jz_clock_base + reg); ++ spin_unlock(&jz_clock_lock); ++} ++ ++static void jz_clk_reg_set_bits(int reg, uint32_t mask) ++{ ++ uint32_t val; ++ ++ spin_lock(&jz_clock_lock); ++ val = readl(jz_clock_base + reg); ++ val |= mask; ++ writel(val, jz_clock_base + reg); ++ spin_unlock(&jz_clock_lock); ++} ++ ++static void jz_clk_reg_clear_bits(int reg, uint32_t mask) ++{ ++ uint32_t val; ++ ++ spin_lock(&jz_clock_lock); ++ val = readl(jz_clock_base + reg); ++ val &= ~mask; ++ writel(val, jz_clock_base + reg); ++ spin_unlock(&jz_clock_lock); ++} ++ ++static int jz_clk_enable_gating(struct clk *clk) ++{ ++ jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, clk->gate_bit); ++ return 0; ++} ++ ++static int jz_clk_disable_gating(struct clk *clk) ++{ ++ jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, clk->gate_bit); ++ return 0; ++} ++ ++static unsigned long jz_clk_static_get_rate(struct clk *clk) ++{ ++ return ((struct static_clk*)clk)->rate; ++} ++ ++static int jz_clk_ko_enable(struct clk* clk) ++{ ++ jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE); ++ return 0; ++} ++ ++static int jz_clk_ko_disable(struct clk* clk) ++{ ++ jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE); ++ return 0; ++} ++ ++ ++static const int pllno[] = {1, 2, 2, 4}; ++ ++static unsigned long jz_clk_pll_get_rate(struct clk *clk) ++{ ++ uint32_t val; ++ int m; ++ int n; ++ int od; ++ ++ val = jz_clk_reg_read(JZ_REG_CLOCK_PLL); ++ ++ if (val & JZ_CLOCK_PLL_BYPASS) ++ return clk_get_rate(clk->parent); ++ ++ m = ((val >> 23) & 0x1ff) + 2; ++ n = ((val >> 18) & 0x1f) + 2; ++ od = (val >> 16) & 0x3; ++ ++ return clk_get_rate(clk->parent) * (m / n) / pllno[od]; ++} ++ ++static unsigned long jz_clk_pll_half_get_rate(struct clk *clk) ++{ ++ uint32_t reg; ++ ++ reg = jz_clk_reg_read(JZ_REG_CLOCK_CTRL); ++ if (reg & JZ_CLOCK_CTRL_PLL_HALF) ++ return jz_clk_pll_get_rate(NULL) >> 1; ++ return jz_clk_pll_get_rate(NULL); ++} ++ ++ ++ ++static const int jz_clk_main_divs[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ ++static unsigned long jz_clk_main_round_rate(struct clk *clk, unsigned long rate) ++{ ++ unsigned long parent_rate = jz_clk_pll_get_rate(NULL); ++ int div; ++ ++ div = parent_rate / rate; ++ if (div > 32) ++ return parent_rate / 32; ++ else if (div < 1) ++ return parent_rate; ++ ++ div &= (0x3 << (ffs(div) - 1)); ++ ++ return parent_rate / div; ++} ++ ++static unsigned long jz_clk_main_get_rate(struct clk *clk) { ++ struct main_clk *mclk = (struct main_clk*)clk; ++ uint32_t div; ++ ++ div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL); ++ ++ div >>= mclk->div_offset; ++ div &= 0xf; ++ ++ if (div >= ARRAY_SIZE(jz_clk_main_divs)) ++ div = ARRAY_SIZE(jz_clk_main_divs) - 1; ++ ++ return jz_clk_pll_get_rate(NULL) / jz_clk_main_divs[div]; ++} ++ ++static int jz_clk_main_set_rate(struct clk *clk, unsigned long rate) ++{ ++ struct main_clk *mclk = (struct main_clk*)clk; ++ int i; ++ int div; ++ unsigned long parent_rate = jz_clk_pll_get_rate(NULL); ++ ++ rate = jz_clk_main_round_rate(clk, rate); ++ ++ div = parent_rate / rate; ++ ++ i = (ffs(div) - 1) << 1; ++ if (i > 0 && !(div & BIT(i-1))) ++ i -= 1; ++ ++ jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, i << mclk->div_offset, ++ 0xf << mclk->div_offset); ++ ++ return 0; ++} ++ ++ ++static struct static_clk jz_clk_ext = { ++ .clk = { ++ .name = "ext", ++ .get_rate = jz_clk_static_get_rate, ++ }, ++}; ++ ++static struct clk jz_clk_pll = { ++ .name = "pll", ++ .parent = &jz_clk_ext.clk, ++ .get_rate = jz_clk_pll_get_rate, ++}; ++ ++static struct clk jz_clk_pll_half = { ++ .name = "pll half", ++ .parent = &jz_clk_pll, ++ .get_rate = jz_clk_pll_half_get_rate, ++}; ++ ++static struct main_clk jz_clk_cpu = { ++ .clk = { ++ .name = "cclk", ++ .parent = &jz_clk_pll, ++ .get_rate = jz_clk_main_get_rate, ++ .set_rate = jz_clk_main_set_rate, ++ .round_rate = jz_clk_main_round_rate, ++ }, ++ .div_offset = JZ_CLOCK_CTRL_CDIV_OFFSET, ++}; ++ ++static struct main_clk jz_clk_memory = { ++ .clk = { ++ .name = "mclk", ++ .parent = &jz_clk_pll, ++ .get_rate = jz_clk_main_get_rate, ++ .set_rate = jz_clk_main_set_rate, ++ .round_rate = jz_clk_main_round_rate, ++ }, ++ .div_offset = JZ_CLOCK_CTRL_MDIV_OFFSET, ++}; ++ ++static struct main_clk jz_clk_high_speed_peripheral = { ++ .clk = { ++ .name = "hclk", ++ .parent = &jz_clk_pll, ++ .get_rate = jz_clk_main_get_rate, ++ .set_rate = jz_clk_main_set_rate, ++ .round_rate = jz_clk_main_round_rate, ++ }, ++ .div_offset = JZ_CLOCK_CTRL_HDIV_OFFSET, ++}; ++ ++ ++static struct main_clk jz_clk_low_speed_peripheral = { ++ .clk = { ++ .name = "pclk", ++ .parent = &jz_clk_pll, ++ .get_rate = jz_clk_main_get_rate, ++ .set_rate = jz_clk_main_set_rate, ++ }, ++ .div_offset = JZ_CLOCK_CTRL_PDIV_OFFSET, ++}; ++ ++static struct clk jz_clk_ko = { ++ .name = "cko", ++ .parent = &jz_clk_memory.clk, ++ .enable = jz_clk_ko_enable, ++ .disable = jz_clk_ko_disable, ++}; ++ ++static int jz_clk_spi_set_parent(struct clk *clk, struct clk *parent) ++{ ++ if (parent == &jz_clk_pll) ++ jz_clk_reg_set_bits(JZ_CLOCK_SPI_SRC_PLL, JZ_REG_CLOCK_SPI); ++ else if(parent == &jz_clk_ext.clk) ++ jz_clk_reg_clear_bits(JZ_CLOCK_SPI_SRC_PLL, JZ_REG_CLOCK_SPI); ++ else ++ return -EINVAL; ++ ++ clk->parent = parent; ++ ++ return 0; ++} ++ ++static int jz_clk_i2s_set_parent(struct clk *clk, struct clk *parent) ++{ ++ if (parent == &jz_clk_pll_half) ++ jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_I2S_SRC_PLL); ++ else if(parent == &jz_clk_ext.clk) ++ jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_I2S_SRC_PLL); ++ else ++ return -EINVAL; ++ ++ clk->parent = parent; ++ ++ return 0; ++} ++ ++static int jz_clk_udc_set_parent(struct clk *clk, struct clk *parent) ++{ ++ if (parent == &jz_clk_pll_half) ++ jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_UDC_SRC_PLL); ++ else if(parent == &jz_clk_ext.clk) ++ jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_UDC_SRC_PLL); ++ else ++ return -EINVAL; ++ ++ clk->parent = parent; ++ ++ return 0; ++} ++ ++static int jz_clk_udc_set_rate(struct clk *clk, unsigned long rate) ++{ ++ int div; ++ ++ if (clk->parent == &jz_clk_ext.clk) ++ return -EINVAL; ++ ++ div = clk_get_rate(clk->parent) / rate - 1; ++ ++ if (div < 0) ++ div = 0; ++ else if (div > 63) ++ div = 63; ++ ++ jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, div << JZ_CLOCK_CTRL_UDIV_OFFSET, ++ JZ_CLOCK_CTRL_UDIV_MASK); ++ return 0; ++} ++ ++static unsigned long jz_clk_udc_get_rate(struct clk *clk) ++{ ++ int div; ++ ++ if (clk->parent == &jz_clk_ext.clk) ++ return clk_get_rate(clk->parent); ++ ++ div = (jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_UDIV_MASK); ++ div >>= JZ_CLOCK_CTRL_UDIV_OFFSET; ++ div += 1; ++ ++ return clk_get_rate(clk->parent) / div; ++} ++ ++static unsigned long jz_clk_divided_get_rate(struct clk *clk) ++{ ++ struct divided_clk *dclk = (struct divided_clk*)clk; ++ int div; ++ ++ if (clk->parent == &jz_clk_ext.clk) ++ return clk_get_rate(clk->parent); ++ ++ div = (jz_clk_reg_read(dclk->reg) & dclk->mask) + 1; ++ ++ return clk_get_rate(clk->parent) / div; ++} ++ ++static int jz_clk_divided_set_rate(struct clk *clk, unsigned long rate) ++{ ++ struct divided_clk *dclk = (struct divided_clk*)clk; ++ int div; ++ ++ if (clk->parent == &jz_clk_ext.clk) ++ return -EINVAL; ++ ++ div = clk_get_rate(clk->parent) / rate - 1; ++ ++ if (div < 0) ++ div = 0; ++ else if(div > dclk->mask) ++ div = dclk->mask; ++ ++ jz_clk_reg_write_mask(dclk->reg, div, dclk->mask); ++ ++ return 0; ++} ++ ++static unsigned long jz_clk_ldclk_round_rate(struct clk *clk, unsigned long rate) ++{ ++ int div; ++ unsigned long parent_rate = jz_clk_pll_half_get_rate(NULL); ++ ++ if (rate > 150000000) ++ return 150000000; ++ ++ div = parent_rate / rate; ++ if (div < 1) ++ div = 1; ++ else if(div > 32) ++ div = 32; ++ ++ return parent_rate / div; ++} ++ ++static int jz_clk_ldclk_set_rate(struct clk *clk, unsigned long rate) ++{ ++ int div; ++ ++ if (rate > 150000000) ++ return -EINVAL; ++ ++ div = jz_clk_pll_half_get_rate(NULL) / rate - 1; ++ if (div < 0) ++ div = 0; ++ else if(div > 31) ++ div = 31; ++ ++ jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, div << JZ_CLOCK_CTRL_LDIV_OFFSET, ++ JZ_CLOCK_CTRL_LDIV_MASK); ++} ++ ++static unsigned long jz_clk_ldclk_get_rate(struct clk *clk) ++{ ++ int div; ++ ++ div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_LDIV_MASK; ++ div >>= JZ_CLOCK_CTRL_LDIV_OFFSET; ++ ++ return jz_clk_pll_half_get_rate(NULL) / (div + 1); ++} ++ ++static struct clk jz_clk_ld = { ++ .name = "lcd", ++ .parent = &jz_clk_pll_half, ++ .set_rate = jz_clk_ldclk_set_rate, ++ .get_rate = jz_clk_ldclk_get_rate, ++ .round_rate = jz_clk_ldclk_round_rate, ++}; ++ ++static struct divided_clk jz_clk_lp = { ++ .clk = { ++ .name = "lcd_pclk", ++ .parent = &jz_clk_pll_half, ++ }, ++ .reg = JZ_REG_CLOCK_LCD, ++ .mask = JZ_CLOCK_LCD_DIV_MASK, ++}; ++ ++static struct clk jz_clk_cim_mclk = { ++ .name = "cim_mclk", ++ .parent = &jz_clk_high_speed_peripheral.clk, ++}; ++ ++static struct static_clk jz_clk_cim_pclk = { ++ .clk = { ++ .name = "cim_pclk", ++ .gate_bit = JZ_CLOCK_GATE_CIM, ++ .get_rate = jz_clk_static_get_rate, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++ }, ++}; ++ ++static struct divided_clk jz_clk_i2s = { ++ .clk = { ++ .name = "i2s", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_AIC, ++ .set_parent = jz_clk_i2s_set_parent, ++ .set_rate = jz_clk_divided_set_rate, ++ .get_rate = jz_clk_divided_get_rate, ++ }, ++ .reg = JZ_REG_CLOCK_I2S, ++ .mask = JZ_CLOCK_I2S_DIV_MASK, ++}; ++ ++static struct divided_clk jz_clk_mmc = { ++ .clk = { ++ .name = "mmc", ++ .parent = &jz_clk_pll_half, ++ .gate_bit = JZ_CLOCK_GATE_MMC, ++ .set_rate = jz_clk_divided_set_rate, ++ .get_rate = jz_clk_divided_get_rate, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++ }, ++ .reg = JZ_REG_CLOCK_MMC, ++ .mask = JZ_CLOCK_MMC_DIV_MASK, ++}; ++ ++static struct divided_clk jz_clk_uhc = { ++ .clk = { ++ .name = "uhc", ++ .parent = &jz_clk_pll_half, ++ .gate_bit = JZ_CLOCK_GATE_UHC, ++ .set_rate = jz_clk_divided_set_rate, ++ .get_rate = jz_clk_divided_get_rate, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++ }, ++ .reg = JZ_REG_CLOCK_UHC, ++ .mask = JZ_CLOCK_UHC_DIV_MASK, ++}; ++ ++static struct clk jz_clk_udc = { ++ .name = "udc", ++ .parent = &jz_clk_ext.clk, ++ .set_parent = jz_clk_udc_set_parent, ++ .set_rate = jz_clk_udc_set_rate, ++ .get_rate = jz_clk_udc_get_rate, ++}; ++ ++static struct divided_clk jz_clk_spi = { ++ .clk = { ++ .name = "spi", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_SPI, ++ .set_rate = jz_clk_divided_set_rate, ++ .get_rate = jz_clk_divided_get_rate, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++ .set_parent = jz_clk_spi_set_parent, ++ }, ++ .reg = JZ_REG_CLOCK_SPI, ++ .mask = JZ_CLOCK_SPI_DIV_MASK, ++}; ++ ++static struct clk jz_clk_uart0 = { ++ .name = "uart0", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_UART0, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct clk jz_clk_uart1 = { ++ .name = "uart1", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_UART1, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct clk jz_clk_dma = { ++ .name = "dma", ++ .parent = &jz_clk_high_speed_peripheral.clk, ++ .gate_bit = JZ_CLOCK_GATE_UART0, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct clk jz_clk_ipu = { ++ .name = "ipu", ++ .parent = &jz_clk_high_speed_peripheral.clk, ++ .gate_bit = JZ_CLOCK_GATE_IPU, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct clk jz_clk_adc = { ++ .name = "adc", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_ADC, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct clk jz_clk_i2c = { ++ .name = "i2c", ++ .parent = &jz_clk_ext.clk, ++ .gate_bit = JZ_CLOCK_GATE_I2C, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++}; ++ ++static struct static_clk jz_clk_rtc = { ++ .clk = { ++ .name = "rtc", ++ .gate_bit = JZ_CLOCK_GATE_RTC, ++ .enable = jz_clk_enable_gating, ++ .disable = jz_clk_disable_gating, ++ }, ++ .rate = 32768, ++}; ++ ++int clk_enable(struct clk *clk) ++{ ++ if (!clk->enable) ++ return -EINVAL; ++ ++ return clk->enable(clk); ++} ++EXPORT_SYMBOL_GPL(clk_enable); ++ ++void clk_disable(struct clk *clk) ++{ ++ if (clk->disable) ++ clk->disable(clk); ++} ++EXPORT_SYMBOL_GPL(clk_disable); ++ ++unsigned long clk_get_rate(struct clk *clk) ++{ ++ if (clk->get_rate) ++ return clk->get_rate(clk); ++ if (clk->parent) ++ return clk_get_rate(clk->parent); ++ ++ return -EINVAL; ++} ++EXPORT_SYMBOL_GPL(clk_get_rate); ++ ++int clk_set_rate(struct clk *clk, unsigned long rate) ++{ ++ if (!clk->set_rate) ++ return -EINVAL; ++ return clk->set_rate(clk, rate); ++} ++EXPORT_SYMBOL_GPL(clk_set_rate); ++ ++long clk_round_rate(struct clk *clk, unsigned long rate) ++{ ++ if (clk->round_rate) ++ return clk->round_rate(clk, rate); ++ ++ return -EINVAL; ++} ++EXPORT_SYMBOL_GPL(clk_round_rate); ++ ++int clk_set_parent(struct clk *clk, struct clk *parent) ++{ ++ int ret; ++ ++ if (!clk->set_parent) ++ return -EINVAL; ++ ++ clk->disable(clk); ++ ret = clk->set_parent(clk, parent); ++ clk->enable(clk); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(clk_set_parent); ++ ++ ++struct clk *clk_get(struct device *dev, const char *name) ++{ ++ struct clk *clk; ++ ++ list_for_each_entry(clk, &jz_clocks, list) { ++ if (strcmp(clk->name, name)) ++ return clk; ++ } ++ return ERR_PTR(-ENOENT); ++} ++EXPORT_SYMBOL_GPL(clk_get); ++ ++void clk_put(struct clk *clk) ++{ ++} ++EXPORT_SYMBOL_GPL(clk_put); ++ ++inline static void clk_add(struct clk *clk) ++{ ++ list_add_tail(&clk->list, &jz_clocks); ++} ++ ++static void clk_register_clks(void) ++{ ++ clk_add(&jz_clk_ext.clk); ++ clk_add(&jz_clk_pll); ++ clk_add(&jz_clk_pll_half); ++ clk_add(&jz_clk_cpu.clk); ++ clk_add(&jz_clk_high_speed_peripheral.clk); ++ clk_add(&jz_clk_low_speed_peripheral.clk); ++ clk_add(&jz_clk_ko); ++ clk_add(&jz_clk_ld); ++ clk_add(&jz_clk_lp.clk); ++ clk_add(&jz_clk_cim_mclk); ++ clk_add(&jz_clk_cim_pclk.clk); ++ clk_add(&jz_clk_i2s.clk); ++ clk_add(&jz_clk_mmc.clk); ++ clk_add(&jz_clk_uhc.clk); ++ clk_add(&jz_clk_udc); ++ clk_add(&jz_clk_uart0); ++ clk_add(&jz_clk_uart1); ++ clk_add(&jz_clk_dma); ++ clk_add(&jz_clk_ipu); ++ clk_add(&jz_clk_adc); ++ clk_add(&jz_clk_i2c); ++ clk_add(&jz_clk_rtc.clk); ++} ++ ++int jz_init_clocks(unsigned long ext_rate) ++{ ++ uint32_t val; ++ ++ jz_clock_base = ioremap(0x10000000, 0x100); ++ if (!jz_clock_base) ++ return -EBUSY; ++ ++ jz_clk_ext.rate = ext_rate; ++ ++ val = jz_clk_reg_read(JZ_REG_CLOCK_SPI); ++ ++ if (val & JZ_CLOCK_SPI_SRC_PLL) ++ jz_clk_spi.clk.parent = &jz_clk_pll_half; ++ ++ val = jz_clk_reg_read(JZ_REG_CLOCK_CTRL); ++ ++ if (val & JZ_CLOCK_CTRL_I2S_SRC_PLL) ++ jz_clk_i2s.clk.parent = &jz_clk_pll_half; ++ ++ if (val & JZ_CLOCK_CTRL_UDC_SRC_PLL) ++ jz_clk_udc.parent = &jz_clk_pll_half; ++ ++ clk_register_clks(); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(jz_init_clocks); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/cpufreq.c linux-2.6.31/arch/mips/jz4740/cpufreq.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/cpufreq.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/cpufreq.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,602 @@ ++/* ++ * linux/arch/mips/jz4740/cpufreq.c ++ * ++ * cpufreq driver for JZ4740 ++ * ++ * Copyright (c) 2006-2007 Ingenic Semiconductor Inc. ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/init.h> ++ ++#include <linux/cpufreq.h> ++ ++#include <asm/jzsoc.h> ++#include <asm/processor.h> ++ ++#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ ++ "cpufreq-jz4740", msg) ++ ++#undef CHANGE_PLL ++ ++#define PLL_UNCHANGED 0 ++#define PLL_GOES_UP 1 ++#define PLL_GOES_DOWN 2 ++ ++#define PLL_WAIT_500NS (500*(__cpm_get_cclk()/1000000000)) ++ ++/* Saved the boot-time parameters */ ++static struct { ++ /* SDRAM parameters */ ++ unsigned int mclk; /* memory clock, KHz */ ++ unsigned int tras; /* RAS pulse width, cycles of mclk */ ++ unsigned int rcd; /* RAS to CAS Delay, cycles of mclk */ ++ unsigned int tpc; /* RAS Precharge time, cycles of mclk */ ++ unsigned int trwl; /* Write Precharge Time, cycles of mclk */ ++ unsigned int trc; /* RAS Cycle Time, cycles of mclk */ ++ unsigned int rtcor; /* Refresh Time Constant */ ++ unsigned int sdram_initialized; ++ ++ /* LCD parameters */ ++ unsigned int lcd_clk; /* LCD clock, Hz */ ++ unsigned int lcdpix_clk; /* LCD Pixel clock, Hz */ ++ unsigned int lcd_clks_initialized; ++} boot_config; ++ ++struct jz4740_freq_percpu_info { ++ struct cpufreq_frequency_table table[7]; ++}; ++ ++static struct jz4740_freq_percpu_info jz4740_freq_table; ++ ++/* ++ * This contains the registers value for an operating point. ++ * If only part of a register needs to change then there is ++ * a mask value for that register. ++ * When going to a new operating point the current register ++ * value is ANDed with the ~mask and ORed with the new value. ++ */ ++struct dpm_regs { ++ u32 cpccr; /* Clock Freq Control Register */ ++ u32 cpccr_mask; /* Clock Freq Control Register mask */ ++ u32 cppcr; /* PLL1 Control Register */ ++ u32 cppcr_mask; /* PLL1 Control Register mask */ ++ u32 pll_up_flag; /* New PLL freq is higher than current or not */ ++}; ++ ++extern jz_clocks_t jz_clocks; ++ ++static void jz_update_clocks(void) ++{ ++ /* Next clocks must be updated if we have changed ++ * the PLL or divisors. ++ */ ++ jz_clocks.cclk = __cpm_get_cclk(); ++ jz_clocks.hclk = __cpm_get_hclk(); ++ jz_clocks.mclk = __cpm_get_mclk(); ++ jz_clocks.pclk = __cpm_get_pclk(); ++ jz_clocks.lcdclk = __cpm_get_lcdclk(); ++ jz_clocks.pixclk = __cpm_get_pixclk(); ++ jz_clocks.i2sclk = __cpm_get_i2sclk(); ++ jz_clocks.usbclk = __cpm_get_usbclk(); ++ jz_clocks.mscclk = __cpm_get_mscclk(); ++} ++ ++static void ++jz_init_boot_config(void) ++{ ++ if (!boot_config.lcd_clks_initialized) { ++ /* the first time to scale pll */ ++ boot_config.lcd_clk = __cpm_get_lcdclk(); ++ boot_config.lcdpix_clk = __cpm_get_pixclk(); ++ boot_config.lcd_clks_initialized = 1; ++ } ++ ++ if (!boot_config.sdram_initialized) { ++ /* the first time to scale frequencies */ ++ unsigned int dmcr, rtcor; ++ unsigned int tras, rcd, tpc, trwl, trc; ++ ++ dmcr = REG_EMC_DMCR; ++ rtcor = REG_EMC_RTCOR; ++ ++ tras = (dmcr >> 13) & 0x7; ++ rcd = (dmcr >> 11) & 0x3; ++ tpc = (dmcr >> 8) & 0x7; ++ trwl = (dmcr >> 5) & 0x3; ++ trc = (dmcr >> 2) & 0x7; ++ ++ boot_config.mclk = __cpm_get_mclk() / 1000; ++ boot_config.tras = tras + 4; ++ boot_config.rcd = rcd + 1; ++ boot_config.tpc = tpc + 1; ++ boot_config.trwl = trwl + 1; ++ boot_config.trc = trc * 2 + 1; ++ boot_config.rtcor = rtcor; ++ ++ boot_config.sdram_initialized = 1; ++ } ++} ++ ++static void jz_update_dram_rtcor(unsigned int new_mclk) ++{ ++ unsigned int rtcor; ++ ++ new_mclk /= 1000; ++ rtcor = boot_config.rtcor * new_mclk / boot_config.mclk; ++ rtcor--; ++ ++ if (rtcor < 1) rtcor = 1; ++ if (rtcor > 255) rtcor = 255; ++ ++ REG_EMC_RTCOR = rtcor; ++ REG_EMC_RTCNT = rtcor; ++} ++ ++static void jz_update_dram_dmcr(unsigned int new_mclk) ++{ ++ unsigned int dmcr; ++ unsigned int tras, rcd, tpc, trwl, trc; ++ unsigned int valid_time, new_time; /* ns */ ++ ++ new_mclk /= 1000; ++ tras = boot_config.tras * new_mclk / boot_config.mclk; ++ rcd = boot_config.rcd * new_mclk / boot_config.mclk; ++ tpc = boot_config.tpc * new_mclk / boot_config.mclk; ++ trwl = boot_config.trwl * new_mclk / boot_config.mclk; ++ trc = boot_config.trc * new_mclk / boot_config.mclk; ++ ++ /* Validation checking */ ++ valid_time = (boot_config.tras * 1000000) / boot_config.mclk; ++ new_time = (tras * 1000000) / new_mclk; ++ if (new_time < valid_time) tras += 1; ++ ++ valid_time = (boot_config.rcd * 1000000) / boot_config.mclk; ++ new_time = (rcd * 1000000) / new_mclk; ++ if (new_time < valid_time) rcd += 1; ++ ++ valid_time = (boot_config.tpc * 1000000) / boot_config.mclk; ++ new_time = (tpc * 1000000) / new_mclk; ++ if (new_time < valid_time) tpc += 1; ++ ++ valid_time = (boot_config.trwl * 1000000) / boot_config.mclk; ++ new_time = (trwl * 1000000) / new_mclk; ++ if (new_time < valid_time) trwl += 1; ++ ++ valid_time = (boot_config.trc * 1000000) / boot_config.mclk; ++ new_time = (trc * 1000000) / new_mclk; ++ if (new_time < valid_time) trc += 2; ++ ++ tras = (tras < 4) ? 4: tras; ++ tras = (tras > 11) ? 11: tras; ++ tras -= 4; ++ ++ rcd = (rcd < 1) ? 1: rcd; ++ rcd = (rcd > 4) ? 4: rcd; ++ rcd -= 1; ++ ++ tpc = (tpc < 1) ? 1: tpc; ++ tpc = (tpc > 8) ? 8: tpc; ++ tpc -= 1; ++ ++ trwl = (trwl < 1) ? 1: trwl; ++ trwl = (trwl > 4) ? 4: trwl; ++ trwl -= 1; ++ ++ trc = (trc < 1) ? 1: trc; ++ trc = (trc > 15) ? 15: trc; ++ trc /= 2; ++ ++ dmcr = REG_EMC_DMCR; ++ ++ dmcr &= ~(EMC_DMCR_TRAS_MASK | EMC_DMCR_RCD_MASK | EMC_DMCR_TPC_MASK | EMC_DMCR_TRWL_MASK | EMC_DMCR_TRC_MASK); ++ dmcr |= ((tras << EMC_DMCR_TRAS_BIT) | (rcd << EMC_DMCR_RCD_BIT) | (tpc << EMC_DMCR_TPC_BIT) | (trwl << EMC_DMCR_TRWL_BIT) | (trc << EMC_DMCR_TRC_BIT)); ++ ++ REG_EMC_DMCR = dmcr; ++} ++ ++static void jz_update_dram_prev(unsigned int cur_mclk, unsigned int new_mclk) ++{ ++ /* No risk, no fun: run with interrupts on! */ ++ if (new_mclk > cur_mclk) { ++ /* We're going FASTER, so first update TRAS, RCD, TPC, TRWL ++ * and TRC of DMCR before changing the frequency. ++ */ ++ jz_update_dram_dmcr(new_mclk); ++ } else { ++ /* We're going SLOWER: first update RTCOR value ++ * before changing the frequency. ++ */ ++ jz_update_dram_rtcor(new_mclk); ++ } ++} ++ ++static void jz_update_dram_post(unsigned int cur_mclk, unsigned int new_mclk) ++{ ++ /* No risk, no fun: run with interrupts on! */ ++ if (new_mclk > cur_mclk) { ++ /* We're going FASTER, so update RTCOR ++ * after changing the frequency ++ */ ++ jz_update_dram_rtcor(new_mclk); ++ } else { ++ /* We're going SLOWER: so update TRAS, RCD, TPC, TRWL ++ * and TRC of DMCR after changing the frequency. ++ */ ++ jz_update_dram_dmcr(new_mclk); ++ } ++} ++ ++static void jz_scale_divisors(struct dpm_regs *regs) ++{ ++ unsigned int cpccr; ++ unsigned int cur_mclk, new_mclk; ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ unsigned int tmp = 0, wait = PLL_WAIT_500NS; ++ ++ cpccr = REG_CPM_CPCCR; ++ cpccr &= ~((unsigned long)regs->cpccr_mask); ++ cpccr |= regs->cpccr; ++ cpccr |= CPM_CPCCR_CE; /* update immediately */ ++ ++ cur_mclk = __cpm_get_mclk(); ++ new_mclk = __cpm_get_pllout() / div[(cpccr & CPM_CPCCR_MDIV_MASK) >> CPM_CPCCR_MDIV_BIT]; ++ ++ /* Update some DRAM parameters before changing frequency */ ++ jz_update_dram_prev(cur_mclk, new_mclk); ++ ++ /* update register to change the clocks. ++ * align this code to a cache line. ++ */ ++ __asm__ __volatile__( ++ ".set noreorder\n\t" ++ ".align 5\n" ++ "sw %1,0(%0)\n\t" ++ "li %3,0\n\t" ++ "1:\n\t" ++ "bne %3,%2,1b\n\t" ++ "addi %3, 1\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ ".set reorder\n\t" ++ : ++ : "r" (CPM_CPCCR), "r" (cpccr), "r" (wait), "r" (tmp)); ++ ++ /* Update some other DRAM parameters after changing frequency */ ++ jz_update_dram_post(cur_mclk, new_mclk); ++} ++ ++#ifdef CHANGE_PLL ++/* Maintain the LCD clock and pixel clock */ ++static void jz_scale_lcd_divisors(struct dpm_regs *regs) ++{ ++ unsigned int new_pll, new_lcd_div, new_lcdpix_div; ++ unsigned int cpccr; ++ unsigned int tmp = 0, wait = PLL_WAIT_500NS; ++ ++ if (!boot_config.lcd_clks_initialized) return; ++ ++ new_pll = __cpm_get_pllout(); ++ new_lcd_div = new_pll / boot_config.lcd_clk; ++ new_lcdpix_div = new_pll / boot_config.lcdpix_clk; ++ ++ if (new_lcd_div < 1) ++ new_lcd_div = 1; ++ if (new_lcd_div > 16) ++ new_lcd_div = 16; ++ ++ if (new_lcdpix_div < 1) ++ new_lcdpix_div = 1; ++ if (new_lcdpix_div > 512) ++ new_lcdpix_div = 512; ++ ++// REG_CPM_CPCCR2 = new_lcdpix_div - 1; ++ ++ cpccr = REG_CPM_CPCCR; ++ cpccr &= ~CPM_CPCCR_LDIV_MASK; ++ cpccr |= ((new_lcd_div - 1) << CPM_CPCCR_LDIV_BIT); ++ cpccr |= CPM_CPCCR_CE; /* update immediately */ ++ ++ /* update register to change the clocks. ++ * align this code to a cache line. ++ */ ++ __asm__ __volatile__( ++ ".set noreorder\n\t" ++ ".align 5\n" ++ "sw %1,0(%0)\n\t" ++ "li %3,0\n\t" ++ "1:\n\t" ++ "bne %3,%2,1b\n\t" ++ "addi %3, 1\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ ".set reorder\n\t" ++ : ++ : "r" (CPM_CPCCR), "r" (cpccr), "r" (wait), "r" (tmp)); ++} ++ ++static void jz_scale_pll(struct dpm_regs *regs) ++{ ++ unsigned int cppcr; ++ unsigned int cur_mclk, new_mclk, new_pll; ++ int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ int od[] = {1, 2, 2, 4}; ++ ++ cppcr = REG_CPM_CPPCR; ++ cppcr &= ~(regs->cppcr_mask | CPM_CPPCR_PLLS | CPM_CPPCR_PLLEN | CPM_CPPCR_PLLST_MASK); ++ regs->cppcr &= ~CPM_CPPCR_PLLEN; ++ cppcr |= (regs->cppcr | 0xff); ++ ++ /* Update some DRAM parameters before changing frequency */ ++ new_pll = JZ_EXTAL * ((cppcr>>23)+2) / ((((cppcr>>18)&0x1f)+2) * od[(cppcr>>16)&0x03]); ++ cur_mclk = __cpm_get_mclk(); ++ new_mclk = new_pll / div[(REG_CPM_CPCCR>>CPM_CPCCR_MDIV_BIT) & 0xf]; ++ ++ /* ++ * Update some SDRAM parameters ++ */ ++ jz_update_dram_prev(cur_mclk, new_mclk); ++ ++ /* ++ * Update PLL, align code to cache line. ++ */ ++ cppcr |= CPM_CPPCR_PLLEN; ++ __asm__ __volatile__( ++ ".set noreorder\n\t" ++ ".align 5\n" ++ "sw %1,0(%0)\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ "nop\n\t" ++ ".set reorder\n\t" ++ : ++ : "r" (CPM_CPPCR), "r" (cppcr)); ++ ++ /* Update some other DRAM parameters after changing frequency */ ++ jz_update_dram_post(cur_mclk, new_mclk); ++} ++#endif ++ ++static void jz4740_transition(struct dpm_regs *regs) ++{ ++ /* ++ * Get and save some boot-time conditions. ++ */ ++ jz_init_boot_config(); ++ ++#ifdef CHANGE_PLL ++ /* ++ * Disable LCD before scaling pll. ++ * LCD and LCD pixel clocks should not be changed even if the PLL ++ * output frequency has been changed. ++ */ ++ REG_LCD_CTRL &= ~LCD_CTRL_ENA; ++ ++ /* ++ * Stop module clocks before scaling PLL ++ */ ++ __cpm_stop_eth(); ++ __cpm_stop_aic(1); ++ __cpm_stop_aic(2); ++#endif ++ ++ /* ... add more as necessary */ ++ ++ if (regs->pll_up_flag == PLL_GOES_UP) { ++ /* the pll frequency is going up, so change dividors first */ ++ jz_scale_divisors(regs); ++#ifdef CHANGE_PLL ++ jz_scale_pll(regs); ++#endif ++ } ++ else if (regs->pll_up_flag == PLL_GOES_DOWN) { ++ /* the pll frequency is going down, so change pll first */ ++#ifdef CHANGE_PLL ++ jz_scale_pll(regs); ++#endif ++ jz_scale_divisors(regs); ++ } ++ else { ++ /* the pll frequency is unchanged, so change divisors only */ ++ jz_scale_divisors(regs); ++ } ++ ++#ifdef CHANGE_PLL ++ /* ++ * Restart module clocks before scaling PLL ++ */ ++ __cpm_start_eth(); ++ __cpm_start_aic(1); ++ __cpm_start_aic(2); ++ ++ /* ... add more as necessary */ ++ ++ /* Scale the LCD divisors after scaling pll */ ++ if (regs->pll_up_flag != PLL_UNCHANGED) { ++ jz_scale_lcd_divisors(regs); ++ } ++ ++ /* Enable LCD controller */ ++ REG_LCD_CTRL &= ~LCD_CTRL_DIS; ++ REG_LCD_CTRL |= LCD_CTRL_ENA; ++#endif ++ ++ /* Update system clocks */ ++ jz_update_clocks(); ++} ++ ++extern unsigned int idle_times; ++static unsigned int jz4740_freq_get(unsigned int cpu) ++{ ++ return (__cpm_get_cclk() / 1000); ++} ++ ++static unsigned int index_to_divisor(unsigned int index, struct dpm_regs *regs) ++{ ++ int n2FR[33] = { ++ 0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0, ++ 7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, ++ 9 ++ }; ++ int div[4] = {1, 2, 2, 2}; /* divisors of I:S:P:M */ ++ unsigned int div_of_cclk, new_freq, i; ++ ++ regs->pll_up_flag = PLL_UNCHANGED; ++ regs->cpccr_mask = CPM_CPCCR_CDIV_MASK | CPM_CPCCR_HDIV_MASK | CPM_CPCCR_PDIV_MASK | CPM_CPCCR_MDIV_MASK; ++ ++ new_freq = jz4740_freq_table.table[index].frequency; ++ ++ do { ++ div_of_cclk = __cpm_get_pllout() / (1000 * new_freq); ++ } while (div_of_cclk==0); ++ ++ if(div_of_cclk == 1 || div_of_cclk == 2 || div_of_cclk == 4) { ++ for(i = 1; i<4; i++) { ++ div[i] = 3; ++ } ++ } else { ++ for(i = 1; i<4; i++) { ++ div[i] = 2; ++ } ++ } ++ ++ for(i = 0; i<4; i++) { ++ div[i] *= div_of_cclk; ++ } ++ ++ dprintk("divisors of I:S:P:M = %d:%d:%d:%d\n", div[0], div[1], div[2], div[3]); ++ ++ regs->cpccr = ++ (n2FR[div[0]] << CPM_CPCCR_CDIV_BIT) | ++ (n2FR[div[1]] << CPM_CPCCR_HDIV_BIT) | ++ (n2FR[div[2]] << CPM_CPCCR_PDIV_BIT) | ++ (n2FR[div[3]] << CPM_CPCCR_MDIV_BIT); ++ ++ return div_of_cclk; ++} ++ ++static void jz4740_set_cpu_divider_index(unsigned int cpu, unsigned int index) ++{ ++ unsigned long divisor, old_divisor; ++ struct cpufreq_freqs freqs; ++ struct dpm_regs regs; ++ ++ old_divisor = __cpm_get_pllout() / __cpm_get_cclk(); ++ divisor = index_to_divisor(index, ®s); ++ ++ freqs.old = __cpm_get_cclk() / 1000; ++ freqs.new = __cpm_get_pllout() / (1000 * divisor); ++ freqs.cpu = cpu; ++ ++ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); ++ ++ if (old_divisor != divisor) ++ jz4740_transition(®s); ++ ++ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); ++} ++ ++static int jz4740_freq_target(struct cpufreq_policy *policy, ++ unsigned int target_freq, ++ unsigned int relation) ++{ ++ unsigned int new_index = 0; ++ ++ if (cpufreq_frequency_table_target(policy, ++ &jz4740_freq_table.table[0], ++ target_freq, relation, &new_index)) ++ return -EINVAL; ++ ++ jz4740_set_cpu_divider_index(policy->cpu, new_index); ++ ++ dprintk("new frequency is %d KHz (REG_CPM_CPCCR:0x%x)\n", __cpm_get_cclk() / 1000, REG_CPM_CPCCR); ++ ++ return 0; ++} ++ ++static int jz4740_freq_verify(struct cpufreq_policy *policy) ++{ ++ return cpufreq_frequency_table_verify(policy, ++ &jz4740_freq_table.table[0]); ++} ++ ++static int __init jz4740_cpufreq_driver_init(struct cpufreq_policy *policy) ++{ ++ ++ struct cpufreq_frequency_table *table = &jz4740_freq_table.table[0]; ++ unsigned int MAX_FREQ; ++ ++ dprintk(KERN_INFO "Jz4740 cpufreq driver\n"); ++ ++ if (policy->cpu != 0) ++ return -EINVAL; ++ ++ policy->cur = MAX_FREQ = __cpm_get_cclk() / 1000; /* in kHz. Current and max frequency is determined by u-boot */ ++ policy->governor = CPUFREQ_DEFAULT_GOVERNOR; ++ ++ policy->cpuinfo.min_freq = MAX_FREQ/8; ++ policy->cpuinfo.max_freq = MAX_FREQ; ++ policy->cpuinfo.transition_latency = 100000; /* in 10^(-9) s = nanoseconds */ ++ ++ table[0].index = 0; ++ table[0].frequency = MAX_FREQ/8; ++ table[1].index = 1; ++ table[1].frequency = MAX_FREQ/6; ++ table[2].index = 2; ++ table[2].frequency = MAX_FREQ/4; ++ table[3].index = 3; ++ table[3].frequency = MAX_FREQ/3; ++ table[4].index = 4; ++ table[4].frequency = MAX_FREQ/2; ++ table[5].index = 5; ++ table[5].frequency = MAX_FREQ; ++ table[6].index = 6; ++ table[6].frequency = CPUFREQ_TABLE_END; ++ ++#ifdef CONFIG_CPU_FREQ_STAT_DETAILS ++ cpufreq_frequency_table_get_attr(table, policy->cpu); /* for showing /sys/devices/system/cpu/cpuX/cpufreq/stats/ */ ++#endif ++ ++ return cpufreq_frequency_table_cpuinfo(policy, table); ++} ++ ++static struct cpufreq_driver cpufreq_jz4740_driver = { ++// .flags = CPUFREQ_STICKY, ++ .init = jz4740_cpufreq_driver_init, ++ .verify = jz4740_freq_verify, ++ .target = jz4740_freq_target, ++ .get = jz4740_freq_get, ++ .name = "jz4740", ++}; ++ ++static int __init jz4740_cpufreq_init(void) ++{ ++ return cpufreq_register_driver(&cpufreq_jz4740_driver); ++} ++ ++static void __exit jz4740_cpufreq_exit(void) ++{ ++ cpufreq_unregister_driver(&cpufreq_jz4740_driver); ++} ++ ++module_init(jz4740_cpufreq_init); ++module_exit(jz4740_cpufreq_exit); ++ ++MODULE_AUTHOR("Regen <lhhuang@ingenic.cn>"); ++MODULE_DESCRIPTION("cpufreq driver for Jz4740"); ++MODULE_LICENSE("GPL"); ++ +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/dma.c linux-2.6.31/arch/mips/jz4740/dma.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/dma.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/dma.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,922 @@ ++/* ++ * linux/arch/mips/jz4740/dma.c ++ * ++ * Support functions for the JZ4740 internal DMA channels. ++ * No-descriptor transfer only. ++ * Descriptor transfer should also call jz_request_dma() to get a free ++ * channel and call jz_free_dma() to free the channel. And driver should ++ * build the DMA descriptor and setup the DMA channel by itself. ++ * ++ * Copyright (C) 2006 Ingenic Semiconductor Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/spinlock.h> ++#include <linux/string.h> ++#include <linux/delay.h> ++#include <linux/interrupt.h> ++#include <linux/soundcard.h> ++ ++#include <asm/system.h> ++#include <asm/addrspace.h> ++#include <asm/jzsoc.h> ++ ++#define JZ_REG_DMA_SRC_ADDR(x) ((x) * 0x20 + 0x00) ++#define JZ_REG_DMA_DEST_ADDR(x) ((x) * 0x20 + 0x04) ++#define JZ_REG_DMA_COUNT(x) ((x) * 0x20 + 0x08) ++#define JZ_REG_DMA_TYPE(x) ((x) * 0x20 + 0x0c) ++#define JZ_REG_DMA_STATUS(x) ((x) * 0x20 + 0x10) ++#define JZ_REG_DMA_CMD(x) ((x) * 0x20 + 0x14) ++#define JZ_REG_DMA_DESC_ADDR(x) ((x) * 0x20 + 0x18) ++#define JZ_REG_DMA_CTRL 0x300 ++#define JZ_REG_DMA_IRQ 0x304 ++#define JZ_REG_DMA_DOORBELL 0x308 ++#define JZ_REG_DMA_DOORBELL_SET 0x30C ++ ++#define JZ_DMA_STATUS_NO_DESC BIT(31) ++#define JZ_DMA_STATUS_CDOA_MASK (0xff << 16) ++#define JZ_DMA_STATUS_INV_DESC BIT(6) ++#define JZ_DMA_STATUS_ADDR_ERROR BIT(4) ++#define JZ_DMA_STATUS_TERMINATE_TRANSFER BIT(3) ++#define JZ_DMA_STATUS_HALT BIT(2) ++#define JZ_DMA_STATUS_CT BIT(1) ++#define JZ_DMA_STATUS_ENABLE BIT(0) ++ ++#define JZ_DMA_CMD_SAI BIT(23) ++#define JZ_DMA_CMD_DAI BIT(22) ++#define JZ_DMA_CMD_RDIL_MASK (0xf << 16) ++#define JZ_DMA_CMD_SRC_WIDTH_MASK (0x3 << 14) ++#define JZ_DMA_CMD_DEST_WIDTH_MASK (0x3 << 12) ++#define JZ_DMA_CMD_TRANSFER_SIZE_MASK (0x7 << 8) ++#define JZ_DMA_CMD_BLOCK_MODE BIT(7) ++#define JZ_DMA_CMD_VALID BIT(4) ++#define JZ_DMA_CMD_VALID_MODE BIT(3) ++#define JZ_DMA_CMD_VALID_IRQ_ENABLE BIT(2) ++#define JZ_DMA_CMD_TRANSFER_IRQ_ENABLE BIT(1) ++#define JZ_DMA_CMD_LINK BIT(0) ++ ++ ++static void __iomem *jz_dma_base; ++static spinlock_t jz_dma_lock; ++ ++static inline uint32_t jz_dma_read(size_t reg) ++{ ++ return readl(jz_dma_base + reg); ++} ++ ++static inline void jz_dma_write(size_t reg, uint32_t val) ++{ ++ writel(val, jz_dma_base + reg); ++} ++ ++ ++ ++/* ++ * A note on resource allocation: ++ * ++ * All drivers needing DMA channels, should allocate and release them ++ * through the public routines `jz_request_dma()' and `jz_free_dma()'. ++ * ++ * In order to avoid problems, all processes should allocate resources in ++ * the same sequence and release them in the reverse order. ++ * ++ * So, when allocating DMAs and IRQs, first allocate the DMA, then the IRQ. ++ * When releasing them, first release the IRQ, then release the DMA. The ++ * main reason for this order is that, if you are requesting the DMA buffer ++ * done interrupt, you won't know the irq number until the DMA channel is ++ * returned from jz_request_dma(). ++ */ ++ ++struct jz_dma_chan jz_dma_table[MAX_DMA_NUM] = { ++ {dev_id:-1,}, ++ {dev_id:-1,}, ++ {dev_id:-1,}, ++ {dev_id:-1,}, ++ {dev_id:-1,}, ++ {dev_id:-1,}, ++}; ++ ++// Device FIFO addresses and default DMA modes ++static const struct { ++ unsigned int fifo_addr; ++ unsigned int dma_mode; ++ unsigned int dma_source; ++} dma_dev_table[DMA_ID_MAX] = { ++ {CPHYSADDR(UART0_TDR), DMA_8BIT_TX_CMD | DMA_MODE_WRITE, DMAC_DRSR_RS_UART0OUT}, ++ {CPHYSADDR(UART0_RDR), DMA_8BIT_RX_CMD | DMA_MODE_READ, DMAC_DRSR_RS_UART0IN}, ++ {CPHYSADDR(SSI_DR), DMA_32BIT_TX_CMD | DMA_MODE_WRITE, DMAC_DRSR_RS_SSIOUT}, ++ {CPHYSADDR(SSI_DR), DMA_32BIT_RX_CMD | DMA_MODE_READ, DMAC_DRSR_RS_SSIIN}, ++ {CPHYSADDR(AIC_DR), DMA_32BIT_TX_CMD | DMA_MODE_WRITE, DMAC_DRSR_RS_AICOUT}, ++ {CPHYSADDR(AIC_DR), DMA_32BIT_RX_CMD | DMA_MODE_READ, DMAC_DRSR_RS_AICIN}, ++ {CPHYSADDR(MSC_TXFIFO), DMA_32BIT_TX_CMD | DMA_MODE_WRITE, DMAC_DRSR_RS_MSCOUT}, ++ {CPHYSADDR(MSC_RXFIFO), DMA_32BIT_RX_CMD | DMA_MODE_READ, DMAC_DRSR_RS_MSCIN}, ++ {0, DMA_AUTOINIT, DMAC_DRSR_RS_TCU}, ++ {0, DMA_AUTOINIT, DMAC_DRSR_RS_AUTO}, ++ {}, ++}; ++ ++ ++int jz_dma_read_proc(char *buf, char **start, off_t fpos, ++ int length, int *eof, void *data) ++{ ++ int i, len = 0; ++ struct jz_dma_chan *chan; ++ ++ for (i = 0; i < MAX_DMA_NUM; i++) { ++ if ((chan = get_dma_chan(i)) != NULL) { ++ len += sprintf(buf + len, "%2d: %s\n", ++ i, chan->dev_str); ++ } ++ } ++ ++ if (fpos >= len) { ++ *start = buf; ++ *eof = 1; ++ return 0; ++ } ++ *start = buf + fpos; ++ if ((len -= fpos) > length) ++ return length; ++ *eof = 1; ++ return len; ++} ++ ++ ++void dump_jz_dma_channel(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan; ++ ++ if (dmanr > MAX_DMA_NUM) ++ return; ++ chan = &jz_dma_table[dmanr]; ++ ++ printk("DMA%d Registers:\n", dmanr); ++ printk(" DMACR = 0x%08x\n", REG_DMAC_DMACR); ++ printk(" DSAR = 0x%08x\n", REG_DMAC_DSAR(dmanr)); ++ printk(" DTAR = 0x%08x\n", REG_DMAC_DTAR(dmanr)); ++ printk(" DTCR = 0x%08x\n", REG_DMAC_DTCR(dmanr)); ++ printk(" DRSR = 0x%08x\n", REG_DMAC_DRSR(dmanr)); ++ printk(" DCCSR = 0x%08x\n", REG_DMAC_DCCSR(dmanr)); ++ printk(" DCMD = 0x%08x\n", REG_DMAC_DCMD(dmanr)); ++ printk(" DDA = 0x%08x\n", REG_DMAC_DDA(dmanr)); ++ printk(" DMADBR = 0x%08x\n", REG_DMAC_DMADBR); ++} ++ ++ ++/** ++ * jz_request_dma - dynamically allcate an idle DMA channel to return ++ * @dev_id: the specified dma device id or DMA_ID_RAW_SET ++ * @dev_str: the specified dma device string name ++ * @irqhandler: the irq handler, or NULL ++ * @irqflags: the irq handler flags ++ * @irq_dev_id: the irq handler device id for shared irq ++ * ++ * Finds a free channel, and binds the requested device to it. ++ * Returns the allocated channel number, or negative on error. ++ * Requests the DMA done IRQ if irqhandler != NULL. ++ * ++*/ ++/*int jz_request_dma(int dev_id, const char *dev_str, ++ void (*irqhandler)(int, void *, struct pt_regs *), ++ unsigned long irqflags, ++ void *irq_dev_id) ++*/ ++ ++int jz_request_dma(int dev_id, const char *dev_str, ++ irqreturn_t (*irqhandler)(int, void *), ++ unsigned long irqflags, ++ void *irq_dev_id) ++{ ++ struct jz_dma_chan *chan; ++ int i, ret; ++ ++ if (dev_id < 0 || dev_id >= DMA_ID_MAX) ++ return -EINVAL; ++ ++ for (i = 0; i < MAX_DMA_NUM; i++) { ++ if (jz_dma_table[i].dev_id < 0) ++ break; ++ } ++ if (i == MAX_DMA_NUM) /* no free channel */ ++ return -ENODEV; ++ ++ /* we got a free channel */ ++ chan = &jz_dma_table[i]; ++ ++ if (irqhandler) { ++ chan->irq = JZ_IRQ_DMA(i); // allocate irq number ++ chan->irq_dev = irq_dev_id; ++ if ((ret = request_irq(chan->irq, irqhandler, irqflags, ++ dev_str, chan->irq_dev))) { ++ chan->irq = -1; ++ chan->irq_dev = NULL; ++ return ret; ++ } ++ } else { ++ chan->irq = -1; ++ chan->irq_dev = NULL; ++ } ++ ++ // fill it in ++ chan->io = i; ++ chan->dev_id = dev_id; ++ chan->dev_str = dev_str; ++ chan->fifo_addr = dma_dev_table[dev_id].fifo_addr; ++ chan->mode = dma_dev_table[dev_id].dma_mode; ++ chan->source = dma_dev_table[dev_id].dma_source; ++ ++ return i; ++} ++ ++void jz_free_dma(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) { ++ printk("Trying to free DMA%d\n", dmanr); ++ return; ++ } ++ ++ disable_dma(dmanr); ++ if (chan->irq) ++ free_irq(chan->irq, chan->irq_dev); ++ ++ chan->irq = -1; ++ chan->irq_dev = NULL; ++ chan->dev_id = -1; ++} ++ ++void jz_set_dma_dest_width(int dmanr, int nbit) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ chan->mode &= ~DMAC_DCMD_DWDH_MASK; ++ switch (nbit) { ++ case 8: ++ chan->mode |= DMAC_DCMD_DWDH_8; ++ break; ++ case 16: ++ chan->mode |= DMAC_DCMD_DWDH_16; ++ break; ++ case 32: ++ chan->mode |= DMAC_DCMD_DWDH_32; ++ break; ++ } ++} ++ ++void jz_set_dma_src_width(int dmanr, int nbit) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ chan->mode &= ~DMAC_DCMD_SWDH_MASK; ++ switch (nbit) { ++ case 8: ++ chan->mode |= DMAC_DCMD_SWDH_8; ++ break; ++ case 16: ++ chan->mode |= DMAC_DCMD_SWDH_16; ++ break; ++ case 32: ++ chan->mode |= DMAC_DCMD_SWDH_32; ++ break; ++ } ++} ++ ++void jz_set_dma_block_size(int dmanr, int nbyte) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ chan->mode &= ~DMAC_DCMD_DS_MASK; ++ switch (nbyte) { ++ case 1: ++ chan->mode |= DMAC_DCMD_DS_8BIT; ++ break; ++ case 2: ++ chan->mode |= DMAC_DCMD_DS_16BIT; ++ break; ++ case 4: ++ chan->mode |= DMAC_DCMD_DS_32BIT; ++ break; ++ case 16: ++ chan->mode |= DMAC_DCMD_DS_16BYTE; ++ break; ++ case 32: ++ chan->mode |= DMAC_DCMD_DS_32BYTE; ++ break; ++ } ++} ++ ++unsigned int jz_get_dma_command(int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ return chan->mode; ++} ++ ++/** ++ * jz_set_dma_mode - do the raw settings for the specified DMA channel ++ * @dmanr: the specified DMA channel ++ * @mode: dma operate mode, DMA_MODE_READ or DMA_MODE_WRITE ++ * @dma_mode: dma raw mode ++ * @dma_source: dma raw request source ++ * @fifo_addr: dma raw device fifo address ++ * ++ * Ensure call jz_request_dma(DMA_ID_RAW_SET, ...) first, then call ++ * jz_set_dma_mode() rather than set_dma_mode() if you work with ++ * and external request dma device. ++ * ++ * NOTE: Don not dynamically allocate dma channel if one external request ++ * dma device will occupy this channel. ++*/ ++int jz_set_dma_mode(unsigned int dmanr, unsigned int mode, ++ unsigned int dma_mode, unsigned int dma_source, ++ unsigned int fifo_addr) ++{ ++ int dev_id, i; ++ struct jz_dma_chan *chan; ++ ++ if (dmanr > MAX_DMA_NUM) ++ return -ENODEV; ++ ++ for (i = 0; i < MAX_DMA_NUM; i++) { ++ if (jz_dma_table[i].dev_id < 0) ++ break; ++ } ++ if (i == MAX_DMA_NUM) ++ return -ENODEV; ++ ++ chan = &jz_dma_table[dmanr]; ++ dev_id = chan->dev_id; ++ if (dev_id > 0) { ++ printk(KERN_DEBUG "%s sets the allocated DMA channel %d!\n", ++ __FUNCTION__, dmanr); ++ return -ENODEV; ++ } ++ ++ /* clone it from the dynamically allocated. */ ++ if (i != dmanr) { ++ chan->irq = jz_dma_table[i].irq; ++ chan->irq_dev = jz_dma_table[i].irq_dev; ++ chan->dev_str = jz_dma_table[i].dev_str; ++ jz_dma_table[i].irq = 0; ++ jz_dma_table[i].irq_dev = NULL; ++ jz_dma_table[i].dev_id = -1; ++ } ++ chan->dev_id = DMA_ID_RAW_SET; ++ chan->io = dmanr; ++ chan->fifo_addr = fifo_addr; ++ chan->mode = dma_mode; ++ chan->source = dma_source; ++ ++ set_dma_mode(dmanr, dma_mode); ++ ++ return dmanr; ++} ++ ++void enable_dma(unsigned int dmanr) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ REG_DMAC_DCCSR(dmanr) &= ~(DMAC_DCCSR_HLT | DMAC_DCCSR_TT | DMAC_DCCSR_AR); ++ REG_DMAC_DCCSR(dmanr) |= DMAC_DCCSR_NDES; /* No-descriptor transfer */ ++ __dmac_enable_channel(dmanr); ++ if (chan->irq) ++ __dmac_channel_enable_irq(dmanr); ++} ++ ++#define DMA_DISABLE_POLL 0x10000 ++ ++void disable_dma(unsigned int dmanr) ++{ ++ int i; ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ if (!__dmac_channel_enabled(dmanr)) ++ return; ++ ++ for (i = 0; i < DMA_DISABLE_POLL; i++) ++ if (__dmac_channel_transmit_end_detected(dmanr)) ++ break; ++#if 0 ++ if (i == DMA_DISABLE_POLL) ++ printk(KERN_INFO "disable_dma: poll expired!\n"); ++#endif ++ ++ __dmac_disable_channel(dmanr); ++ if (chan->irq) ++ __dmac_channel_disable_irq(dmanr); ++} ++ ++/* Note: DMA_MODE_MASK is simulated by sw */ ++void set_dma_mode(unsigned int dmanr, unsigned int mode) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI); ++ mode &= DMA_MODE_MASK; ++ if (mode == DMA_MODE_READ) { ++ chan->mode |= DMAC_DCMD_DAI; ++ chan->mode &= ~DMAC_DCMD_SAI; ++ } else if (mode == DMA_MODE_WRITE) { ++ chan->mode |= DMAC_DCMD_SAI; ++ chan->mode &= ~DMAC_DCMD_DAI; ++ } else { ++ printk(KERN_DEBUG "set_dma_mode() just supports DMA_MODE_READ or DMA_MODE_WRITE!\n"); ++ } ++ jz_dma_write(JZ_REG_DMA_CMD(chan->io), chan->mode & ~DMA_MODE_MASK); ++ jz_dma_write(JZ_REG_DMA_TYPE(chan->io), chan->source); ++} ++ ++void set_dma_addr(unsigned int dmanr, unsigned int phyaddr) ++{ ++ unsigned int mode; ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ mode = chan->mode & DMA_MODE_MASK; ++ if (mode == DMA_MODE_READ) { ++ jz_dma_write(JZ_REG_DMA_SRC_ADDR(chan->io), chan->fifo_addr); ++ jz_dma_write(JZ_REG_DMA_DEST_ADDR(chan->io), phyaddr); ++ } else if (mode == DMA_MODE_WRITE) { ++ jz_dma_write(JZ_REG_DMA_SRC_ADDR(chan->io), phyaddr); ++ jz_dma_write(JZ_REG_DMA_DEST_ADDR(chan->io), chan->fifo_addr); ++ } else ++ printk(KERN_DEBUG "Driver should call set_dma_mode() ahead set_dma_addr()!\n"); ++} ++ ++void set_dma_count(unsigned int dmanr, unsigned int bytecnt) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ int dma_ds[] = {4, 1, 2, 16, 32}; ++ unsigned int ds; ++ ++ if (!chan) ++ return; ++ ++ ds = (chan->mode & DMAC_DCMD_DS_MASK) >> DMAC_DCMD_DS_BIT; ++ ++ jz_dma_write(JZ_REG_DMA_COUNT(chan->io), bytecnt / dma_ds[ds]); ++} ++ ++unsigned int get_dma_residue(unsigned int dmanr) ++{ ++ unsigned int count, ds; ++ int dma_ds[] = {4, 1, 2, 16, 32}; ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ if (!chan) ++ return 0; ++ ++ ds = (chan->mode & DMAC_DCMD_DS_MASK) >> DMAC_DCMD_DS_BIT; ++ count = jz_dma_read(JZ_REG_DMA_COUNT(chan->io)); ++ count = count * dma_ds[ds]; ++ ++ return count; ++} ++ ++void jz_set_oss_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ switch (audio_fmt) { ++ case AFMT_U8: ++ /* burst mode : 32BIT */ ++ break; ++ case AFMT_S16_LE: ++ /* burst mode : 16BYTE */ ++ if (mode == DMA_MODE_READ) { ++ chan->mode = DMA_AIC_32_16BYTE_RX_CMD | DMA_MODE_READ; ++ chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI); ++ mode &= DMA_MODE_MASK; ++ chan->mode |= DMAC_DCMD_DAI; ++ chan->mode &= ~DMAC_DCMD_SAI; ++ } else if (mode == DMA_MODE_WRITE) { ++ chan->mode = DMA_AIC_32_16BYTE_TX_CMD | DMA_MODE_WRITE; ++ chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI); ++ mode &= DMA_MODE_MASK; ++ chan->mode |= DMAC_DCMD_SAI; ++ chan->mode &= ~DMAC_DCMD_DAI; ++ } else ++ printk("oss_dma_burst_mode() just supports DMA_MODE_READ or DMA_MODE_WRITE!\n"); ++ ++ jz_dma_write(JZ_REG_DMA_CMD(chan->io), chan->mode & ~DMA_MODE_MASK); ++ jz_dma_write(JZ_REG_DMA_TYPE(chan->io), chan->source); ++ break; ++ } ++} ++ ++void jz_set_alsa_dma(unsigned int dmanr, unsigned int mode, unsigned int audio_fmt) ++{ ++ struct jz_dma_chan *chan = get_dma_chan(dmanr); ++ ++ if (!chan) ++ return; ++ ++ switch (audio_fmt) { ++ case 8: ++ /* SNDRV_PCM_FORMAT_S8 burst mode : 32BIT */ ++ break; ++ case 16: ++ /* SNDRV_PCM_FORMAT_S16_LE burst mode : 16BYTE */ ++ if (mode == DMA_MODE_READ) { ++ chan->mode = DMA_AIC_16BYTE_RX_CMD | DMA_MODE_READ; ++ chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI); ++ mode &= DMA_MODE_MASK; ++ chan->mode |= DMAC_DCMD_DAI; ++ chan->mode &= ~DMAC_DCMD_SAI; ++ } else if (mode == DMA_MODE_WRITE) { ++ chan->mode = DMA_AIC_16BYTE_TX_CMD | DMA_MODE_WRITE; ++ chan->mode |= mode & ~(DMAC_DCMD_SAI | DMAC_DCMD_DAI); ++ mode &= DMA_MODE_MASK; ++ chan->mode |= DMAC_DCMD_SAI; ++ chan->mode &= ~DMAC_DCMD_DAI; ++ } else { ++ printk("alsa_dma_burst_mode() just supports DMA_MODE_READ or DMA_MODE_WRITE!\n"); ++ } ++ ++ jz_dma_write(JZ_REG_DMA_CMD(chan->io), chan->mode & ~DMA_MODE_MASK); ++ jz_dma_write(JZ_REG_DMA_TYPE(chan->io), chan->source); ++ ++ break; ++ } ++} ++ ++#undef JZ4740_DMAC_TEST_ENABLE ++ ++#ifdef JZ4740_DMAC_TEST_ENABLE ++ ++/* ++ * DMA test: external address <--> external address ++ */ ++#define TEST_DMA_SIZE 16*1024 ++ ++static jz_dma_desc *dma_desc; ++ ++static int dma_chan; ++static dma_addr_t dma_desc_phys_addr; ++static unsigned int dma_src_addr, dma_src_phys_addr, dma_dst_addr, dma_dst_phys_addr; ++ ++static int dma_check_result(void *src, void *dst, int size) ++{ ++ unsigned int addr1, addr2, i, err = 0; ++ ++ addr1 = (unsigned int)src; ++ addr2 = (unsigned int)dst; ++ ++ for (i = 0; i < size; i += 4) { ++ if (*(volatile unsigned int *)addr1 != *(volatile unsigned int *)addr2) { ++ err++; ++ printk("wrong data at 0x%08x: src 0x%08x dst 0x%08x\n", addr2, *(volatile unsigned int *)addr1, *(volatile unsigned int *)addr2); ++ } ++ addr1 += 4; ++ addr2 += 4; ++ } ++ printk("check DMA result err=%d\n", err); ++ return err; ++} ++ ++static void jz4740_dma_irq(int irq, void *dev_id, struct pt_regs *regs) ++{ ++ printk("jz4740_dma_irq %d\n", irq); ++ ++ REG_DMAC_DCCSR(dma_chan) &= ~DMAC_DCCSR_EN; /* disable DMA */ ++ ++ if (__dmac_channel_transmit_halt_detected(dma_chan)) { ++ printk("DMA HALT\n"); ++ __dmac_channel_clear_transmit_halt(dma_chan); ++ } ++ ++ if (__dmac_channel_address_error_detected(dma_chan)) { ++ printk("DMA ADDR ERROR\n"); ++ __dmac_channel_clear_address_error(dma_chan); ++ } ++ ++ if (__dmac_channel_descriptor_invalid_detected(dma_chan)) { ++ printk("DMA DESC INVALID\n"); ++ __dmac_channel_clear_descriptor_invalid(dma_chan); ++ } ++ ++ if (__dmac_channel_count_terminated_detected(dma_chan)) { ++ printk("DMA CT\n"); ++ __dmac_channel_clear_count_terminated(dma_chan); ++ } ++ ++ if (__dmac_channel_transmit_end_detected(dma_chan)) { ++ printk("DMA TT\n"); ++ __dmac_channel_clear_transmit_end(dma_chan); ++ dump_jz_dma_channel(dma_chan); ++ dma_check_result((void *)dma_src_addr, (void *)dma_dst_addr, TEST_DMA_SIZE); ++ } ++ ++ /* free buffers */ ++ printk("free DMA buffers\n"); ++ free_pages(dma_src_addr, 2); ++ free_pages(dma_dst_addr, 2); ++ ++ if (dma_desc) ++ free_pages((unsigned int)dma_desc, 0); ++ ++ /* free dma */ ++ jz_free_dma(dma_chan); ++} ++ ++void dma_nodesc_test(void) ++{ ++ unsigned int addr, i; ++ ++ printk("dma_nodesc_test\n"); ++ ++ /* Request DMA channel and setup irq handler */ ++ dma_chan = jz_request_dma(DMA_ID_AUTO, "auto", jz4740_dma_irq, ++ SA_INTERRUPT, NULL); ++ if (dma_chan < 0) { ++ printk("Setup irq failed\n"); ++ return; ++ } ++ ++ printk("Requested DMA channel = %d\n", dma_chan); ++ ++ /* Allocate DMA buffers */ ++ dma_src_addr = __get_free_pages(GFP_KERNEL, 2); /* 16KB */ ++ dma_dst_addr = __get_free_pages(GFP_KERNEL, 2); /* 16KB */ ++ ++ dma_src_phys_addr = CPHYSADDR(dma_src_addr); ++ dma_dst_phys_addr = CPHYSADDR(dma_dst_addr); ++ ++ printk("Buffer addresses: 0x%08x 0x%08x 0x%08x 0x%08x\n", ++ dma_src_addr, dma_src_phys_addr, dma_dst_addr, dma_dst_phys_addr); ++ ++ /* Prepare data for source buffer */ ++ addr = (unsigned int)dma_src_addr; ++ for (i = 0; i < TEST_DMA_SIZE; i += 4) { ++ *(volatile unsigned int *)addr = addr; ++ addr += 4; ++ } ++ dma_cache_wback((unsigned long)dma_src_addr, TEST_DMA_SIZE); ++ ++ /* Init target buffer */ ++ memset((void *)dma_dst_addr, 0, TEST_DMA_SIZE); ++ dma_cache_wback((unsigned long)dma_dst_addr, TEST_DMA_SIZE); ++ ++ /* Init DMA module */ ++ printk("Starting DMA\n"); ++ REG_DMAC_DMACR = 0; ++ REG_DMAC_DCCSR(dma_chan) = 0; ++ REG_DMAC_DRSR(dma_chan) = DMAC_DRSR_RS_AUTO; ++ REG_DMAC_DSAR(dma_chan) = dma_src_phys_addr; ++ REG_DMAC_DTAR(dma_chan) = dma_dst_phys_addr; ++ REG_DMAC_DTCR(dma_chan) = 512; ++ REG_DMAC_DCMD(dma_chan) = DMAC_DCMD_SAI | DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TIE; ++ REG_DMAC_DCCSR(dma_chan) = DMAC_DCCSR_NDES | DMAC_DCCSR_EN; ++ REG_DMAC_DMACR = DMAC_DMACR_DMAE; /* global DMA enable bit */ ++ ++ printk("DMA started. IMR=%08x\n", REG_INTC_IMR); ++} ++ ++void dma_desc_test(void) ++{ ++ unsigned int next, addr, i; ++ static jz_dma_desc *desc; ++ ++ printk("dma_desc_test\n"); ++ ++ /* Request DMA channel and setup irq handler */ ++ dma_chan = jz_request_dma(DMA_ID_AUTO, "auto", jz4740_dma_irq, ++ SA_INTERRUPT, NULL); ++ if (dma_chan < 0) { ++ printk("Setup irq failed\n"); ++ return; ++ } ++ ++ printk("Requested DMA channel = %d\n", dma_chan); ++ ++ /* Allocate DMA buffers */ ++ dma_src_addr = __get_free_pages(GFP_KERNEL, 2); /* 16KB */ ++ dma_dst_addr = __get_free_pages(GFP_KERNEL, 2); /* 16KB */ ++ ++ dma_src_phys_addr = CPHYSADDR(dma_src_addr); ++ dma_dst_phys_addr = CPHYSADDR(dma_dst_addr); ++ ++ printk("Buffer addresses: 0x%08x 0x%08x 0x%08x 0x%08x\n", ++ dma_src_addr, dma_src_phys_addr, dma_dst_addr, dma_dst_phys_addr); ++ ++ /* Prepare data for source buffer */ ++ addr = (unsigned int)dma_src_addr; ++ for (i = 0; i < TEST_DMA_SIZE; i += 4) { ++ *(volatile unsigned int *)addr = addr; ++ addr += 4; ++ } ++ dma_cache_wback((unsigned long)dma_src_addr, TEST_DMA_SIZE); ++ ++ /* Init target buffer */ ++ memset((void *)dma_dst_addr, 0, TEST_DMA_SIZE); ++ dma_cache_wback((unsigned long)dma_dst_addr, TEST_DMA_SIZE); ++ ++ /* Allocate DMA descriptors */ ++ dma_desc = (jz_dma_desc *)__get_free_pages(GFP_KERNEL, 0); ++ dma_desc_phys_addr = CPHYSADDR((unsigned long)dma_desc); ++ ++ printk("DMA descriptor address: 0x%08x 0x%08x\n", (u32)dma_desc, dma_desc_phys_addr); ++ ++ /* Setup DMA descriptors */ ++ desc = dma_desc; ++ next = (dma_desc_phys_addr + (sizeof(jz_dma_desc))) >> 4; ++ ++ desc->dcmd = DMAC_DCMD_SAI | DMAC_DCMD_DAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TM | DMAC_DCMD_DES_V | DMAC_DCMD_DES_VM | DMAC_DCMD_DES_VIE | DMAC_DCMD_TIE | DMAC_DCMD_LINK; ++ desc->dsadr = dma_src_phys_addr; /* DMA source address */ ++ desc->dtadr = dma_dst_phys_addr; /* DMA target address */ ++ desc->ddadr = (next << 24) + 128; /* size: 128*32 bytes = 4096 bytes */ ++ ++ desc++; ++ next = (dma_desc_phys_addr + 2*(sizeof(jz_dma_desc))) >> 4; ++ ++ desc->dcmd = DMAC_DCMD_SAI | DMAC_DCMD_DAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_16BYTE | DMAC_DCMD_DES_V | DMAC_DCMD_DES_VM | DMAC_DCMD_DES_VIE | DMAC_DCMD_TIE | DMAC_DCMD_LINK; ++ desc->dsadr = dma_src_phys_addr + 4096; /* DMA source address */ ++ desc->dtadr = dma_dst_phys_addr + 4096; /* DMA target address */ ++ desc->ddadr = (next << 24) + 256; /* size: 256*16 bytes = 4096 bytes */ ++ ++ desc++; ++ next = (dma_desc_phys_addr + 3*(sizeof(jz_dma_desc))) >> 4; ++ ++ desc->dcmd = DMAC_DCMD_SAI | DMAC_DCMD_DAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_16BYTE | DMAC_DCMD_DES_V | DMAC_DCMD_DES_VM | DMAC_DCMD_DES_VIE | DMAC_DCMD_TIE | DMAC_DCMD_LINK; ++ desc->dsadr = dma_src_phys_addr + 8192; /* DMA source address */ ++ desc->dtadr = dma_dst_phys_addr + 8192; /* DMA target address */ ++ desc->ddadr = (next << 24) + 256; /* size: 256*16 bytes = 4096 bytes */ ++ ++ desc++; ++ next = (dma_desc_phys_addr + 4*(sizeof(jz_dma_desc))) >> 4; ++ ++ desc->dcmd = DMAC_DCMD_SAI | DMAC_DCMD_DAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DES_V | DMAC_DCMD_DES_VM | DMAC_DCMD_DES_VIE | DMAC_DCMD_TIE; ++ desc->dsadr = dma_src_phys_addr + 12*1024; /* DMA source address */ ++ desc->dtadr = dma_dst_phys_addr + 12*1024; /* DMA target address */ ++ desc->ddadr = (next << 24) + 1024; /* size: 1024*4 bytes = 4096 bytes */ ++ ++ dma_cache_wback((unsigned long)dma_desc, 4*(sizeof(jz_dma_desc))); ++ ++ /* Setup DMA descriptor address */ ++ REG_DMAC_DDA(dma_chan) = dma_desc_phys_addr; ++ ++ /* Setup request source */ ++ REG_DMAC_DRSR(dma_chan) = DMAC_DRSR_RS_AUTO; ++ ++ /* Setup DMA channel control/status register */ ++ REG_DMAC_DCCSR(dma_chan) = DMAC_DCCSR_EN; /* descriptor transfer, clear status, start channel */ ++ ++ /* Enable DMA */ ++ REG_DMAC_DMACR = DMAC_DMACR_DMAE; ++ ++ /* DMA doorbell set -- start DMA now ... */ ++ REG_DMAC_DMADBSR = 1 << dma_chan; ++ ++ printk("DMA started. IMR=%08x\n", REG_INTC_IMR); ++} ++ ++#endif ++ ++static void jz_dma_irq_demux_handler(unsigned int irq, struct irq_desc *desc) ++{ ++ int i; ++ uint32_t pending; ++ ++ pending = jz_dma_read(JZ_REG_DMA_IRQ); ++ ++ for (i = 0; i < 6; ++i) { ++ if (pending & BIT(i)) ++ generic_handle_irq(JZ_IRQ_DMA(i)); ++ } ++} ++ ++#define IRQ_TO_DMA(irq) ((irq) - JZ_IRQ_DMA(0)) ++ ++static void dma_irq_unmask(unsigned int irq) ++{ ++ unsigned long flags; ++ uint32_t mask; ++ unsigned int chan; ++ ++ chan = IRQ_TO_DMA(irq); ++ ++ spin_lock_irqsave(&jz_dma_lock, flags); ++ ++ mask = jz_dma_read(JZ_REG_DMA_CMD(chan)); ++ mask |= JZ_DMA_CMD_TRANSFER_IRQ_ENABLE; ++ jz_dma_write(JZ_REG_DMA_CMD(chan), mask); ++ ++ spin_unlock_irqrestore(&jz_dma_lock, flags); ++} ++ ++static void dma_irq_mask(unsigned int irq) ++{ ++ unsigned long flags; ++ uint32_t mask; ++ unsigned int chan; ++ ++ chan = IRQ_TO_DMA(irq); ++ ++ spin_lock_irqsave(&jz_dma_lock, flags); ++ ++ mask = jz_dma_read(JZ_REG_DMA_CMD(chan)); ++ mask &= ~JZ_DMA_CMD_TRANSFER_IRQ_ENABLE; ++ jz_dma_write(JZ_REG_DMA_CMD(chan), mask); ++ ++ spin_unlock_irqrestore(&jz_dma_lock, flags); ++} ++ ++static void dma_irq_ack(unsigned int irq) ++{ ++ unsigned long flags; ++ uint32_t pending; ++ ++ spin_lock_irqsave(&jz_dma_lock, flags); ++ ++ pending = jz_dma_read(JZ_REG_DMA_IRQ); ++ pending &= ~BIT(irq); ++ jz_dma_write(JZ_REG_DMA_IRQ, pending); ++ ++ spin_unlock_irqrestore(&jz_dma_lock, flags); ++} ++ ++static void dma_irq_end(unsigned int irq) ++{ ++ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { ++ dma_irq_unmask(irq); ++ } ++} ++ ++static struct irq_chip dma_irq_type = { ++ .name = "DMA", ++ .unmask = dma_irq_unmask, ++ .mask = dma_irq_mask, ++ .ack = dma_irq_ack, ++ .end = dma_irq_end, ++}; ++ ++static int jz_dma_init(void) ++{ ++ int i; ++ ++ jz_dma_base = ioremap(CPHYSADDR(DMAC_BASE), 0x400); ++ ++ if (!jz_dma_base) ++ return -EBUSY; ++ ++ spin_lock_init(&jz_dma_lock); ++ ++ set_irq_chained_handler(JZ_IRQ_DMAC, jz_dma_irq_demux_handler); ++ ++ for (i = 0; i < NUM_DMA; i++) { ++ dma_irq_mask(JZ_IRQ_DMA(i)); ++ set_irq_chip_and_handler(JZ_IRQ_DMA(i), &dma_irq_type, handle_level_irq); ++ } ++ ++ return 0; ++} ++arch_initcall(jz_dma_init); ++ ++//EXPORT_SYMBOL_NOVERS(jz_dma_table); ++EXPORT_SYMBOL(jz_dma_table); ++EXPORT_SYMBOL(jz_request_dma); ++EXPORT_SYMBOL(jz_free_dma); ++EXPORT_SYMBOL(jz_set_dma_src_width); ++EXPORT_SYMBOL(jz_set_dma_dest_width); ++EXPORT_SYMBOL(jz_set_dma_block_size); ++EXPORT_SYMBOL(jz_set_dma_mode); ++EXPORT_SYMBOL(set_dma_mode); ++EXPORT_SYMBOL(jz_set_oss_dma); ++EXPORT_SYMBOL(jz_set_alsa_dma); ++EXPORT_SYMBOL(set_dma_addr); ++EXPORT_SYMBOL(set_dma_count); ++EXPORT_SYMBOL(get_dma_residue); ++EXPORT_SYMBOL(enable_dma); ++EXPORT_SYMBOL(disable_dma); ++EXPORT_SYMBOL(dump_jz_dma_channel); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/gpio.c linux-2.6.31/arch/mips/jz4740/gpio.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/gpio.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/gpio.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,438 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ74xx platform GPIO support ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/spinlock.h> ++ ++#include <linux/io.h> ++#include <linux/gpio.h> ++#include <linux/delay.h> ++#include <linux/irq.h> ++#include <linux/interrupt.h> ++#include <linux/bitops.h> ++ ++#include <asm/mach-jz4740/regs.h> ++ ++#define JZ_GPIO_BASE_A (32*0) ++#define JZ_GPIO_BASE_B (32*1) ++#define JZ_GPIO_BASE_C (32*2) ++#define JZ_GPIO_BASE_D (32*3) ++ ++#define JZ_GPIO_NUM_A 32 ++#define JZ_GPIO_NUM_B 32 ++#define JZ_GPIO_NUM_C 31 ++#define JZ_GPIO_NUM_D 32 ++ ++#define JZ_IRQ_GPIO_BASE_A JZ_IRQ_GPIO(0) + JZ_GPIO_BASE_A ++#define JZ_IRQ_GPIO_BASE_B JZ_IRQ_GPIO(0) + JZ_GPIO_BASE_B ++#define JZ_IRQ_GPIO_BASE_C JZ_IRQ_GPIO(0) + JZ_GPIO_BASE_C ++#define JZ_IRQ_GPIO_BASE_D JZ_IRQ_GPIO(0) + JZ_GPIO_BASE_D ++ ++#define JZ_IRQ_GPIO_A(num) (num < JZ_GPIO_NUM_A ? JZ_IRQ_GPIO_BASE_A + num : -EINVAL) ++#define JZ_IRQ_GPIO_B(num) (num < JZ_GPIO_NUM_B ? JZ_IRQ_GPIO_BASE_B + num : -EINVAL) ++#define JZ_IRQ_GPIO_C(num) (num < JZ_GPIO_NUM_C ? JZ_IRQ_GPIO_BASE_C + num : -EINVAL) ++#define JZ_IRQ_GPIO_D(num) (num < JZ_GPIO_NUM_D ? JZ_IRQ_GPIO_BASE_D + num : -EINVAL) ++ ++ ++#define CHIP_TO_REG(chip, reg) (jz_gpio_base + (((chip)->base) << 3) + reg) ++#define CHIP_TO_PIN_REG(chip) CHIP_TO_REG(chip, 0x00) ++#define CHIP_TO_DATA_REG(chip) CHIP_TO_REG(chip, 0x10) ++#define CHIP_TO_DATA_SET_REG(chip) CHIP_TO_REG(chip, 0x14) ++#define CHIP_TO_DATA_CLEAR_REG(chip) CHIP_TO_REG(chip, 0x18) ++#define CHIP_TO_PULL_REG(chip) CHIP_TO_REG(chip, 0x30) ++#define CHIP_TO_PULL_SET_REG(chip) CHIP_TO_REG(chip, 0x34) ++#define CHIP_TO_PULL_CLEAR_REG(chip) CHIP_TO_REG(chip, 0x38) ++#define CHIP_TO_DATA_SELECT_REG(chip) CHIP_TO_REG(chip, 0x50) ++#define CHIP_TO_DATA_SELECT_SET_REG(chip) CHIP_TO_REG(chip, 0x54) ++#define CHIP_TO_DATA_SELECT_CLEAR_REG(chip) CHIP_TO_REG(chip, 0x58) ++#define CHIP_TO_DIRECION_REG(chip) CHIP_TO_REG(chip, 0x60) ++#define CHIP_TO_DIRECTION_SET_REG(chip) CHIP_TO_REG(chip, 0x64) ++#define CHIP_TO_DIRECTION_CLEAR_REG(chip) CHIP_TO_REG(chip, 0x68) ++ ++#define GPIO_TO_BIT(gpio) BIT(gpio & 0x1f) ++ ++#define GPIO_TO_REG(gpio, reg) (jz_gpio_base + ((gpio >> 5) << 8) + reg) ++#define GPIO_TO_MASK_REG(gpio) GPIO_TO_REG(gpio, 0x20) ++#define GPIO_TO_MASK_SET_REG(gpio) GPIO_TO_REG(gpio, 0x24) ++#define GPIO_TO_MASK_CLEAR_REG(gpio) GPIO_TO_REG(gpio, 0x28) ++#define GPIO_TO_PULL_REG(gpio) GPIO_TO_REG(gpio, 0x30) ++#define GPIO_TO_PULL_SET_REG(gpio) GPIO_TO_REG(gpio, 0x34) ++#define GPIO_TO_PULL_CLEAR_REG(gpio) GPIO_TO_REG(gpio, 0x38) ++#define GPIO_TO_FUNC_REG(gpio) GPIO_TO_REG(gpio, 0x40) ++#define GPIO_TO_FUNC_SET_REG(gpio) GPIO_TO_REG(gpio, 0x44) ++#define GPIO_TO_FUNC_CLEAR_REG(gpio) GPIO_TO_REG(gpio, 0x48) ++#define GPIO_TO_SEL_REG(gpio) GPIO_TO_REG(gpio, 0x50) ++#define GPIO_TO_SEL_SET_REG(gpio) GPIO_TO_REG(gpio, 0x54) ++#define GPIO_TO_SEL_CLEAR_REG(gpio) GPIO_TO_REG(gpio, 0x58) ++#define GPIO_TO_TRIGGER_REG(gpio) GPIO_TO_REG(gpio, 0x70) ++#define GPIO_TO_TRIGGER_SET_REG(gpio) GPIO_TO_REG(gpio, 0x74) ++#define GPIO_TO_TRIGGER_CLEAR_REG(gpio) GPIO_TO_REG(gpio, 0x78) ++ ++ ++ ++static void __iomem *jz_gpio_base; ++static spinlock_t jz_gpio_lock; ++ ++struct jz_gpio_chip { ++ unsigned int irq; ++ unsigned int irq_base; ++ uint32_t wakeup; ++ uint32_t saved[4]; ++ struct gpio_chip gpio_chip; ++ struct irq_chip irq_chip; ++ uint32_t edge_trigger_both; ++}; ++ ++static struct jz_gpio_chip *jz_irq_to_chip(unsigned int irq) ++{ ++ return get_irq_chip_data(irq); ++} ++ ++int jz_gpio_set_function(int gpio, enum jz_gpio_function function) ++{ ++ if (function == JZ_GPIO_FUNC_NONE) { ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_FUNC_CLEAR_REG(gpio)); ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_SEL_CLEAR_REG(gpio)); ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_TRIGGER_CLEAR_REG(gpio)); ++ } else { ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_FUNC_SET_REG(gpio)); ++ switch (function) { ++ case JZ_GPIO_FUNC1: ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_SEL_CLEAR_REG(gpio)); ++ break; ++ case JZ_GPIO_FUNC3: ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_TRIGGER_SET_REG(gpio)); ++ case JZ_GPIO_FUNC2: /* Falltrough */ ++ writew(GPIO_TO_BIT(gpio), GPIO_TO_SEL_SET_REG(gpio)); ++ break; ++ default: ++ BUG(); ++ break; ++ } ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(jz_gpio_set_function); ++ ++int jz_gpio_bulk_request(const struct jz_gpio_bulk_request *request, size_t num) ++{ ++ size_t i; ++ int ret; ++ ++ for (i = 0; i < num; ++i, ++request) { ++ ret = gpio_request(request->gpio, request->name); ++ if (ret) ++ goto err; ++ jz_gpio_set_function(request->gpio, request->function); ++ } ++ ++ return 0; ++err: ++ for (--request; i > 0; --i, --request) ++ gpio_free(request->gpio); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(jz_gpio_bulk_request); ++ ++void jz_gpio_bulk_free(const struct jz_gpio_bulk_request *request, size_t num) ++{ ++ size_t i; ++ ++ for (i = 0; i < num; ++i, ++request) { ++ gpio_free(request->gpio); ++ jz_gpio_set_function(request->gpio, JZ_GPIO_FUNC_NONE); ++ } ++ ++} ++EXPORT_SYMBOL_GPL(jz_gpio_bulk_free); ++ ++void jz_gpio_enable_pullup(unsigned gpio) ++{ ++ writel(GPIO_TO_BIT(gpio), GPIO_TO_PULL_CLEAR_REG(gpio)); ++} ++EXPORT_SYMBOL_GPL(jz_gpio_enable_pullup); ++ ++void jz_gpio_disable_pullup(unsigned gpio) ++{ ++ writel(GPIO_TO_BIT(gpio), GPIO_TO_PULL_SET_REG(gpio)); ++} ++EXPORT_SYMBOL_GPL(jz_gpio_disable_pullup); ++ ++static int jz_gpio_get_value(struct gpio_chip *chip, unsigned gpio) ++{ ++ return !!(readl(CHIP_TO_PIN_REG(chip)) & BIT(gpio)); ++} ++ ++static void jz_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value) ++{ ++ uint32_t __iomem *reg = CHIP_TO_DATA_SET_REG(chip) + ((!value) << 2); ++ writel(BIT(gpio), reg); ++} ++ ++static int jz_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value) ++{ ++ writel(BIT(gpio), CHIP_TO_DIRECTION_SET_REG(chip)); ++ jz_gpio_set_value(chip, gpio, value); ++ ++ return 0; ++} ++ ++static int jz_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) ++{ ++ writel(BIT(gpio), CHIP_TO_DIRECTION_CLEAR_REG(chip)); ++ ++ return 0; ++} ++ ++ ++#define IRQ_TO_GPIO(irq) (irq - JZ_IRQ_GPIO(0)) ++#define IRQ_TO_BIT(irq) BIT(IRQ_TO_GPIO(irq) & 0x1f) ++ ++ ++#define IRQ_TO_REG(irq, reg) GPIO_TO_REG(IRQ_TO_GPIO(irq), reg) ++#define IRQ_TO_PIN_REG(irq) IRQ_TO_REG(irq, 0x00) ++#define IRQ_TO_MASK_REG(irq) IRQ_TO_REG(irq, 0x20) ++#define IRQ_TO_MASK_SET_REG(irq) IRQ_TO_REG(irq, 0x24) ++#define IRQ_TO_MASK_CLEAR_REG(irq) IRQ_TO_REG(irq, 0x28) ++#define IRQ_TO_SELECT_REG(irq) IRQ_TO_REG(irq, 0x50) ++#define IRQ_TO_SELECT_SET_REG(irq) IRQ_TO_REG(irq, 0x54) ++#define IRQ_TO_SELECT_CLEAR_REG(irq) IRQ_TO_REG(irq, 0x58) ++#define IRQ_TO_DIRECTION_REG(irq) IRQ_TO_REG(irq, 0x60) ++#define IRQ_TO_DIRECTION_SET_REG(irq) IRQ_TO_REG(irq, 0x64) ++#define IRQ_TO_DIRECTION_CLEAR_REG(irq) IRQ_TO_REG(irq, 0x68) ++#define IRQ_TO_TRIGGER_REG(irq) IRQ_TO_REG(irq, 0x70) ++#define IRQ_TO_TRIGGER_SET_REG(irq) IRQ_TO_REG(irq, 0x74) ++#define IRQ_TO_TRIGGER_CLEAR_REG(irq) IRQ_TO_REG(irq, 0x78) ++#define IRQ_TO_FLAG_REG(irq) IRQ_TO_REG(irq, 0x80) ++#define IRQ_TO_FLAG_CLEAR_REG(irq) IRQ_TO_REG(irq, 0x14) ++ ++ ++static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) ++{ ++ uint32_t flag; ++ unsigned int gpio_irq; ++ unsigned int gpio_bank; ++ struct jz_gpio_chip *chip = get_irq_desc_data(desc); ++ ++ gpio_bank = JZ_IRQ_GPIO0 - irq; ++ ++ flag = readl(jz_gpio_base + (gpio_bank << 8) + 0x80); ++ ++ gpio_irq = ffs(flag) - 1; ++ ++ if (chip->edge_trigger_both & BIT(gpio_irq)) { ++ uint32_t value = readl(CHIP_TO_PIN_REG(&chip->gpio_chip)); ++ if (value & BIT(gpio_irq)) { ++ writel(BIT(gpio_irq), ++ CHIP_TO_DIRECTION_CLEAR_REG(&chip->gpio_chip)); ++ } else { ++ writel(BIT(gpio_irq), ++ CHIP_TO_DIRECTION_SET_REG(&chip->gpio_chip)); ++ } ++ } ++ ++ ++ gpio_irq += (gpio_bank << 5) + JZ_IRQ_GPIO(0); ++ ++ ++ generic_handle_irq(gpio_irq); ++}; ++ ++/* TODO: Check if function is gpio */ ++static unsigned int jz_gpio_irq_startup(unsigned int irq) ++{ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_SELECT_SET_REG(irq)); ++ spin_lock(&jz_gpio_lock); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_MASK_CLEAR_REG(irq)); ++ spin_unlock(&jz_gpio_lock); ++ return 0; ++} ++ ++static void jz_gpio_irq_shutdown(unsigned int irq) ++{ ++ spin_lock(&jz_gpio_lock); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_MASK_SET_REG(irq)); ++ spin_unlock(&jz_gpio_lock); ++ /* Set direction to input */ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_CLEAR_REG(irq)); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_SELECT_CLEAR_REG(irq)); ++} ++ ++static void jz_gpio_irq_mask(unsigned int irq) ++{ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_MASK_SET_REG(irq)); ++}; ++ ++static void jz_gpio_irq_unmask(unsigned int irq) ++{ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_MASK_CLEAR_REG(irq)); ++}; ++ ++static void jz_gpio_irq_ack(unsigned int irq) ++{ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_FLAG_CLEAR_REG(irq)); ++}; ++ ++static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) ++{ ++ uint32_t mask; ++ struct jz_gpio_chip *chip = jz_irq_to_chip(irq); ++ spin_lock(&jz_gpio_lock); ++ ++ mask = readl(IRQ_TO_MASK_REG(irq)); ++ ++ writel(IRQ_TO_BIT(irq), IRQ_TO_MASK_CLEAR_REG(irq)); ++ if (flow_type == IRQ_TYPE_EDGE_BOTH) { ++ uint32_t value = readl(IRQ_TO_PIN_REG(irq)); ++ if (value & IRQ_TO_BIT(irq)) ++ flow_type = IRQ_TYPE_EDGE_FALLING; ++ else ++ flow_type = IRQ_TYPE_EDGE_RISING; ++ chip->edge_trigger_both |= IRQ_TO_BIT(irq); ++ } else { ++ chip->edge_trigger_both &= ~IRQ_TO_BIT(irq); ++ } ++ ++ switch(flow_type) { ++ case IRQ_TYPE_EDGE_RISING: ++ writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_SET_REG(irq)); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq)); ++ break; ++ case IRQ_TYPE_EDGE_FALLING: ++ writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_CLEAR_REG(irq)); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq)); ++ break; ++ case IRQ_TYPE_LEVEL_HIGH: ++ writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_SET_REG(irq)); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_CLEAR_REG(irq)); ++ break; ++ case IRQ_TYPE_LEVEL_LOW: ++ writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_CLEAR_REG(irq)); ++ writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_CLEAR_REG(irq)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ writel(mask, IRQ_TO_MASK_SET_REG(irq)); ++ ++ spin_unlock(&jz_gpio_lock); ++ ++ return 0; ++} ++ ++static int jz_gpio_irq_set_wake(unsigned int irq, unsigned int on) ++{ ++ struct jz_gpio_chip *chip = jz_irq_to_chip(irq); ++ if (on) { ++ chip->wakeup |= IRQ_TO_BIT(irq); ++ } else { ++ chip->wakeup &= ~IRQ_TO_BIT(irq); ++ } ++ set_irq_wake(chip->irq, on); ++ return 0; ++} ++ ++int gpio_to_irq(unsigned gpio) ++{ ++ return JZ_IRQ_GPIO(0) + gpio; ++} ++EXPORT_SYMBOL_GPL(gpio_to_irq); ++ ++int irq_to_gpio(unsigned gpio) ++{ ++ return IRQ_TO_GPIO(gpio); ++} ++EXPORT_SYMBOL_GPL(irq_to_gpio); ++ ++#define JZ_GPIO_CHIP(_bank) { \ ++ .irq_base = JZ_IRQ_GPIO_BASE_ ## _bank, \ ++ .gpio_chip = { \ ++ .label = "Bank " # _bank, \ ++ .owner = THIS_MODULE, \ ++ .set = jz_gpio_set_value, \ ++ .get = jz_gpio_get_value, \ ++ .direction_output = jz_gpio_direction_output, \ ++ .direction_input = jz_gpio_direction_input, \ ++ .base = JZ_GPIO_BASE_ ## _bank, \ ++ .ngpio = JZ_GPIO_NUM_ ## _bank, \ ++ }, \ ++ .irq_chip = { \ ++ .name = "GPIO Bank " # _bank, \ ++ .mask = jz_gpio_irq_mask, \ ++ .unmask = jz_gpio_irq_unmask, \ ++ .ack = jz_gpio_irq_ack, \ ++ .startup = jz_gpio_irq_startup, \ ++ .shutdown = jz_gpio_irq_shutdown, \ ++ .set_type = jz_gpio_irq_set_type, \ ++ .set_wake = jz_gpio_irq_set_wake, \ ++ }, \ ++} ++ ++static struct jz_gpio_chip jz_gpio_chips[] = { ++ JZ_GPIO_CHIP(A), ++ JZ_GPIO_CHIP(B), ++ JZ_GPIO_CHIP(C), ++ JZ_GPIO_CHIP(D), ++}; ++ ++int __init jz_gpiolib_init(void) ++{ ++ struct jz_gpio_chip *chip = jz_gpio_chips; ++ int i, irq; ++ ++ jz_gpio_base = ioremap(0x10010000, 0x400); ++ ++ for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) { ++ gpiochip_add(&chip->gpio_chip); ++ chip->irq = JZ_IRQ_INTC_GPIO(i); ++ set_irq_data(chip->irq, chip); ++ set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler); ++ for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++ ++irq) { ++ set_irq_chip_and_handler(irq, &chip->irq_chip, handle_level_irq); ++ set_irq_chip_data(irq, chip); ++ } ++ } ++ ++ printk("JZ GPIO initalized\n"); ++ ++ return 0; ++} ++ ++void jz_gpiolib_suspend(void) ++{ ++ struct jz_gpio_chip *chip = jz_gpio_chips; ++ int i, gpio; ++ for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) { ++ gpio = chip->gpio_chip.base; ++ chip->saved[0] = readl(GPIO_TO_MASK_REG(gpio)); ++ writel(~(chip->wakeup), GPIO_TO_MASK_SET_REG(gpio)); ++ } ++} ++ ++/* TODO: Use sysdev */ ++void jz_gpiolib_resume(void) ++{ ++ struct jz_gpio_chip *chip = jz_gpio_chips; ++ int i, gpio; ++ for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) { ++ writel(~(chip->saved[0]), GPIO_TO_MASK_CLEAR_REG(chip->gpio_chip.base)); ++ } ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/irq.c linux-2.6.31/arch/mips/jz4740/irq.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/irq.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/irq.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,148 @@ ++/* ++ * linux/arch/mips/jz4740/irq.c ++ * ++ * JZ4740 interrupt routines. ++ * ++ * Copyright (c) 2006-2007 Ingenic Semiconductor Inc. ++ * Author: <lhhuang@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++#include <linux/errno.h> ++#include <linux/init.h> ++#include <linux/irq.h> ++#include <linux/kernel_stat.h> ++#include <linux/module.h> ++#include <linux/signal.h> ++#include <linux/sched.h> ++#include <linux/types.h> ++#include <linux/interrupt.h> ++#include <linux/ioport.h> ++#include <linux/timex.h> ++#include <linux/slab.h> ++#include <linux/random.h> ++#include <linux/delay.h> ++#include <linux/bitops.h> ++ ++#include <asm/bootinfo.h> ++#include <asm/io.h> ++#include <asm/mipsregs.h> ++#include <asm/system.h> ++#include <asm/jzsoc.h> ++#include <asm/mach-generic/irq.h> ++#include <asm/irq_cpu.h> ++ ++static void __iomem *jz_intc_base; ++static uint32_t jz_intc_wakeup; ++static uint32_t jz_intc_saved; ++ ++#define JZ_REG_BASE_INTC 0x10001000 ++ ++#define JZ_REG_INTC_STATUS 0x00 ++#define JZ_REG_INTC_MASK 0x04 ++#define JZ_REG_INTC_SET_MASK 0x08 ++#define JZ_REG_INTC_CLEAR_MASK 0x0c ++#define JZ_REG_INTC_PENDING 0x10 ++ ++#define IRQ_BIT(x) BIT((x) - JZ_IRQ_BASE) ++ ++static void intc_irq_unmask(unsigned int irq) ++{ ++ writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); ++} ++ ++static void intc_irq_mask(unsigned int irq) ++{ ++ writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK); ++} ++ ++static void intc_irq_ack(unsigned int irq) ++{ ++ writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_PENDING); ++} ++ ++static void intc_irq_end(unsigned int irq) ++{ ++ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { ++ intc_irq_unmask(irq); ++ } ++} ++ ++static int intc_irq_set_wake(unsigned int irq, unsigned int on) ++{ ++ if (on) ++ jz_intc_wakeup |= IRQ_BIT(irq); ++ else ++ jz_intc_wakeup &= ~IRQ_BIT(irq); ++ ++ return 0; ++} ++ ++static struct irq_chip intc_irq_type = { ++ .name = "INTC", ++ .mask = intc_irq_mask, ++ .unmask = intc_irq_unmask, ++ .ack = intc_irq_ack, ++ .end = intc_irq_end, ++ .set_wake = intc_irq_set_wake, ++}; ++ ++static irqreturn_t jz4740_cascade(int irq, void *data) ++{ ++ uint32_t irq_reg; ++ irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); ++ ++ if (irq_reg) { ++ generic_handle_irq(ffs(irq_reg) - 1 + JZ_IRQ_BASE); ++ return IRQ_HANDLED; ++ } ++ ++ return 0; ++} ++ ++static struct irqaction jz4740_cascade_action = { ++ .handler = jz4740_cascade, ++ .name = "JZ4740 cascade interrupt" ++}; ++ ++void __init arch_init_irq(void) ++{ ++ int i; ++ mips_cpu_irq_init(); ++ ++ jz_intc_base = ioremap(JZ_REG_BASE_INTC, 0x14); ++ ++ for (i = JZ_IRQ_BASE; i < JZ_IRQ_BASE + 32; i++) { ++ intc_irq_mask(i); ++ set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); ++ } ++ ++ setup_irq(2, &jz4740_cascade_action); ++} ++ ++asmlinkage void plat_irq_dispatch(void) ++{ ++ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; ++ if (pending & STATUSF_IP2) ++ jz4740_cascade(2, NULL); ++ else if(pending & STATUSF_IP3) ++ do_IRQ(3); ++ else ++ spurious_interrupt(); ++} ++ ++/* TODO: Use sysdev */ ++void jz4740_intc_suspend(void) ++{ ++ jz_intc_saved = readl(jz_intc_base + JZ_REG_INTC_MASK); ++ printk("intc wakeup: %d\n", jz_intc_wakeup); ++ writel(~jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_SET_MASK); ++} ++ ++void jz4740_intc_resume(void) ++{ ++ writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/platform.c linux-2.6.31/arch/mips/jz4740/platform.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/platform.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/platform.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,240 @@ ++/* ++ * Platform device support for Jz4740 SoC. ++ * ++ * Copyright 2007, <yliu@ingenic.cn> ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#include <linux/device.h> ++#include <linux/platform_device.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/resource.h> ++ ++#include <asm/mach-jz4740/platform.h> ++#include <asm/jzsoc.h> ++ ++/* OHCI (USB full speed host controller) */ ++static struct resource jz4740_usb_ohci_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(UHC_BASE), ++ .end = CPHYSADDR(UHC_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_UHC, ++ .end = JZ_IRQ_UHC, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++/* The dmamask must be set for OHCI to work */ ++static u64 ohci_dmamask = ~(u32)0; ++ ++struct platform_device jz4740_usb_ohci_device = { ++ .name = "jz-ohci", ++ .id = 0, ++ .dev = { ++ .dma_mask = &ohci_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .num_resources = ARRAY_SIZE(jz4740_usb_ohci_resources), ++ .resource = jz4740_usb_ohci_resources, ++}; ++ ++/* UDC (USB gadget controller) */ ++static struct resource jz4740_usb_gdt_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(UDC_BASE), ++ .end = CPHYSADDR(UDC_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_UDC, ++ .end = JZ_IRQ_UDC, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 jz4740_udc_dmamask = ~(u32)0; ++ ++struct platform_device jz4740_usb_gdt_device = { ++ .name = "jz-udc", ++ .id = -1, ++ .dev = { ++ .dma_mask = &jz4740_udc_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .num_resources = ARRAY_SIZE(jz4740_usb_gdt_resources), ++ .resource = jz4740_usb_gdt_resources, ++}; ++ ++/** MMC/SD controller **/ ++static struct resource jz4740_mmc_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(MSC_BASE), ++ .end = CPHYSADDR(MSC_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_MSC, ++ .end = JZ_IRQ_MSC, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static u64 jz4740_mmc_dmamask = ~(u32)0; ++ ++struct platform_device jz4740_mmc_device = { ++ .name = "jz-mmc", ++ .id = 0, ++ .dev = { ++ .dma_mask = &jz4740_mmc_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .num_resources = ARRAY_SIZE(jz4740_mmc_resources), ++ .resource = jz4740_mmc_resources, ++}; ++ ++static struct resource jz4740_rtc_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(RTC_BASE), ++ .end = CPHYSADDR(RTC_BASE) + 0x10, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_RTC, ++ .end = JZ_IRQ_RTC, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device jz4740_rtc_device = { ++ .name = "jz4740-rtc", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(jz4740_rtc_resources), ++ .resource = jz4740_rtc_resources, ++}; ++ ++/** I2C controller **/ ++static struct resource jz4740_i2c_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(I2C_BASE), ++ .end = CPHYSADDR(I2C_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_I2C, ++ .end = JZ_IRQ_I2C, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static u64 jz4740_i2c_dmamask = ~(u32)0; ++ ++struct platform_device jz4740_i2c_device = { ++ .name = "jz_i2c", ++ .id = 0, ++ .dev = { ++ .dma_mask = &jz4740_i2c_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .num_resources = ARRAY_SIZE(jz4740_i2c_resources), ++ .resource = jz4740_i2c_resources, ++}; ++ ++static struct resource jz4740_nand_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(EMC_BASE), ++ .end = CPHYSADDR(EMC_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++struct platform_device jz4740_nand_device = { ++ .name = "jz4740-nand", ++ .num_resources = ARRAY_SIZE(jz4740_nand_resources), ++ .resource = jz4740_nand_resources, ++}; ++ ++static struct resource jz4740_framebuffer_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(LCD_BASE), ++ .end = CPHYSADDR(LCD_BASE) + 0x10000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static u64 jz4740_fb_dmamask = ~(u32)0; ++ ++struct platform_device jz4740_framebuffer_device = { ++ .name = "jz4740-fb", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources), ++ .resource = jz4740_framebuffer_resources, ++ .dev = { ++ .dma_mask = &jz4740_fb_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++}; ++ ++static struct resource jz4740_i2s_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(AIC_BASE), ++ .end = CPHYSADDR(AIC_BASE) + 0x38 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++struct platform_device jz4740_i2s_device = { ++ .name = "jz4740-i2s", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(jz4740_i2s_resources), ++ .resource = jz4740_i2s_resources, ++}; ++ ++static struct resource jz4740_codec_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(AIC_BASE) + 0x80, ++ .end = CPHYSADDR(AIC_BASE) + 0x88 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++struct platform_device jz4740_codec_device = { ++ .name = "jz4740-codec", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(jz4740_codec_resources), ++ .resource = jz4740_codec_resources, ++}; ++ ++static struct resource jz4740_adc_resources[] = { ++ [0] = { ++ .start = CPHYSADDR(SADC_BASE), ++ .end = CPHYSADDR(SADC_BASE) + 0x30, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = JZ_IRQ_SADC, ++ .end = JZ_IRQ_SADC, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device jz4740_adc_device = { ++ .name = "jz4740-adc", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(jz4740_adc_resources), ++ .resource = jz4740_adc_resources, ++}; ++ ++struct platform_device jz4740_battery_device = { ++ .name = "jz4740-battery", ++ .id = -1, ++ .dev = { ++ .parent = &jz4740_adc_device.dev ++ }, ++}; +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/pm.c linux-2.6.31/arch/mips/jz4740/pm.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/pm.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/pm.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,97 @@ ++/* ++ * linux/arch/mips/jz4740/common/pm.c ++ * ++ * JZ4740 Power Management Routines ++ * ++ * Copyright (C) 2006 Ingenic Semiconductor Inc. ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. ++ * ++ */ ++ ++#include <linux/init.h> ++#include <linux/pm.h> ++#include <linux/sysctl.h> ++#include <linux/suspend.h> ++#include <asm/jzsoc.h> ++ ++extern void jz4740_intc_suspend(void); ++extern void jz4740_intc_resume(void); ++extern void jz_gpiolib_suspend(void); ++extern void jz_gpiolib_resume(void); ++ ++static int jz_pm_enter(suspend_state_t state) ++{ ++ unsigned long delta; ++ unsigned long nfcsr = REG_EMC_NFCSR; ++ uint32_t scr = REG_CPM_SCR; ++ uint32_t sleep_gpio_save[7*3]; ++ ++ /* Preserve current time */ ++ delta = xtime.tv_sec - REG_RTC_RSR; ++ ++ /* Disable nand flash */ ++ REG_EMC_NFCSR = ~0xff; ++ ++ udelay(100); ++ ++ /*stop udc and usb*/ ++ REG_CPM_SCR &= ~( 1<<6 | 1<<7); ++ REG_CPM_SCR |= 0<<6 | 1<<7; ++ ++ jz_gpiolib_suspend(); ++ jz4740_intc_suspend(); ++ ++ /* Enter SLEEP mode */ ++ REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; ++ REG_CPM_LCR |= CPM_LCR_LPM_SLEEP; ++ __asm__(".set\tmips3\n\t" ++ "wait\n\t" ++ ".set\tmips0"); ++ ++ /* Restore to IDLE mode */ ++ REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; ++ REG_CPM_LCR |= CPM_LCR_LPM_IDLE; ++ ++ /* Restore nand flash control register */ ++ REG_EMC_NFCSR = nfcsr; ++ ++ jz4740_intc_resume(); ++ jz_gpiolib_resume(); ++ ++ /* Restore sleep control register */ ++ REG_CPM_SCR = scr; ++ ++ /* Restore current time */ ++ xtime.tv_sec = REG_RTC_RSR + delta; ++ ++ return 0; ++} ++ ++static struct platform_suspend_ops jz_pm_ops = { ++ .valid = suspend_valid_only_mem, ++ .enter = jz_pm_enter, ++}; ++ ++/* ++ * Initialize power interface ++ */ ++int __init jz_pm_init(void) ++{ ++ suspend_set_ops(&jz_pm_ops); ++ return 0; ++ ++} ++late_initcall(jz_pm_init); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/proc.c linux-2.6.31/arch/mips/jz4740/proc.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/proc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/proc.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,308 @@ ++/* ++ * linux/arch/mips/jz4740/proc.c ++ * ++ * /proc/jz/ procfs for jz4740 on-chip modules. ++ * ++ * Copyright (C) 2006 Ingenic Semiconductor Inc. ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. ++ * ++ */ ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/irq.h> ++#include <linux/sysctl.h> ++#include <linux/proc_fs.h> ++#include <linux/page-flags.h> ++#include <asm/uaccess.h> ++#include <asm/pgtable.h> ++#include <asm/jzsoc.h> ++ ++//#define DEBUG 1 ++#undef DEBUG ++ ++ ++struct proc_dir_entry *proc_jz_root; ++ ++ ++/* ++ * EMC Modules ++ */ ++static int emc_read_proc (char *page, char **start, off_t off, ++ int count, int *eof, void *data) ++{ ++ int len = 0; ++ ++ len += sprintf (page+len, "SMCR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SMCR0, REG_EMC_SMCR1, REG_EMC_SMCR2, REG_EMC_SMCR3, REG_EMC_SMCR4); ++ len += sprintf (page+len, "SACR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SACR0, REG_EMC_SACR1, REG_EMC_SACR2, REG_EMC_SACR3, REG_EMC_SACR4); ++ len += sprintf (page+len, "DMCR: 0x%08x\n", REG_EMC_DMCR); ++ len += sprintf (page+len, "RTCSR: 0x%04x\n", REG_EMC_RTCSR); ++ len += sprintf (page+len, "RTCOR: 0x%04x\n", REG_EMC_RTCOR); ++ return len; ++} ++ ++/* ++ * Power Manager Module ++ */ ++static int pmc_read_proc (char *page, char **start, off_t off, ++ int count, int *eof, void *data) ++{ ++ int len = 0; ++ unsigned long lcr = REG_CPM_LCR; ++ unsigned long clkgr = REG_CPM_CLKGR; ++ ++ len += sprintf (page+len, "Low Power Mode : %s\n", ++ ((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_IDLE)) ? ++ "IDLE" : (((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_SLEEP)) ? ++ "SLEEP" : "HIBERNATE")); ++ len += sprintf (page+len, "Doze Mode : %s\n", ++ (lcr & CPM_LCR_DOZE_ON) ? "on" : "off"); ++ if (lcr & CPM_LCR_DOZE_ON) ++ len += sprintf (page+len, " duty : %d\n", (int)((lcr & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT)); ++ len += sprintf (page+len, "IPU : %s\n", ++ (clkgr & CPM_CLKGR_IPU) ? "stopped" : "running"); ++ len += sprintf (page+len, "DMAC : %s\n", ++ (clkgr & CPM_CLKGR_DMAC) ? "stopped" : "running"); ++ len += sprintf (page+len, "UHC : %s\n", ++ (clkgr & CPM_CLKGR_UHC) ? "stopped" : "running"); ++ len += sprintf (page+len, "UDC : %s\n", ++ (clkgr & CPM_CLKGR_UDC) ? "stopped" : "running"); ++ len += sprintf (page+len, "LCD : %s\n", ++ (clkgr & CPM_CLKGR_LCD) ? "stopped" : "running"); ++ len += sprintf (page+len, "CIM : %s\n", ++ (clkgr & CPM_CLKGR_CIM) ? "stopped" : "running"); ++ len += sprintf (page+len, "SADC : %s\n", ++ (clkgr & CPM_CLKGR_SADC) ? "stopped" : "running"); ++ len += sprintf (page+len, "MSC : %s\n", ++ (clkgr & CPM_CLKGR_MSC) ? "stopped" : "running"); ++ len += sprintf (page+len, "AIC1 : %s\n", ++ (clkgr & CPM_CLKGR_AIC1) ? "stopped" : "running"); ++ len += sprintf (page+len, "AIC2 : %s\n", ++ (clkgr & CPM_CLKGR_AIC2) ? "stopped" : "running"); ++ len += sprintf (page+len, "SSI : %s\n", ++ (clkgr & CPM_CLKGR_SSI) ? "stopped" : "running"); ++ len += sprintf (page+len, "I2C : %s\n", ++ (clkgr & CPM_CLKGR_I2C) ? "stopped" : "running"); ++ len += sprintf (page+len, "RTC : %s\n", ++ (clkgr & CPM_CLKGR_RTC) ? "stopped" : "running"); ++ len += sprintf (page+len, "TCU : %s\n", ++ (clkgr & CPM_CLKGR_TCU) ? "stopped" : "running"); ++ len += sprintf (page+len, "UART1 : %s\n", ++ (clkgr & CPM_CLKGR_UART1) ? "stopped" : "running"); ++ len += sprintf (page+len, "UART0 : %s\n", ++ (clkgr & CPM_CLKGR_UART0) ? "stopped" : "running"); ++ return len; ++} ++ ++static int pmc_write_proc(struct file *file, const char *buffer, unsigned long count, void *data) ++{ ++ REG_CPM_CLKGR = simple_strtoul(buffer, 0, 16); ++ return count; ++} ++ ++/* ++ * Clock Generation Module ++ */ ++#define TO_MHZ(x) (x/1000000),(x%1000000)/10000 ++#define TO_KHZ(x) (x/1000),(x%1000)/10 ++ ++static int cgm_read_proc (char *page, char **start, off_t off, ++ int count, int *eof, void *data) ++{ ++ int len = 0; ++ unsigned int cppcr = REG_CPM_CPPCR; /* PLL Control Register */ ++ unsigned int cpccr = REG_CPM_CPCCR; /* Clock Control Register */ ++ unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; ++ unsigned int od[4] = {1, 2, 2, 4}; ++ ++ len += sprintf (page+len, "CPPCR : 0x%08x\n", cppcr); ++ len += sprintf (page+len, "CPCCR : 0x%08x\n", cpccr); ++ len += sprintf (page+len, "PLL : %s\n", ++ (cppcr & CPM_CPPCR_PLLEN) ? "ON" : "OFF"); ++ len += sprintf (page+len, "m:n:o : %d:%d:%d\n", ++ __cpm_get_pllm() + 2, ++ __cpm_get_plln() + 2, ++ od[__cpm_get_pllod()] ++ ); ++ len += sprintf (page+len, "C:H:M:P : %d:%d:%d:%d\n", ++ div[__cpm_get_cdiv()], ++ div[__cpm_get_hdiv()], ++ div[__cpm_get_mdiv()], ++ div[__cpm_get_pdiv()] ++ ); ++ len += sprintf (page+len, "PLL Freq : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pllout())); ++ len += sprintf (page+len, "CCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_cclk())); ++ len += sprintf (page+len, "HCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_hclk())); ++ len += sprintf (page+len, "MCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mclk())); ++ len += sprintf (page+len, "PCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pclk())); ++ len += sprintf (page+len, "LCDCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_lcdclk())); ++ len += sprintf (page+len, "PIXCLK : %3d.%02d KHz\n", TO_KHZ(__cpm_get_pixclk())); ++ len += sprintf (page+len, "I2SCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_i2sclk())); ++ len += sprintf (page+len, "USBCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_usbclk())); ++ len += sprintf (page+len, "MSCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mscclk())); ++ len += sprintf (page+len, "EXTALCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_extalclk())); ++ len += sprintf (page+len, "RTCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_rtcclk())); ++ ++ return len; ++} ++ ++static int cgm_write_proc(struct file *file, const char *buffer, unsigned long count, void *data) ++{ ++ REG_CPM_CPCCR = simple_strtoul(buffer, 0, 16); ++ return count; ++} ++ ++ ++extern void local_flush_tlb_all(void); ++ ++/* CP0 hazard avoidance. */ ++#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \ ++ "nop; nop; nop; nop; nop; nop;\n\t" \ ++ ".set reorder\n\t") ++void show_tlb(void) ++{ ++#define ASID_MASK 0xFF ++ ++ unsigned long flags; ++ unsigned int old_ctx; ++ unsigned int entry; ++ unsigned int entrylo0, entrylo1, entryhi; ++ unsigned int pagemask; ++ ++ local_irq_save(flags); ++ ++ /* Save old context */ ++ old_ctx = (read_c0_entryhi() & 0xff); ++ ++ printk("TLB content:\n"); ++ entry = 0; ++ while(entry < 32) { ++ write_c0_index(entry); ++ BARRIER; ++ tlb_read(); ++ BARRIER; ++ entryhi = read_c0_entryhi(); ++ entrylo0 = read_c0_entrylo0(); ++ entrylo1 = read_c0_entrylo1(); ++ pagemask = read_c0_pagemask(); ++ printk("%02d: ASID=%02d%s VA=0x%08x ", entry, entryhi & ASID_MASK, (entrylo0 & entrylo1 & 1) ? "(G)" : " ", entryhi & ~ASID_MASK); ++ printk("PA0=0x%08x C0=%x %s%s%s\n", (entrylo0>>6)<<12, (entrylo0>>3) & 7, (entrylo0 & 4) ? "Dirty " : "", (entrylo0 & 2) ? "Valid " : "Invalid ", (entrylo0 & 1) ? "Global" : ""); ++ printk("\t\t\t PA1=0x%08x C1=%x %s%s%s\n", (entrylo1>>6)<<12, (entrylo1>>3) & 7, (entrylo1 & 4) ? "Dirty " : "", (entrylo1 & 2) ? "Valid " : "Invalid ", (entrylo1 & 1) ? "Global" : ""); ++ ++ printk("\t\tpagemask=0x%08x", pagemask); ++ printk("\tentryhi=0x%08x\n", entryhi); ++ printk("\t\tentrylo0=0x%08x", entrylo0); ++ printk("\tentrylo1=0x%08x\n", entrylo1); ++ ++ entry++; ++ } ++ BARRIER; ++ write_c0_entryhi(old_ctx); ++ ++ local_irq_restore(flags); ++} ++ ++/* ++ * UDC hotplug ++ */ ++#ifdef CONFIG_JZ_UDC_HOTPLUG ++extern int jz_udc_active; /* defined in drivers/char/jzchar/jz_udc_hotplug.c */ ++#endif ++ ++#ifndef GPIO_UDC_HOTPLUG ++#define GPIO_UDC_HOTPLUG 86 ++#endif ++ ++static int udc_read_proc(char *page, char **start, off_t off, ++ int count, int *eof, void *data) ++{ ++ int len = 0; ++ ++ if (__gpio_get_pin(GPIO_UDC_HOTPLUG)) { ++ ++#ifdef CONFIG_JZ_UDC_HOTPLUG ++ ++ /* Cable has connected, wait for disconnection. */ ++ __gpio_as_irq_fall_edge(GPIO_UDC_HOTPLUG); ++ ++ if (jz_udc_active) ++ len += sprintf (page+len, "CONNECT_CABLE\n"); ++ else ++ len += sprintf (page+len, "CONNECT_POWER\n"); ++#else ++ len += sprintf (page+len, "CONNECT\n"); ++#endif ++ } ++ else { ++ ++#ifdef CONFIG_JZ_UDC_HOTPLUG ++ /* Cable has disconnected, wait for connection. */ ++ __gpio_as_irq_rise_edge(GPIO_UDC_HOTPLUG); ++#endif ++ ++ len += sprintf (page+len, "REMOVE\n"); ++ } ++ ++ return len; ++} ++ ++/* ++ * /proc/jz/xxx entry ++ * ++ */ ++static int __init jz_proc_init(void) ++{ ++ struct proc_dir_entry *res; ++ unsigned int virt_addr, i; ++ ++ proc_jz_root = proc_mkdir("jz", 0); ++ ++ /* External Memory Controller */ ++ res = create_proc_entry("emc", 0644, proc_jz_root); ++ if (res) { ++ res->read_proc = emc_read_proc; ++ res->write_proc = NULL; ++ res->data = NULL; ++ } ++ ++ /* Power Management Controller */ ++ res = create_proc_entry("pmc", 0644, proc_jz_root); ++ if (res) { ++ res->read_proc = pmc_read_proc; ++ res->write_proc = pmc_write_proc; ++ res->data = NULL; ++ } ++ ++ /* Clock Generation Module */ ++ res = create_proc_entry("cgm", 0644, proc_jz_root); ++ if (res) { ++ res->read_proc = cgm_read_proc; ++ res->write_proc = cgm_write_proc; ++ res->data = NULL; ++ } ++ ++ /* udc hotplug */ ++ res = create_proc_entry("udc", 0644, proc_jz_root); ++ if (res) { ++ res->read_proc = udc_read_proc; ++ res->write_proc = NULL; ++ res->data = NULL; ++ } ++ ++ return 0; ++} ++ ++__initcall(jz_proc_init); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/prom.c linux-2.6.31/arch/mips/jz4740/prom.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/prom.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/prom.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,198 @@ ++/* ++ * ++ * BRIEF MODULE DESCRIPTION ++ * PROM library initialisation code, supports YAMON and U-Boot. ++ * ++ * Copyright 2000, 2001, 2006 MontaVista Software Inc. ++ * Author: MontaVista Software, Inc. ++ * ppopov@mvista.com or source@mvista.com ++ * ++ * This file was derived from Carsten Langgaard's ++ * arch/mips/mips-boards/xx files. ++ * ++ * Carsten Langgaard, carstenl@mips.com ++ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED ++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN ++ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF ++ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ++ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/string.h> ++ ++#include <asm/bootinfo.h> ++#include <asm/jzsoc.h> ++ ++/* #define DEBUG_CMDLINE */ ++ ++int prom_argc; ++char **prom_argv, **prom_envp; ++ ++char * prom_getcmdline(void) ++{ ++ return &(arcs_cmdline[0]); ++} ++ ++void prom_init_cmdline(void) ++{ ++ char *cp; ++ int actr; ++ ++ actr = 1; /* Always ignore argv[0] */ ++ ++ cp = &(arcs_cmdline[0]); ++ while(actr < prom_argc) { ++ strcpy(cp, prom_argv[actr]); ++ cp += strlen(prom_argv[actr]); ++ *cp++ = ' '; ++ actr++; ++ } ++ if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ ++ --cp; ++ if (prom_argc > 1) ++ *cp = '\0'; ++ ++} ++ ++ ++char *prom_getenv(char *envname) ++{ ++#if 0 ++ /* ++ * Return a pointer to the given environment variable. ++ * YAMON uses "name", "value" pairs, while U-Boot uses "name=value". ++ */ ++ ++ char **env = prom_envp; ++ int i = strlen(envname); ++ int yamon = (*env && strchr(*env, '=') == NULL); ++ ++ while (*env) { ++ if (yamon) { ++ if (strcmp(envname, *env++) == 0) ++ return *env; ++ } else { ++ if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=') ++ return *env + i + 1; ++ } ++ env++; ++ } ++#endif ++ return NULL; ++} ++ ++inline unsigned char str2hexnum(unsigned char c) ++{ ++ if(c >= '0' && c <= '9') ++ return c - '0'; ++ if(c >= 'a' && c <= 'f') ++ return c - 'a' + 10; ++ if(c >= 'A' && c <= 'F') ++ return c - 'A' + 10; ++ return 0; /* foo */ ++} ++ ++inline void str2eaddr(unsigned char *ea, unsigned char *str) ++{ ++ int i; ++ ++ for(i = 0; i < 6; i++) { ++ unsigned char num; ++ ++ if((*str == '.') || (*str == ':')) ++ str++; ++ num = str2hexnum(*str++) << 4; ++ num |= (str2hexnum(*str++)); ++ ea[i] = num; ++ } ++} ++ ++int get_ethernet_addr(char *ethernet_addr) ++{ ++ char *ethaddr_str; ++ ++ ethaddr_str = prom_getenv("ethaddr"); ++ if (!ethaddr_str) { ++ printk("ethaddr not set in boot prom\n"); ++ return -1; ++ } ++ str2eaddr(ethernet_addr, ethaddr_str); ++ ++#if 0 ++ { ++ int i; ++ ++ printk("get_ethernet_addr: "); ++ for (i=0; i<5; i++) ++ printk("%02x:", (unsigned char)*(ethernet_addr+i)); ++ printk("%02x\n", *(ethernet_addr+i)); ++ } ++#endif ++ ++ return 0; ++} ++ ++void __init prom_free_prom_memory(void) ++{ ++} ++ ++void __init prom_init(void) ++{ ++ unsigned char *memsize_str; ++ unsigned long memsize; ++ ++ prom_argc = (int) fw_arg0; ++ prom_argv = (char **) fw_arg1; ++ prom_envp = (char **) fw_arg2; ++ ++ mips_machtype = MACH_INGENIC_JZ4740; ++ ++ prom_init_cmdline(); ++ memsize_str = prom_getenv("memsize"); ++ if (!memsize_str) { ++ memsize = 0x04000000; ++ } else { ++ memsize = simple_strtol(memsize_str, NULL, 0); ++ } ++ add_memory_region(0, memsize, BOOT_MEM_RAM); ++} ++ ++/* used by early printk */ ++void prom_putchar(char c) ++{ ++ volatile u8 *uart_lsr = (volatile u8 *)(UART0_BASE + OFF_LSR); ++ volatile u8 *uart_tdr = (volatile u8 *)(UART0_BASE + OFF_TDR); ++ ++ /* Wait for fifo to shift out some bytes */ ++ while ( !((*uart_lsr & (UARTLSR_TDRQ | UARTLSR_TEMT)) == 0x60) ); ++ ++ *uart_tdr = (u8)c; ++} ++ ++const char *get_system_type(void) ++{ ++ return "JZ4740"; ++} ++ ++EXPORT_SYMBOL(prom_getcmdline); ++EXPORT_SYMBOL(get_ethernet_addr); ++EXPORT_SYMBOL(str2eaddr); +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/reset.c linux-2.6.31/arch/mips/jz4740/reset.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/reset.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/reset.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,48 @@ ++/* ++ * linux/arch/mips/jz4740/reset.c ++ * ++ * JZ4740 reset routines. ++ * ++ * Copyright (c) 2006-2007 Ingenic Semiconductor Inc. ++ * Author: <yliu@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/sched.h> ++#include <linux/mm.h> ++#include <asm/io.h> ++#include <asm/pgtable.h> ++#include <asm/processor.h> ++#include <asm/reboot.h> ++#include <asm/system.h> ++#include <asm/jzsoc.h> ++ ++void jz_restart(char *command) ++{ ++ printk(KERN_NOTICE "Restarting after 4 ms\n"); ++ REG_WDT_TCSR = WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN; ++ REG_WDT_TCNT = 0; ++ REG_WDT_TDR = JZ_EXTAL/1000; /* reset after 4ms */ ++ REG_TCU_TSCR = TCU_TSSR_WDTSC; /* enable wdt clock */ ++ REG_WDT_TCER = WDT_TCER_TCEN; /* wdt start */ ++ while (1); ++} ++ ++void jz_halt(void) ++{ ++ /* Put CPU to power down mode */ ++ while (!(REG_RTC_RCR & RTC_RCR_WRDY)); ++ REG_RTC_HCR = RTC_HCR_PD; ++ ++ while (1) ++ __asm__(".set\tmips3\n\t" ++ "wait\n\t" ++ ".set\tmips0"); ++} ++ ++void jz_power_off(void) ++{ ++ jz_halt(); ++} +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/setup.c linux-2.6.31/arch/mips/jz4740/setup.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/setup.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/setup.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,180 @@ ++/* ++ * linux/arch/mips/jz4740/common/setup.c ++ * ++ * JZ4740 common setup routines. ++ * ++ * Copyright (C) 2006 Ingenic Semiconductor Inc. ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. ++ * ++ */ ++#include <linux/init.h> ++#include <linux/string.h> ++#include <linux/kernel.h> ++#include <linux/io.h> ++#include <linux/irq.h> ++#include <linux/ioport.h> ++#include <linux/tty.h> ++#include <linux/serial.h> ++#include <linux/serial_core.h> ++#include <linux/serial_8250.h> ++ ++#include <asm/cpu.h> ++#include <asm/bootinfo.h> ++#include <asm/irq.h> ++#include <asm/mipsregs.h> ++#include <asm/reboot.h> ++#include <asm/pgtable.h> ++#include <asm/time.h> ++#include <asm/jzsoc.h> ++ ++#ifdef CONFIG_PM ++#include <asm/suspend.h> ++#endif ++ ++#ifdef CONFIG_PC_KEYB ++#include <asm/keyboard.h> ++#endif ++ ++jz_clocks_t jz_clocks; ++ ++extern char * __init prom_getcmdline(void); ++extern void __init jz_board_setup(void); ++extern void jz_restart(char *); ++extern void jz_halt(void); ++extern void jz_power_off(void); ++extern void jz_time_init(void); ++ ++static void __init sysclocks_setup(void) ++{ ++#ifndef CONFIG_MIPS_JZ_EMURUS /* FPGA */ ++ jz_clocks.cclk = __cpm_get_cclk(); ++ jz_clocks.hclk = __cpm_get_hclk(); ++ jz_clocks.pclk = __cpm_get_pclk(); ++ jz_clocks.mclk = __cpm_get_mclk(); ++ jz_clocks.lcdclk = __cpm_get_lcdclk(); ++ jz_clocks.pixclk = __cpm_get_pixclk(); ++ jz_clocks.i2sclk = __cpm_get_i2sclk(); ++ jz_clocks.usbclk = __cpm_get_usbclk(); ++ jz_clocks.mscclk = __cpm_get_mscclk(); ++ jz_clocks.extalclk = __cpm_get_extalclk(); ++ jz_clocks.rtcclk = __cpm_get_rtcclk(); ++#else ++ ++#define FPGACLK 8000000 ++ ++ jz_clocks.cclk = FPGACLK; ++ jz_clocks.hclk = FPGACLK; ++ jz_clocks.pclk = FPGACLK; ++ jz_clocks.mclk = FPGACLK; ++ jz_clocks.lcdclk = FPGACLK; ++ jz_clocks.pixclk = FPGACLK; ++ jz_clocks.i2sclk = FPGACLK; ++ jz_clocks.usbclk = FPGACLK; ++ jz_clocks.mscclk = FPGACLK; ++ jz_clocks.extalclk = FPGACLK; ++ jz_clocks.rtcclk = FPGACLK; ++#endif ++ ++ printk("CPU clock: %dMHz, System clock: %dMHz, Peripheral clock: %dMHz, Memory clock: %dMHz\n", ++ (jz_clocks.cclk + 500000) / 1000000, ++ (jz_clocks.hclk + 500000) / 1000000, ++ (jz_clocks.pclk + 500000) / 1000000, ++ (jz_clocks.mclk + 500000) / 1000000); ++} ++ ++static void __init soc_cpm_setup(void) ++{ ++ /* Enable CKO to external memory */ ++ __cpm_enable_cko(); ++ ++ /* CPU enters IDLE mode when executing 'wait' instruction */ ++ __cpm_idle_mode(); ++ ++ /* Setup system clocks */ ++ sysclocks_setup(); ++} ++ ++static void __init soc_harb_setup(void) ++{ ++// __harb_set_priority(0x00); /* CIM>LCD>DMA>ETH>PCI>USB>CBB */ ++// __harb_set_priority(0x03); /* LCD>CIM>DMA>ETH>PCI>USB>CBB */ ++// __harb_set_priority(0x0a); /* ETH>LCD>CIM>DMA>PCI>USB>CBB */ ++} ++ ++static void __init soc_emc_setup(void) ++{ ++} ++ ++static void __init soc_dmac_setup(void) ++{ ++ __dmac_enable_module(); ++} ++ ++static void __init jz_soc_setup(void) ++{ ++ soc_cpm_setup(); ++ soc_harb_setup(); ++ soc_emc_setup(); ++ soc_dmac_setup(); ++} ++ ++static void __init jz_serial_setup(void) ++{ ++#ifdef CONFIG_SERIAL_8250 ++ struct uart_port s; ++ REG8(UART0_FCR) |= UARTFCR_UUE; /* enable UART module */ ++ memset(&s, 0, sizeof(s)); ++ s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; ++ s.iotype = SERIAL_IO_MEM; ++ s.regshift = 2; ++ s.uartclk = jz_clocks.extalclk ; ++ ++ s.line = 0; ++ s.membase = (u8 *)UART0_BASE; ++ s.irq = JZ_IRQ_UART0; ++ if (early_serial_setup(&s) != 0) { ++ printk(KERN_ERR "Serial ttyS0 setup failed!\n"); ++ } ++ ++ s.line = 1; ++ s.membase = (u8 *)UART1_BASE; ++ s.irq = JZ_IRQ_UART1; ++ if (early_serial_setup(&s) != 0) { ++ printk(KERN_ERR "Serial ttyS1 setup failed!\n"); ++ } ++#endif ++} ++ ++void __init plat_mem_setup(void) ++{ ++ char *argptr; ++ ++ argptr = prom_getcmdline(); ++ ++ /* IO/MEM resources. Which will be the addtion value in `inX' and ++ * `outX' macros defined in asm/io.h */ ++ set_io_port_base(0); ++ ioport_resource.start = 0x00000000; ++ ioport_resource.end = 0xffffffff; ++ iomem_resource.start = 0x00000000; ++ iomem_resource.end = 0xffffffff; ++ ++ _machine_restart = jz_restart; ++ _machine_halt = jz_halt; ++ pm_power_off = jz_power_off; ++ jz_soc_setup(); ++ jz_serial_setup(); ++} ++ +diff -ruN linux-2.6.31-vanilla/arch/mips/jz4740/time.c linux-2.6.31/arch/mips/jz4740/time.c +--- linux-2.6.31-vanilla/arch/mips/jz4740/time.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/arch/mips/jz4740/time.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,159 @@ ++/* ++ * linux/arch/mips/jz4740/time.c ++ * ++ * Setting up the clock on the JZ4740 boards. ++ * ++ * Copyright (C) 2008 Ingenic Semiconductor Inc. ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can distribute it and/or modify it ++ * under the terms of the GNU General Public License (Version 2) as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++ * for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. ++ * ++ */ ++#include <linux/types.h> ++#include <linux/interrupt.h> ++#include <linux/time.h> ++#include <linux/clockchips.h> ++ ++#include <asm/time.h> ++#include <asm/jzsoc.h> ++ ++/* This is for machines which generate the exact clock. */ ++ ++#define JZ_TIMER_CHAN 0 ++#define JZ_TIMER_IRQ JZ_IRQ_TCU0 ++ ++#define JZ_TIMER_CLOCK (JZ_EXTAL>>4) /* Jz timer clock frequency */ ++ ++static struct clocksource clocksource_jz; /* Jz clock source */ ++static struct clock_event_device jz_clockevent_device; /* Jz clock event */ ++ ++void (*jz_timer_callback)(void); ++ ++static irqreturn_t jz_timer_interrupt(int irq, void *dev_id) ++{ ++ struct clock_event_device *cd = dev_id; ++ ++ REG_TCU_TFCR = 1 << JZ_TIMER_CHAN; /* ACK timer */ ++ ++ if (jz_timer_callback) ++ jz_timer_callback(); ++ ++ cd->event_handler(cd); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction jz_irqaction = { ++ .handler = jz_timer_interrupt, ++ .flags = IRQF_DISABLED | IRQF_PERCPU | IRQF_TIMER, ++ .name = "jz-timerirq", ++}; ++ ++ ++cycle_t jz_get_cycles(void) ++{ ++ /* convert jiffes to jz timer cycles */ ++ return (cycle_t)( jiffies*((JZ_TIMER_CLOCK)/HZ) + REG_TCU_TCNT(JZ_TIMER_CHAN)); ++} ++ ++static struct clocksource clocksource_jz = { ++ .name = "jz_clocksource", ++ .rating = 300, ++ .read = jz_get_cycles, ++ .mask = 0xFFFF, ++ .shift = 10, ++ .flags = CLOCK_SOURCE_WATCHDOG, ++}; ++ ++static int __init jz_clocksource_init(void) ++{ ++ clocksource_jz.mult = clocksource_hz2mult(JZ_TIMER_CLOCK, clocksource_jz.shift); ++ clocksource_register(&clocksource_jz); ++ return 0; ++} ++ ++static int jz_set_next_event(unsigned long evt, ++ struct clock_event_device *unused) ++{ ++ return 0; ++} ++ ++static void jz_set_mode(enum clock_event_mode mode, ++ struct clock_event_device *evt) ++{ ++ switch (mode) { ++ case CLOCK_EVT_MODE_PERIODIC: ++ break; ++ case CLOCK_EVT_MODE_ONESHOT: ++ case CLOCK_EVT_MODE_UNUSED: ++ case CLOCK_EVT_MODE_SHUTDOWN: ++ break; ++ case CLOCK_EVT_MODE_RESUME: ++ break; ++ } ++} ++ ++static struct clock_event_device jz_clockevent_device = { ++ .name = "jz-clockenvent", ++ .features = CLOCK_EVT_FEAT_PERIODIC, ++// .features = CLOCK_EVT_FEAT_ONESHOT, /* Jz4740 not support dynamic clock now */ ++ ++ /* .mult, .shift, .max_delta_ns and .min_delta_ns left uninitialized */ ++ .mult = 1, ++ .rating = 300, ++ .irq = JZ_TIMER_IRQ, ++ .set_mode = jz_set_mode, ++ .set_next_event = jz_set_next_event, ++}; ++ ++static void __init jz_clockevent_init(void) ++{ ++ struct clock_event_device *cd = &jz_clockevent_device; ++ unsigned int cpu = smp_processor_id(); ++ ++ cd->cpumask = cpumask_of(cpu); ++ clockevents_register_device(cd); ++} ++ ++static void __init jz_timer_setup(void) ++{ ++ jz_clocksource_init(); /* init jz clock source */ ++ jz_clockevent_init(); /* init jz clock event */ ++ ++ /* ++ * Make irqs happen for the system timer ++ */ ++ jz_irqaction.dev_id = &jz_clockevent_device; ++ setup_irq(JZ_TIMER_IRQ, &jz_irqaction); ++} ++ ++ ++void __init plat_time_init(void) ++{ ++ unsigned int latch; ++ /* Init timer */ ++ latch = ( JZ_TIMER_CLOCK + (HZ>>1)) / HZ; ++ ++ REG_TCU_TCSR(JZ_TIMER_CHAN) = TCU_TCSR_PRESCALE16 | TCU_TCSR_EXT_EN; ++ REG_TCU_TCNT(JZ_TIMER_CHAN) = 0; ++ REG_TCU_TDHR(JZ_TIMER_CHAN) = 0; ++ REG_TCU_TDFR(JZ_TIMER_CHAN) = latch; ++ ++ REG_TCU_TMSR = (1 << (JZ_TIMER_CHAN + 16)); /* mask half irq */ ++ REG_TCU_TMCR = (1 << JZ_TIMER_CHAN); /* unmask full irq */ ++ REG_TCU_TSCR = (1 << JZ_TIMER_CHAN); /* enable timer clock */ ++ REG_TCU_TESR = (1 << JZ_TIMER_CHAN); /* start counting up */ ++ ++ jz_timer_setup(); ++} +diff -ruN linux-2.6.31-vanilla/drivers/char/defkeymap.c linux-2.6.31/drivers/char/defkeymap.c +--- linux-2.6.31-vanilla/drivers/char/defkeymap.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/char/defkeymap.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,438 @@ ++/* Do not edit this file! It was automatically generated by */ ++/* loadkeys --mktable defkeymap.map > defkeymap.c */ ++ ++#include <linux/types.h> ++#include <linux/keyboard.h> ++#include <linux/kd.h> ++ ++u_short plain_map[NR_KEYS] = { ++ 0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036, ++ 0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf07f, 0xf009, ++ 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69, ++ 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf702, 0xfb61, 0xfb73, ++ 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf03b, ++ 0xf027, 0xf060, 0xf700, 0xf05c, 0xfb7a, 0xfb78, 0xfb63, 0xfb76, ++ 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf701, 0xf30c, ++ 0xf703, 0xf020, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104, ++ 0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf209, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf03c, 0xf10a, ++ 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short shift_map[NR_KEYS] = { ++ 0xf200, 0xf01b, 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e, ++ 0xf026, 0xf02a, 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf07f, 0xf009, ++ 0xfb51, 0xfb57, 0xfb45, 0xfb52, 0xfb54, 0xfb59, 0xfb55, 0xfb49, ++ 0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf201, 0xf702, 0xfb41, 0xfb53, ++ 0xfb44, 0xfb46, 0xfb47, 0xfb48, 0xfb4a, 0xfb4b, 0xfb4c, 0xf03a, ++ 0xf022, 0xf07e, 0xf700, 0xf07c, 0xfb5a, 0xfb58, 0xfb43, 0xfb56, ++ 0xfb42, 0xfb4e, 0xfb4d, 0xf03b, 0xf03a, 0xf03f, 0xf701, 0xf30c, ++ 0xf703, 0xf020, 0xf207, 0xf10a, 0xf10b, 0xf10c, 0xf10d, 0xf10e, ++ 0xf10f, 0xf110, 0xf111, 0xf112, 0xf113, 0xf213, 0xf203, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf03e, 0xf10a, ++ 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf20b, 0xf601, 0xf602, 0xf117, 0xf600, 0xf20a, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short altgr_map[NR_KEYS] = { ++ 0xf200, 0xf200, 0xf200, 0xf040, 0xf200, 0xf024, 0xf200, 0xf200, ++ 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf05c, 0xf07e, 0xf200, 0xf200, ++ 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e, 0xf026, 0xf02a, ++ 0xf028, 0xf029, 0xf200, 0xf07e, 0xf201, 0xf702, 0xf0b0, 0xf0a8, ++ 0xf0a4, 0xf02d, 0xf05f, 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf200, ++ 0xf200, 0xf200, 0xf700, 0xf200, 0xf039, 0xf030, 0xf916, 0xfb76, ++ 0xf915, 0xf03c, 0xf03e, 0xf027, 0xf022, 0xf200, 0xf701, 0xf30c, ++ 0xf703, 0xf200, 0xf207, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, ++ 0xf036, 0xf037, 0xf038, 0xf514, 0xf515, 0xf208, 0xf202, 0xf911, ++ 0xf912, 0xf913, 0xf30b, 0xf90e, 0xf90f, 0xf910, 0xf30a, 0xf90b, ++ 0xf90c, 0xf90d, 0xf90a, 0xf310, 0xf206, 0xf200, 0xf07c, 0xf516, ++ 0xf517, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short ctrl_map[NR_KEYS] = { ++ 0xf200, 0xf200, 0xf200, 0xf000, 0xf01b, 0xf01c, 0xf01d, 0xf01e, ++ 0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf008, 0xf200, ++ 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009, ++ 0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf201, 0xf702, 0xf001, 0xf013, ++ 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200, ++ 0xf007, 0xf000, 0xf700, 0xf01c, 0xf01a, 0xf018, 0xf003, 0xf016, ++ 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf20e, 0xf07f, 0xf701, 0xf30c, ++ 0xf703, 0xf000, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104, ++ 0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf208, 0xf204, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf10a, ++ 0xf10b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short shift_ctrl_map[NR_KEYS] = { ++ 0xf200, 0xf200, 0xf200, 0xf000, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf200, ++ 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009, ++ 0xf00f, 0xf010, 0xf200, 0xf200, 0xf201, 0xf702, 0xf001, 0xf013, ++ 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200, ++ 0xf200, 0xf200, 0xf700, 0xf200, 0xf01a, 0xf018, 0xf003, 0xf016, ++ 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200, 0xf701, 0xf30c, ++ 0xf703, 0xf200, 0xf207, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf208, 0xf200, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short alt_map[NR_KEYS] = { ++ 0xf200, 0xf81b, 0xf831, 0xf832, 0xf833, 0xf834, 0xf835, 0xf836, ++ 0xf837, 0xf838, 0xf839, 0xf830, 0xf82d, 0xf83d, 0xf87f, 0xf809, ++ 0xf871, 0xf877, 0xf865, 0xf872, 0xf874, 0xf879, 0xf875, 0xf869, ++ 0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf80d, 0xf702, 0xf861, 0xf873, ++ 0xf864, 0xf866, 0xf867, 0xf868, 0xf86a, 0xf86b, 0xf86c, 0xf83b, ++ 0xf827, 0xf860, 0xf700, 0xf85c, 0xf87a, 0xf878, 0xf863, 0xf876, ++ 0xf862, 0xf86e, 0xf86d, 0xf200, 0xf200, 0xf82f, 0xf701, 0xf30c, ++ 0xf703, 0xf820, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504, ++ 0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf209, 0xf907, ++ 0xf908, 0xf909, 0xf30b, 0xf904, 0xf905, 0xf906, 0xf30a, 0xf901, ++ 0xf902, 0xf903, 0xf900, 0xf310, 0xf206, 0xf200, 0xf83c, 0xf50a, ++ 0xf50b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf210, 0xf211, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short ctrl_alt_map[NR_KEYS] = { ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815, 0xf809, ++ 0xf80f, 0xf810, 0xf200, 0xf200, 0xf201, 0xf702, 0xf801, 0xf813, ++ 0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c, 0xf200, ++ 0xf200, 0xf200, 0xf700, 0xf200, 0xf81a, 0xf818, 0xf803, 0xf816, ++ 0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf200, 0xf701, 0xf30c, ++ 0xf703, 0xf200, 0xf207, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504, ++ 0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf208, 0xf200, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf20c, 0xf206, 0xf200, 0xf200, 0xf50a, ++ 0xf50b, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf20c, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++static u_short ctr_map[NR_KEYS] = { ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf033, 0xf200, 0xf200, ++ 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xf037, 0xf038, ++ 0xf039, 0xfb70, 0xf200, 0xf200, 0xf201, 0xf702, 0xfb61, 0xfb73, ++ 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xf034, 0xf035, 0xf036, 0xf200, ++ 0xf200, 0xf200, 0xf700, 0xf200, 0xfb7a, 0xfb78, 0xfb63, 0xfb76, ++ 0xfb62, 0xf031, 0xf032, 0xf200, 0xf200, 0xf030, 0xf701, 0xf30c, ++ 0xf703, 0xf200, 0xf207, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf208, 0xf200, 0xf307, ++ 0xf308, 0xf309, 0xf30b, 0xf304, 0xf305, 0xf306, 0xf30a, 0xf301, ++ 0xf302, 0xf303, 0xf300, 0xf310, 0xf206, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf30e, 0xf707, 0xf30d, 0xf01c, 0xf701, 0xf205, 0xf114, 0xf603, ++ 0xf118, 0xf601, 0xf602, 0xf117, 0xf600, 0xf119, 0xf115, 0xf116, ++ 0xf11a, 0xf10c, 0xf10d, 0xf11b, 0xf11c, 0xf110, 0xf311, 0xf11d, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++ 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, ++}; ++ ++ushort *key_maps[MAX_NR_KEYMAPS] = { ++ plain_map, shift_map, altgr_map, 0, ++ ctrl_map, shift_ctrl_map, 0, 0, ++ alt_map, 0, 0, 0, ++ ctrl_alt_map, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0, ++ ctr_map, 0 ++}; ++ ++unsigned int keymap_count = 8; ++ ++/* ++ * Philosophy: most people do not define more strings, but they who do ++ * often want quite a lot of string space. So, we statically allocate ++ * the default and allocate dynamically in chunks of 512 bytes. ++ */ ++ ++char func_buf[] = { ++ '\033', '[', '[', 'A', 0, ++ '\033', '[', '[', 'B', 0, ++ '\033', '[', '[', 'C', 0, ++ '\033', '[', '[', 'D', 0, ++ '\033', '[', '[', 'E', 0, ++ '\033', '[', '1', '7', '~', 0, ++ '\033', '[', '1', '8', '~', 0, ++ '\033', '[', '1', '9', '~', 0, ++ '\033', '[', '2', '0', '~', 0, ++ '\033', '[', '2', '1', '~', 0, ++ '\033', '[', '2', '3', '~', 0, ++ '\033', '[', '2', '4', '~', 0, ++ '\033', '[', '2', '5', '~', 0, ++ '\033', '[', '2', '6', '~', 0, ++ '\033', '[', '2', '8', '~', 0, ++ '\033', '[', '2', '9', '~', 0, ++ '\033', '[', '3', '1', '~', 0, ++ '\033', '[', '3', '2', '~', 0, ++ '\033', '[', '3', '3', '~', 0, ++ '\033', '[', '3', '4', '~', 0, ++ '\033', '[', '1', '~', 0, ++ '\033', '[', '2', '~', 0, ++ '\033', '[', '3', '~', 0, ++ '\033', '[', '4', '~', 0, ++ '\033', '[', '5', '~', 0, ++ '\033', '[', '6', '~', 0, ++ '\033', '[', 'M', 0, ++ '\033', '[', 'P', 0, ++}; ++ ++char *funcbufptr = func_buf; ++int funcbufsize = sizeof(func_buf); ++int funcbufleft = 0; /* space left */ ++ ++char *func_table[MAX_NR_FUNC] = { ++ func_buf + 0, ++ func_buf + 5, ++ func_buf + 10, ++ func_buf + 15, ++ func_buf + 20, ++ func_buf + 25, ++ func_buf + 31, ++ func_buf + 37, ++ func_buf + 43, ++ func_buf + 49, ++ func_buf + 55, ++ func_buf + 61, ++ func_buf + 67, ++ func_buf + 73, ++ func_buf + 79, ++ func_buf + 85, ++ func_buf + 91, ++ func_buf + 97, ++ func_buf + 103, ++ func_buf + 109, ++ func_buf + 115, ++ func_buf + 120, ++ func_buf + 125, ++ func_buf + 130, ++ func_buf + 135, ++ func_buf + 140, ++ func_buf + 145, ++ 0, ++ 0, ++ func_buf + 149, ++ 0, ++}; ++ ++struct kbdiacr accent_table[MAX_DIACR] = { ++ {'`', 'A', '\300'}, {'`', 'a', '\340'}, ++ {'\'', 'A', '\301'}, {'\'', 'a', '\341'}, ++ {'^', 'A', '\302'}, {'^', 'a', '\342'}, ++ {'~', 'A', '\303'}, {'~', 'a', '\343'}, ++ {'"', 'A', '\304'}, {'"', 'a', '\344'}, ++ {'O', 'A', '\305'}, {'o', 'a', '\345'}, ++ {'0', 'A', '\305'}, {'0', 'a', '\345'}, ++ {'A', 'A', '\305'}, {'a', 'a', '\345'}, ++ {'A', 'E', '\306'}, {'a', 'e', '\346'}, ++ {',', 'C', '\307'}, {',', 'c', '\347'}, ++ {'`', 'E', '\310'}, {'`', 'e', '\350'}, ++ {'\'', 'E', '\311'}, {'\'', 'e', '\351'}, ++ {'^', 'E', '\312'}, {'^', 'e', '\352'}, ++ {'"', 'E', '\313'}, {'"', 'e', '\353'}, ++ {'`', 'I', '\314'}, {'`', 'i', '\354'}, ++ {'\'', 'I', '\315'}, {'\'', 'i', '\355'}, ++ {'^', 'I', '\316'}, {'^', 'i', '\356'}, ++ {'"', 'I', '\317'}, {'"', 'i', '\357'}, ++ {'-', 'D', '\320'}, {'-', 'd', '\360'}, ++ {'~', 'N', '\321'}, {'~', 'n', '\361'}, ++ {'`', 'O', '\322'}, {'`', 'o', '\362'}, ++ {'\'', 'O', '\323'}, {'\'', 'o', '\363'}, ++ {'^', 'O', '\324'}, {'^', 'o', '\364'}, ++ {'~', 'O', '\325'}, {'~', 'o', '\365'}, ++ {'"', 'O', '\326'}, {'"', 'o', '\366'}, ++ {'/', 'O', '\330'}, {'/', 'o', '\370'}, ++ {'`', 'U', '\331'}, {'`', 'u', '\371'}, ++ {'\'', 'U', '\332'}, {'\'', 'u', '\372'}, ++ {'^', 'U', '\333'}, {'^', 'u', '\373'}, ++ {'"', 'U', '\334'}, {'"', 'u', '\374'}, ++ {'\'', 'Y', '\335'}, {'\'', 'y', '\375'}, ++ {'T', 'H', '\336'}, {'t', 'h', '\376'}, ++ {'s', 's', '\337'}, {'"', 'y', '\377'}, ++ {'s', 'z', '\337'}, {'i', 'j', '\377'}, ++}; ++ ++unsigned int accent_table_size = 68; +diff -ruN linux-2.6.31-vanilla/drivers/misc/jz4740-adc.c linux-2.6.31/drivers/misc/jz4740-adc.c +--- linux-2.6.31-vanilla/drivers/misc/jz4740-adc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/misc/jz4740-adc.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,362 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC ADC driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ * This driver is meant to synchronize access to the adc core for the battery ++ * and touchscreen driver. Thus these drivers should use the adc driver as a ++ * parent. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/spinlock.h> ++#include <linux/interrupt.h> ++#include <linux/jz4740-adc.h> ++ ++#define JZ_REG_ADC_ENABLE 0x00 ++#define JZ_REG_ADC_CFG 0x04 ++#define JZ_REG_ADC_CTRL 0x08 ++#define JZ_REG_ADC_STATUS 0x0C ++#define JZ_REG_ADC_SAME 0x10 ++#define JZ_REG_ADC_WAIT 0x14 ++#define JZ_REG_ADC_TOUCH 0x18 ++#define JZ_REG_ADC_BATTERY 0x1C ++#define JZ_REG_ADC_ADCIN 0x20 ++ ++#define JZ_ADC_ENABLE_TOUCH BIT(2) ++#define JZ_ADC_ENABLE_BATTERY BIT(1) ++#define JZ_ADC_ENABLE_ADCIN BIT(0) ++ ++#define JZ_ADC_CFG_SPZZ BIT(31) ++#define JZ_ADC_CFG_EX_IN BIT(30) ++#define JZ_ADC_CFG_DNUM_MASK (0x7 << 16) ++#define JZ_ADC_CFG_DMA_ENABLE BIT(15) ++#define JZ_ADC_CFG_XYZ_MASK (0x2 << 13) ++#define JZ_ADC_CFG_SAMPLE_NUM_MASK (0x7 << 10) ++#define JZ_ADC_CFG_CLKDIV (0xf << 5) ++#define JZ_ADC_CFG_BAT_MB BIT(4) ++ ++#define JZ_ADC_CFG_DNUM_OFFSET 16 ++#define JZ_ADC_CFG_XYZ_OFFSET 13 ++#define JZ_ADC_CFG_SAMPLE_NUM_OFFSET 10 ++#define JZ_ADC_CFG_CLKDIV_OFFSET 5 ++ ++#define JZ_ADC_IRQ_PENDOWN BIT(4) ++#define JZ_ADC_IRQ_PENUP BIT(3) ++#define JZ_ADC_IRQ_TOUCH BIT(2) ++#define JZ_ADC_IRQ_BATTERY BIT(1) ++#define JZ_ADC_IRQ_ADCIN BIT(0) ++ ++#define JZ_ADC_TOUCH_TYPE1 BIT(31) ++#define JZ_ADC_TOUCH_DATA1_MASK 0xfff ++#define JZ_ADC_TOUCH_TYPE0 BIT(15) ++#define JZ_ADC_TOUCH_DATA0_MASK 0xfff ++ ++#define JZ_ADC_BATTERY_MASK 0xfff ++ ++#define JZ_ADC_ADCIN_MASK 0xfff ++ ++struct jz4740_adc { ++ struct resource *mem; ++ void __iomem *base; ++ ++ int irq; ++ ++ struct completion bat_completion; ++ struct completion adc_completion; ++ ++ spinlock_t lock; ++}; ++ ++static irqreturn_t jz4740_adc_irq(int irq, void *data) ++{ ++ struct jz4740_adc *adc = data; ++ uint8_t status; ++ ++ status = readb(adc->base + JZ_REG_ADC_STATUS); ++ ++ if (status & JZ_ADC_IRQ_BATTERY) ++ complete(&adc->bat_completion); ++ if (status & JZ_ADC_IRQ_ADCIN) ++ complete(&adc->adc_completion); ++ ++ writeb(0xff, adc->base + JZ_REG_ADC_STATUS); ++ ++ return IRQ_HANDLED; ++} ++ ++static void jz4740_adc_enable_irq(struct jz4740_adc *adc, int irq) ++{ ++ unsigned long flags; ++ uint8_t val; ++ ++ spin_lock_irqsave(&adc->lock, flags); ++ ++ val = readb(adc->base + JZ_REG_ADC_CTRL); ++ val &= ~irq; ++ writeb(val, adc->base + JZ_REG_ADC_CTRL); ++ ++ spin_unlock_irqrestore(&adc->lock, flags); ++} ++ ++static void jz4740_adc_disable_irq(struct jz4740_adc *adc, int irq) ++{ ++ unsigned long flags; ++ uint8_t val; ++ ++ spin_lock_irqsave(&adc->lock, flags); ++ ++ val = readb(adc->base + JZ_REG_ADC_CTRL); ++ val |= irq; ++ writeb(val, adc->base + JZ_REG_ADC_CTRL); ++ ++ spin_unlock_irqrestore(&adc->lock, flags); ++} ++ ++static void jz4740_adc_enable_adc(struct jz4740_adc *adc, int engine) ++{ ++ unsigned long flags; ++ uint8_t val; ++ ++ spin_lock_irqsave(&adc->lock, flags); ++ ++ val = readb(adc->base + JZ_REG_ADC_ENABLE); ++ val |= engine; ++ writeb(val, adc->base + JZ_REG_ADC_ENABLE); ++ ++ spin_unlock_irqrestore(&adc->lock, flags); ++} ++ ++static void jz4740_adc_disable_adc(struct jz4740_adc *adc, int engine) ++{ ++ unsigned long flags; ++ uint8_t val; ++ ++ spin_lock_irqsave(&adc->lock, flags); ++ ++ val = readb(adc->base + JZ_REG_ADC_ENABLE); ++ val &= ~engine; ++ writeb(val, adc->base + JZ_REG_ADC_ENABLE); ++ ++ spin_unlock_irqrestore(&adc->lock, flags); ++} ++ ++static inline void jz4740_adc_set_cfg(struct jz4740_adc *adc, uint32_t mask, ++uint32_t val) ++{ ++ unsigned long flags; ++ uint32_t cfg; ++ ++ spin_lock_irqsave(&adc->lock, flags); ++ ++ cfg = readl(adc->base + JZ_REG_ADC_CFG); ++ ++ cfg &= ~mask; ++ cfg |= val; ++ ++ writel(cfg, adc->base + JZ_REG_ADC_CFG); ++ ++ spin_unlock_irqrestore(&adc->lock, flags); ++} ++ ++long jz4740_adc_read_battery_voltage(struct device *dev, ++ enum jz_adc_battery_scale scale) ++{ ++ struct jz4740_adc *adc = dev_get_drvdata(dev); ++ unsigned long t; ++ long long voltage; ++ uint16_t val; ++ ++ if (!adc) ++ return -ENODEV; ++ ++ if (scale == JZ_ADC_BATTERY_SCALE_2V5) ++ jz4740_adc_set_cfg(adc, JZ_ADC_CFG_BAT_MB, JZ_ADC_CFG_BAT_MB); ++ else ++ jz4740_adc_set_cfg(adc, JZ_ADC_CFG_BAT_MB, 0); ++ ++ jz4740_adc_enable_irq(adc, JZ_ADC_IRQ_BATTERY); ++ jz4740_adc_enable_adc(adc, JZ_ADC_ENABLE_BATTERY); ++ ++ t = wait_for_completion_interruptible_timeout(&adc->bat_completion, ++ HZ); ++ ++ jz4740_adc_disable_irq(adc, JZ_ADC_IRQ_BATTERY); ++ ++ if (t <= 0) { ++ jz4740_adc_disable_adc(adc, JZ_ADC_ENABLE_BATTERY); ++ return t ? t : -ETIMEDOUT; ++ } ++ ++ val = readw(adc->base + JZ_REG_ADC_BATTERY); ++ ++ if (scale == JZ_ADC_BATTERY_SCALE_2V5) ++ voltage = (((long long)val) * 2500000LL) >> 12LL; ++ else ++ voltage = ((((long long)val) * 7395000LL) >> 12LL) + 33000LL; ++ ++ return voltage; ++} ++EXPORT_SYMBOL_GPL(jz4740_adc_read_battery_voltage); ++ ++static ssize_t jz4740_adc_read_adcin(struct device *dev, ++ struct device_attribute *dev_attr, ++ char *buf) ++{ ++ struct jz4740_adc *adc = dev_get_drvdata(dev); ++ unsigned long t; ++ uint16_t val; ++ ++ jz4740_adc_enable_irq(adc, JZ_ADC_IRQ_ADCIN); ++ jz4740_adc_enable_adc(adc, JZ_ADC_ENABLE_ADCIN); ++ ++ t = wait_for_completion_interruptible_timeout(&adc->adc_completion, ++ HZ); ++ ++ jz4740_adc_disable_irq(adc, JZ_ADC_IRQ_ADCIN); ++ ++ if (t <= 0) { ++ jz4740_adc_disable_adc(adc, JZ_ADC_ENABLE_ADCIN); ++ return t ? t : -ETIMEDOUT; ++ } ++ ++ val = readw(adc->base + JZ_REG_ADC_ADCIN); ++ ++ return sprintf(buf, "%d\n", val); ++} ++ ++static DEVICE_ATTR(adcin, S_IRUGO, jz4740_adc_read_adcin, NULL); ++ ++static int __devinit jz4740_adc_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct jz4740_adc *adc; ++ ++ adc = kmalloc(sizeof(*adc), GFP_KERNEL); ++ ++ adc->irq = platform_get_irq(pdev, 0); ++ ++ if (adc->irq < 0) { ++ ret = adc->irq; ++ dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret); ++ goto err_free; ++ } ++ ++ adc->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ++ if (!adc->mem) { ++ ret = -ENOENT; ++ dev_err(&pdev->dev, "Failed to get platform mmio resource\n"); ++ goto err_free; ++ } ++ ++ adc->mem = request_mem_region(adc->mem->start, resource_size(adc->mem), ++ pdev->name); ++ ++ if (!adc->mem) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to request mmio memory region\n"); ++ goto err_free; ++ } ++ ++ adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem)); ++ ++ if (!adc->base) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); ++ goto err_release_mem_region; ++ } ++ ++ ++ init_completion(&adc->bat_completion); ++ init_completion(&adc->adc_completion); ++ ++ spin_lock_init(&adc->lock); ++ ++ platform_set_drvdata(pdev, adc); ++ ++ ret = request_irq(adc->irq, jz4740_adc_irq, 0, pdev->name, adc); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to request irq: %d\n", ret); ++ goto err_iounmap; ++ } ++ ++ ret = device_create_file(&pdev->dev, &dev_attr_adcin); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to create sysfs file: %d\n", ret); ++ goto err_free_irq; ++ } ++ ++ writeb(0x00, adc->base + JZ_REG_ADC_ENABLE); ++ writeb(0xff, adc->base + JZ_REG_ADC_CTRL); ++ ++ return 0; ++ ++err_free_irq: ++ free_irq(adc->irq, adc); ++err_iounmap: ++ platform_set_drvdata(pdev, NULL); ++ iounmap(adc->base); ++err_release_mem_region: ++ release_mem_region(adc->mem->start, resource_size(adc->mem)); ++err_free: ++ kfree(adc); ++ ++ return ret; ++} ++ ++static int __devexit jz4740_adc_remove(struct platform_device *pdev) ++{ ++ struct jz4740_adc *adc = platform_get_drvdata(pdev); ++ ++ device_remove_file(&pdev->dev, &dev_attr_adcin); ++ ++ free_irq(adc->irq, adc); ++ ++ iounmap(adc->base); ++ release_mem_region(adc->mem->start, resource_size(adc->mem)); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ kfree(adc); ++ ++ return 0; ++} ++ ++struct platform_driver jz4740_adc_driver = { ++ .probe = jz4740_adc_probe, ++ .remove = jz4740_adc_remove, ++ .driver = { ++ .name = "jz4740-adc", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init jz4740_adc_init(void) ++{ ++ return platform_driver_register(&jz4740_adc_driver); ++} ++module_init(jz4740_adc_init); ++ ++static void __exit jz4740_adc_exit(void) ++{ ++ platform_driver_unregister(&jz4740_adc_driver); ++} ++module_exit(jz4740_adc_exit); ++ ++MODULE_DESCRIPTION("JZ4720/JZ4740 SoC ADC driver"); ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:jz4740-adc"); ++MODULE_ALIAS("platform:jz4720-adc"); +diff -ruN linux-2.6.31-vanilla/drivers/mmc/host/jz_mmc.c linux-2.6.31/drivers/mmc/host/jz_mmc.c +--- linux-2.6.31-vanilla/drivers/mmc/host/jz_mmc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/mmc/host/jz_mmc.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,994 @@ ++/* ++ * linux/drivers/mmc/jz_mmc.c - JZ SD/MMC driver ++ * ++ * Copyright (C) 2005 - 2008 Ingenic Semiconductor Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/dma-mapping.h> ++#include <linux/mmc/host.h> ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/ioport.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> ++#include <linux/interrupt.h> ++#include <linux/dma-mapping.h> ++#include <linux/mmc/host.h> ++#include <linux/mmc/mmc.h> ++#include <linux/mmc/sd.h> ++#include <linux/mmc/sdio.h> ++#include <linux/mm.h> ++#include <linux/signal.h> ++#include <linux/pm.h> ++#include <linux/scatterlist.h> ++ ++#include <asm/io.h> ++#include <asm/scatterlist.h> ++#include <asm/jzsoc.h> ++ ++#include "jz_mmc.h" ++ ++#define DRIVER_NAME "jz-mmc" ++ ++#define NR_SG 1 ++ ++#if defined(CONFIG_SOC_JZ4725) || defined(CONFIG_SOC_JZ4720) ++#undef USE_DMA ++#else ++#define USE_DMA ++#endif ++ ++struct jz_mmc_host { ++ struct mmc_host *mmc; ++ spinlock_t lock; ++ struct { ++ int len; ++ int dir; ++ } dma; ++ struct { ++ int index; ++ int offset; ++ int len; ++ } pio; ++ int irq; ++ unsigned int clkrt; ++ unsigned int cmdat; ++ unsigned int imask; ++ unsigned int power_mode; ++ struct jz_mmc_platform_data *pdata; ++ struct mmc_request *mrq; ++ struct mmc_command *cmd; ++ struct mmc_data *data; ++ dma_addr_t sg_dma; ++ struct jzsoc_dma_desc *sg_cpu; ++ unsigned int dma_len; ++ unsigned int dma_dir; ++ struct pm_dev *pmdev; ++}; ++ ++static int r_type = 0; ++ ++#define MMC_IRQ_MASK() \ ++do { \ ++ REG_MSC_IMASK = 0xff; \ ++ REG_MSC_IREG = 0xff; \ ++} while (0) ++ ++static int rxdmachan = 0; ++static int txdmachan = 0; ++static int mmc_slot_enable = 0; ++ ++/* Stop the MMC clock and wait while it happens */ ++static inline int jz_mmc_stop_clock(void) ++{ ++ int timeout = 1000; ++ ++ REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_STOP; ++ while (timeout && (REG_MSC_STAT & MSC_STAT_CLK_EN)) { ++ timeout--; ++ if (timeout == 0) ++ return 0; ++ udelay(1); ++ } ++ return MMC_NO_ERROR; ++} ++ ++/* Start the MMC clock and operation */ ++static inline int jz_mmc_start_clock(void) ++{ ++ REG_MSC_STRPCL = ++ MSC_STRPCL_CLOCK_CONTROL_START | MSC_STRPCL_START_OP; ++ return MMC_NO_ERROR; ++} ++ ++static inline u32 jz_mmc_calc_clkrt(int is_sd, u32 rate) ++{ ++ u32 clkrt; ++ u32 clk_src = is_sd ? 24000000 : 20000000; ++ ++ clkrt = 0; ++ while (rate < clk_src) { ++ clkrt++; ++ clk_src >>= 1; ++ } ++ return clkrt; ++} ++ ++/* Select the MMC clock frequency */ ++static int jz_mmc_set_clock(u32 rate) ++{ ++ int clkrt; ++ ++ jz_mmc_stop_clock(); ++ __cpm_select_msc_clk(1); /* select clock source from CPM */ ++ clkrt = jz_mmc_calc_clkrt(1, rate); ++ REG_MSC_CLKRT = clkrt; ++ return MMC_NO_ERROR; ++} ++ ++static void jz_mmc_enable_irq(struct jz_mmc_host *host, unsigned int mask) ++{ ++ unsigned long flags; ++ spin_lock_irqsave(&host->lock, flags); ++ host->imask &= ~mask; ++ REG_MSC_IMASK = host->imask; ++ spin_unlock_irqrestore(&host->lock, flags); ++} ++ ++static void jz_mmc_disable_irq(struct jz_mmc_host *host, unsigned int mask) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&host->lock, flags); ++ host->imask |= mask; ++ REG_MSC_IMASK = host->imask; ++ spin_unlock_irqrestore(&host->lock, flags); ++} ++ ++void jz_set_dma_block_size(int dmanr, int nbyte); ++ ++#ifdef USE_DMA ++static inline void ++jz_mmc_start_dma(int chan, unsigned long phyaddr, int count, int mode) ++{ ++ unsigned long flags; ++ ++ flags = claim_dma_lock(); ++ disable_dma(chan); ++ clear_dma_ff(chan); ++ jz_set_dma_block_size(chan, 32); ++ set_dma_mode(chan, mode); ++ set_dma_addr(chan, phyaddr); ++ set_dma_count(chan, count + 31); ++ enable_dma(chan); ++ release_dma_lock(flags); ++} ++ ++static irqreturn_t jz_mmc_dma_rx_callback(int irq, void *devid) ++{ ++ int chan = rxdmachan; ++ ++ disable_dma(chan); ++ if (__dmac_channel_address_error_detected(chan)) { ++ printk(KERN_DEBUG "%s: DMAC address error.\n", ++ __FUNCTION__); ++ __dmac_channel_clear_address_error(chan); ++ } ++ if (__dmac_channel_transmit_end_detected(chan)) { ++ __dmac_channel_clear_transmit_end(chan); ++ } ++ return IRQ_HANDLED; ++} ++static irqreturn_t jz_mmc_dma_tx_callback(int irq, void *devid) ++{ ++ int chan = txdmachan; ++ ++ disable_dma(chan); ++ if (__dmac_channel_address_error_detected(chan)) { ++ printk(KERN_DEBUG "%s: DMAC address error.\n", ++ __FUNCTION__); ++ __dmac_channel_clear_address_error(chan); ++ } ++ if (__dmac_channel_transmit_end_detected(chan)) { ++ __dmac_channel_clear_transmit_end(chan); ++ } ++ return IRQ_HANDLED; ++} ++ ++/* Prepare DMA to start data transfer from the MMC card */ ++static void jz_mmc_rx_setup_data(struct jz_mmc_host *host, ++ struct mmc_data *data) ++{ ++ unsigned int nob = data->blocks; ++ int channelrx = rxdmachan; ++ int i; ++ u32 size; ++ ++ if (data->flags & MMC_DATA_STREAM) ++ nob = 0xffff; ++ ++ REG_MSC_NOB = nob; ++ REG_MSC_BLKLEN = data->blksz; ++ size = nob * data->blksz; ++ ++ if (data->flags & MMC_DATA_READ) { ++ host->dma.dir = DMA_FROM_DEVICE; ++ } else { ++ host->dma.dir = DMA_TO_DEVICE; ++ } ++ ++ host->dma.len = ++ dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, ++ host->dma.dir); ++ ++ for (i = 0; i < host->dma.len; i++) { ++ host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); ++ host->sg_cpu[i].dcmd = sg_dma_len(&data->sg[i]); ++ dma_cache_wback_inv((unsigned long) ++ CKSEG0ADDR(sg_dma_address(data->sg)) + ++ data->sg->offset, ++ host->sg_cpu[i].dcmd); ++ jz_mmc_start_dma(channelrx, host->sg_cpu[i].dtadr, ++ host->sg_cpu[i].dcmd, DMA_MODE_READ); ++ } ++} ++ ++/* Prepare DMA to start data transfer from the MMC card */ ++static void jz_mmc_tx_setup_data(struct jz_mmc_host *host, ++ struct mmc_data *data) ++{ ++ unsigned int nob = data->blocks; ++ int channeltx = txdmachan; ++ int i; ++ u32 size; ++ ++ if (data->flags & MMC_DATA_STREAM) ++ nob = 0xffff; ++ ++ REG_MSC_NOB = nob; ++ REG_MSC_BLKLEN = data->blksz; ++ size = nob * data->blksz; ++ ++ if (data->flags & MMC_DATA_READ) { ++ host->dma.dir = DMA_FROM_DEVICE; ++ } else { ++ host->dma.dir = DMA_TO_DEVICE; ++ } ++ ++ host->dma.len = ++ dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, ++ host->dma.dir); ++ ++ for (i = 0; i < host->dma.len; i++) { ++ host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); ++ host->sg_cpu[i].dcmd = sg_dma_len(&data->sg[i]); ++ dma_cache_wback_inv((unsigned long) ++ CKSEG0ADDR(sg_dma_address(data->sg)) + ++ data->sg->offset, ++ host->sg_cpu[i].dcmd); ++ jz_mmc_start_dma(channeltx, host->sg_cpu[i].dtadr, ++ host->sg_cpu[i].dcmd, DMA_MODE_WRITE); ++ } ++} ++#else ++static void jz_mmc_receive_pio(struct jz_mmc_host *host) ++{ ++ ++ struct mmc_data *data = 0; ++ int sg_len = 0, max = 0, count = 0; ++ u32 *buf = 0; ++ struct scatterlist *sg; ++ unsigned int nob; ++ ++ data = host->mrq->data; ++ nob = data->blocks; ++ REG_MSC_NOB = nob; ++ REG_MSC_BLKLEN = data->blksz; ++ ++ max = host->pio.len; ++ if (host->pio.index < host->dma.len) { ++ sg = &data->sg[host->pio.index]; ++ buf = sg_virt(sg) + host->pio.offset; ++ ++ /* This is the space left inside the buffer */ ++ sg_len = sg_dma_len(&data->sg[host->pio.index]) - host->pio.offset; ++ /* Check to if we need less then the size of the sg_buffer */ ++ if (sg_len < max) max = sg_len; ++ } ++ max = max / 4; ++ for(count = 0; count < max; count++) { ++ while (REG_MSC_STAT & MSC_STAT_DATA_FIFO_EMPTY) ++ ; ++ *buf++ = REG_MSC_RXFIFO; ++ } ++ host->pio.len -= count; ++ host->pio.offset += count; ++ ++ if (sg_len && count == sg_len) { ++ host->pio.index++; ++ host->pio.offset = 0; ++ } ++} ++ ++static void jz_mmc_send_pio(struct jz_mmc_host *host) ++{ ++ ++ struct mmc_data *data = 0; ++ int sg_len, max, count = 0; ++ u32 *wbuf = 0; ++ struct scatterlist *sg; ++ unsigned int nob; ++ ++ data = host->mrq->data; ++ nob = data->blocks; ++ ++ REG_MSC_NOB = nob; ++ REG_MSC_BLKLEN = data->blksz; ++ ++ /* This is the pointer to the data buffer */ ++ sg = &data->sg[host->pio.index]; ++ wbuf = sg_virt(sg) + host->pio.offset; ++ ++ /* This is the space left inside the buffer */ ++ sg_len = data->sg[host->pio.index].length - host->pio.offset; ++ ++ /* Check to if we need less then the size of the sg_buffer */ ++ max = (sg_len > host->pio.len) ? host->pio.len : sg_len; ++ max = max / 4; ++ for(count = 0; count < max; count++ ) { ++ while (REG_MSC_STAT & MSC_STAT_DATA_FIFO_FULL) ++ ; ++ REG_MSC_TXFIFO = *wbuf++; ++ } ++ ++ host->pio.len -= count; ++ host->pio.offset += count; ++ ++ if (count == sg_len) { ++ host->pio.index++; ++ host->pio.offset = 0; ++ } ++} ++ ++static int ++jz_mmc_prepare_data(struct jz_mmc_host *host, struct mmc_data *data) ++{ ++ int datalen = data->blocks * data->blksz; ++ ++ host->dma.dir = DMA_BIDIRECTIONAL; ++ host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg, ++ data->sg_len, host->dma.dir); ++ if (host->dma.len == 0) ++ return -ETIMEDOUT; ++ ++ host->pio.index = 0; ++ host->pio.offset = 0; ++ host->pio.len = datalen; ++ return 0; ++} ++#endif ++ ++static int jz_mmc_cmd_done(struct jz_mmc_host *host, unsigned int stat); ++ ++static void jz_mmc_finish_request(struct jz_mmc_host *host, struct mmc_request *mrq) ++{ ++ jz_mmc_stop_clock(); ++ host->mrq = NULL; ++ host->cmd = NULL; ++ host->data = NULL; ++ mmc_request_done(host->mmc, mrq); ++} ++ ++static void jz_mmc_start_cmd(struct jz_mmc_host *host, ++ struct mmc_command *cmd, unsigned int cmdat) ++{ ++ u32 timeout = 0x3fffff; ++ unsigned int stat; ++ struct jz_mmc_host *hst = host; ++ WARN_ON(host->cmd != NULL); ++ host->cmd = cmd; ++ ++ /* stop MMC clock */ ++ jz_mmc_stop_clock(); ++ ++ /* mask interrupts */ ++ REG_MSC_IMASK = 0xff; ++ ++ /* clear status */ ++ REG_MSC_IREG = 0xff; ++ ++ if (cmd->flags & MMC_RSP_BUSY) ++ cmdat |= MSC_CMDAT_BUSY; ++ ++#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) ++ switch (RSP_TYPE(mmc_resp_type(cmd))) { ++ case RSP_TYPE(MMC_RSP_R1): /* r1,r1b, r6, r7 */ ++ cmdat |= MSC_CMDAT_RESPONSE_R1; ++ r_type = 1; ++ break; ++ case RSP_TYPE(MMC_RSP_R3): ++ cmdat |= MSC_CMDAT_RESPONSE_R3; ++ r_type = 1; ++ break; ++ case RSP_TYPE(MMC_RSP_R2): ++ cmdat |= MSC_CMDAT_RESPONSE_R2; ++ r_type = 2; ++ break; ++ default: ++ break; ++ } ++ REG_MSC_CMD = cmd->opcode; ++ ++ /* Set argument */ ++#ifdef CONFIG_JZ_MMC_BUS_1 ++ if (cmd->opcode == 6) { ++ /* set 1 bit sd card bus*/ ++ if (cmd->arg ==2) ++ REG_MSC_ARG = 0; ++ ++ /* set 1 bit mmc card bus*/ ++ if (cmd->arg == 0x3b70101) ++ REG_MSC_ARG = 0x3b70001; ++ } else ++ REG_MSC_ARG = cmd->arg; ++#else ++ REG_MSC_ARG = cmd->arg; ++#endif ++ ++ /* Set command */ ++ REG_MSC_CMDAT = cmdat; ++ ++ /* Send command */ ++ jz_mmc_start_clock(); ++ ++ while (timeout-- && !(REG_MSC_STAT & MSC_STAT_END_CMD_RES)) ++ ; ++ ++ REG_MSC_IREG = MSC_IREG_END_CMD_RES; /* clear irq flag */ ++ if (cmd->opcode == 12) { ++ while (timeout-- && !(REG_MSC_IREG & MSC_IREG_PRG_DONE)) ++ ; ++ REG_MSC_IREG = MSC_IREG_PRG_DONE; /* clear status */ ++ } ++ if (!mmc_slot_enable) { ++ /* It seems that MSC can't report the MSC_STAT_TIME_OUT_RES when ++ * card was removed. We force to return here. ++ */ ++ cmd->error = -ETIMEDOUT; ++ jz_mmc_finish_request(hst, hst->mrq); ++ return; ++ } ++ ++ if (SD_IO_SEND_OP_COND == cmd->opcode) { ++ /* ++ * Don't support SDIO card currently. ++ */ ++ cmd->error = -ETIMEDOUT; ++ jz_mmc_finish_request(hst, hst->mrq); ++ return; ++ } ++ ++ /* Check for status */ ++ stat = REG_MSC_STAT; ++ jz_mmc_cmd_done(hst, stat); ++ if (host->data) { ++ if (cmd->opcode == MMC_WRITE_BLOCK || cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) ++#ifdef USE_DMA ++ jz_mmc_tx_setup_data(host, host->data); ++#else ++ jz_mmc_send_pio(host); ++ else ++ jz_mmc_receive_pio(host); ++#endif ++ } ++} ++ ++static int jz_mmc_cmd_done(struct jz_mmc_host *host, unsigned int stat) ++{ ++ struct mmc_command *cmd = host->cmd; ++ int i, temp[16]; ++ u8 *buf; ++ u32 data, v, w1, w2; ++ ++ if (!cmd) ++ return 0; ++ ++ host->cmd = NULL; ++ buf = (u8 *) temp; ++ switch (r_type) { ++ case 1: ++ { ++ data = REG_MSC_RES; ++ buf[0] = (data >> 8) & 0xff; ++ buf[1] = data & 0xff; ++ data = REG_MSC_RES; ++ buf[2] = (data >> 8) & 0xff; ++ buf[3] = data & 0xff; ++ data = REG_MSC_RES; ++ buf[4] = data & 0xff; ++ cmd->resp[0] = ++ buf[1] << 24 | buf[2] << 16 | buf[3] << 8 | ++ buf[4]; ++ break; ++ } ++ case 2: ++ { ++ data = REG_MSC_RES; ++ v = data & 0xffff; ++ for (i = 0; i < 4; i++) { ++ data = REG_MSC_RES; ++ w1 = data & 0xffff; ++ data = REG_MSC_RES; ++ w2 = data & 0xffff; ++ cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8; ++ v = w2; ++ } ++ break; ++ } ++ case 0: ++ break; ++ } ++ if (stat & MSC_STAT_TIME_OUT_RES) { ++ printk("MSC_STAT_TIME_OUT_RES\n"); ++ cmd->error = -ETIMEDOUT; ++ } else if (stat & MSC_STAT_CRC_RES_ERR && cmd->flags & MMC_RSP_CRC) { ++ printk("MSC_STAT_CRC\n"); ++ if (cmd->opcode == MMC_ALL_SEND_CID || ++ cmd->opcode == MMC_SEND_CSD || ++ cmd->opcode == MMC_SEND_CID) { ++ /* a bogus CRC error can appear if the msb of ++ the 15 byte response is a one */ ++ if ((cmd->resp[0] & 0x80000000) == 0) ++ cmd->error = -EILSEQ; ++ } ++ } ++ /* ++ * Did I mention this is Sick. We always need to ++ * discard the upper 8 bits of the first 16-bit word. ++ */ ++ if (host->data && cmd->error == 0) ++ jz_mmc_enable_irq(host, MSC_IMASK_DATA_TRAN_DONE); ++ else ++ jz_mmc_finish_request(host, host->mrq); ++ ++ return 1; ++} ++ ++static int jz_mmc_data_done(struct jz_mmc_host *host, unsigned int stat) ++{ ++ struct mmc_data *data = host->data; ++ ++ if (!data) ++ return 0; ++ REG_MSC_IREG = MSC_IREG_DATA_TRAN_DONE; /* clear status */ ++ jz_mmc_stop_clock(); ++ dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, ++ host->dma_dir); ++ if (stat & MSC_STAT_TIME_OUT_READ) { ++ printk("MMC/SD timeout, MMC_STAT 0x%x\n", stat); ++ data->error = -ETIMEDOUT; ++ } else if (REG_MSC_STAT & ++ (MSC_STAT_CRC_READ_ERROR | MSC_STAT_CRC_WRITE_ERROR)) { ++ printk("MMC/SD CRC error, MMC_STAT 0x%x\n", stat); ++ data->error = -EILSEQ; ++ } ++ /* ++ * There appears to be a hardware design bug here. There seems to ++ * be no way to find out how much data was transferred to the card. ++ * This means that if there was an error on any block, we mark all ++ * data blocks as being in error. ++ */ ++ if (data->error == 0) ++ data->bytes_xfered = data->blocks * data->blksz; ++ else ++ data->bytes_xfered = 0; ++ ++ jz_mmc_disable_irq(host, MSC_IMASK_DATA_TRAN_DONE); ++ host->data = NULL; ++ if (host->mrq->stop) { ++ jz_mmc_stop_clock(); ++ jz_mmc_start_cmd(host, host->mrq->stop, 0); ++ } else { ++ jz_mmc_finish_request(host, host->mrq); ++ } ++ return 1; ++} ++ ++static void jz_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct jz_mmc_host *host = mmc_priv(mmc); ++ unsigned int cmdat; ++ ++ /* stop MMC clock */ ++ jz_mmc_stop_clock(); ++ ++ /* Save current request for the future processing */ ++ host->mrq = mrq; ++ host->data = mrq->data; ++ cmdat = host->cmdat; ++ host->cmdat &= ~MSC_CMDAT_INIT; ++ ++ if (mrq->data) { ++ cmdat &= ~MSC_CMDAT_BUSY; ++#ifdef USE_DMA ++ if ((mrq->cmd->opcode == 51) | (mrq->cmd->opcode == 8) | (mrq->cmd->opcode == 6)) ++ ++ cmdat |= ++ MSC_CMDAT_BUS_WIDTH_1BIT | MSC_CMDAT_DATA_EN | ++ MSC_CMDAT_DMA_EN; ++ else { ++#ifdef CONFIG_JZ_MMC_BUS_1 ++ cmdat &= ~MSC_CMDAT_BUS_WIDTH_4BIT; ++ cmdat |= MSC_CMDAT_BUS_WIDTH_1BIT | MSC_CMDAT_DATA_EN | ++ MSC_CMDAT_DMA_EN; ++#else ++ cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_DMA_EN; ++#endif ++ } ++ if (mrq->data->flags & MMC_DATA_WRITE) ++ cmdat |= MSC_CMDAT_WRITE; ++ ++ if (mrq->data->flags & MMC_DATA_STREAM) ++ cmdat |= MSC_CMDAT_STREAM_BLOCK; ++ if (mrq->cmd->opcode != MMC_WRITE_BLOCK ++ && mrq->cmd->opcode != MMC_WRITE_MULTIPLE_BLOCK) ++ jz_mmc_rx_setup_data(host, mrq->data); ++#else /*USE_DMA*/ ++ ++ if ((mrq->cmd->opcode == 51) | (mrq->cmd->opcode == 8) | (mrq->cmd->opcode == 6)) ++ cmdat |= MSC_CMDAT_BUS_WIDTH_1BIT | MSC_CMDAT_DATA_EN; ++ else { ++#ifdef CONFIG_JZ_MMC_BUS_1 ++ cmdat &= ~MSC_CMDAT_BUS_WIDTH_4BIT; ++ cmdat |= MSC_CMDAT_BUS_WIDTH_1BIT | MSC_CMDAT_DATA_EN; ++#else ++ cmdat |= MSC_CMDAT_DATA_EN; ++#endif ++ } ++ if (mrq->data->flags & MMC_DATA_WRITE) ++ cmdat |= MSC_CMDAT_WRITE; ++ ++ if (mrq->data->flags & MMC_DATA_STREAM) ++ cmdat |= MSC_CMDAT_STREAM_BLOCK; ++ jz_mmc_prepare_data(host, host->data); ++#endif /*USE_DMA*/ ++ } ++ jz_mmc_start_cmd(host, mrq->cmd, cmdat); ++} ++ ++static irqreturn_t jz_mmc_irq(int irq, void *devid) ++{ ++ struct jz_mmc_host *host = devid; ++ unsigned int ireg; ++ int handled = 0; ++ ++ ireg = REG_MSC_IREG; ++ ++ if (ireg) { ++ unsigned stat = REG_MSC_STAT; ++ if (ireg & MSC_IREG_DATA_TRAN_DONE) ++ handled |= jz_mmc_data_done(host, stat); ++ } ++ return IRQ_RETVAL(handled); ++} ++ ++/* Returns true if MMC slot is empty */ ++static int jz_mmc_slot_is_empty(int slot) ++{ ++ int empty; ++ ++ empty = (__msc_card_detected(slot) == 0) ? 1 : 0; ++ ++ if (empty) { ++ /* wait for card insertion */ ++#ifdef CONFIG_MIPS_JZ4740_LYRA ++ __gpio_as_irq_rise_edge(MSC_HOTPLUG_PIN); ++#else ++ __gpio_as_irq_fall_edge(MSC_HOTPLUG_PIN); ++#endif ++ } else { ++ /* wait for card removal */ ++#ifdef CONFIG_MIPS_JZ4740_LYRA ++ __gpio_as_irq_fall_edge(MSC_HOTPLUG_PIN); ++#else ++ __gpio_as_irq_rise_edge(MSC_HOTPLUG_PIN); ++#endif ++ } ++ ++ return empty; ++} ++ ++static irqreturn_t jz_mmc_detect_irq(int irq, void *devid) ++{ ++ struct jz_mmc_host *host = (struct jz_mmc_host *) devid; ++ ++ if (jz_mmc_slot_is_empty(0)) { ++ mmc_slot_enable = 0; ++ mmc_detect_change(host->mmc, 50); ++ } else { ++ mmc_slot_enable = 1; ++ mmc_detect_change(host->mmc, 50); ++ } ++ return IRQ_HANDLED; ++} ++ ++static int jz_mmc_get_ro(struct mmc_host *mmc) ++{ ++ struct jz_mmc_host *host = mmc_priv(mmc); ++ ++ if (host->pdata && host->pdata->get_ro) ++ return host->pdata->get_ro(mmc_dev(mmc)); ++ /* Host doesn't support read only detection so assume writeable */ ++ return 0; ++} ++ ++/* set clock and power */ ++static void jz_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct jz_mmc_host *host = mmc_priv(mmc); ++ ++ if (ios->clock) ++ jz_mmc_set_clock(ios->clock); ++ else ++ jz_mmc_stop_clock(); ++ ++ if (host->power_mode != ios->power_mode) { ++ host->power_mode = ios->power_mode; ++ ++ if (ios->power_mode == MMC_POWER_ON) ++ host->cmdat |= CMDAT_INIT; ++ } ++ ++ if ((ios->bus_width == MMC_BUS_WIDTH_4) || (ios->bus_width == MMC_BUS_WIDTH_8)) ++ host->cmdat |= MSC_CMDAT_BUS_WIDTH_4BIT; ++ else ++ host->cmdat &= ~MSC_CMDAT_BUS_WIDTH_4BIT; ++} ++ ++static const struct mmc_host_ops jz_mmc_ops = { ++ .request = jz_mmc_request, ++ .get_ro = jz_mmc_get_ro, ++ .set_ios = jz_mmc_set_ios, ++}; ++ ++static int jz_mmc_probe(struct platform_device *pdev) ++{ ++ int retval; ++ struct mmc_host *mmc; ++ struct jz_mmc_host *host = NULL; ++ int irq; ++ struct resource *r; ++ ++ __gpio_as_msc(); ++ __msc_init_io(); ++ __msc_enable_power(); ++ ++ __msc_reset(); ++ ++ /* On reset, stop MMC clock */ ++ jz_mmc_stop_clock(); ++ ++ MMC_IRQ_MASK(); ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ irq = platform_get_irq(pdev, 0); ++ if (!r || irq < 0) ++ return -ENXIO; ++ ++ r = request_mem_region(r->start, SZ_4K, DRIVER_NAME); ++ if (!r) ++ return -EBUSY; ++ ++ mmc = mmc_alloc_host(sizeof(struct jz_mmc_host), &pdev->dev); ++ if (!mmc) { ++ retval = -ENOMEM; ++ goto out; ++ } ++ mmc->ops = &jz_mmc_ops; ++ mmc->f_min = MMC_CLOCK_SLOW; ++ mmc->f_max = SD_CLOCK_FAST; ++ /* ++ * We can do SG-DMA, but we don't because we never know how much ++ * data we successfully wrote to the card. ++ */ ++ mmc->max_phys_segs = NR_SG; ++ /* ++ * Our hardware DMA can handle a maximum of one page per SG entry. ++ */ ++ mmc->max_seg_size = PAGE_SIZE; ++ /* ++ * Block length register is 10 bits. ++ */ ++ mmc->max_blk_size = 1023; ++ /* ++ * Block count register is 16 bits. ++ */ ++ mmc->max_blk_count = 65535; ++ host = mmc_priv(mmc); ++ host->mmc = mmc; ++ host->pdata = pdev->dev.platform_data; ++ mmc->ocr_avail = host->pdata ? ++ host->pdata->ocr_mask : MMC_VDD_32_33 | MMC_VDD_33_34; ++ host->mmc->caps = ++ MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED ++ | MMC_CAP_MMC_HIGHSPEED; ++ /* ++ *MMC_CAP_4_BIT_DATA (1 << 0) The host can do 4 bit transfers ++ * ++ */ ++ host->sg_cpu = ++ dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, ++ GFP_KERNEL); ++ if (!host->sg_cpu) { ++ retval = -ENOMEM; ++ goto out; ++ } ++ spin_lock_init(&host->lock); ++ host->irq = JZ_IRQ_MSC; ++ host->imask = 0xff; ++ /* ++ * Ensure that the host controller is shut down, and setup ++ * with our defaults. ++ */ ++ retval = request_irq(JZ_IRQ_MSC, jz_mmc_irq, 0, "MMC/SD", host); ++ if (retval) { ++ printk(KERN_ERR "MMC/SD: can't request MMC/SD IRQ\n"); ++ return retval; ++ } ++ jz_mmc_slot_is_empty(0); ++ /* Request card detect interrupt */ ++ ++ retval = request_irq(MSC_HOTPLUG_IRQ, jz_mmc_detect_irq, 0, //SA_INTERRUPT, ++ "MMC card detect", host); ++ if (retval) { ++ printk(KERN_ERR "MMC/SD: can't request card detect IRQ\n"); ++ goto err1; ++ } ++#ifdef USE_DMA ++ /* Request MMC Rx DMA channel */ ++ rxdmachan = ++ jz_request_dma(DMA_ID_MSC_RX, "MMC Rx", jz_mmc_dma_rx_callback, ++ 0, host); ++ if (rxdmachan < 0) { ++ printk(KERN_ERR "jz_request_dma failed for MMC Rx\n"); ++ goto err2; ++ } ++ ++ /* Request MMC Tx DMA channel */ ++ txdmachan = ++ jz_request_dma(DMA_ID_MSC_TX, "MMC Tx", jz_mmc_dma_tx_callback, ++ 0, host); ++ if (txdmachan < 0) { ++ printk(KERN_ERR "jz_request_dma failed for MMC Tx\n"); ++ goto err3; ++ } ++#endif ++ platform_set_drvdata(pdev, mmc); ++ mmc_add_host(mmc); ++ printk("JZ SD/MMC card driver registered\n"); ++ ++ /* Detect card during initialization */ ++#ifdef CONFIG_SOC_JZ4740 ++ if (!jz_mmc_slot_is_empty(0)) { ++ mmc_slot_enable = 1; ++ mmc_detect_change(host->mmc, 0); ++ } ++#endif ++ return 0; ++ ++err1:free_irq(JZ_IRQ_MSC, &host); ++#ifdef USE_DMA ++ err2:jz_free_dma(rxdmachan); ++ err3:jz_free_dma(txdmachan); ++#endif ++out: ++ if (host) { ++ if (host->sg_cpu) ++ dma_free_coherent(&pdev->dev, PAGE_SIZE, ++ host->sg_cpu, host->sg_dma); ++ } ++ if (mmc) ++ mmc_free_host(mmc); ++ return -1; ++} ++ ++static int jz_mmc_remove(struct platform_device *pdev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ if (mmc) { ++ struct jz_mmc_host *host = mmc_priv(mmc); ++ ++ if (host->pdata && host->pdata->exit) ++ host->pdata->exit(&pdev->dev, mmc); ++ ++ mmc_remove_host(mmc); ++ ++ jz_mmc_stop_clock(); ++ __msc_disable_power(); ++ jz_free_dma(rxdmachan); ++ jz_free_dma(txdmachan); ++ free_irq(JZ_IRQ_MSC, host); ++ mmc_free_host(mmc); ++ } ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++pm_message_t state; ++static int jz_mmc_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ int ret = 0; ++ ++ __msc_disable_power(); ++ if (mmc) ++ ret = mmc_suspend_host(mmc, state); ++ ++ return ret; ++} ++ ++static int jz_mmc_resume(struct platform_device *dev) ++{ ++ struct mmc_host *mmc = platform_get_drvdata(dev); ++ int ret = 0; ++#if 0 ++ /*for sandisk BB0807011816D and other strange cards*/ ++ int i; ++ ++ for(i = 104; i < 110; i++) ++ __gpio_as_input(i); ++ ++ /* perhaps you should mdelay more */ ++ mdelay(1000); ++ __gpio_as_msc(); ++#endif ++ __msc_init_io(); ++ __msc_enable_power(); ++ __msc_reset(); ++ ++ if (!jz_mmc_slot_is_empty(0)) { ++ mmc_slot_enable = 1; ++ mmc_detect_change(mmc, 10); ++ } ++ ++ if (mmc) ++ ret = mmc_resume_host(mmc); ++ ++ return ret; ++} ++#else ++#define jz_mmc_suspend NULL ++#define jz_mmc_resume NULL ++#endif ++ ++static struct platform_driver jz_mmc_driver = { ++ .probe = jz_mmc_probe, ++ .remove = jz_mmc_remove, ++ .suspend = jz_mmc_suspend, ++ .resume = jz_mmc_resume, ++ .driver = { ++ .name = DRIVER_NAME, ++ }, ++}; ++ ++static int __init jz_mmc_init(void) ++{ ++ return platform_driver_register(&jz_mmc_driver); ++} ++ ++static void __exit jz_mmc_exit(void) ++{ ++ platform_driver_unregister(&jz_mmc_driver); ++} ++ ++module_init(jz_mmc_init); ++module_exit(jz_mmc_exit); ++ ++MODULE_DESCRIPTION("JZ47XX SD/Multimedia Card Interface Driver"); ++MODULE_LICENSE("GPL"); +diff -ruN linux-2.6.31-vanilla/drivers/mmc/host/jz_mmc.h linux-2.6.31/drivers/mmc/host/jz_mmc.h +--- linux-2.6.31-vanilla/drivers/mmc/host/jz_mmc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/mmc/host/jz_mmc.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,65 @@ ++#ifndef __JZ_MMC_H__ ++#define __JZ_MMC_H__ ++ ++#define MMC_CLOCK_SLOW 400000 /* 400 kHz for initial setup */ ++#define MMC_CLOCK_FAST 20000000 /* 20 MHz for maximum for normal operation */ ++#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */ ++#define MMC_NO_ERROR 0 ++/* Extra MMC commands for state control */ ++/* Use negative numbers to disambiguate */ ++#define MMC_CIM_RESET -1 ++#define MMC_SET_CLOCK 100 ++ ++typedef struct jzsoc_dma_desc { ++ volatile u32 ddadr; /* Points to the next descriptor + flags */ ++ volatile u32 dsadr; /* DSADR value for the current transfer */ ++ volatile u32 dtadr; /* DTADR value for the current transfer */ ++ volatile u32 dcmd; /* DCMD value for the current transfer */ ++} jzsoc_dma_desc; ++ ++ ++ ++ ++#include <linux/interrupt.h> ++ ++struct device; ++struct mmc_host; ++ ++struct jz_mmc_platform_data { ++ unsigned int ocr_mask; /* available voltages */ ++ unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ ++ int (*init)(struct device *, irq_handler_t , void *); ++ int (*get_ro)(struct device *); ++ void (*setpower)(struct device *, unsigned int); ++ void (*exit)(struct device *, void *); ++}; ++ ++//extern void pxa_set_mci_info(struct pxamci_platform_data *info); ++ ++ ++ ++#define SZ_1K 0x00000400 ++#define SZ_4K 0x00001000 ++#define SZ_8K 0x00002000 ++#define SZ_16K 0x00004000 ++#define SZ_64K 0x00010000 ++#define SZ_128K 0x00020000 ++#define SZ_256K 0x00040000 ++#define SZ_512K 0x00080000 ++ ++#define SZ_1M 0x00100000 ++#define SZ_2M 0x00200000 ++#define SZ_4M 0x00400000 ++#define SZ_8M 0x00800000 ++#define SZ_16M 0x01000000 ++#define SZ_32M 0x02000000 ++#define SZ_64M 0x04000000 ++#define SZ_128M 0x08000000 ++#define SZ_256M 0x10000000 ++#define SZ_512M 0x20000000 ++ ++#define SZ_1G 0x40000000 ++#define SZ_2G 0x80000000 ++ ++ ++#endif /* __JZ_MMC_H__ */ +diff -ruN linux-2.6.31-vanilla/drivers/mtd/nand/jz4740_nand.c linux-2.6.31/drivers/mtd/nand/jz4740_nand.c +--- linux-2.6.31-vanilla/drivers/mtd/nand/jz4740_nand.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/mtd/nand/jz4740_nand.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,418 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC NAND controller driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/ioport.h> ++#include <linux/platform_device.h> ++ ++#include <linux/mtd/mtd.h> ++#include <linux/mtd/nand.h> ++#include <linux/mtd/partitions.h> ++ ++#include <linux/mtd/jz4740_nand.h> ++#include <linux/gpio.h> ++ ++#define JZ_REG_NAND_CTRL 0x50 ++#define JZ_REG_NAND_ECC_CTRL 0x100 ++#define JZ_REG_NAND_DATA 0x104 ++#define JZ_REG_NAND_PAR0 0x108 ++#define JZ_REG_NAND_PAR1 0x10C ++#define JZ_REG_NAND_PAR2 0x110 ++#define JZ_REG_NAND_IRQ_STAT 0x114 ++#define JZ_REG_NAND_IRQ_CTRL 0x118 ++#define JZ_REG_NAND_ERR(x) (0x11C + (x << 2)) ++ ++#define JZ_NAND_ECC_CTRL_PAR_READY BIT(4) ++#define JZ_NAND_ECC_CTRL_ENCODING BIT(3) ++#define JZ_NAND_ECC_CTRL_RS BIT(2) ++#define JZ_NAND_ECC_CTRL_RESET BIT(1) ++#define JZ_NAND_ECC_CTRL_ENABLE BIT(0) ++ ++#define JZ_NAND_STATUS_ERR_COUNT (BIT(31) | BIT(30) | BIT(29)) ++#define JZ_NAND_STATUS_PAD_FINISH BIT(4) ++#define JZ_NAND_STATUS_DEC_FINISH BIT(3) ++#define JZ_NAND_STATUS_ENC_FINISH BIT(2) ++#define JZ_NAND_STATUS_UNCOR_ERROR BIT(1) ++#define JZ_NAND_STATUS_ERROR BIT(0) ++ ++#define JZ_NAND_CTRL_ENABLE_CHIP(x) BIT(x << 1) ++#define JZ_NAND_CTRL_ASSERT_CHIP(x) BIT((x << 1) + 1) ++ ++#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000) ++#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000) ++#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000) ++ ++struct jz_nand { ++ struct mtd_info mtd; ++ struct nand_chip chip; ++ void __iomem *base; ++ struct resource *mem; ++ ++ struct jz_nand_platform_data *pdata; ++}; ++ ++static inline struct jz_nand *mtd_to_jz_nand(struct mtd_info *mtd) ++{ ++ return container_of(mtd, struct jz_nand, mtd); ++} ++ ++static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl) ++{ ++ struct jz_nand *nand = mtd_to_jz_nand(mtd); ++ struct nand_chip *chip = mtd->priv; ++ uint32_t reg; ++ ++ if (ctrl & NAND_CTRL_CHANGE) { ++ BUG_ON((ctrl & NAND_ALE) && (ctrl & NAND_CLE)); ++ if (ctrl & NAND_ALE) ++ chip->IO_ADDR_W = JZ_NAND_ADDR_ADDR; ++ else if (ctrl & NAND_CLE) ++ chip->IO_ADDR_W = JZ_NAND_CMD_ADDR; ++ else ++ chip->IO_ADDR_W = JZ_NAND_DATA_ADDR; ++ ++ reg = readl(nand->base + JZ_REG_NAND_CTRL); ++ if ( ctrl & NAND_NCE ) ++ reg |= JZ_NAND_CTRL_ASSERT_CHIP(0); ++ else ++ reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(0); ++ writel(reg, nand->base + JZ_REG_NAND_CTRL); ++ } ++ if (dat != NAND_CMD_NONE) ++ writeb(dat, chip->IO_ADDR_W); ++} ++ ++static int jz_nand_dev_ready(struct mtd_info *mtd) ++{ ++ struct jz_nand *nand = mtd_to_jz_nand(mtd); ++ return gpio_get_value_cansleep(nand->pdata->busy_gpio); ++} ++ ++static void jz_nand_hwctl(struct mtd_info *mtd, int mode) ++{ ++ struct jz_nand *nand = mtd_to_jz_nand(mtd); ++ uint32_t reg; ++ ++ ++ writel(0, nand->base + JZ_REG_NAND_IRQ_STAT); ++ reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL); ++ ++ reg |= JZ_NAND_ECC_CTRL_RESET; ++ reg |= JZ_NAND_ECC_CTRL_ENABLE; ++ reg |= JZ_NAND_ECC_CTRL_RS; ++ ++ switch(mode) { ++ case NAND_ECC_READ: ++ reg &= ~JZ_NAND_ECC_CTRL_ENCODING; ++ break; ++ case NAND_ECC_WRITE: ++ reg |= JZ_NAND_ECC_CTRL_ENCODING; ++ break; ++ default: ++ break; ++ } ++ ++ writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL); ++} ++ ++static int jz_nand_calculate_ecc_rs(struct mtd_info* mtd, const uint8_t* dat, ++ uint8_t *ecc_code) ++{ ++ struct jz_nand *nand = mtd_to_jz_nand(mtd); ++ uint32_t reg, status; ++ int i; ++ ++ do { ++ status = readl(nand->base + JZ_REG_NAND_IRQ_STAT); ++ } while(!(status & JZ_NAND_STATUS_ENC_FINISH)); ++ ++ reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL); ++ reg &= ~JZ_NAND_ECC_CTRL_ENABLE; ++ writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL); ++ ++ for (i = 0; i < 9; ++i) { ++ ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i); ++ } ++ ++ return 0; ++} ++ ++static void correct_data(uint8_t *dat, int index, int mask) ++{ ++ int offset = index & 0x7; ++ uint16_t data; ++ printk("correct: "); ++ ++ index += (index >> 3); ++ ++ data = dat[index]; ++ data |= dat[index+1] << 8; ++ ++ printk("0x%x -> ", data); ++ ++ mask ^= (data >> offset) & 0x1ff; ++ data &= ~(0x1ff << offset); ++ data |= (mask << offset); ++ ++ printk("0x%x\n", data); ++ ++ dat[index] = data & 0xff; ++ dat[index+1] = (data >> 8) & 0xff; ++} ++ ++static int jz_nand_correct_ecc_rs(struct mtd_info* mtd, uint8_t *dat, ++ uint8_t *read_ecc, uint8_t *calc_ecc) ++{ ++ struct jz_nand *nand = mtd_to_jz_nand(mtd); ++ int i, error_count, index; ++ uint32_t reg, status, error; ++ ++ for(i = 0; i < 9; ++i) { ++ if (read_ecc[i] != 0xff) ++ break; ++ } ++ if (i == 9) { ++ for (i = 0; i < nand->chip.ecc.size; ++i) { ++ if (dat[i] != 0xff) ++ break; ++ } ++ if (i == nand->chip.ecc.size) ++ return 0; ++ } ++ ++ for(i = 0; i < 9; ++i) ++ writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i); ++ ++ reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL); ++ reg |= JZ_NAND_ECC_CTRL_PAR_READY; ++ writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL); ++ ++ do { ++ status = readl(nand->base + JZ_REG_NAND_IRQ_STAT); ++ } while (!(status & JZ_NAND_STATUS_DEC_FINISH)); ++ ++ reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL); ++ reg &= ~JZ_NAND_ECC_CTRL_ENABLE; ++ writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL); ++ ++ if (status & JZ_NAND_STATUS_ERROR) { ++ if (status & JZ_NAND_STATUS_UNCOR_ERROR) { ++ printk("uncorrectable ecc:"); ++ for(i = 0; i < 9; ++i) ++ printk(" 0x%x", read_ecc[i]); ++ printk("\n"); ++ printk("uncorrectable data:"); ++ for(i = 0; i < 32; ++i) ++ printk(" 0x%x", dat[i]); ++ printk("\n"); ++ return -1; ++ } ++ ++ error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29; ++ ++ printk("error_count: %d %x\n", error_count, status); ++ ++ for(i = 0; i < error_count; ++i) { ++ error = readl(nand->base + JZ_REG_NAND_ERR(i)); ++ index = ((error >> 16) & 0x1ff) - 1; ++ if (index >= 0 && index < 512) { ++ correct_data(dat, index, error & 0x1ff); ++ } ++ } ++ ++ return error_count; ++ } ++ ++ return 0; ++} ++ ++ ++ ++#ifdef CONFIG_MTD_CMDLINE_PARTS ++static const char *part_probes[] = {"cmdline", NULL}; ++#endif ++ ++static int __devinit jz_nand_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct jz_nand *nand; ++ struct nand_chip *chip; ++ struct mtd_info *mtd; ++ struct jz_nand_platform_data *pdata = pdev->dev.platform_data; ++#ifdef CONFIG_MTD_PARTITIONS ++ struct mtd_partition *partition_info; ++ int num_partitions = 0; ++#endif ++ ++ nand = kzalloc(sizeof(*nand), GFP_KERNEL); ++ if (!nand) { ++ dev_err(&pdev->dev, "Failed to allocate device structure.\n"); ++ return -ENOMEM; ++ } ++ ++ nand->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!nand->mem) { ++ dev_err(&pdev->dev, "Failed to get platform mmio memory\n"); ++ ret = -ENOENT; ++ goto err_free; ++ } ++ ++ nand->mem = request_mem_region(nand->mem->start, resource_size(nand->mem), ++ pdev->name); ++ ++ if (!nand->mem) { ++ dev_err(&pdev->dev, "Failed to request mmio memory region\n"); ++ ret = -EBUSY; ++ goto err_free; ++ } ++ ++ nand->base = ioremap(nand->mem->start, resource_size(nand->mem)); ++ ++ if (!nand->base) { ++ dev_err(&pdev->dev, "Faild to ioremap mmio memory region\n"); ++ ret = -EBUSY; ++ goto err_release_mem; ++ } ++ ++ if (pdata && gpio_is_valid(pdata->busy_gpio)) { ++ ret = gpio_request(pdata->busy_gpio, "jz nand busy line"); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to request busy gpio %d: %d\n", ++ pdata->busy_gpio, ret); ++ goto err_iounmap; ++ } ++ } ++ ++ mtd = &nand->mtd; ++ chip = &nand->chip; ++ mtd->priv = chip; ++ mtd->owner = THIS_MODULE; ++ mtd->name = "jz4740-nand"; ++ ++ chip->ecc.hwctl = jz_nand_hwctl; ++ ++ chip->ecc.calculate = jz_nand_calculate_ecc_rs; ++ chip->ecc.correct = jz_nand_correct_ecc_rs; ++ chip->ecc.mode = NAND_ECC_HW; ++ chip->ecc.size = 512; ++ chip->ecc.bytes = 9; ++ if (pdata) ++ chip->ecc.layout = pdata->ecc_layout; ++ ++ chip->chip_delay = 50; ++ chip->cmd_ctrl = jz_nand_cmd_ctrl; ++ ++ if (pdata && gpio_is_valid(pdata->busy_gpio)) ++ chip->dev_ready = jz_nand_dev_ready; ++ ++ chip->IO_ADDR_R = JZ_NAND_DATA_ADDR; ++ chip->IO_ADDR_W = JZ_NAND_DATA_ADDR; ++ ++ nand->pdata = pdata; ++ platform_set_drvdata(pdev, nand); ++ ++ ret = nand_scan_ident(mtd, 1); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to scan nand\n"); ++ goto err_gpio_free; ++ } ++ ++ if (pdata && pdata->ident_callback) { ++ pdata->ident_callback(pdev, chip, &pdata->partitions, &pdata->num_partitions); ++ } ++ ++ ret = nand_scan_tail(mtd); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to scan nand\n"); ++ goto err_gpio_free; ++ } ++ ++#ifdef CONFIG_MTD_PARTITIONS ++#ifdef CONFIG_MTD_CMDLINE_PARTS ++ num_partitions = parse_mtd_partitions(mtd, part_probes, ++ &partition_info, 0); ++#endif ++ if (num_partitions <= 0 && pdata) { ++ num_partitions = pdata->num_partitions; ++ partition_info = pdata->partitions; ++ } ++ ++ if (num_partitions > 0) ++ ret = add_mtd_partitions(mtd, partition_info, num_partitions); ++ else ++#endif ++ ret = add_mtd_device(mtd); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to add mtd device\n"); ++ goto err_nand_release; ++ } ++ ++ dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n"); ++ ++ return 0; ++err_nand_release: ++ nand_release(&nand->mtd); ++err_gpio_free: ++ platform_set_drvdata(pdev, NULL); ++ gpio_free(pdata->busy_gpio); ++err_iounmap: ++ iounmap(nand->base); ++err_release_mem: ++ release_mem_region(nand->mem->start, resource_size(nand->mem)); ++err_free: ++ kfree(nand); ++ return ret; ++} ++ ++static void __devexit jz_nand_remove(struct platform_device *pdev) ++{ ++ struct jz_nand *nand = platform_get_drvdata(pdev); ++ ++ nand_release(&nand->mtd); ++ ++ iounmap(nand->base); ++ ++ release_mem_region(nand->mem->start, resource_size(nand->mem)); ++ ++ platform_set_drvdata(pdev, NULL); ++ kfree(nand); ++} ++ ++struct platform_driver jz_nand_driver = { ++ .probe = jz_nand_probe, ++ .remove = __devexit_p(jz_nand_probe), ++ .driver = { ++ .name = "jz4740-nand", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init jz_nand_init(void) ++{ ++ return platform_driver_register(&jz_nand_driver); ++} ++module_init(jz_nand_init); ++ ++static void __exit jz_nand_exit(void) ++{ ++ platform_driver_unregister(&jz_nand_driver); ++} ++module_exit(jz_nand_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_DESCRIPTION("NAND controller driver for JZ4720/JZ4740 SoC"); ++MODULE_ALIAS("platform:jz4740-nand"); ++MODULE_ALIAS("platform:jz4720-nand"); +diff -ruN linux-2.6.31-vanilla/drivers/power/jz4740-battery.c linux-2.6.31/drivers/power/jz4740-battery.c +--- linux-2.6.31-vanilla/drivers/power/jz4740-battery.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/power/jz4740-battery.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,471 @@ ++/* ++ * Battery measurement code for Ingenic JZ SOC. ++ * ++ * based on tosa_battery.c ++ * ++ * Copyright (C) 2008 Marek Vasut <marek.vasut@gmail.com> ++ * Copyright (C) 2009 Jiejing Zhang <kzjeef@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/power_supply.h> ++#include <linux/delay.h> ++#include <linux/spinlock.h> ++#include <linux/interrupt.h> ++#include <linux/platform_device.h> ++#include <linux/gpio.h> ++ ++#include <linux/power/jz4740-battery.h> ++#include <linux/jz4740-adc.h> ++ ++struct jz_battery_info { ++ struct power_supply usb; ++ struct power_supply bat; ++ struct power_supply ac; ++ int bat_status; ++ struct jz_batt_info *pdata; ++ struct mutex work_lock; ++ struct workqueue_struct *monitor_wqueue; ++ struct delayed_work bat_work; ++}; ++ ++#define ps_to_jz_battery(x) container_of((x), struct jz_battery_info, bat); ++ ++/********************************************************************* ++ * Power ++ *********************************************************************/ ++ ++ ++static int jz_get_power_prop(struct jz_battery_info *bat_info, ++ struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ int gpio; ++ ++ if (bat_info == 0 || bat_info->pdata == 0) ++ return -EINVAL; ++ gpio = (psy->type == POWER_SUPPLY_TYPE_MAINS) ? ++ bat_info->pdata->dc_dect_gpio : ++ bat_info->pdata->usb_dect_gpio; ++ if (!gpio_is_valid(gpio)) ++ return -EINVAL; ++ switch (psp) { ++ case POWER_SUPPLY_PROP_ONLINE: ++ val->intval = !gpio_get_value(gpio); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int jz_usb_get_power_prop(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ struct jz_battery_info *bat_info = container_of(psy, struct jz_battery_info, usb); ++ return jz_get_power_prop(bat_info, psy, psp, val); ++} ++ ++static int jz_ac_get_power_prop(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ struct jz_battery_info *bat_info = container_of(psy, struct jz_battery_info, ac); ++ return jz_get_power_prop(bat_info, psy, psp, val); ++} ++ ++ ++static enum power_supply_property jz_power_props[] = { ++ POWER_SUPPLY_PROP_ONLINE, ++}; ++ ++static struct power_supply jz_ac = { ++ .name = "ac", ++ .type = POWER_SUPPLY_TYPE_MAINS, ++ .properties = jz_power_props, ++ .num_properties = ARRAY_SIZE(jz_power_props), ++ .get_property = jz_ac_get_power_prop, ++}; ++ ++static struct power_supply jz_usb = { ++ .name = "usb", ++ .type = POWER_SUPPLY_TYPE_USB, ++ .properties = jz_power_props, ++ .num_properties = ARRAY_SIZE(jz_power_props), ++ .get_property = jz_usb_get_power_prop, ++}; ++ ++ ++/********************************************************************* ++ * Battery properties ++ *********************************************************************/ ++ ++static long jz_read_bat(struct power_supply *psy) ++{ ++ struct jz_battery_info *bat_info = ps_to_jz_battery(psy); ++ enum jz_adc_battery_scale scale; ++ ++ if (bat_info->pdata->max_voltag > 2500000) ++ scale = JZ_ADC_BATTERY_SCALE_7V5; ++ else ++ scale = JZ_ADC_BATTERY_SCALE_2V5; ++ ++ return jz4740_adc_read_battery_voltage(psy->dev->parent->parent, scale); ++} ++ ++static int jz_bat_get_capacity(struct power_supply *psy) ++{ ++ int ret; ++ struct jz_battery_info *bat_info = ps_to_jz_battery(psy); ++ ++ ret = jz_read_bat(psy); ++ ++ if (ret < 0) ++ return ret; ++ ++ ret = (ret - bat_info->pdata->min_voltag) * 100 ++ / (bat_info->pdata->max_voltag - bat_info->pdata->min_voltag); ++ ++ if (ret > 100) ++ ret = 100; ++ else if (ret < 0) ++ ret = 0; ++ ++ return ret; ++} ++ ++static int jz_bat_get_property(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ struct jz_battery_info *bat_info = ps_to_jz_battery(psy) ++ ++ switch (psp) { ++ case POWER_SUPPLY_PROP_STATUS: ++ val->intval = bat_info->bat_status; ++ break; ++ case POWER_SUPPLY_PROP_TECHNOLOGY: ++ val->intval = bat_info->pdata->batt_tech; ++ break; ++ case POWER_SUPPLY_PROP_HEALTH: ++ if(jz_read_bat(psy) < bat_info->pdata->min_voltag) { ++ dev_dbg(psy->dev, "%s: battery is dead," ++ "voltage too low!\n", __func__); ++ val->intval = POWER_SUPPLY_HEALTH_DEAD; ++ } else { ++ dev_dbg(psy->dev, "%s: battery is good," ++ "voltage normal.\n", __func__); ++ val->intval = POWER_SUPPLY_HEALTH_GOOD; ++ } ++ break; ++ case POWER_SUPPLY_PROP_CAPACITY: ++ val->intval = jz_bat_get_capacity(psy); ++ dev_dbg(psy->dev, "%s: battery_capacity = %d\n", ++ __func__, val->intval); ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_NOW: ++ val->intval = jz_read_bat(psy); ++ if (val->intval < 0) ++ return val->intval; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_MAX: ++ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: ++ val->intval = bat_info->pdata->max_voltag; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: ++ val->intval = bat_info->pdata->min_voltag; ++ break; ++ case POWER_SUPPLY_PROP_PRESENT: ++ val->intval = 1; ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static void jz_bat_external_power_changed(struct power_supply *psy) ++{ ++ struct jz_battery_info *bat_info = ps_to_jz_battery(psy); ++ ++ cancel_delayed_work(&bat_info->bat_work); ++ queue_delayed_work(bat_info->monitor_wqueue, &bat_info->bat_work, HZ / 8); ++} ++ ++static char *status_text[] = { ++ [POWER_SUPPLY_STATUS_UNKNOWN] = "Unknown", ++ [POWER_SUPPLY_STATUS_CHARGING] = "Charging", ++ [POWER_SUPPLY_STATUS_DISCHARGING] = "Discharging", ++ [POWER_SUPPLY_STATUS_NOT_CHARGING] = "Not charging", ++}; ++ ++static void jz_bat_update(struct power_supply *psy) ++{ ++ struct jz_battery_info *bat_info = ps_to_jz_battery(psy); ++ ++ int old_status = bat_info->bat_status; ++ static unsigned long old_batt_vol = 0; ++ unsigned long batt_vol = jz_read_bat(psy); ++ ++ mutex_lock(&bat_info->work_lock); ++ ++ if (gpio_is_valid(bat_info->pdata->charg_stat_gpio)) { ++ if(!gpio_get_value(bat_info->pdata->charg_stat_gpio)) ++ bat_info->bat_status = POWER_SUPPLY_STATUS_CHARGING; ++ else ++ bat_info->bat_status = POWER_SUPPLY_STATUS_NOT_CHARGING; ++ dev_dbg(psy->dev, "%s: battery status=%s\n", ++ __func__, status_text[bat_info->bat_status]); ++ ++ if (old_status != bat_info->bat_status) { ++ dev_dbg(psy->dev, "%s %s -> %s\n", ++ psy->name, ++ status_text[old_status], ++ status_text[bat_info->bat_status]); ++ ++ power_supply_changed(psy); ++ } ++ } ++ ++ if (old_batt_vol - batt_vol > 50000) { ++ dev_dbg(psy->dev, "voltage change : %ld -> %ld\n", ++ old_batt_vol, batt_vol); ++ power_supply_changed(psy); ++ old_batt_vol = batt_vol; ++ } ++ ++ mutex_unlock(&bat_info->work_lock); ++} ++ ++static enum power_supply_property jz_bat_main_props[] = { ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_HEALTH, ++ POWER_SUPPLY_PROP_CAPACITY, /* in percents! */ ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_VOLTAGE_MAX, ++ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, ++ POWER_SUPPLY_PROP_PRESENT, ++}; ++ ++struct power_supply bat_ps = { ++ .name = "battery", ++ .type = POWER_SUPPLY_TYPE_BATTERY, ++ .properties = jz_bat_main_props, ++ .num_properties = ARRAY_SIZE(jz_bat_main_props), ++ .get_property = jz_bat_get_property, ++ .external_power_changed = jz_bat_external_power_changed, ++ .use_for_apm = 1, ++}; ++ ++static void jz_bat_work(struct work_struct *work) ++{ ++ /* query interval too small will increase system workload*/ ++ const int interval = HZ * 30; ++ struct jz_battery_info *bat_info = container_of(work,struct jz_battery_info, bat_work.work); ++ ++ jz_bat_update(&bat_info->bat); ++ queue_delayed_work(bat_info->monitor_wqueue, ++ &bat_info->bat_work, interval); ++} ++ ++#ifdef CONFIG_PM ++static int jz_bat_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ struct jz_battery_info *bat_info = platform_get_drvdata(pdev); ++ ++ bat_info->bat_status = POWER_SUPPLY_STATUS_UNKNOWN; ++ ++ return 0; ++} ++ ++static int jz_bat_resume(struct platform_device *pdev) ++{ ++ struct jz_battery_info *bat_info = platform_get_drvdata(pdev); ++ ++ bat_info->bat_status = POWER_SUPPLY_STATUS_UNKNOWN; ++ ++ cancel_delayed_work(&bat_info->bat_work); ++ queue_delayed_work(bat_info->monitor_wqueue, &bat_info->bat_work, HZ/10); ++ ++ return 0; ++} ++#else ++#define jz_bat_suspend NULL ++#define jz_bat_resume NULL ++#endif ++ ++static int jz_bat_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct jz_battery_info *bat_info; ++ ++ bat_info = kzalloc(sizeof(struct jz_battery_info), GFP_KERNEL); ++ ++ if (!bat_info) { ++ return -ENOMEM; ++ } ++ ++ if (!pdev->dev.platform_data) { ++ dev_err(&pdev->dev, "Please set battery info\n"); ++ ret = -EINVAL; ++ goto err_platform_data; ++ } ++ platform_set_drvdata(pdev, bat_info); ++ bat_info->pdata = pdev->dev.platform_data; ++ bat_info->bat = bat_ps; ++ bat_info->usb = jz_usb; ++ bat_info->ac = jz_ac; ++ mutex_init(&bat_info->work_lock); ++ INIT_DELAYED_WORK(&bat_info->bat_work, jz_bat_work); ++ ++ if (gpio_is_valid(bat_info->pdata->dc_dect_gpio)) { ++ ret = gpio_request(bat_info->pdata->dc_dect_gpio, "AC/DC DECT"); ++ if (ret) { ++ dev_err(&pdev->dev, "ac/dc dect gpio request failed.\n"); ++ ++ goto err_dc_gpio_request; ++ } ++ ret = gpio_direction_input(bat_info->pdata->dc_dect_gpio); ++ if (ret) { ++ dev_err(&pdev->dev, "ac/dc dect gpio direction failed.\n"); ++ ++ goto err_dc_gpio_direction; ++ } ++ } ++ ++ if (gpio_is_valid(bat_info->pdata->usb_dect_gpio)) { ++ ret = gpio_request(bat_info->pdata->usb_dect_gpio, "USB DECT"); ++ if (ret) { ++ dev_err(&pdev->dev, "usb dect gpio request failed.\n"); ++ ++ goto err_usb_gpio_request; ++ } ++ ret = gpio_direction_input(bat_info->pdata->usb_dect_gpio); ++ if (ret) { ++ dev_err(&pdev->dev, "usb dect gpio set direction failed.\n"); ++ goto err_usb_gpio_direction; ++ } ++ ++ jz_gpio_disable_pullup(bat_info->pdata->usb_dect_gpio); ++ /* TODO: Use generic gpio is better */ ++ } ++ ++ if (gpio_is_valid(bat_info->pdata->charg_stat_gpio)) { ++ ret = gpio_request(bat_info->pdata->charg_stat_gpio, "CHARG STAT"); ++ if (ret) { ++ dev_err(&pdev->dev, "charger state gpio request failed.\n"); ++ goto err_charg_gpio_request; ++ } ++ ret = gpio_direction_input(bat_info->pdata->charg_stat_gpio); ++ if (ret) { ++ dev_err(&pdev->dev, "charger state gpio set direction failed.\n"); ++ goto err_charg_gpio_direction; ++ } ++ } ++ ++ if (gpio_is_valid(bat_info->pdata->dc_dect_gpio)) { ++ ret = power_supply_register(&pdev->dev, &bat_info->ac); ++ if (ret) { ++ dev_err(&pdev->dev, "power supply ac/dc register failed.\n"); ++ goto err_power_register_ac; ++ } ++ } ++ ++ if (gpio_is_valid(bat_info->pdata->usb_dect_gpio)) { ++ ret = power_supply_register(&pdev->dev, &bat_info->usb); ++ if (ret) { ++ dev_err(&pdev->dev, "power supply usb register failed.\n"); ++ goto err_power_register_usb; ++ } ++ } ++ ++ if (gpio_is_valid(bat_info->pdata->charg_stat_gpio)) { ++ ret = power_supply_register(&pdev->dev, &bat_info->bat); ++ if (ret) { ++ dev_err(&pdev->dev, "power supply battery register failed.\n"); ++ goto err_power_register_bat; ++ } else { ++ bat_info->monitor_wqueue = create_singlethread_workqueue("jz_battery"); ++ if (!bat_info->monitor_wqueue) { ++ return -ESRCH; ++ } ++ queue_delayed_work(bat_info->monitor_wqueue, &bat_info->bat_work, HZ * 1); ++ } ++ } ++ printk(KERN_INFO "jz_bat init success.\n"); ++ return ret; ++ ++err_power_register_bat: ++ power_supply_unregister(&bat_info->usb); ++err_power_register_usb: ++ power_supply_unregister(&bat_info->ac); ++err_power_register_ac: ++err_charg_gpio_direction: ++ gpio_free(bat_info->pdata->charg_stat_gpio); ++err_charg_gpio_request: ++err_usb_gpio_direction: ++ gpio_free(bat_info->pdata->usb_dect_gpio); ++err_usb_gpio_request: ++err_dc_gpio_direction: ++ gpio_free(bat_info->pdata->dc_dect_gpio); ++err_dc_gpio_request: ++err_platform_data: ++ kfree(bat_info); ++ return ret; ++} ++ ++static int jz_bat_remove(struct platform_device *pdev) ++{ ++ struct jz_battery_info *bat_info = platform_get_drvdata(pdev); ++ ++ if (bat_info->pdata) { ++ if (gpio_is_valid(bat_info->pdata->dc_dect_gpio)) ++ gpio_free(bat_info->pdata->dc_dect_gpio); ++ if (gpio_is_valid(bat_info->pdata->usb_dect_gpio)) ++ gpio_free(bat_info->pdata->usb_dect_gpio); ++ if (gpio_is_valid(bat_info->pdata->charg_stat_gpio)) ++ gpio_free(bat_info->pdata->charg_stat_gpio); ++ } ++ ++ power_supply_unregister(&bat_ps); ++ power_supply_unregister(&jz_ac); ++ power_supply_unregister(&jz_usb); ++ ++ return 0; ++} ++ ++static struct platform_driver jz_bat_driver = { ++ .probe = jz_bat_probe, ++ .remove = __devexit_p(jz_bat_remove), ++ .suspend = jz_bat_suspend, ++ .resume = jz_bat_resume, ++ .driver = { ++ .name = "jz4740-battery", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init jz_bat_init(void) ++{ ++ return platform_driver_register(&jz_bat_driver); ++} ++module_init(jz_bat_init); ++ ++static void __exit jz_bat_exit(void) ++{ ++ platform_driver_unregister(&jz_bat_driver); ++} ++module_exit(jz_bat_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Jiejing Zhang <kzjeef@gmail.com>"); ++MODULE_DESCRIPTION("JZ4720/JZ4740 SoC battery driver"); +diff -ruN linux-2.6.31-vanilla/drivers/rtc/rtc-jz4740.c linux-2.6.31/drivers/rtc/rtc-jz4740.c +--- linux-2.6.31-vanilla/drivers/rtc/rtc-jz4740.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/rtc/rtc-jz4740.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,325 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC RTC driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/spinlock.h> ++#include <linux/rtc.h> ++ ++#define JZ_REG_RTC_CTRL 0x00 ++#define JZ_REG_RTC_SEC 0x04 ++#define JZ_REG_RTC_SEC_ALARM 0x08 ++#define JZ_REG_REGULATOR 0x0C ++ ++#define JZ_RTC_CTRL_WRDY BIT(7) ++#define JZ_RTC_CTRL_1HZ BIT(6) ++#define JZ_RTC_CTRL_1HZ_IRQ BIT(5) ++#define JZ_RTC_CTRL_AF BIT(4) ++#define JZ_RTC_CTRL_AF_IRQ BIT(3) ++#define JZ_RTC_CTRL_AE BIT(2) ++#define JZ_RTC_CTRL_ENABLE BIT(0) ++ ++struct jz4740_rtc { ++ struct resource *mem; ++ void __iomem *base; ++ ++ struct rtc_device *rtc; ++ ++ unsigned int irq; ++ ++ spinlock_t lock; ++}; ++ ++static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) ++{ ++ return readl(rtc->base + reg); ++} ++ ++static inline void jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) ++{ ++ uint32_t ctrl; ++ do { ++ ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); ++ } while (!(ctrl & JZ_RTC_CTRL_WRDY)); ++} ++ ++ ++static inline void jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg, ++ uint32_t val) ++{ ++ jz4740_rtc_wait_write_ready(rtc); ++ writel(val, rtc->base + reg); ++} ++ ++static void jz4740_rtc_ctrl_set_bits(struct jz4740_rtc *rtc, uint32_t mask, ++ uint32_t val) ++{ ++ unsigned long flags; ++ uint32_t ctrl; ++ ++ spin_lock_irqsave(&rtc->lock, flags); ++ ++ ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); ++ ++ /* Don't clear interrupt flags by accident */ ++ ctrl |= JZ_RTC_CTRL_1HZ | JZ_RTC_CTRL_AF; ++ ++ ctrl &= ~mask; ++ ctrl |= val; ++ ++ jz4740_rtc_reg_write(rtc, JZ_REG_RTC_CTRL, ctrl); ++ ++ spin_unlock_irqrestore(&rtc->lock, flags); ++} ++ ++static inline struct jz4740_rtc *dev_to_rtc(struct device *dev) ++{ ++ return dev_get_drvdata(dev); ++} ++ ++static int jz4740_rtc_read_time(struct device *dev, struct rtc_time *time) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ uint32_t secs, secs2; ++ ++ secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC); ++ secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC); ++ ++ while (secs != secs2) { ++ secs = secs2; ++ secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC); ++ } ++ ++ rtc_time_to_tm(secs, time); ++ ++ return rtc_valid_tm(time); ++} ++ ++static int jz4740_rtc_set_mmss(struct device *dev, unsigned long secs) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ ++ if ((uint32_t)secs != secs) ++ return -EINVAL; ++ ++ jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC, secs); ++ ++ return 0; ++} ++ ++static int jz4740_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ uint32_t secs, secs2; ++ uint32_t ctrl; ++ ++ secs = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC_ALARM); ++ secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC_ALARM); ++ ++ while (secs != secs2){ ++ secs = secs2; ++ secs2 = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_SEC_ALARM); ++ } ++ ++ ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); ++ ++ alrm->enabled = !!(ctrl & JZ_RTC_CTRL_AE); ++ alrm->pending = !!(ctrl & JZ_RTC_CTRL_AF); ++ ++ rtc_time_to_tm(secs, &alrm->time); ++ ++ return rtc_valid_tm(&alrm->time); ++} ++ ++static int jz4740_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ unsigned long secs; ++ ++ rtc_tm_to_time(&alrm->time, &secs); ++ ++ if ((uint32_t)secs != secs) ++ return -EINVAL; ++ ++ jz4740_rtc_reg_write(rtc, JZ_REG_RTC_SEC_ALARM, (uint32_t)secs); ++ jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_AE, ++ alrm->enabled ? JZ_RTC_CTRL_AE : 0); ++ ++ return 0; ++} ++ ++static int jz4740_rtc_update_irq_enable(struct device *dev, unsigned int enabled) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_1HZ_IRQ, ++ enabled ? JZ_RTC_CTRL_1HZ_IRQ : 0); ++ return 0; ++} ++ ++ ++static int jz4740_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) ++{ ++ struct jz4740_rtc *rtc = dev_to_rtc(dev); ++ jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_AF_IRQ, ++ enabled ? JZ_RTC_CTRL_AF_IRQ : 0); ++ return 0; ++} ++ ++static struct rtc_class_ops jz4740_rtc_ops = { ++ .read_time = jz4740_rtc_read_time, ++ .set_mmss = jz4740_rtc_set_mmss, ++ .read_alarm = jz4740_rtc_read_alarm, ++ .set_alarm = jz4740_rtc_set_alarm, ++ .update_irq_enable = jz4740_rtc_update_irq_enable, ++ .alarm_irq_enable = jz4740_rtc_alarm_irq_enable, ++}; ++ ++static irqreturn_t jz4740_rtc_irq(int irq, void *data) ++{ ++ struct jz4740_rtc *rtc = data; ++ uint32_t ctrl; ++ unsigned long events = 0; ++ ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); ++ ++ if (ctrl & JZ_RTC_CTRL_1HZ) ++ events |= (RTC_UF | RTC_IRQF); ++ ++ if (ctrl & JZ_RTC_CTRL_AF) ++ events |= (RTC_AF | RTC_IRQF); ++ ++ rtc_update_irq(rtc->rtc, 1, events); ++ ++ jz4740_rtc_ctrl_set_bits(rtc, JZ_RTC_CTRL_1HZ | JZ_RTC_CTRL_AF, 0); ++ ++ return IRQ_HANDLED; ++} ++ ++static int __devinit jz4740_rtc_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct jz4740_rtc *rtc; ++ ++ rtc = kmalloc(sizeof(*rtc), GFP_KERNEL); ++ ++ rtc->irq = platform_get_irq(pdev, 0); ++ ++ if (rtc->irq < 0) { ++ ret = -ENOENT; ++ dev_err(&pdev->dev, "Failed to get platform irq\n"); ++ goto err_free; ++ } ++ ++ rtc->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!rtc->mem) { ++ ret = -ENOENT; ++ dev_err(&pdev->dev, "Failed to get platform mmio memory\n"); ++ goto err_free; ++ } ++ ++ rtc->mem = request_mem_region(rtc->mem->start, resource_size(rtc->mem), ++ pdev->name); ++ ++ if (!rtc->mem) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to request mmio memory region\n"); ++ goto err_free; ++ } ++ ++ rtc->base = ioremap_nocache(rtc->mem->start, resource_size(rtc->mem)); ++ ++ if (!rtc->base) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); ++ goto err_release_mem_region; ++ } ++ ++ platform_set_drvdata(pdev, rtc); ++ ++ rtc->rtc = rtc_device_register(pdev->name, &pdev->dev, &jz4740_rtc_ops, ++ THIS_MODULE); ++ ++ if (IS_ERR(rtc->rtc)) { ++ ret = PTR_ERR(rtc->rtc); ++ dev_err(&pdev->dev, "Failed to register rtc device: %d\n", ret); ++ goto err_iounmap; ++ } ++ ++ ret = request_irq(rtc->irq, jz4740_rtc_irq, 0, ++ pdev->name, rtc); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to request rtc irq: %d\n", ret); ++ goto err_unregister_rtc; ++ } ++ printk("rtc-ctrl: %d\n", jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL)); ++ ++ return 0; ++ ++err_unregister_rtc: ++ rtc_device_unregister(rtc->rtc); ++err_iounmap: ++ platform_set_drvdata(pdev, NULL); ++ iounmap(rtc->base); ++err_release_mem_region: ++ release_mem_region(rtc->mem->start, resource_size(rtc->mem)); ++err_free: ++ kfree(rtc); ++ ++ return ret; ++} ++ ++static int __devexit jz4740_rtc_remove(struct platform_device *pdev) ++{ ++ struct jz4740_rtc *rtc = platform_get_drvdata(pdev); ++ ++ rtc_device_unregister(rtc->rtc); ++ ++ iounmap(rtc->base); ++ release_mem_region(rtc->mem->start, resource_size(rtc->mem)); ++ ++ kfree(rtc); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++struct platform_driver jz4740_rtc_driver = { ++ .probe = jz4740_rtc_probe, ++ .remove = __devexit_p(jz4740_rtc_remove), ++ .driver = { ++ .name = "jz4740-rtc", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init jz4740_rtc_init(void) ++{ ++ return platform_driver_register(&jz4740_rtc_driver); ++} ++module_init(jz4740_rtc_init); ++ ++static void __exit jz4740_rtc_exit(void) ++{ ++ platform_driver_unregister(&jz4740_rtc_driver); ++} ++module_exit(jz4740_rtc_exit); ++ ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("RTC driver for the JZ4720/JZ4740 SoC\n"); ++MODULE_ALIAS("platform:jz4740-rtc"); ++MODULE_ALIAS("platform:jz4720-rtc"); +diff -ruN linux-2.6.31-vanilla/drivers/usb/gadget/jz4740_udc.c linux-2.6.31/drivers/usb/gadget/jz4740_udc.c +--- linux-2.6.31-vanilla/drivers/usb/gadget/jz4740_udc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/usb/gadget/jz4740_udc.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,2337 @@ ++/* ++ * linux/drivers/usb/gadget/jz4740_udc.c ++ * ++ * Ingenic JZ4740 on-chip high speed USB device controller ++ * ++ * Copyright (C) 2006 - 2008 Ingenic Semiconductor Inc. ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++/* ++ * This device has ep0, two bulk-in/interrupt-in endpoints, and one bulk-out endpoint. ++ * ++ * - Endpoint numbering is fixed: ep0, ep1in-int, ep2in-bulk, ep1out-bulk. ++ * - DMA works with bulk-in (channel 1) and bulk-out (channel 2) endpoints. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> ++#include <linux/ioport.h> ++#include <linux/slab.h> ++#include <linux/errno.h> ++#include <linux/init.h> ++#include <linux/list.h> ++#include <linux/interrupt.h> ++#include <linux/proc_fs.h> ++#include <linux/usb.h> ++#include <linux/usb/gadget.h> ++ ++#include <asm/byteorder.h> ++#include <asm/io.h> ++#include <asm/irq.h> ++#include <asm/system.h> ++#include <asm/jzsoc.h> ++ ++#include "jz4740_udc.h" ++ ++#define JZ_REG_UDC_FADDR 0x00 /* Function Address 8-bit */ ++#define JZ_REG_UDC_POWER 0x01 /* Power Managemetn 8-bit */ ++#define JZ_REG_UDC_INTRIN 0x02 /* Interrupt IN 16-bit */ ++#define JZ_REG_UDC_INTROUT 0x04 /* Interrupt OUT 16-bit */ ++#define JZ_REG_UDC_INTRINE 0x06 /* Intr IN enable 16-bit */ ++#define JZ_REG_UDC_INTROUTE 0x08 /* Intr OUT enable 16-bit */ ++#define JZ_REG_UDC_INTRUSB 0x0a /* Interrupt USB 8-bit */ ++#define JZ_REG_UDC_INTRUSBE 0x0b /* Interrupt USB Enable 8-bit */ ++#define JZ_REG_UDC_FRAME 0x0c /* Frame number 16-bit */ ++#define JZ_REG_UDC_INDEX 0x0e /* Index register 8-bit */ ++#define JZ_REG_UDC_TESTMODE 0x0f /* USB test mode 8-bit */ ++ ++#define JZ_REG_UDC_CSR0 0x12 /* EP0 CSR 8-bit */ ++#define JZ_REG_UDC_INMAXP 0x10 /* EP1-2 IN Max Pkt Size 16-bit */ ++#define JZ_REG_UDC_INCSR 0x12 /* EP1-2 IN CSR LSB 8/16bit */ ++#define JZ_REG_UDC_INCSRH 0x13 /* EP1-2 IN CSR MSB 8-bit */ ++#define JZ_REG_UDC_OUTMAXP 0x14 /* EP1 OUT Max Pkt Size 16-bit */ ++#define JZ_REG_UDC_OUTCSR 0x16 /* EP1 OUT CSR LSB 8/16bit */ ++#define JZ_REG_UDC_OUTCSRH 0x17 /* EP1 OUT CSR MSB 8-bit */ ++#define JZ_REG_UDC_OUTCOUNT 0x18 /* bytes in EP0/1 OUT FIFO 16-bit */ ++ ++#define JZ_REG_UDC_EP_FIFO(x) (4 * (x) + 0x20) ++ ++#define JZ_REG_UDC_EPINFO 0x78 /* Endpoint information */ ++#define JZ_REG_UDC_RAMINFO 0x79 /* RAM information */ ++ ++#define JZ_REG_UDC_INTR 0x200 /* DMA pending interrupts */ ++#define JZ_REG_UDC_CNTL1 0x204 /* DMA channel 1 control */ ++#define JZ_REG_UDC_ADDR1 0x208 /* DMA channel 1 AHB memory addr */ ++#define JZ_REG_UDC_COUNT1 0x20c /* DMA channel 1 byte count */ ++#define JZ_REG_UDC_CNTL2 0x214 /* DMA channel 2 control */ ++#define JZ_REG_UDC_ADDR2 0x218 /* DMA channel 2 AHB memory addr */ ++#define JZ_REG_UDC_COUNT2 0x21c /* DMA channel 2 byte count */ ++ ++#ifndef DEBUG ++# define DEBUG(fmt,args...) do {} while(0) ++#endif ++#ifndef DEBUG_EP0 ++# define NO_STATES ++# define DEBUG_EP0(fmt,args...) do {} while(0) ++#endif ++#ifndef DEBUG_SETUP ++# define DEBUG_SETUP(fmt,args...) do {} while(0) ++#endif ++ ++static unsigned int udc_debug = 0; /* 0: normal mode, 1: test udc cable type mode */ ++ ++module_param(udc_debug, int, 0); ++MODULE_PARM_DESC(udc_debug, "test udc cable or power type"); ++ ++static unsigned int use_dma = 0; /* 1: use DMA, 0: use PIO */ ++ ++module_param(use_dma, int, 0); ++MODULE_PARM_DESC(use_dma, "DMA mode enable flag"); ++ ++struct jz4740_udc *the_controller; ++ ++/* ++ * Local declarations. ++ */ ++static void jz4740_ep0_kick(struct jz4740_udc *dev, struct jz4740_ep *ep); ++static void jz4740_handle_ep0(struct jz4740_udc *dev, uint32_t intr); ++ ++static void done(struct jz4740_ep *ep, struct jz4740_request *req, ++ int status); ++static void pio_irq_enable(struct jz4740_ep *ep); ++static void pio_irq_disable(struct jz4740_ep *ep); ++static void stop_activity(struct jz4740_udc *dev, ++ struct usb_gadget_driver *driver); ++static void nuke(struct jz4740_ep *ep, int status); ++static void flush(struct jz4740_ep *ep); ++static void udc_set_address(struct jz4740_udc *dev, unsigned char address); ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* inline functions of register read/write/set/clear */ ++ ++static inline uint8_t usb_readb(struct jz4740_udc *udc, size_t reg) ++{ ++ return readb(udc->base + reg); ++} ++ ++static inline uint16_t usb_readw(struct jz4740_udc *udc, size_t reg) ++{ ++ return readw(udc->base + reg); ++} ++ ++static inline uint32_t usb_readl(struct jz4740_udc *udc, size_t reg) ++{ ++ return readl(udc->base + reg); ++} ++ ++static inline void usb_writeb(struct jz4740_udc *udc, size_t reg, uint8_t val) ++{ ++ writeb(val, udc->base + reg); ++} ++ ++static inline void usb_writew(struct jz4740_udc *udc, size_t reg, uint16_t val) ++{ ++ writew(val, udc->base + reg); ++} ++ ++static inline void usb_writel(struct jz4740_udc *udc, size_t reg, uint32_t val) ++{ ++ writel(val, udc->base + reg); ++} ++ ++static inline void usb_setb(struct jz4740_udc *udc, size_t reg, uint8_t mask) ++{ ++ usb_writeb(udc, reg, usb_readb(udc, reg) | mask); ++} ++ ++static inline void usb_setw(struct jz4740_udc *udc, size_t reg, uint8_t mask) ++{ ++ usb_writew(udc, reg, usb_readw(udc, reg) | mask); ++} ++ ++static inline void usb_setl(struct jz4740_udc *udc, size_t reg, uint32_t mask) ++{ ++ usb_writel(udc, reg, usb_readl(udc, reg) | mask); ++} ++ ++static inline void usb_clearb(struct jz4740_udc *udc, size_t reg, uint8_t mask) ++{ ++ usb_writeb(udc, reg, usb_readb(udc, reg) & ~mask); ++} ++ ++static inline void usb_clearw(struct jz4740_udc *udc, size_t reg, uint16_t mask) ++{ ++ usb_writew(udc, reg, usb_readw(udc, reg) & ~mask); ++} ++ ++static inline void usb_clearl(struct jz4740_udc *udc, size_t reg, uint32_t mask) ++{ ++ usb_writel(udc, reg, usb_readl(udc, reg) & ~mask); ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static inline void jz_udc_set_index(struct jz4740_udc *udc, uint8_t index) ++{ ++ usb_writeb(udc, JZ_REG_UDC_INDEX, index); ++} ++ ++static inline void jz_udc_select_ep(struct jz4740_ep *ep) ++{ ++ jz_udc_set_index(ep->dev, ep_index(ep)); ++} ++ ++static inline int write_packet(struct jz4740_ep *ep, ++ struct jz4740_request *req, int max) ++{ ++ uint8_t *buf; ++ int length, nlong, nbyte; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ buf = req->req.buf + req->req.actual; ++ prefetch(buf); ++ ++ length = req->req.length - req->req.actual; ++ length = min(length, max); ++ req->req.actual += length; ++ ++ DEBUG("Write %d (max %d), fifo %x\n", length, max, ep->fifo); ++ ++ nlong = length >> 2; ++ nbyte = length & 0x3; ++ while (nlong--) { ++ usb_writel(ep->dev, ep->fifo, *((uint32_t *)buf)); ++ buf += 4; ++ } ++ while (nbyte--) { ++ usb_writeb(ep->dev, ep->fifo, *buf++); ++ } ++ ++ return length; ++} ++ ++static inline int read_packet(struct jz4740_ep *ep, ++ struct jz4740_request *req, int count) ++{ ++ uint8_t *buf; ++ int length, nlong, nbyte; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ buf = req->req.buf + req->req.actual; ++ prefetchw(buf); ++ ++ length = req->req.length - req->req.actual; ++ length = min(length, count); ++ req->req.actual += length; ++ ++ DEBUG("Read %d, fifo %x\n", length, ep->fifo); ++ ++ nlong = length >> 2; ++ nbyte = length & 0x3; ++ while (nlong--) { ++ *((uint32_t *)buf) = usb_readl(ep->dev, ep->fifo); ++ buf += 4; ++ } ++ while (nbyte--) { ++ *buf++ = usb_readb(ep->dev, ep->fifo); ++ } ++ ++ return length; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * udc_disable - disable USB device controller ++ */ ++static void udc_disable(struct jz4740_udc *dev) ++{ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ udc_set_address(dev, 0); ++ ++ /* Disable interrupts */ ++ usb_writew(dev, JZ_REG_UDC_INTRINE, 0); ++ usb_writew(dev, JZ_REG_UDC_INTROUTE, 0); ++ usb_writeb(dev, JZ_REG_UDC_INTRUSBE, 0); ++ ++ /* Disable DMA */ ++ usb_writel(dev, JZ_REG_UDC_CNTL1, 0); ++ usb_writel(dev, JZ_REG_UDC_CNTL2, 0); ++ ++ /* Disconnect from usb */ ++ usb_clearb(dev, JZ_REG_UDC_POWER, USB_POWER_SOFTCONN); ++ ++ /* Disable the USB PHY */ ++#ifdef CONFIG_SOC_JZ4740 ++ REG_CPM_SCR &= ~CPM_SCR_USBPHY_ENABLE; ++#elif defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ REG_CPM_OPCR &= ~CPM_OPCR_UDCPHY_ENABLE; ++#endif ++ ++ dev->ep0state = WAIT_FOR_SETUP; ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ return; ++} ++ ++/* ++ * udc_reinit - initialize software state ++ */ ++static void udc_reinit(struct jz4740_udc *dev) ++{ ++ int i; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ /* device/ep0 records init */ ++ INIT_LIST_HEAD(&dev->gadget.ep_list); ++ INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); ++ dev->ep0state = WAIT_FOR_SETUP; ++ ++ for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { ++ struct jz4740_ep *ep = &dev->ep[i]; ++ ++ if (i != 0) ++ list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); ++ ++ INIT_LIST_HEAD(&ep->queue); ++ ep->desc = 0; ++ ep->stopped = 0; ++ ep->pio_irqs = 0; ++ } ++} ++ ++/* until it's enabled, this UDC should be completely invisible ++ * to any USB host. ++ */ ++static void udc_enable(struct jz4740_udc *dev) ++{ ++ int i; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ /* UDC state is incorrect - Added by River */ ++ if (dev->state != UDC_STATE_ENABLE) { ++ return; ++ } ++ ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ /* Flush FIFO for each */ ++ for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { ++ struct jz4740_ep *ep = &dev->ep[i]; ++ ++ jz_udc_set_index(dev, ep_index(ep)); ++ flush(ep); ++ } ++ ++ /* Set this bit to allow the UDC entering low-power mode when ++ * there are no actions on the USB bus. ++ * UDC still works during this bit was set. ++ */ ++ __cpm_stop_udc(); ++ ++ /* Enable the USB PHY */ ++#ifdef CONFIG_SOC_JZ4740 ++ REG_CPM_SCR |= CPM_SCR_USBPHY_ENABLE; ++#elif defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ REG_CPM_OPCR |= CPM_OPCR_UDCPHY_ENABLE; ++#endif ++ ++ /* Disable interrupts */ ++/* usb_writew(dev, JZ_REG_UDC_INTRINE, 0); ++ usb_writew(dev, JZ_REG_UDC_INTROUTE, 0); ++ usb_writeb(dev, JZ_REG_UDC_INTRUSBE, 0);*/ ++ ++ /* Enable interrupts */ ++ usb_setw(dev, JZ_REG_UDC_INTRINE, USB_INTR_EP0); ++ usb_setb(dev, JZ_REG_UDC_INTRUSBE, USB_INTR_RESET); ++ /* Don't enable rest of the interrupts */ ++ /* usb_setw(dev, JZ_REG_UDC_INTRINE, USB_INTR_INEP1 | USB_INTR_INEP2); ++ usb_setw(dev, JZ_REG_UDC_INTROUTE, USB_INTR_OUTEP1); */ ++ ++ /* Enable SUSPEND */ ++ /* usb_setb(dev, JZ_REG_UDC_POWER, USB_POWER_SUSPENDM); */ ++ ++ /* Enable HS Mode */ ++ usb_setb(dev, JZ_REG_UDC_POWER, USB_POWER_HSENAB); ++ ++ /* Let host detect UDC: ++ * Software must write a 1 to the PMR:USB_POWER_SOFTCONN bit to turn this ++ * transistor on and pull the USBDP pin HIGH. ++ */ ++ usb_setb(dev, JZ_REG_UDC_POWER, USB_POWER_SOFTCONN); ++ ++ return; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* keeping it simple: ++ * - one bus driver, initted first; ++ * - one function driver, initted second ++ */ ++ ++/* ++ * Register entry point for the peripheral controller driver. ++ */ ++ ++int usb_gadget_register_driver(struct usb_gadget_driver *driver) ++{ ++ struct jz4740_udc *dev = the_controller; ++ int retval; ++ ++ if (!driver || !driver->bind) { ++ return -EINVAL; ++ } ++ ++ if (!dev) { ++ return -ENODEV; ++ } ++ ++ if (dev->driver) { ++ return -EBUSY; ++ } ++ ++ /* hook up the driver */ ++ dev->driver = driver; ++ dev->gadget.dev.driver = &driver->driver; ++ ++ retval = driver->bind(&dev->gadget); ++ if (retval) { ++ DEBUG("%s: bind to driver %s --> error %d\n", dev->gadget.name, ++ driver->driver.name, retval); ++ dev->driver = 0; ++ return retval; ++ } ++ ++ /* then enable host detection and ep0; and we're ready ++ * for set_configuration as well as eventual disconnect. ++ */ ++ udc_enable(dev); ++ ++ DEBUG("%s: registered gadget driver '%s'\n", dev->gadget.name, ++ driver->driver.name); ++ ++ return 0; ++} ++ ++EXPORT_SYMBOL(usb_gadget_register_driver); ++ ++static void stop_activity(struct jz4740_udc *dev, ++ struct usb_gadget_driver *driver) ++{ ++ int i; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ /* don't disconnect drivers more than once */ ++ if (dev->gadget.speed == USB_SPEED_UNKNOWN) ++ driver = 0; ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ /* prevent new request submissions, kill any outstanding requests */ ++ for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { ++ struct jz4740_ep *ep = &dev->ep[i]; ++ ++ ep->stopped = 1; ++ ++ jz_udc_set_index(dev, ep_index(ep)); ++ nuke(ep, -ESHUTDOWN); ++ } ++ ++ /* report disconnect; the driver is already quiesced */ ++ if (driver) { ++ spin_unlock(&dev->lock); ++ driver->disconnect(&dev->gadget); ++ spin_lock(&dev->lock); ++ } ++ ++ /* re-init driver-visible data structures */ ++ udc_reinit(dev); ++} ++ ++ ++/* ++ * Unregister entry point for the peripheral controller driver. ++ */ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ struct jz4740_udc *dev = the_controller; ++ unsigned long flags; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ if (!dev) ++ return -ENODEV; ++ if (!driver || driver != dev->driver) ++ return -EINVAL; ++ if (!driver->unbind) ++ return -EBUSY; ++ ++ spin_lock_irqsave(&dev->lock, flags); ++ dev->driver = 0; ++ stop_activity(dev, driver); ++ spin_unlock_irqrestore(&dev->lock, flags); ++ ++ driver->unbind(&dev->gadget); ++ ++ udc_disable(dev); ++ ++ DEBUG("unregistered driver '%s'\n", driver->driver.name); ++ ++ return 0; ++} ++ ++EXPORT_SYMBOL(usb_gadget_unregister_driver); ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * Starting DMA using mode 1 ++ */ ++static void kick_dma(struct jz4740_ep *ep, struct jz4740_request *req) ++{ ++ struct jz4740_udc *dev = ep->dev; ++ uint32_t count = req->req.length; ++ uint32_t physaddr = virt_to_phys((void *)req->req.buf); ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ jz_udc_select_ep(ep); ++ ++ if (ep_is_in(ep)) { /* Bulk-IN transfer using DMA channel 1 */ ++ ep->reg_addr = JZ_REG_UDC_ADDR1; ++ ++ dma_cache_wback_inv((unsigned long)req->req.buf, count); ++ ++ pio_irq_enable(ep); ++ ++ usb_writeb(dev, JZ_REG_UDC_INCSRH, ++ USB_INCSRH_DMAREQENAB | USB_INCSRH_AUTOSET | USB_INCSRH_DMAREQMODE); ++ ++ usb_writel(dev, JZ_REG_UDC_ADDR1, physaddr); ++ usb_writel(dev, JZ_REG_UDC_COUNT1, count); ++ usb_writel(dev, JZ_REG_UDC_CNTL1, USB_CNTL_ENA | USB_CNTL_DIR_IN | USB_CNTL_MODE_1 | ++ USB_CNTL_INTR_EN | USB_CNTL_BURST_16 | USB_CNTL_EP(ep_index(ep))); ++ } ++ else { /* Bulk-OUT transfer using DMA channel 2 */ ++ ep->reg_addr = JZ_REG_UDC_ADDR2; ++ ++ dma_cache_wback_inv((unsigned long)req->req.buf, count); ++ ++ pio_irq_enable(ep); ++ ++ usb_setb(dev, JZ_REG_UDC_OUTCSRH, ++ USB_OUTCSRH_DMAREQENAB | USB_OUTCSRH_AUTOCLR | USB_OUTCSRH_DMAREQMODE); ++ ++ usb_writel(dev, JZ_REG_UDC_ADDR2, physaddr); ++ usb_writel(dev, JZ_REG_UDC_COUNT2, count); ++ usb_writel(dev, JZ_REG_UDC_CNTL2, USB_CNTL_ENA | USB_CNTL_MODE_1 | ++ USB_CNTL_INTR_EN | USB_CNTL_BURST_16 | USB_CNTL_EP(ep_index(ep))); ++ } ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/** Write request to FIFO (max write == maxp size) ++ * Return: 0 = still running, 1 = completed, negative = errno ++ * NOTE: INDEX register must be set for EP ++ */ ++static int write_fifo(struct jz4740_ep *ep, struct jz4740_request *req) ++{ ++ struct jz4740_udc *dev = ep->dev; ++ uint32_t max, csr; ++ uint32_t physaddr = virt_to_phys((void *)req->req.buf); ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ max = le16_to_cpu(ep->desc->wMaxPacketSize); ++ ++ if (use_dma) { ++ uint32_t dma_count; ++ ++ /* DMA interrupt generated due to the last packet loaded into the FIFO */ ++ ++ dma_count = usb_readl(dev, ep->reg_addr) - physaddr; ++ req->req.actual += dma_count; ++ ++ if (dma_count % max) { ++ /* If the last packet is less than MAXP, set INPKTRDY manually */ ++ usb_setb(dev, ep->csr, USB_INCSR_INPKTRDY); ++ } ++ ++ done(ep, req, 0); ++ if (list_empty(&ep->queue)) { ++ pio_irq_disable(ep); ++ return 1; ++ } ++ else { ++ /* advance the request queue */ ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ kick_dma(ep, req); ++ return 0; ++ } ++ } ++ ++ /* ++ * PIO mode handling starts here ... ++ */ ++ ++ csr = usb_readb(dev, ep->csr); ++ ++ if (!(csr & USB_INCSR_FFNOTEMPT)) { ++ unsigned count; ++ int is_last, is_short; ++ ++ count = write_packet(ep, req, max); ++ usb_setb(dev, ep->csr, USB_INCSR_INPKTRDY); ++ ++ /* last packet is usually short (or a zlp) */ ++ if (unlikely(count != max)) ++ is_last = is_short = 1; ++ else { ++ if (likely(req->req.length != req->req.actual) ++ || req->req.zero) ++ is_last = 0; ++ else ++ is_last = 1; ++ /* interrupt/iso maxpacket may not fill the fifo */ ++ is_short = unlikely(max < ep_maxpacket(ep)); ++ } ++ ++ DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__, ++ ep->ep.name, count, ++ is_last ? "/L" : "", is_short ? "/S" : "", ++ req->req.length - req->req.actual, req); ++ ++ /* requests complete when all IN data is in the FIFO */ ++ if (is_last) { ++ done(ep, req, 0); ++ if (list_empty(&ep->queue)) { ++ pio_irq_disable(ep); ++ } ++ return 1; ++ } ++ } else { ++ DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep)); ++ } ++ ++ return 0; ++} ++ ++/** Read to request from FIFO (max read == bytes in fifo) ++ * Return: 0 = still running, 1 = completed, negative = errno ++ * NOTE: INDEX register must be set for EP ++ */ ++static int read_fifo(struct jz4740_ep *ep, struct jz4740_request *req) ++{ ++ struct jz4740_udc *dev = ep->dev; ++ uint32_t csr; ++ unsigned count, is_short; ++ uint32_t physaddr = virt_to_phys((void *)req->req.buf); ++ ++ if (use_dma) { ++ uint32_t dma_count; ++ ++ /* DMA interrupt generated due to a packet less than MAXP loaded into the FIFO */ ++ ++ dma_count = usb_readl(dev, ep->reg_addr) - physaddr; ++ req->req.actual += dma_count; ++ ++ /* Disable interrupt and DMA */ ++ pio_irq_disable(ep); ++ usb_writel(dev, JZ_REG_UDC_CNTL2, 0); ++ ++ /* Read all bytes from this packet */ ++ count = usb_readw(dev, JZ_REG_UDC_OUTCOUNT); ++ count = read_packet(ep, req, count); ++ ++ if (count) { ++ /* If the last packet is greater than zero, clear OUTPKTRDY manually */ ++ usb_clearb(dev, ep->csr, USB_OUTCSR_OUTPKTRDY); ++ } ++ done(ep, req, 0); ++ ++ if (!list_empty(&ep->queue)) { ++ /* advance the request queue */ ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ kick_dma(ep, req); ++ } ++ ++ return 1; ++ } ++ ++ /* ++ * PIO mode handling starts here ... ++ */ ++ ++ /* make sure there's a packet in the FIFO. */ ++ csr = usb_readb(dev, ep->csr); ++ if (!(csr & USB_OUTCSR_OUTPKTRDY)) { ++ DEBUG("%s: Packet NOT ready!\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ /* read all bytes from this packet */ ++ count = usb_readw(dev, JZ_REG_UDC_OUTCOUNT); ++ ++ is_short = (count < ep->ep.maxpacket); ++ ++ count = read_packet(ep, req, count); ++ ++ DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n", ++ ep->ep.name, csr, count, ++ is_short ? "/S" : "", req, req->req.actual, req->req.length); ++ ++ /* Clear OutPktRdy */ ++ usb_clearb(dev, ep->csr, USB_OUTCSR_OUTPKTRDY); ++ ++ /* completion */ ++ if (is_short || req->req.actual == req->req.length) { ++ done(ep, req, 0); ++ ++ if (list_empty(&ep->queue)) ++ pio_irq_disable(ep); ++ return 1; ++ } ++ ++ /* finished that packet. the next one may be waiting... */ ++ return 0; ++} ++ ++/* ++ * done - retire a request; caller blocked irqs ++ * INDEX register is preserved to keep same ++ */ ++static void done(struct jz4740_ep *ep, struct jz4740_request *req, int status) ++{ ++ unsigned int stopped = ep->stopped; ++ unsigned long flags; ++ uint32_t index; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, ep); ++ list_del_init(&req->queue); ++ ++ if (likely(req->req.status == -EINPROGRESS)) ++ req->req.status = status; ++ else ++ status = req->req.status; ++ ++ if (status && status != -ESHUTDOWN) ++ DEBUG("complete %s req %p stat %d len %u/%u\n", ++ ep->ep.name, &req->req, status, ++ req->req.actual, req->req.length); ++ ++ /* don't modify queue heads during completion callback */ ++ ep->stopped = 1; ++ /* Read current index (completion may modify it) */ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ index = usb_readb(ep->dev, JZ_REG_UDC_INDEX); ++ ++ req->req.complete(&ep->ep, &req->req); ++ ++ /* Restore index */ ++ jz_udc_set_index(ep->dev, index); ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ ep->stopped = stopped; ++} ++ ++/** Enable EP interrupt */ ++static void pio_irq_enable(struct jz4740_ep *ep) ++{ ++ uint8_t index = ep_index(ep); ++ struct jz4740_udc *dev = ep->dev; ++ DEBUG("%s: EP%d %s\n", __FUNCTION__, ep_index(ep), ep_is_in(ep) ? "IN": "OUT"); ++ ++ if (ep_is_in(ep)) { ++ switch (index) { ++ case 1: ++ case 2: ++ usb_setw(dev, JZ_REG_UDC_INTRINE, BIT(index)); ++ dev->in_mask |= BIT(index); ++ break; ++ default: ++ DEBUG("Unknown endpoint: %d\n", index); ++ break; ++ } ++ } ++ else { ++ switch (index) { ++ case 1: ++ usb_setw(dev, JZ_REG_UDC_INTROUTE, BIT(index)); ++ dev->out_mask |= BIT(index); ++ break; ++ default: ++ DEBUG("Unknown endpoint: %d\n", index); ++ break; ++ } ++ } ++} ++ ++/** Disable EP interrupt */ ++static void pio_irq_disable(struct jz4740_ep *ep) ++{ ++ uint8_t index = ep_index(ep); ++ struct jz4740_udc *dev = ep->dev; ++ ++ DEBUG("%s: EP%d %s\n", __FUNCTION__, ep_index(ep), ep_is_in(ep) ? "IN": "OUT"); ++ ++ if (ep_is_in(ep)) { ++ switch (ep_index(ep)) { ++ case 1: ++ case 2: ++ usb_clearw(ep->dev, JZ_REG_UDC_INTRINE, BIT(index)); ++ dev->in_mask &= ~BIT(index); ++ break; ++ default: ++ DEBUG("Unknown endpoint: %d\n", index); ++ break; ++ } ++ } ++ else { ++ switch (ep_index(ep)) { ++ case 1: ++ usb_clearw(ep->dev, JZ_REG_UDC_INTROUTE, BIT(index)); ++ dev->out_mask &= ~BIT(index); ++ break; ++ default: ++ DEBUG("Unknown endpoint: %d\n", index); ++ break; ++ } ++ } ++} ++ ++/* ++ * nuke - dequeue ALL requests ++ */ ++static void nuke(struct jz4740_ep *ep, int status) ++{ ++ struct jz4740_request *req; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, ep); ++ ++ /* Flush FIFO */ ++ flush(ep); ++ ++ /* called with irqs blocked */ ++ while (!list_empty(&ep->queue)) { ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ done(ep, req, status); ++ } ++ ++ /* Disable IRQ if EP is enabled (has descriptor) */ ++ if (ep->desc) ++ pio_irq_disable(ep); ++} ++ ++/** Flush EP FIFO ++ * NOTE: INDEX register must be set before this call ++ */ ++static void flush(struct jz4740_ep *ep) ++{ ++ DEBUG("%s: %s\n", __FUNCTION__, ep->ep.name); ++ ++ switch (ep->type) { ++ case ep_bulk_in: ++ case ep_interrupt: ++ usb_setb(ep->dev, ep->csr, USB_INCSR_FF); ++ break; ++ case ep_bulk_out: ++ usb_setb(ep->dev, ep->csr, USB_OUTCSR_FF); ++ break; ++ case ep_control: ++ break; ++ } ++} ++ ++/** ++ * jz4740_in_epn - handle IN interrupt ++ */ ++static void jz4740_in_epn(struct jz4740_udc *dev, uint32_t ep_idx, uint32_t intr) ++{ ++ uint32_t csr; ++ struct jz4740_ep *ep = &dev->ep[ep_idx + 1]; ++ struct jz4740_request *req; ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ jz_udc_set_index(dev, ep_index(ep)); ++ ++ csr = usb_readb(dev, ep->csr); ++ DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr); ++ ++ if (csr & USB_INCSR_SENTSTALL) { ++ DEBUG("USB_INCSR_SENTSTALL\n"); ++ usb_clearb(dev, ep->csr, USB_INCSR_SENTSTALL); ++ return; ++ } ++ ++ if (!ep->desc) { ++ DEBUG("%s: NO EP DESC\n", __FUNCTION__); ++ return; ++ } ++ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ ++ DEBUG("req: %p\n", req); ++ ++ if (!req) ++ return; ++ ++ write_fifo(ep, req); ++} ++ ++/* ++ * Bulk OUT (recv) ++ */ ++static void jz4740_out_epn(struct jz4740_udc *dev, uint32_t ep_idx, uint32_t intr) ++{ ++ struct jz4740_ep *ep = &dev->ep[ep_idx]; ++ struct jz4740_request *req; ++ ++ DEBUG("%s: %d\n", __FUNCTION__, ep_idx); ++ ++ jz_udc_set_index(dev, ep_index(ep)); ++ if (ep->desc) { ++ uint32_t csr; ++ ++ if (use_dma) { ++ /* DMA starts here ... */ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ ++ if (req) ++ read_fifo(ep, req); ++ return; ++ } ++ ++ /* ++ * PIO mode starts here ... ++ */ ++ ++ while ((csr = usb_readb(dev, ep->csr)) & ++ (USB_OUTCSR_OUTPKTRDY | USB_OUTCSR_SENTSTALL)) { ++ DEBUG("%s: %x\n", __FUNCTION__, csr); ++ ++ if (csr & USB_OUTCSR_SENTSTALL) { ++ DEBUG("%s: stall sent, flush fifo\n", ++ __FUNCTION__); ++ /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */ ++ flush(ep); ++ } else if (csr & USB_OUTCSR_OUTPKTRDY) { ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = ++ list_entry(ep->queue.next, ++ struct jz4740_request, ++ queue); ++ ++ if (!req) { ++ DEBUG("%s: NULL REQ %d\n", ++ __FUNCTION__, ep_idx); ++ break; ++ } else { ++ read_fifo(ep, req); ++ } ++ } ++ } ++ } else { ++ /* Throw packet away.. */ ++ DEBUG("%s: ep %p ep_indx %d No descriptor?!?\n", __FUNCTION__, ep, ep_idx); ++ flush(ep); ++ } ++} ++ ++/** Halt specific EP ++ * Return 0 if success ++ * NOTE: Sets INDEX register to EP ! ++ */ ++static int jz4740_set_halt(struct usb_ep *_ep, int value) ++{ ++ struct jz4740_udc *dev; ++ struct jz4740_ep *ep; ++ unsigned long flags; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (unlikely(!_ep || (!ep->desc && ep->type != ep_control))) { ++ DEBUG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ dev = ep->dev; ++ ++ spin_lock_irqsave(&dev->lock, flags); ++ ++ jz_udc_select_ep(ep); ++ ++ DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value); ++ ++ if (ep_index(ep) == 0) { ++ /* EP0 */ ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SENDSTALL); ++ } else if (ep_is_in(ep)) { ++ uint32_t csr = usb_readb(dev, ep->csr); ++ if (value && ((csr & USB_INCSR_FFNOTEMPT) ++ || !list_empty(&ep->queue))) { ++ /* ++ * Attempts to halt IN endpoints will fail (returning -EAGAIN) ++ * if any transfer requests are still queued, or if the controller ++ * FIFO still holds bytes that the host hasnt collected. ++ */ ++ spin_unlock_irqrestore(&dev->lock, flags); ++ DEBUG ++ ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n", ++ (csr & USB_INCSR_FFNOTEMPT), ++ !list_empty(&ep->queue)); ++ return -EAGAIN; ++ } ++ flush(ep); ++ if (value) { ++ usb_setb(dev, ep->csr, USB_INCSR_SENDSTALL); ++ } ++ else { ++ usb_clearb(dev, ep->csr, USB_INCSR_SENDSTALL); ++ usb_setb(dev, ep->csr, USB_INCSR_CDT); ++ } ++ } else { ++ ++ flush(ep); ++ if (value) { ++ usb_setb(dev, ep->csr, USB_OUTCSR_SENDSTALL); ++ } ++ else { ++ usb_clearb(dev, ep->csr, USB_OUTCSR_SENDSTALL); ++ usb_setb(dev, ep->csr, USB_OUTCSR_CDT); ++ } ++ } ++ ++ if (value) { ++ ep->stopped = 1; ++ } else { ++ ep->stopped = 0; ++ } ++ ++ spin_unlock_irqrestore(&dev->lock, flags); ++ ++ DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS"); ++ ++ return 0; ++} ++ ++ ++static int jz4740_ep_enable(struct usb_ep *_ep, ++ const struct usb_endpoint_descriptor *desc) ++{ ++ struct jz4740_ep *ep; ++ struct jz4740_udc *dev; ++ unsigned long flags; ++ uint32_t max, csrh = 0; ++ ++ DEBUG("%s: trying to enable %s\n", __FUNCTION__, _ep->name); ++ ++ if (!_ep || !desc) ++ return -EINVAL; ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (ep->desc || ep->type == ep_control ++ || desc->bDescriptorType != USB_DT_ENDPOINT ++ || ep->bEndpointAddress != desc->bEndpointAddress) { ++ DEBUG("%s, bad ep or descriptor\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ /* xfer types must match, except that interrupt ~= bulk */ ++ if (ep->bmAttributes != desc->bmAttributes ++ && ep->bmAttributes != USB_ENDPOINT_XFER_BULK ++ && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { ++ DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name); ++ return -EINVAL; ++ } ++ ++ dev = ep->dev; ++ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { ++ DEBUG("%s, bogus device state\n", __FUNCTION__); ++ return -ESHUTDOWN; ++ } ++ ++ max = le16_to_cpu(desc->wMaxPacketSize); ++ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ ++ /* Configure the endpoint */ ++ jz_udc_set_index(dev, desc->bEndpointAddress & 0x0F); ++ if (ep_is_in(ep)) { ++ usb_writew(dev, JZ_REG_UDC_INMAXP, max); ++ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_BULK: ++ case USB_ENDPOINT_XFER_INT: ++ csrh &= ~USB_INCSRH_ISO; ++ break; ++ case USB_ENDPOINT_XFER_ISOC: ++ csrh |= USB_INCSRH_ISO; ++ break; ++ } ++ usb_writeb(dev, JZ_REG_UDC_INCSRH, csrh); ++ } ++ else { ++ usb_writew(dev, JZ_REG_UDC_OUTMAXP, max); ++ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_BULK: ++ csrh &= ~USB_OUTCSRH_ISO; ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ csrh &= ~USB_OUTCSRH_ISO; ++ csrh |= USB_OUTCSRH_DNYT; ++ break; ++ case USB_ENDPOINT_XFER_ISOC: ++ csrh |= USB_OUTCSRH_ISO; ++ break; ++ } ++ usb_writeb(dev, JZ_REG_UDC_OUTCSRH, csrh); ++ } ++ ++ ++ ep->stopped = 0; ++ ep->desc = desc; ++ ep->pio_irqs = 0; ++ ep->ep.maxpacket = max; ++ ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ ++ /* Reset halt state (does flush) */ ++ jz4740_set_halt(_ep, 0); ++ ++ DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name); ++ ++ return 0; ++} ++ ++/** Disable EP ++ * NOTE: Sets INDEX register ++ */ ++static int jz4740_ep_disable(struct usb_ep *_ep) ++{ ++ struct jz4740_ep *ep; ++ unsigned long flags; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, _ep); ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (!_ep || !ep->desc) { ++ DEBUG("%s, %s not enabled\n", __FUNCTION__, ++ _ep ? ep->ep.name : NULL); ++ return -EINVAL; ++ } ++ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ ++ jz_udc_select_ep(ep); ++ ++ /* Nuke all pending requests (does flush) */ ++ nuke(ep, -ESHUTDOWN); ++ ++ /* Disable ep IRQ */ ++ pio_irq_disable(ep); ++ ++ ep->desc = 0; ++ ep->stopped = 1; ++ ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ ++ DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name); ++ return 0; ++} ++ ++static struct usb_request *jz4740_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) ++{ ++ struct jz4740_request *req; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, ep); ++ ++ req = kzalloc(sizeof(*req), gfp_flags); ++ if (!req) ++ return 0; ++ ++ INIT_LIST_HEAD(&req->queue); ++ ++ return &req->req; ++} ++ ++static void jz4740_free_request(struct usb_ep *ep, struct usb_request *_req) ++{ ++ struct jz4740_request *req; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, ep); ++ ++ req = container_of(_req, struct jz4740_request, req); ++ WARN_ON(!list_empty(&req->queue)); ++ kfree(req); ++} ++ ++/*--------------------------------------------------------------------*/ ++ ++/** Queue one request ++ * Kickstart transfer if needed ++ * NOTE: Sets INDEX register ++ */ ++static int jz4740_queue(struct usb_ep *_ep, struct usb_request *_req, ++ gfp_t gfp_flags) ++{ ++ struct jz4740_request *req; ++ struct jz4740_ep *ep; ++ struct jz4740_udc *dev; ++ unsigned long flags; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, _ep); ++ ++ req = container_of(_req, struct jz4740_request, req); ++ if (unlikely ++ (!_req || !_req->complete || !_req->buf ++ || !list_empty(&req->queue))) { ++ DEBUG("%s, bad params\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (unlikely(!_ep || (!ep->desc && ep->type != ep_control))) { ++ DEBUG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ dev = ep->dev; ++ if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { ++ DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver); ++ return -ESHUTDOWN; ++ } ++ ++ DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length, ++ _req->buf); ++ ++ spin_lock_irqsave(&dev->lock, flags); ++ ++ _req->status = -EINPROGRESS; ++ _req->actual = 0; ++ ++ /* kickstart this i/o queue? */ ++ DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue), ++ ep->stopped); ++ if (list_empty(&ep->queue) && likely(!ep->stopped)) { ++ uint32_t csr; ++ ++ if (unlikely(ep_index(ep) == 0)) { ++ /* EP0 */ ++ list_add_tail(&req->queue, &ep->queue); ++ jz4740_ep0_kick(dev, ep); ++ req = 0; ++ } else if (use_dma) { ++ /* DMA */ ++ kick_dma(ep, req); ++ } ++ /* PIO */ ++ else if (ep_is_in(ep)) { ++ /* EP1 & EP2 */ ++ jz_udc_set_index(dev, ep_index(ep)); ++ csr = usb_readb(dev, ep->csr); ++ pio_irq_enable(ep); ++ if (!(csr & USB_INCSR_FFNOTEMPT)) { ++ if (write_fifo(ep, req) == 1) ++ req = 0; ++ } ++ } else { ++ /* EP1 */ ++ jz_udc_set_index(dev, ep_index(ep)); ++ csr = usb_readb(dev, ep->csr); ++ pio_irq_enable(ep); ++ if (csr & USB_OUTCSR_OUTPKTRDY) { ++ if (read_fifo(ep, req) == 1) ++ req = 0; ++ } ++ } ++ } ++ ++ /* pio or dma irq handler advances the queue. */ ++ if (likely(req != 0)) ++ list_add_tail(&req->queue, &ep->queue); ++ ++ spin_unlock_irqrestore(&dev->lock, flags); ++ ++ return 0; ++} ++ ++/* dequeue JUST ONE request */ ++static int jz4740_dequeue(struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct jz4740_ep *ep; ++ struct jz4740_request *req; ++ unsigned long flags; ++ ++ DEBUG("%s, %p\n", __FUNCTION__, _ep); ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (!_ep || ep->type == ep_control) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ ++ /* make sure it's actually queued on this endpoint */ ++ list_for_each_entry(req, &ep->queue, queue) { ++ if (&req->req == _req) ++ break; ++ } ++ if (&req->req != _req) { ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ return -EINVAL; ++ } ++ done(ep, req, -ECONNRESET); ++ ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ return 0; ++} ++ ++/** Return bytes in EP FIFO ++ * NOTE: Sets INDEX register to EP ++ */ ++static int jz4740_fifo_status(struct usb_ep *_ep) ++{ ++ uint32_t csr; ++ int count = 0; ++ struct jz4740_ep *ep; ++ unsigned long flags; ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (!_ep) { ++ DEBUG("%s, bad ep\n", __FUNCTION__); ++ return -ENODEV; ++ } ++ ++ DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep)); ++ ++ /* LPD can't report unclaimed bytes from IN fifos */ ++ if (ep_is_in(ep)) ++ return -EOPNOTSUPP; ++ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ jz_udc_set_index(ep->dev, ep_index(ep)); ++ ++ csr = usb_readb(ep->dev, ep->csr); ++ if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN || ++ csr & 0x1) { ++ count = usb_readw(ep->dev, JZ_REG_UDC_OUTCOUNT); ++ } ++ ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++ ++ return count; ++} ++ ++/** Flush EP FIFO ++ * NOTE: Sets INDEX register to EP ++ */ ++static void jz4740_fifo_flush(struct usb_ep *_ep) ++{ ++ struct jz4740_ep *ep; ++ unsigned long flags; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ ep = container_of(_ep, struct jz4740_ep, ep); ++ if (unlikely(!_ep || (!ep->desc && ep->type == ep_control))) { ++ DEBUG("%s, bad ep\n", __FUNCTION__); ++ return; ++ } ++ ++ spin_lock_irqsave(&ep->dev->lock, flags); ++ ++ jz_udc_set_index(ep->dev, ep_index(ep)); ++ flush(ep); ++ ++ spin_unlock_irqrestore(&ep->dev->lock, flags); ++} ++ ++/****************************************************************/ ++/* End Point 0 related functions */ ++/****************************************************************/ ++ ++/* return: 0 = still running, 1 = completed, negative = errno */ ++static int write_fifo_ep0(struct jz4740_ep *ep, struct jz4740_request *req) ++{ ++ uint32_t max; ++ unsigned count; ++ int is_last; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ max = ep_maxpacket(ep); ++ ++ count = write_packet(ep, req, max); ++ ++ /* last packet is usually short (or a zlp) */ ++ if (unlikely(count != max)) ++ is_last = 1; ++ else { ++ if (likely(req->req.length != req->req.actual) || req->req.zero) ++ is_last = 0; ++ else ++ is_last = 1; ++ } ++ ++ DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__, ++ ep->ep.name, count, ++ is_last ? "/L" : "", req->req.length - req->req.actual, req); ++ ++ /* requests complete when all IN data is in the FIFO */ ++ if (is_last) { ++ done(ep, req, 0); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static inline int jz4740_fifo_read(struct jz4740_ep *ep, ++ unsigned char *cp, int max) ++{ ++ int bytes; ++ int count = usb_readw(ep->dev, JZ_REG_UDC_OUTCOUNT); ++ ++ if (count > max) ++ count = max; ++ bytes = count; ++ while (count--) ++ *cp++ = usb_readb(ep->dev, ep->fifo); ++ ++ return bytes; ++} ++ ++static inline void jz4740_fifo_write(struct jz4740_ep *ep, ++ unsigned char *cp, int count) ++{ ++ DEBUG("fifo_write: %d %d\n", ep_index(ep), count); ++ while (count--) ++ usb_writeb(ep->dev, ep->fifo, *cp++); ++} ++ ++static int read_fifo_ep0(struct jz4740_ep *ep, struct jz4740_request *req) ++{ ++ struct jz4740_udc *dev = ep->dev; ++ uint32_t csr; ++ uint8_t *buf; ++ unsigned bufferspace, count, is_short; ++ ++ DEBUG_EP0("%s\n", __FUNCTION__); ++ ++ csr = usb_readb(dev, JZ_REG_UDC_CSR0); ++ if (!(csr & USB_CSR0_OUTPKTRDY)) ++ return 0; ++ ++ buf = req->req.buf + req->req.actual; ++ prefetchw(buf); ++ bufferspace = req->req.length - req->req.actual; ++ ++ /* read all bytes from this packet */ ++ if (likely(csr & USB_CSR0_OUTPKTRDY)) { ++ count = usb_readw(dev, JZ_REG_UDC_OUTCOUNT); ++ req->req.actual += min(count, bufferspace); ++ } else /* zlp */ ++ count = 0; ++ ++ is_short = (count < ep->ep.maxpacket); ++ DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n", ++ ep->ep.name, csr, count, ++ is_short ? "/S" : "", req, req->req.actual, req->req.length); ++ ++ while (likely(count-- != 0)) { ++ uint8_t byte = (uint8_t)usb_readl(dev, ep->fifo); ++ ++ if (unlikely(bufferspace == 0)) { ++ /* this happens when the driver's buffer ++ * is smaller than what the host sent. ++ * discard the extra data. ++ */ ++ if (req->req.status != -EOVERFLOW) ++ DEBUG_EP0("%s overflow %d\n", ep->ep.name, ++ count); ++ req->req.status = -EOVERFLOW; ++ } else { ++ *buf++ = byte; ++ bufferspace--; ++ } ++ } ++ ++ /* completion */ ++ if (is_short || req->req.actual == req->req.length) { ++ done(ep, req, 0); ++ return 1; ++ } ++ ++ /* finished that packet. the next one may be waiting... */ ++ return 0; ++} ++ ++/** ++ * udc_set_address - set the USB address for this device ++ * @address: ++ * ++ * Called from control endpoint function after it decodes a set address setup packet. ++ */ ++static void udc_set_address(struct jz4740_udc *dev, unsigned char address) ++{ ++ DEBUG_EP0("%s: %d\n", __FUNCTION__, address); ++ ++ dev->usb_address = address; ++ usb_writeb(dev, JZ_REG_UDC_FADDR, address); ++} ++ ++/* ++ * DATA_STATE_RECV (USB_CSR0_OUTPKTRDY) ++ * - if error ++ * set USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND | USB_CSR0_SENDSTALL bits ++ * - else ++ * set USB_CSR0_SVDOUTPKTRDY bit ++ if last set USB_CSR0_DATAEND bit ++ */ ++static void jz4740_ep0_out(struct jz4740_udc *dev, uint32_t csr, int kickstart) ++{ ++ struct jz4740_request *req; ++ struct jz4740_ep *ep = &dev->ep[0]; ++ int ret; ++ ++ DEBUG_EP0("%s: %x\n", __FUNCTION__, csr); ++ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ ++ if (req) { ++ if (req->req.length == 0) { ++ DEBUG_EP0("ZERO LENGTH OUT!\n"); ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND)); ++ dev->ep0state = WAIT_FOR_SETUP; ++ return; ++ } else if (kickstart) { ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY)); ++ return; ++ } ++ ret = read_fifo_ep0(ep, req); ++ if (ret) { ++ /* Done! */ ++ DEBUG_EP0("%s: finished, waiting for status\n", ++ __FUNCTION__); ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND)); ++ dev->ep0state = WAIT_FOR_SETUP; ++ } else { ++ /* Not done yet.. */ ++ DEBUG_EP0("%s: not finished\n", __FUNCTION__); ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SVDOUTPKTRDY); ++ } ++ } else { ++ DEBUG_EP0("NO REQ??!\n"); ++ } ++} ++ ++/* ++ * DATA_STATE_XMIT ++ */ ++static int jz4740_ep0_in(struct jz4740_udc *dev, uint32_t csr) ++{ ++ struct jz4740_request *req; ++ struct jz4740_ep *ep = &dev->ep[0]; ++ int ret, need_zlp = 0; ++ ++ DEBUG_EP0("%s: %x\n", __FUNCTION__, csr); ++ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct jz4740_request, queue); ++ ++ if (!req) { ++ DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__); ++ return 0; ++ } ++ ++ if (req->req.length == 0) { ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_INPKTRDY | USB_CSR0_DATAEND)); ++ dev->ep0state = WAIT_FOR_SETUP; ++ return 1; ++ } ++ ++ if (req->req.length - req->req.actual == EP0_MAXPACKETSIZE) { ++ /* Next write will end with the packet size, */ ++ /* so we need zero-length-packet */ ++ need_zlp = 1; ++ } ++ ++ ret = write_fifo_ep0(ep, req); ++ ++ if (ret == 1 && !need_zlp) { ++ /* Last packet */ ++ DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__); ++ ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_INPKTRDY | USB_CSR0_DATAEND)); ++ dev->ep0state = WAIT_FOR_SETUP; ++ } else { ++ DEBUG_EP0("%s: not finished\n", __FUNCTION__); ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_INPKTRDY); ++ } ++ ++ if (need_zlp) { ++ DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__); ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_INPKTRDY); ++ dev->ep0state = DATA_STATE_NEED_ZLP; ++ } ++ ++ return 1; ++} ++ ++static int jz4740_handle_get_status(struct jz4740_udc *dev, ++ struct usb_ctrlrequest *ctrl) ++{ ++ struct jz4740_ep *ep0 = &dev->ep[0]; ++ struct jz4740_ep *qep; ++ int reqtype = (ctrl->bRequestType & USB_RECIP_MASK); ++ uint16_t val = 0; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ ++ if (reqtype == USB_RECIP_INTERFACE) { ++ /* This is not supported. ++ * And according to the USB spec, this one does nothing.. ++ * Just return 0 ++ */ ++ DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n"); ++ } else if (reqtype == USB_RECIP_DEVICE) { ++ DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n"); ++ val |= (1 << 0); /* Self powered */ ++ /*val |= (1<<1); *//* Remote wakeup */ ++ } else if (reqtype == USB_RECIP_ENDPOINT) { ++ int ep_num = (ctrl->wIndex & ~USB_DIR_IN); ++ ++ DEBUG_SETUP ++ ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n", ++ ep_num, ctrl->wLength); ++ ++ if (ctrl->wLength > 2 || ep_num > 3) ++ return -EOPNOTSUPP; ++ ++ qep = &dev->ep[ep_num]; ++ if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0) ++ && ep_index(qep) != 0) { ++ return -EOPNOTSUPP; ++ } ++ ++ jz_udc_set_index(dev, ep_index(qep)); ++ ++ /* Return status on next IN token */ ++ switch (qep->type) { ++ case ep_control: ++ val = ++ (usb_readb(dev, qep->csr) & USB_CSR0_SENDSTALL) == ++ USB_CSR0_SENDSTALL; ++ break; ++ case ep_bulk_in: ++ case ep_interrupt: ++ val = ++ (usb_readb(dev, qep->csr) & USB_INCSR_SENDSTALL) == ++ USB_INCSR_SENDSTALL; ++ break; ++ case ep_bulk_out: ++ val = ++ (usb_readb(dev, qep->csr) & USB_OUTCSR_SENDSTALL) == ++ USB_OUTCSR_SENDSTALL; ++ break; ++ } ++ ++ /* Back to EP0 index */ ++ jz_udc_set_index(dev, 0); ++ ++ DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num, ++ ctrl->wIndex, val); ++ } else { ++ DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype); ++ return -EOPNOTSUPP; ++ } ++ ++ /* Clear "out packet ready" */ ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SVDOUTPKTRDY); ++ /* Put status to FIFO */ ++ jz4740_fifo_write(ep0, (uint8_t *)&val, sizeof(val)); ++ /* Issue "In packet ready" */ ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_INPKTRDY | USB_CSR0_DATAEND)); ++ ++ return 0; ++} ++ ++/* ++ * WAIT_FOR_SETUP (OUTPKTRDY) ++ * - read data packet from EP0 FIFO ++ * - decode command ++ * - if error ++ * set USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND | USB_CSR0_SENDSTALL bits ++ * - else ++ * set USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND bits ++ */ ++static void jz4740_ep0_setup(struct jz4740_udc *dev, uint32_t csr) ++{ ++ struct jz4740_ep *ep = &dev->ep[0]; ++ struct usb_ctrlrequest ctrl; ++ int i; ++ ++ DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr); ++ ++ /* Nuke all previous transfers */ ++ nuke(ep, -EPROTO); ++ ++ /* read control req from fifo (8 bytes) */ ++ jz4740_fifo_read(ep, (unsigned char *)&ctrl, 8); ++ ++ DEBUG_SETUP("SETUP %02x.%02x v%04x i%04x l%04x\n", ++ ctrl.bRequestType, ctrl.bRequest, ++ ctrl.wValue, ctrl.wIndex, ctrl.wLength); ++ ++ /* Set direction of EP0 */ ++ if (likely(ctrl.bRequestType & USB_DIR_IN)) { ++ ep->bEndpointAddress |= USB_DIR_IN; ++ } else { ++ ep->bEndpointAddress &= ~USB_DIR_IN; ++ } ++ ++ /* Handle some SETUP packets ourselves */ ++ switch (ctrl.bRequest) { ++ case USB_REQ_SET_ADDRESS: ++ if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) ++ break; ++ ++ DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue); ++ udc_set_address(dev, ctrl.wValue); ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND)); ++ return; ++ ++ case USB_REQ_SET_CONFIGURATION: ++ if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) ++ break; ++ ++ DEBUG_SETUP("USB_REQ_SET_CONFIGURATION (%d)\n", ctrl.wValue); ++/* usb_setb(JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND));*/ ++ ++ /* Enable RESUME and SUSPEND interrupts */ ++ usb_setb(dev, JZ_REG_UDC_INTRUSBE, (USB_INTR_RESUME | USB_INTR_SUSPEND)); ++ break; ++ ++ case USB_REQ_SET_INTERFACE: ++ if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) ++ break; ++ ++ DEBUG_SETUP("USB_REQ_SET_INTERFACE (%d)\n", ctrl.wValue); ++/* usb_setb(JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND));*/ ++ break; ++ ++ case USB_REQ_GET_STATUS: ++ if (jz4740_handle_get_status(dev, &ctrl) == 0) ++ return; ++ ++ case USB_REQ_CLEAR_FEATURE: ++ case USB_REQ_SET_FEATURE: ++ if (ctrl.bRequestType == USB_RECIP_ENDPOINT) { ++ struct jz4740_ep *qep; ++ int ep_num = (ctrl.wIndex & 0x0f); ++ ++ /* Support only HALT feature */ ++ if (ctrl.wValue != 0 || ctrl.wLength != 0 ++ || ep_num > 3 || ep_num < 1) ++ break; ++ ++ qep = &dev->ep[ep_num]; ++ spin_unlock(&dev->lock); ++ if (ctrl.bRequest == USB_REQ_SET_FEATURE) { ++ DEBUG_SETUP("SET_FEATURE (%d)\n", ++ ep_num); ++ jz4740_set_halt(&qep->ep, 1); ++ } else { ++ DEBUG_SETUP("CLR_FEATURE (%d)\n", ++ ep_num); ++ jz4740_set_halt(&qep->ep, 0); ++ } ++ spin_lock(&dev->lock); ++ ++ jz_udc_set_index(dev, 0); ++ ++ /* Reply with a ZLP on next IN token */ ++ usb_setb(dev, JZ_REG_UDC_CSR0, ++ (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND)); ++ return; ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ /* gadget drivers see class/vendor specific requests, ++ * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION}, ++ * and more. ++ */ ++ if (dev->driver) { ++ /* device-2-host (IN) or no data setup command, process immediately */ ++ spin_unlock(&dev->lock); ++ ++ i = dev->driver->setup(&dev->gadget, &ctrl); ++ spin_lock(&dev->lock); ++ ++ if (unlikely(i < 0)) { ++ /* setup processing failed, force stall */ ++ DEBUG_SETUP ++ (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n", ++ i); ++ jz_udc_set_index(dev, 0); ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_DATAEND | USB_CSR0_SENDSTALL)); ++ ++ /* ep->stopped = 1; */ ++ dev->ep0state = WAIT_FOR_SETUP; ++ } ++ else { ++ DEBUG_SETUP("gadget driver setup ok (%d)\n", ctrl.wLength); ++/* if (!ctrl.wLength) { ++ usb_setb(JZ_REG_UDC_CSR0, USB_CSR0_SVDOUTPKTRDY); ++ }*/ ++ } ++ } ++} ++ ++/* ++ * DATA_STATE_NEED_ZLP ++ */ ++static void jz4740_ep0_in_zlp(struct jz4740_udc *dev, uint32_t csr) ++{ ++ DEBUG_EP0("%s: %x\n", __FUNCTION__, csr); ++ ++ usb_setb(dev, JZ_REG_UDC_CSR0, (USB_CSR0_INPKTRDY | USB_CSR0_DATAEND)); ++ dev->ep0state = WAIT_FOR_SETUP; ++} ++ ++/* ++ * handle ep0 interrupt ++ */ ++static void jz4740_handle_ep0(struct jz4740_udc *dev, uint32_t intr) ++{ ++ struct jz4740_ep *ep = &dev->ep[0]; ++ uint32_t csr; ++ ++ DEBUG("%s:%s[%d]\n", __FILE__, __func__, __LINE__); ++ /* Set index 0 */ ++ jz_udc_set_index(dev, 0); ++ csr = usb_readb(dev, JZ_REG_UDC_CSR0); ++ ++ DEBUG_EP0("%s: csr = %x state = \n", __FUNCTION__, csr);//, state_names[dev->ep0state]); ++ ++ /* ++ * if SENT_STALL is set ++ * - clear the SENT_STALL bit ++ */ ++ if (csr & USB_CSR0_SENTSTALL) { ++ DEBUG_EP0("%s: USB_CSR0_SENTSTALL is set: %x\n", __FUNCTION__, csr); ++ usb_clearb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SENDSTALL | USB_CSR0_SENTSTALL); ++ nuke(ep, -ECONNABORTED); ++ dev->ep0state = WAIT_FOR_SETUP; ++ return; ++ } ++ ++ /* ++ * if a transfer is in progress && INPKTRDY and OUTPKTRDY are clear ++ * - fill EP0 FIFO ++ * - if last packet ++ * - set IN_PKT_RDY | DATA_END ++ * - else ++ * set IN_PKT_RDY ++ */ ++ if (!(csr & (USB_CSR0_INPKTRDY | USB_CSR0_OUTPKTRDY))) { ++ DEBUG_EP0("%s: INPKTRDY and OUTPKTRDY are clear\n", ++ __FUNCTION__); ++ ++ switch (dev->ep0state) { ++ case DATA_STATE_XMIT: ++ DEBUG_EP0("continue with DATA_STATE_XMIT\n"); ++ jz4740_ep0_in(dev, csr); ++ return; ++ case DATA_STATE_NEED_ZLP: ++ DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n"); ++ jz4740_ep0_in_zlp(dev, csr); ++ return; ++ default: ++ /* Stall? */ ++// DEBUG_EP0("Odd state!! state = %s\n", ++// state_names[dev->ep0state]); ++ dev->ep0state = WAIT_FOR_SETUP; ++ /* nuke(ep, 0); */ ++ /* usb_setb(ep->csr, USB_CSR0_SENDSTALL); */ ++// break; ++ return; ++ } ++ } ++ ++ /* ++ * if SETUPEND is set ++ * - abort the last transfer ++ * - set SERVICED_SETUP_END_BIT ++ */ ++ if (csr & USB_CSR0_SETUPEND) { ++ DEBUG_EP0("%s: USB_CSR0_SETUPEND is set: %x\n", __FUNCTION__, csr); ++ ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SVDSETUPEND); ++ nuke(ep, 0); ++ dev->ep0state = WAIT_FOR_SETUP; ++ } ++ ++ /* ++ * if USB_CSR0_OUTPKTRDY is set ++ * - read data packet from EP0 FIFO ++ * - decode command ++ * - if error ++ * set SVDOUTPKTRDY | DATAEND | SENDSTALL bits ++ * - else ++ * set SVDOUTPKTRDY | DATAEND bits ++ */ ++ if (csr & USB_CSR0_OUTPKTRDY) { ++ ++ DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__, ++ csr); ++ ++ switch (dev->ep0state) { ++ case WAIT_FOR_SETUP: ++ DEBUG_EP0("WAIT_FOR_SETUP\n"); ++ jz4740_ep0_setup(dev, csr); ++ break; ++ ++ case DATA_STATE_RECV: ++ DEBUG_EP0("DATA_STATE_RECV\n"); ++ jz4740_ep0_out(dev, csr, 0); ++ break; ++ ++ default: ++ /* send stall? */ ++ DEBUG_EP0("strange state!! 2. send stall? state = %d\n", ++ dev->ep0state); ++ break; ++ } ++ } ++} ++ ++static void jz4740_ep0_kick(struct jz4740_udc *dev, struct jz4740_ep *ep) ++{ ++ uint32_t csr; ++ ++ jz_udc_set_index(dev, 0); ++ ++ DEBUG_EP0("%s: %x\n", __FUNCTION__, csr); ++ ++ /* Clear "out packet ready" */ ++ ++ if (ep_is_in(ep)) { ++ usb_setb(dev, JZ_REG_UDC_CSR0, USB_CSR0_SVDOUTPKTRDY); ++ csr = usb_readb(dev, JZ_REG_UDC_CSR0); ++ dev->ep0state = DATA_STATE_XMIT; ++ jz4740_ep0_in(dev, csr); ++ } else { ++ csr = usb_readb(dev, JZ_REG_UDC_CSR0); ++ dev->ep0state = DATA_STATE_RECV; ++ jz4740_ep0_out(dev, csr, 1); ++ } ++} ++ ++/** Handle USB RESET interrupt ++ */ ++static void jz4740_reset_irq(struct jz4740_udc *dev) ++{ ++ dev->gadget.speed = (usb_readb(dev, JZ_REG_UDC_POWER) & USB_POWER_HSMODE) ? ++ USB_SPEED_HIGH : USB_SPEED_FULL; ++ ++ DEBUG_SETUP("%s: address = %d, speed = %s\n", __FUNCTION__, dev->usb_address, ++ (dev->gadget.speed == USB_SPEED_HIGH) ? "HIGH":"FULL" ); ++} ++ ++/* ++ * jz4740 usb device interrupt handler. ++ */ ++static irqreturn_t jz4740_udc_irq(int irq, void *_dev) ++{ ++ struct jz4740_udc *dev = _dev; ++ uint8_t index; ++ ++ uint32_t intr_usb = usb_readb(dev, JZ_REG_UDC_INTRUSB) & 0x7; /* mask SOF */ ++ uint32_t intr_in = usb_readw(dev, JZ_REG_UDC_INTRIN); ++ uint32_t intr_out = usb_readw(dev, JZ_REG_UDC_INTROUT); ++ uint32_t intr_dma = usb_readb(dev, JZ_REG_UDC_INTR); ++ ++ if (!intr_usb && !intr_in && !intr_out && !intr_dma) ++ return IRQ_HANDLED; ++ ++ ++ DEBUG("intr_out=%x intr_in=%x intr_usb=%x\n", ++ intr_out, intr_in, intr_usb); ++ ++ spin_lock(&dev->lock); ++ index = usb_readb(dev, JZ_REG_UDC_INDEX); ++ ++ /* Check for resume from suspend mode */ ++ if ((intr_usb & USB_INTR_RESUME) && ++ (usb_readb(dev, JZ_REG_UDC_INTRUSBE) & USB_INTR_RESUME)) { ++ DEBUG("USB resume\n"); ++ dev->driver->resume(&dev->gadget); /* We have suspend(), so we must have resume() too. */ ++ } ++ ++ /* Check for system interrupts */ ++ if (intr_usb & USB_INTR_RESET) { ++ DEBUG("USB reset\n"); ++ jz4740_reset_irq(dev); ++ } ++ ++ /* Check for endpoint 0 interrupt */ ++ if (intr_in & USB_INTR_EP0) { ++ DEBUG("USB_INTR_EP0 (control)\n"); ++ jz4740_handle_ep0(dev, intr_in); ++ } ++ ++ /* Check for Bulk-IN DMA interrupt */ ++ if (intr_dma & 0x1) { ++ int ep_num; ++ struct jz4740_ep *ep; ++ ep_num = (usb_readl(dev, JZ_REG_UDC_CNTL1) >> 4) & 0xf; ++ ep = &dev->ep[ep_num + 1]; ++ jz_udc_set_index(dev, ep_num); ++ usb_setb(dev, ep->csr, USB_INCSR_INPKTRDY); ++/* jz4740_in_epn(dev, ep_num, intr_in);*/ ++ } ++ ++ /* Check for Bulk-OUT DMA interrupt */ ++ if (intr_dma & 0x2) { ++ int ep_num; ++ ep_num = (usb_readl(dev, JZ_REG_UDC_CNTL2) >> 4) & 0xf; ++ jz4740_out_epn(dev, ep_num, intr_out); ++ } ++ ++ /* Check for each configured endpoint interrupt */ ++ if (intr_in & USB_INTR_INEP1) { ++ DEBUG("USB_INTR_INEP1\n"); ++ jz4740_in_epn(dev, 1, intr_in); ++ } ++ ++ if (intr_in & USB_INTR_INEP2) { ++ DEBUG("USB_INTR_INEP2\n"); ++ jz4740_in_epn(dev, 2, intr_in); ++ } ++ ++ if (intr_out & USB_INTR_OUTEP1) { ++ DEBUG("USB_INTR_OUTEP1\n"); ++ jz4740_out_epn(dev, 1, intr_out); ++ } ++ ++ /* Check for suspend mode */ ++ if ((intr_usb & USB_INTR_SUSPEND) && ++ (usb_readb(dev, JZ_REG_UDC_INTRUSBE) & USB_INTR_SUSPEND)) { ++ DEBUG("USB suspend\n"); ++ dev->driver->suspend(&dev->gadget); ++ /* Host unloaded from us, can do something, such as flushing ++ the NAND block cache etc. */ ++ } ++ ++ jz_udc_set_index(dev, index); ++ ++ spin_unlock(&dev->lock); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Common functions - Added by River */ ++static struct jz4740_udc udc_dev; ++ ++static inline struct jz4740_udc *gadget_to_udc(struct usb_gadget *gadget) ++{ ++ return container_of(gadget, struct jz4740_udc, gadget); ++} ++/* End added */ ++ ++static int jz4740_udc_get_frame(struct usb_gadget *_gadget) ++{ ++ DEBUG("%s, %p\n", __FUNCTION__, _gadget); ++ return usb_readw(gadget_to_udc(_gadget), JZ_REG_UDC_FRAME); ++} ++ ++static int jz4740_udc_wakeup(struct usb_gadget *_gadget) ++{ ++ /* host may not have enabled remote wakeup */ ++ /*if ((UDCCS0 & UDCCS0_DRWF) == 0) ++ return -EHOSTUNREACH; ++ udc_set_mask_UDCCR(UDCCR_RSM); */ ++ return -ENOTSUPP; ++} ++ ++static int jz4740_udc_pullup(struct usb_gadget *_gadget, int on) ++{ ++ struct jz4740_udc *udc = gadget_to_udc(_gadget); ++ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ ++ if (on) { ++ udc->state = UDC_STATE_ENABLE; ++ udc_enable(udc); ++ } else { ++ udc->state = UDC_STATE_DISABLE; ++ udc_disable(udc); ++ } ++ ++ local_irq_restore(flags); ++ ++ return 0; ++} ++ ++static const struct usb_gadget_ops jz4740_udc_ops = { ++ .get_frame = jz4740_udc_get_frame, ++ .wakeup = jz4740_udc_wakeup, ++ .pullup = jz4740_udc_pullup, ++ /* current versions must always be self-powered */ ++}; ++ ++static struct usb_ep_ops jz4740_ep_ops = { ++ .enable = jz4740_ep_enable, ++ .disable = jz4740_ep_disable, ++ ++ .alloc_request = jz4740_alloc_request, ++ .free_request = jz4740_free_request, ++ ++ .queue = jz4740_queue, ++ .dequeue = jz4740_dequeue, ++ ++ .set_halt = jz4740_set_halt, ++ .fifo_status = jz4740_fifo_status, ++ .fifo_flush = jz4740_fifo_flush, ++}; ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct jz4740_udc udc_dev = { ++ .usb_address = 0, ++ .gadget = { ++ .ops = &jz4740_udc_ops, ++ .ep0 = &udc_dev.ep[0].ep, ++ .name = "jz-udc", ++ .dev = { ++ .init_name = "gadget", ++ }, ++ }, ++ ++ /* control endpoint */ ++ .ep[0] = { ++ .ep = { ++ .name = "ep0", ++ .ops = &jz4740_ep_ops, ++ .maxpacket = EP0_MAXPACKETSIZE, ++ }, ++ .dev = &udc_dev, ++ ++ .bEndpointAddress = 0, ++ .bmAttributes = 0, ++ ++ .type = ep_control, ++ .fifo = JZ_REG_UDC_EP_FIFO(0), ++ .csr = JZ_REG_UDC_CSR0, ++ }, ++ ++ /* bulk out endpoint */ ++ .ep[1] = { ++ .ep = { ++ .name = "ep1out-bulk", ++ .ops = &jz4740_ep_ops, ++ .maxpacket = EPBULK_MAXPACKETSIZE, ++ }, ++ .dev = &udc_dev, ++ ++ .bEndpointAddress = 1, ++ .bmAttributes = USB_ENDPOINT_XFER_BULK, ++ ++ .type = ep_bulk_out, ++ .fifo = JZ_REG_UDC_EP_FIFO(1), ++ .csr = JZ_REG_UDC_OUTCSR, ++ }, ++ ++ /* bulk in endpoint */ ++ .ep[2] = { ++ .ep = { ++ .name = "ep1in-bulk", ++ .ops = &jz4740_ep_ops, ++ .maxpacket = EPBULK_MAXPACKETSIZE, ++ }, ++ .dev = &udc_dev, ++ ++ .bEndpointAddress = 1 | USB_DIR_IN, ++ .bmAttributes = USB_ENDPOINT_XFER_BULK, ++ ++ .type = ep_bulk_in, ++ .fifo = JZ_REG_UDC_EP_FIFO(1), ++ .csr = JZ_REG_UDC_INCSR, ++ }, ++ ++ /* interrupt in endpoint */ ++ .ep[3] = { ++ .ep = { ++ .name = "ep2in-int", ++ .ops = &jz4740_ep_ops, ++ .maxpacket = EPINTR_MAXPACKETSIZE, ++ }, ++ .dev = &udc_dev, ++ ++ .bEndpointAddress = 2 | USB_DIR_IN, ++ .bmAttributes = USB_ENDPOINT_XFER_INT, ++ ++ .type = ep_interrupt, ++ .fifo = JZ_REG_UDC_EP_FIFO(2), ++ .csr = JZ_REG_UDC_INCSR, ++ }, ++}; ++ ++static void gadget_release(struct device *_dev) ++{ ++} ++ ++ ++static int jz4740_udc_probe(struct platform_device *pdev) ++{ ++ struct jz4740_udc *dev = &udc_dev; ++ int ret; ++ ++ spin_lock_init(&dev->lock); ++ the_controller = dev; ++ ++ dev->dev = &pdev->dev; ++ dev_set_name(&dev->gadget.dev, "gadget"); ++ dev->gadget.dev.parent = &pdev->dev; ++ dev->gadget.dev.dma_mask = pdev->dev.dma_mask; ++ dev->gadget.dev.release = gadget_release; ++ ++ ret = device_register(&dev->gadget.dev); ++ if (ret) ++ return ret; ++ ++ platform_set_drvdata(pdev, dev); ++ ++ dev->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ++ if (!dev->mem) { ++ ret = -ENOENT; ++ dev_err(&pdev->dev, "Failed to get mmio memory resource\n"); ++ goto err_device_unregister; ++ } ++ ++ dev->mem = request_mem_region(dev->mem->start, resource_size(dev->mem), pdev->name); ++ ++ if (!dev->mem) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to request mmio memory region\n"); ++ goto err_device_unregister; ++ } ++ ++ dev->base = ioremap(dev->mem->start, resource_size(dev->mem)); ++ ++ if (!dev->base) { ++ ret = -EBUSY; ++ dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); ++ goto err_release_mem_region; ++ } ++ ++ dev->irq = platform_get_irq(pdev, 0); ++ ++ ret = request_irq(dev->irq, jz4740_udc_irq, IRQF_DISABLED, ++ pdev->name, dev); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to request irq: %d\n", ret); ++ goto err_iounmap; ++ } ++ ++ udc_disable(dev); ++ udc_reinit(dev); ++ ++ return 0; ++ ++err_iounmap: ++ iounmap(dev->base); ++err_release_mem_region: ++ release_mem_region(dev->mem->start, resource_size(dev->mem)); ++err_device_unregister: ++ device_unregister(&dev->gadget.dev); ++ platform_set_drvdata(pdev, NULL); ++ ++ the_controller = 0; ++ ++ return ret; ++} ++ ++static int jz4740_udc_remove(struct platform_device *pdev) ++{ ++ struct jz4740_udc *dev = platform_get_drvdata(pdev); ++ ++ if (dev->driver) ++ return -EBUSY; ++ ++ udc_disable(dev); ++#ifdef UDC_PROC_FILE ++ remove_proc_entry(proc_node_name, NULL); ++#endif ++ ++ free_irq(dev->irq, dev); ++ iounmap(dev->base); ++ release_mem_region(dev->mem->start, resource_size(dev->mem)); ++ ++ platform_set_drvdata(pdev, NULL); ++ device_unregister(&dev->gadget.dev); ++ the_controller = NULL; ++ ++ return 0; ++} ++ ++static struct platform_driver udc_driver = { ++ .probe = jz4740_udc_probe, ++ .remove = jz4740_udc_remove, ++ .driver = { ++ .name = "jz-udc", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int __init udc_init (void) ++{ ++ return platform_driver_register(&udc_driver); ++} ++ ++static void __exit udc_exit (void) ++{ ++ platform_driver_unregister(&udc_driver); ++} ++ ++module_init(udc_init); ++module_exit(udc_exit); ++ ++MODULE_DESCRIPTION("JZ4740 USB Device Controller"); ++MODULE_AUTHOR("Wei Jianli <jlwei@ingenic.cn>"); ++MODULE_LICENSE("GPL"); +diff -ruN linux-2.6.31-vanilla/drivers/usb/gadget/jz4740_udc.h linux-2.6.31/drivers/usb/gadget/jz4740_udc.h +--- linux-2.6.31-vanilla/drivers/usb/gadget/jz4740_udc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/usb/gadget/jz4740_udc.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,97 @@ ++/* ++ * linux/drivers/usb/gadget/jz4740_udc.h ++ * ++ * Ingenic JZ4740 on-chip high speed USB device controller ++ * ++ * Copyright (C) 2006 Ingenic Semiconductor Inc. ++ * Author: <jlwei@ingenic.cn> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#ifndef __USB_GADGET_JZ4740_H__ ++#define __USB_GADGET_JZ4740_H__ ++ ++/*-------------------------------------------------------------------------*/ ++ ++// Max packet size ++#define EP0_MAXPACKETSIZE 64 ++#define EPBULK_MAXPACKETSIZE 512 ++#define EPINTR_MAXPACKETSIZE 64 ++ ++#define UDC_MAX_ENDPOINTS 4 ++ ++/*-------------------------------------------------------------------------*/ ++ ++typedef enum ep_type { ++ ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt ++} ep_type_t; ++ ++struct jz4740_ep { ++ struct usb_ep ep; ++ struct jz4740_udc *dev; ++ ++ const struct usb_endpoint_descriptor *desc; ++ unsigned long pio_irqs; ++ ++ uint8_t stopped; ++ uint8_t bEndpointAddress; ++ uint8_t bmAttributes; ++ ++ ep_type_t type; ++ size_t fifo; ++ u32 csr; ++ ++ uint32_t reg_addr; ++ struct list_head queue; ++}; ++ ++struct jz4740_request { ++ struct usb_request req; ++ struct list_head queue; ++}; ++ ++enum ep0state { ++ WAIT_FOR_SETUP, /* between STATUS ack and SETUP report */ ++ DATA_STATE_XMIT, /* data tx stage */ ++ DATA_STATE_NEED_ZLP, /* data tx zlp stage */ ++ WAIT_FOR_OUT_STATUS, /* status stages */ ++ DATA_STATE_RECV, /* data rx stage */ ++}; ++ ++/* For function binding with UDC Disable - Added by River */ ++typedef enum { ++ UDC_STATE_ENABLE = 0, ++ UDC_STATE_DISABLE, ++}udc_state_t; ++ ++struct jz4740_udc { ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *driver; ++ struct device *dev; ++ spinlock_t lock; ++ ++ enum ep0state ep0state; ++ struct jz4740_ep ep[UDC_MAX_ENDPOINTS]; ++ ++ unsigned char usb_address; ++ ++ udc_state_t state; ++ ++ struct resource *mem; ++ void __iomem *base; ++ int irq; ++ uint32_t in_mask; ++ uint32_t out_mask; ++}; ++ ++extern struct jz4740_udc *the_controller; ++ ++#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN)==USB_DIR_IN) ++#define ep_maxpacket(EP) ((EP)->ep.maxpacket) ++#define ep_index(EP) ((EP)->bEndpointAddress&0xF) ++ ++#endif /* __USB_GADGET_JZ4740_H__ */ +diff -ruN linux-2.6.31-vanilla/drivers/usb/gadget/udc_hotplug.h linux-2.6.31/drivers/usb/gadget/udc_hotplug.h +--- linux-2.6.31-vanilla/drivers/usb/gadget/udc_hotplug.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/usb/gadget/udc_hotplug.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,50 @@ ++/* ++ * Ingenic USB Device Contoller Hotplug External Interfaces ++ */ ++ ++#ifndef __UDC_HOTPLUG_H__ ++#define __UDC_HOTPLUG_H__ ++ ++#include <linux/notifier.h> ++ ++typedef enum { ++ BROADCAST_TYPE_STATE = 0, ++ BROADCAST_TYPE_EVENT, ++}udc_hotplug_broadcast_type_t; ++ ++typedef enum { ++ EVENT_STATE_OFFLINE = 0, ++ EVENT_STATE_ONLINE, ++}udc_hotplug_event_state_t; ++ ++typedef enum { ++ EVENT_TYPE_USB = 0, ++ EVENT_TYPE_CABLE, ++}udc_hotplug_event_type_t; ++ ++enum { ++ EVENT_FLAG_UDC_PHY_TOUCHED = 0, ++}; ++ ++typedef struct { ++ udc_hotplug_event_type_t type; ++ udc_hotplug_event_state_t state; ++ unsigned long flags; ++}udc_hotplug_event_t; ++ ++/* Register notifier */ ++int udc_hotplug_register_notifier(struct notifier_block *n, int request_state); ++ ++/* Unregister notifier */ ++int udc_hotplug_unregister_notifier(struct notifier_block *n); ++ ++/* Start keep alive */ ++int udc_hotplug_start_keep_alive(unsigned long timer_interval_in_jiffies, unsigned long counter_limit); ++ ++/* Do keep alive */ ++void udc_hotplug_do_keep_alive(void); ++ ++/* Stop keep alive */ ++void udc_hotplug_stop_keep_alive(void); ++ ++#endif /* Define __UDC_HOTPLUG_H__ */ +diff -ruN linux-2.6.31-vanilla/drivers/usb/gadget/udc_hotplug_core.c linux-2.6.31/drivers/usb/gadget/udc_hotplug_core.c +--- linux-2.6.31-vanilla/drivers/usb/gadget/udc_hotplug_core.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/usb/gadget/udc_hotplug_core.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,836 @@ ++/* ++ * Ingenic USB Device Controller Hotplug Core Function ++ * Detection mechanism and code are based on the old version of udc_hotplug.c ++ */ ++ ++#include <linux/sched.h> ++#include <linux/module.h> ++#include <linux/notifier.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/slab.h> ++#include <linux/err.h> ++#include <linux/wait.h> ++#include <linux/kthread.h> ++#include <linux/timer.h> ++ ++#include <asm/jzsoc.h> ++ ++#include "udc_hotplug.h" ++ ++#define PFX "jz_hotplug_udc" ++ ++#define D(msg, fmt...) \ ++// printk(KERN_ERR PFX": %s(): "msg, __func__, ##fmt); ++ ++/* HAVE_DETECT_SYNC ++ Provide a lock like seqlock keep the synchronization between the start and the end of a detection, ++ If the lock seems not synchronous(new interrupt comes, when doing our detection) in the end of a detection, ++ the result of the detection is discarded. No event will be broadcast, and the detection will be restarted. ++ ++ Use to filter out more significant events when the interrupt is too noisy. ++*/ ++ ++//#define HAVE_DETECT_SYNC 1 ++ ++#if defined (HAVE_DETECT_SYNC) ++#define NR_RESTART_TIMES 3 ++#define NR_JIFFIES_SLEEP_BEFORE_RESTART 7 ++#endif ++ ++#define NR_GPIO_STABLE_TIMES 50 ++#define NR_JIFFIES_USB_DETECT_WAIT 11 ++ ++#define DEFAULT_KEEP_ALIVE_TIMER_INTERVAL (2 * HZ) ++#define DEFAULT_KEEP_ALIVE_COUNTER_LIMIT 2 ++ ++#define UDC_HOTPLUG_PIN GPIO_UDC_HOTPLUG ++#define UDC_HOTPLUG_IRQ (IRQ_GPIO_0 + UDC_HOTPLUG_PIN) ++ ++/* UDC State bits */ ++enum { ++ /* Online state. */ ++ BIT_CABLE_ONLINE = 0, ++ BIT_USB_ONLINE, ++ ++ /* State changed ?*/ ++ BIT_CABLE_CHANGE, ++ BIT_USB_CHANGE, ++ ++ /* What detection will be done ? */ ++ BIT_DO_CABLE_DETECT, ++ BIT_DO_USB_DETECT, ++ ++ /* What detection is requested ? */ ++ BIT_REQUEST_CABLE_DETECT, ++ BIT_REQUEST_USB_DETECT, ++ ++ /* Indicate whether a detection is finisned. */ ++ BIT_USB_DETECT_DONE, ++ BIT_CABLE_DETECT_DONE, ++ ++ BIT_UDC_PHY_TOUCHED, ++ ++ /* Keep alive */ ++ BIT_KEEP_ALIVE, ++ BIT_KEEP_ALIVE_TIMEOUT, ++}; ++ ++struct uh_data { ++ /* Notifier */ ++ struct blocking_notifier_head notifier_head; ++ ++ /* Thread */ ++ struct task_struct *kthread; ++ ++ /* Wait queue */ ++ wait_queue_head_t kthread_wq; /* Kernel thread sleep here. */ ++ wait_queue_head_t wq; /* Others sleep here. */ ++ ++ /* UDC State */ ++ unsigned long state; ++ ++ /* Current Event */ ++ udc_hotplug_event_t cur_uh_event; ++ ++#if defined (HAVE_DETECT_SYNC) ++ /* Sync seq */ ++ unsigned long irq_sync_seq; ++ unsigned long our_sync_seq; ++#endif ++ ++ /* Keep alive */ ++ struct timer_list keep_alive_timer; ++ ++ unsigned long keep_alive_counter_limit; ++ unsigned long keep_alive_timer_interval; ++ unsigned long keep_alive_counter; ++}; ++ ++static struct uh_data *g_puh_data = NULL; ++ ++#if defined (HAVE_DETECT_SYNC) ++/* Seq sync function */ ++ ++static inline int is_seq_sync(struct uh_data *uh) ++{ ++ return (uh->our_sync_seq == uh->irq_sync_seq); ++} ++ ++static inline void reset_seq(struct uh_data *uh) ++{ ++ uh->our_sync_seq = uh->irq_sync_seq = 0; ++ ++ return; ++} ++ ++static inline void sync_seq(struct uh_data *uh) ++{ ++ uh->our_sync_seq = uh->irq_sync_seq; ++ ++ return; ++} ++#endif ++ ++/* Call kernel thread to detect. */ ++static inline void start_detect(struct uh_data *uh) ++{ ++ D("called.\n"); ++ ++#if defined (HAVE_DETECT_SYNC) ++ uh->irq_sync_seq ++; ++#endif ++ ++ wake_up_process(uh->kthread); ++ ++ return; ++} ++ ++static void wait_gpio_pin_stable(struct uh_data *uh) ++{ ++ unsigned long pin = 0; ++ int i = 1; ++ ++ pin = __gpio_get_pin(UDC_HOTPLUG_PIN); ++ ++ while (i < NR_GPIO_STABLE_TIMES) { ++ if (__gpio_get_pin(UDC_HOTPLUG_PIN) != pin) { ++ pin = __gpio_get_pin(UDC_HOTPLUG_PIN); ++ i = 1; ++ }else ++ i++; ++ ++ sleep_on_timeout(&uh->wq, 1); ++ } ++ ++ return; ++} ++ ++/* Do cable detection */ ++static void cable_detect(struct uh_data *uh) ++{ ++ D("Wait pin stable.\n"); ++ ++ /* Wait GPIO pin stable first. */ ++ wait_gpio_pin_stable(uh); ++ ++ if (__gpio_get_pin(UDC_HOTPLUG_PIN)) { ++ D("Cable online.\n"); ++ ++ if (!test_and_set_bit(BIT_CABLE_ONLINE, &uh->state)) { ++ D("Cable state change to online.\n"); ++ ++ set_bit(BIT_CABLE_CHANGE, &uh->state); ++ } ++ }else { ++ D("Cable offline.\n"); ++ ++ /* Clear keep alive bit. */ ++ clear_bit(BIT_KEEP_ALIVE, &uh->state); ++ ++ if (test_and_clear_bit(BIT_CABLE_ONLINE, &uh->state)) { ++ D("Cable state change to offline.\n"); ++ ++ set_bit(BIT_CABLE_CHANGE, &uh->state); ++ } ++ } ++ ++ set_bit(BIT_CABLE_DETECT_DONE, &uh->state); ++ ++ return; ++} ++ ++/* Really do USB detection */ ++static int do_usb_detect(struct uh_data *uh) ++{ ++ u32 intr_usb; ++ int rv; ++ ++ D("called.\n"); ++ ++ __intc_mask_irq(IRQ_UDC); ++ ++ /* Now enable PHY to start detect */ ++#ifdef CONFIG_SOC_JZ4740 ++ REG_CPM_SCR |= CPM_SCR_USBPHY_ENABLE; ++#elif defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ REG_CPM_OPCR |= CPM_OPCR_UDCPHY_ENABLE; ++#endif ++ /* Clear IRQs */ ++ REG16(USB_REG_INTRINE) = 0; ++ REG16(USB_REG_INTROUTE) = 0; ++ REG8(USB_REG_INTRUSBE) = 0; ++ ++ /* disable UDC IRQs first */ ++ REG16(USB_REG_INTRINE) = 0; ++ REG16(USB_REG_INTROUTE) = 0; ++ REG8(USB_REG_INTRUSBE) = 0; ++ ++ /* Disable DMA */ ++ REG32(USB_REG_CNTL1) = 0; ++ REG32(USB_REG_CNTL2) = 0; ++ ++ /* Enable HS Mode */ ++ REG8(USB_REG_POWER) |= USB_POWER_HSENAB; ++ /* Enable soft connect */ ++ REG8(USB_REG_POWER) |= USB_POWER_SOFTCONN; ++ ++ D("enable phy! %x %x %x %x %x\n", ++ REG8(USB_REG_POWER), ++ REG_CPM_OPCR, ++ REG16(USB_REG_INTRINE), ++ REG16(USB_REG_INTROUTE), ++ REG8(USB_REG_INTRUSBE)); ++ ++ /* Wait a moment. */ ++ sleep_on_timeout(&uh->wq, NR_JIFFIES_USB_DETECT_WAIT); ++ ++ intr_usb = REG8(USB_REG_INTRUSB); ++ if ((intr_usb & USB_INTR_RESET) || ++ (intr_usb & USB_INTR_RESUME) || ++ (intr_usb & USB_INTR_SUSPEND)) ++ { ++ rv = 1; ++ } ++ else ++ { ++ rv = 0; ++ } ++ ++ /* Detect finish ,clean every thing */ ++ /* Disconnect from usb */ ++ REG8(USB_REG_POWER) &= ~USB_POWER_SOFTCONN; ++ /* Disable the USB PHY */ ++#ifdef CONFIG_SOC_JZ4740 ++ REG_CPM_SCR &= ~CPM_SCR_USBPHY_ENABLE; ++#elif defined(CONFIG_SOC_JZ4750) || defined(CONFIG_SOC_JZ4750D) ++ REG_CPM_OPCR &= ~CPM_OPCR_UDCPHY_ENABLE; ++#endif ++ /* Clear IRQs */ ++ REG16(USB_REG_INTRINE) = 0; ++ REG16(USB_REG_INTROUTE) = 0; ++ REG8(USB_REG_INTRUSBE) = 0; ++ __intc_ack_irq(IRQ_UDC); ++ __intc_unmask_irq(IRQ_UDC); ++ ++ mdelay(1); ++ ++ return rv; ++} ++ ++/* Do USB bus protocol detection */ ++static void usb_detect(struct uh_data *uh) ++{ ++ int rv = 0; ++ ++ D("Called.\n"); ++ ++ /* If the cable has already been offline, we just pass the real USB detection. */ ++ if (test_bit(BIT_CABLE_ONLINE, &uh->state)) { ++ ++ D("Do real detection.\n"); ++ ++ rv = do_usb_detect(uh); ++ set_bit(BIT_UDC_PHY_TOUCHED, &uh->state); ++ }else{ ++ clear_bit(BIT_UDC_PHY_TOUCHED, &uh->state); ++ D("No need to do real detection.\n"); ++ } ++ ++ if (rv) { ++ if (!test_and_set_bit(BIT_USB_ONLINE, &uh->state)) ++ set_bit(BIT_USB_CHANGE, &uh->state); ++ }else{ ++ /* Clear keep alive bit. */ ++ clear_bit(BIT_KEEP_ALIVE, &uh->state); ++ ++ if (test_and_clear_bit(BIT_USB_ONLINE, &uh->state)) ++ set_bit(BIT_USB_CHANGE, &uh->state); ++ } ++ ++ set_bit(BIT_USB_DETECT_DONE, &uh->state); ++ return; ++} ++ ++/* USB is active ? */ ++static int usb_is_active(void) ++{ ++ unsigned long tmp; ++ ++ tmp = REG16(USB_REG_FRAME); ++ ++ mdelay(2); /* USB 1.1 Frame length is 1ms, USB 2.0 HS Frame length is 125us */ ++ ++ rmb(); ++ ++ return tmp == REG16(USB_REG_FRAME) ? 0 : 1; ++} ++ ++/* Broadcast event to notifier */ ++static void do_broadcast_event(struct uh_data *uh) ++{ ++ udc_hotplug_event_t *e = &uh->cur_uh_event; ++ ++ /* Collect Information */ ++ if (test_and_clear_bit(BIT_CABLE_CHANGE, &uh->state)) { ++ e->type = EVENT_TYPE_CABLE; ++ e->state = (test_bit(BIT_CABLE_ONLINE, &uh->state)) ? EVENT_STATE_ONLINE: EVENT_STATE_OFFLINE; ++ e->flags = 0; ++ ++ D("Broadcast cable event -> State: %s.\n", (e->state == EVENT_STATE_ONLINE ? "Online" : "Offline")); ++ ++ /* Kick chain. */ ++ blocking_notifier_call_chain(&uh->notifier_head, BROADCAST_TYPE_EVENT, e); ++ } ++ ++ if (test_and_clear_bit(BIT_USB_CHANGE, &uh->state)) { ++ e->type = EVENT_TYPE_USB; ++ e->state = (test_bit(BIT_USB_ONLINE, &uh->state)) ? EVENT_STATE_ONLINE : EVENT_STATE_OFFLINE; ++ e->flags = 0; ++ ++ if (test_bit(BIT_UDC_PHY_TOUCHED, &uh->state)) { ++ set_bit(EVENT_FLAG_UDC_PHY_TOUCHED, &e->flags); ++ } ++ ++ D("Broadcast USB event -> State: %s.\n", (e->state == EVENT_STATE_ONLINE ? "Online" : "Offline")); ++ ++ /* Kick chain. */ ++ blocking_notifier_call_chain(&uh->notifier_head, BROADCAST_TYPE_EVENT, e); ++ } ++ ++ return; ++} ++ ++/* Handle pending request */ ++static inline void handle_request(struct uh_data *uh) ++{ ++ if (test_and_clear_bit(BIT_REQUEST_CABLE_DETECT, &uh->state)) ++ set_bit(BIT_DO_CABLE_DETECT, &uh->state); ++ ++ if (test_and_clear_bit(BIT_REQUEST_USB_DETECT, &uh->state)) ++ set_bit(BIT_DO_USB_DETECT, &uh->state); ++ ++ return; ++} ++ ++/* Have pending request ? */ ++static inline int pending_request(struct uh_data *uh) ++{ ++ if (test_bit(BIT_REQUEST_CABLE_DETECT, &uh->state) || test_bit(BIT_REQUEST_USB_DETECT, &uh->state)) ++ return 1; ++ else ++ return 0; ++} ++ ++#if defined (HAVE_DETECT_SYNC) ++static void prepare_restart(struct uh_data *uh, wait_queue_head_t *wq) ++{ ++ ++ D("Called.\n"); ++ ++ if (test_bit(BIT_CABLE_DETECT_DONE, &uh->state)) ++ set_bit(BIT_DO_CABLE_DETECT, &uh->state); ++ ++ if (test_bit(BIT_USB_DETECT_DONE, &uh->state)) ++ set_bit(BIT_DO_USB_DETECT, &uh->state); ++ ++ sleep_on_timeout(wq, NR_JIFFIES_SLEEP_BEFORE_RESTART); ++ ++ sync_seq(uh); ++ ++ return; ++} ++ ++/* Called from kernel thread */ ++static void udc_pnp_detect(struct uh_data *uh) ++{ ++ int nr_restart = 0; ++ ++ D("Do UDC detection.\n"); ++ ++ while (nr_restart != NR_RESTART_TIMES) { ++ /* Do cable detection ? */ ++ if (test_bit(BIT_DO_CABLE_DETECT, &uh->state)) { ++ D("Do cable detection.\n"); ++ ++ cable_detect(uh); ++ } ++ ++ /* Need restart ? */ ++ if (!is_seq_sync(uh)) { ++ nr_restart ++; ++ ++ prepare_restart(uh, &uh->wq); ++ continue; ++ } ++ ++ /* Do USB detection ? */ ++ if (test_bit(BIT_DO_USB_DETECT, &uh->state)) { ++ D("Do USB detection.\n"); ++ ++ usb_detect(uh); ++ } ++ ++ /* Need restart ? */ ++ if (!is_seq_sync(uh)) { ++ nr_restart ++; ++ ++ prepare_restart(uh, &uh->wq); ++ continue; ++ } ++ ++ /* Done */ ++ D("Done.\n"); ++ ++ clear_bit(BIT_DO_CABLE_DETECT, &uh->state); ++ clear_bit(BIT_DO_USB_DETECT, &uh->state); ++ ++ break; ++ } ++ ++ return; ++} ++ ++static inline void broadcast_event(struct uh_data *uh) ++{ ++ /* Sync ? */ ++ if (is_seq_sync(uh)) { ++ D("Sync -> Broadcast event.\n"); ++ ++ do_broadcast_event(uh); ++ }else{ ++ D("Not sync -> Prepare restarting.\n"); ++ ++ prepare_restart(uh, &uh->kthread_wq); ++ } ++} ++ ++static inline void udc_pnp_thread_sleep(struct uh_data *uh) ++{ ++ /* Sync ? -> Sleep. */ ++ if ( !pending_request(uh) || is_seq_sync(uh)) { ++ D("Sleep.\n"); ++ ++ sleep_on(&uh->kthread_wq); ++ } ++ ++ return; ++} ++ ++#else /* !HAVE_DETECT_SYNC */ ++ ++/* Called from kernel thread */ ++static void udc_pnp_detect(struct uh_data *uh) ++{ ++ D("Do UDC detection.\n"); ++ ++ /* Do cable detection ? */ ++ if (test_bit(BIT_DO_CABLE_DETECT, &uh->state)) { ++ D("Do cable detection.\n"); ++ ++ cable_detect(uh); ++ } ++ ++ /* Do USB detection ? */ ++ if (test_bit(BIT_DO_USB_DETECT, &uh->state)) { ++ D("Do USB detection.\n"); ++ ++ usb_detect(uh); ++ } ++ ++ /* Done */ ++ D("Done.\n"); ++ ++ clear_bit(BIT_DO_CABLE_DETECT, &uh->state); ++ clear_bit(BIT_DO_USB_DETECT, &uh->state); ++ ++ return; ++} ++ ++static inline void broadcast_event(struct uh_data *uh) ++{ ++ D("Broadcast event.\n"); ++ ++ do_broadcast_event(uh); ++ ++ return; ++} ++ ++static inline void udc_pnp_thread_sleep(struct uh_data *uh) ++{ ++ if (!pending_request(uh)) { ++ D("Sleep.\n"); ++ ++ sleep_on(&uh->kthread_wq); ++ } ++ ++ return; ++} ++#endif /* HAVE_DETECT_SYNC */ ++ ++/* Kernel thread */ ++static int udc_pnp_thread(void *data) ++{ ++ struct uh_data *uh = (struct uh_data *)data; ++ ++ while (!kthread_should_stop()) { ++ /* Sleep. */ ++ udc_pnp_thread_sleep(uh); ++ ++ D("Running.\n"); ++ ++ if (kthread_should_stop()) ++ break; ++ ++#if defined (HAVE_DETECT_SYNC) ++ /* Sync */ ++ sync_seq(uh); ++#endif ++ ++ D("Will do UDC detection.\n"); ++ ++ handle_request(uh); ++ ++ /* Do detect */ ++ udc_pnp_detect(uh); ++ ++ D("Done.\n"); ++ ++ /* Broadcast event. */ ++ broadcast_event(uh); ++ } ++ ++ D("Exit.\n"); ++ ++ return 0; ++} ++ ++static irqreturn_t udc_pnp_irq(int irq, void *dev_id) ++{ ++ struct uh_data *uh = (struct uh_data *)dev_id; ++ ++ D("called.\n"); ++ ++ /* clear interrupt pending status */ ++ __gpio_ack_irq(UDC_HOTPLUG_PIN); ++ ++ set_bit(BIT_REQUEST_CABLE_DETECT, &uh->state); ++ set_bit(BIT_REQUEST_USB_DETECT, &uh->state); ++ ++ start_detect(uh); ++ ++ return IRQ_HANDLED; ++} ++ ++static void __init init_gpio(struct uh_data *uh) ++{ ++ /* get current pin level */ ++ __gpio_disable_pull(UDC_HOTPLUG_PIN); ++ __gpio_as_input(UDC_HOTPLUG_PIN); ++ udelay(1); ++ ++ cable_detect(uh); ++ ++ /* Because of every plug IN/OUT action will casue more than one interrupt, ++ So whether rising trigger or falling trigger method can both start the detection. ++ */ ++ ++ __gpio_as_irq_rise_edge(UDC_HOTPLUG_PIN); ++ ++ if (test_bit(BIT_CABLE_ONLINE, &uh->state)) { ++ D("Cable Online -> Do start detection.\n"); ++ ++ set_bit(BIT_REQUEST_CABLE_DETECT, &uh->state); ++ set_bit(BIT_REQUEST_USB_DETECT, &uh->state); ++ ++ start_detect(uh); ++ }else{ ++ D("Cable Offline.\n"); ++ } ++ ++ return; ++} ++ ++/* ---------------------------------------------------------------------------------- */ ++/* Export routines */ ++static void udc_hotplug_keep_alive_timer_func(unsigned long data) ++{ ++ struct uh_data *uh = (struct uh_data *)data; ++ ++ D("Timer running.\n"); ++ ++ /* Decrease the counter. */ ++ if (test_bit(BIT_KEEP_ALIVE, &uh->state) && !(--uh->keep_alive_counter)) { ++ ++ if (!usb_is_active()) { ++ D("Timeout.\n"); ++ ++ set_bit(BIT_KEEP_ALIVE_TIMEOUT, &uh->state); ++ ++ clear_bit(BIT_USB_ONLINE, &uh->state); ++ set_bit(BIT_USB_CHANGE, &uh->state); ++ ++ /* No detection needed. We just want to broadcast our event. */ ++ start_detect(uh); ++ } ++ } ++ ++ /* Set next active time. */ ++ if (test_bit(BIT_KEEP_ALIVE, &uh->state) && !test_bit(BIT_KEEP_ALIVE_TIMEOUT, &uh->state)) ++ mod_timer(&uh->keep_alive_timer, uh->keep_alive_timer_interval + jiffies); ++ else ++ D("Timer will stop.\n"); ++ ++ return; ++} ++ ++int udc_hotplug_register_notifier(struct notifier_block *n, int request_state) ++{ ++ struct uh_data *uh = g_puh_data; ++ ++ udc_hotplug_event_t e; ++ ++ D("Register notifier: 0x%p.\n", (void *)n); ++ ++ /* Notifer will be registered is requesting current state. */ ++ if (request_state) { ++ ++ BUG_ON(!n->notifier_call); ++ ++ /* Cable State */ ++ e.type = EVENT_TYPE_CABLE; ++ e.state = (test_bit(BIT_CABLE_ONLINE, &uh->state)) ? EVENT_STATE_ONLINE: EVENT_STATE_OFFLINE; ++ ++ n->notifier_call(n, BROADCAST_TYPE_STATE, &e); ++ ++ /* USB State */ ++ e.type = EVENT_TYPE_USB; ++ e.state = (test_bit(BIT_CABLE_ONLINE, &uh->state)) ? EVENT_STATE_ONLINE: EVENT_STATE_OFFLINE; ++ ++ n->notifier_call(n, BROADCAST_TYPE_STATE, &e); ++ } ++ ++ return blocking_notifier_chain_register(&uh->notifier_head, n); ++ ++}EXPORT_SYMBOL(udc_hotplug_register_notifier); ++ ++int udc_hotplug_unregister_notifier(struct notifier_block *n) ++{ ++ struct uh_data *uh = g_puh_data; ++ ++ D("Unregister notifier: 0x%p.\n", (void *)n); ++ ++ return blocking_notifier_chain_unregister(&uh->notifier_head, n); ++ ++}EXPORT_SYMBOL(udc_hotplug_unregister_notifier); ++ ++/* Start keep alive, 0 - Use default value */ ++int udc_hotplug_start_keep_alive(unsigned long timer_interval_in_jiffies, unsigned long counter_limit) ++{ ++ struct uh_data *uh = g_puh_data; ++ ++ /* Already started. */ ++ if (test_and_set_bit(BIT_KEEP_ALIVE, &uh->state)) ++ return 0; ++ ++ if (timer_interval_in_jiffies) ++ uh->keep_alive_timer_interval = timer_interval_in_jiffies; ++ else ++ uh->keep_alive_timer_interval = DEFAULT_KEEP_ALIVE_TIMER_INTERVAL; ++ ++ if (counter_limit) ++ uh->keep_alive_counter_limit = counter_limit; ++ else ++ uh->keep_alive_counter_limit = DEFAULT_KEEP_ALIVE_COUNTER_LIMIT; ++ ++ uh->keep_alive_counter = uh->keep_alive_counter_limit; ++ ++ /* Active our timer. */ ++ return mod_timer(&uh->keep_alive_timer, 3 + jiffies); ++ ++}EXPORT_SYMBOL(udc_hotplug_start_keep_alive); ++ ++void udc_hotplug_do_keep_alive(void) ++{ ++ struct uh_data *uh = g_puh_data; ++ ++ D("Keep alive.\n"); ++ ++ /* Reset counter */ ++ uh->keep_alive_counter = uh->keep_alive_counter_limit; ++ ++ /* We are alive again. */ ++ if (test_and_clear_bit(BIT_KEEP_ALIVE_TIMEOUT, &uh->state)) { ++ D("Reactive timer.\n"); ++ ++ /* Active timer. */ ++ set_bit(BIT_KEEP_ALIVE, &uh->state); ++ mod_timer(&uh->keep_alive_timer, 3 + jiffies); ++ } ++ ++ return; ++}EXPORT_SYMBOL(udc_hotplug_do_keep_alive); ++ ++void udc_hotplug_stop_keep_alive(void) ++{ ++ struct uh_data *uh = g_puh_data; ++ ++ clear_bit(BIT_KEEP_ALIVE, &uh->state); ++ ++ return; ++ ++}EXPORT_SYMBOL(udc_hotplug_stop_keep_alive); ++ ++/* ----------------------------------------------------------------------------- */ ++ ++/* ++ * Module init and exit ++ */ ++static int __init udc_hotplug_init(void) ++{ ++ struct uh_data *uh; ++ ++ unsigned long status = 0; ++ ++ int rv; ++ ++ g_puh_data = (struct uh_data *)kzalloc(sizeof(struct uh_data), GFP_KERNEL); ++ if (!g_puh_data) { ++ printk(KERN_ERR PFX": Failed to allocate memory.\n"); ++ return -ENOMEM; ++ } ++ ++ uh = g_puh_data; ++ ++ set_bit(1, &status); ++ ++ BLOCKING_INIT_NOTIFIER_HEAD(&uh->notifier_head); ++ ++ init_waitqueue_head(&uh->kthread_wq); ++ init_waitqueue_head(&uh->wq); ++ ++ init_timer(&uh->keep_alive_timer); ++ ++ uh->keep_alive_timer.function = udc_hotplug_keep_alive_timer_func; ++ uh->keep_alive_timer.expires = jiffies - 1; /* Add a stopped timer */ ++ uh->keep_alive_timer.data = (unsigned long)uh; ++ ++ add_timer(&uh->keep_alive_timer); ++ ++#if defined (HAVE_DETECT_SYNC) ++ reset_seq(uh); ++#endif ++ ++ /* Create pnp thread and register IRQ */ ++ uh->kthread = kthread_run(udc_pnp_thread, uh, "kudcd"); ++ if (IS_ERR(uh->kthread)) { ++ printk(KERN_ERR PFX": Failed to create system monitor thread.\n"); ++ rv = PTR_ERR(uh->kthread); ++ goto err; ++ } ++ ++ set_bit(2, &status); ++ ++ rv = request_irq(UDC_HOTPLUG_IRQ, udc_pnp_irq, IRQF_DISABLED, "udc_pnp", uh); ++ if (rv) { ++ printk(KERN_ERR PFX": Could not get udc hotplug irq %d\n", UDC_HOTPLUG_IRQ); ++ goto err; ++ } ++ ++ init_gpio(uh); ++ ++#if defined (HAVE_DETECT_SYNC) ++ printk(KERN_ERR PFX": Registered(HAVE_DETECT_SYNC).\n"); ++#else ++ printk(KERN_ERR PFX": Registered.\n"); ++#endif ++ return 0; ++ ++err: ++ if (test_bit(2, &status)) { ++ kthread_stop(uh->kthread); ++ } ++ ++ if (test_bit(1, &status)) { ++ kfree(g_puh_data); ++ } ++ ++ return rv; ++} ++ ++static void __exit udc_hotplug_exit(void) ++{ ++ free_irq(UDC_HOTPLUG_IRQ, g_puh_data); ++ ++ kthread_stop(g_puh_data->kthread); ++ ++ kfree(g_puh_data); ++ ++ return; ++} ++ ++module_init(udc_hotplug_init); ++module_exit(udc_hotplug_exit); ++ ++MODULE_AUTHOR("River Wang <zwang@ingenic.cn>"); ++MODULE_LICENSE("GPL"); +diff -ruN linux-2.6.31-vanilla/drivers/video/backlight/gpm940b0.c linux-2.6.31/drivers/video/backlight/gpm940b0.c +--- linux-2.6.31-vanilla/drivers/video/backlight/gpm940b0.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/video/backlight/gpm940b0.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,253 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC LCD framebuffer driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/spi/spi.h> ++#include <linux/lcd.h> ++#include <linux/backlight.h> ++#include <linux/delay.h> ++ ++struct gpm940b0 { ++ struct spi_device *spi; ++ struct lcd_device *lcd; ++ struct backlight_device *bl; ++ unsigned enabled:1; ++}; ++ ++static int gpm940b0_write_reg(struct spi_device *spi, uint8_t reg, ++ uint8_t data) ++{ ++ uint8_t buf[2]; ++ buf[0] = ((reg & 0x40) << 1) | (reg & 0x3f); ++ buf[1] = data; ++ ++ return spi_write(spi, buf, sizeof(buf)); ++} ++ ++static void gpm940b0_power_disable(struct gpm940b0 *gpm940b0) ++{ ++ int ret = gpm940b0_write_reg(gpm940b0->spi, 0x5, 0xc6) ; ++ if (ret < 0) ++ printk("Failed to disable power: %d\n", ret); ++} ++ ++static void gpm940b0_power_enable(struct gpm940b0 *gpm940b0) ++{ ++ gpm940b0_write_reg(gpm940b0->spi, 0x5, 0xc7); ++} ++ ++ ++static int gpm940b0_set_power(struct lcd_device *lcd, int power) ++{ ++ struct gpm940b0 *gpm940b0 = lcd_get_data(lcd); ++ ++ switch (power) { ++ case FB_BLANK_UNBLANK: ++ gpm940b0->enabled = 1; ++ gpm940b0_power_enable(gpm940b0); ++ break; ++ default: ++ gpm940b0->enabled = 0; ++ gpm940b0_power_disable(gpm940b0); ++ break; ++ } ++ return 0; ++} ++ ++static int gpm940b0_set_contrast(struct lcd_device *lcd, int contrast) ++{ ++ struct gpm940b0 *gpm940b0 = lcd_get_data(lcd); ++ gpm940b0_write_reg(gpm940b0->spi, 0x0d, contrast); ++ return 0; ++} ++ ++static int gpm940b0_set_mode(struct lcd_device *lcd, struct fb_videomode *mode) ++{ ++ if (mode->xres != 320 && mode->yres != 240) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++/* ++int gpm940b0_bl_update_status(struct backlight_device *bl) ++{ ++ struct gpm940b0 *gpm940b0 = bl_get_data(bl); ++ ++ gpm940b0->reg5 &= ~0x38; ++ gpm940b0->reg5 |= ((bl->props.brightness << 3) & 0x38); ++ ++ gpm940b0_write_reg(gpm940b0->spi, 0x5, gpm940b0->reg5); ++ ++ return 0; ++}*/ ++ ++static ssize_t reg_write(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ char *buf2; ++ uint32_t reg = simple_strtoul(buf, &buf2, 10); ++ uint32_t val = simple_strtoul(buf2 + 1, NULL, 10); ++ struct gpm940b0 *gpm940b0 = dev_get_drvdata(dev); ++ ++ if (reg < 0 || val < 0) ++ return -EINVAL; ++ ++ gpm940b0_write_reg(gpm940b0->spi, reg, val); ++ return count; ++} ++ ++static DEVICE_ATTR(reg, 0644, NULL, reg_write); ++ ++static struct lcd_ops gpm940b0_lcd_ops = { ++ .set_power = gpm940b0_set_power, ++ .set_contrast = gpm940b0_set_contrast, ++ .set_mode = gpm940b0_set_mode, ++}; ++ ++#if 0 ++static struct backlight_ops gpm940b0_bl_ops = { ++/* .get_brightness = gpm940b0_bl_get_brightness,*/ ++ .update_status = gpm940b0_bl_update_status, ++}; ++#endif ++ ++static int __devinit gpm940b0_probe(struct spi_device *spi) ++{ ++ int ret; ++ struct gpm940b0 *gpm940b0; ++ ++ gpm940b0 = kmalloc(sizeof(*gpm940b0), GFP_KERNEL); ++ ++ spi->bits_per_word = 8; ++ ++ ret = spi_setup(spi); ++ if (ret) { ++ dev_err(&spi->dev, "Failed to setup spi\n"); ++ goto err_free_gpm940b0; ++ } ++ ++ gpm940b0->spi = spi; ++ ++ gpm940b0->lcd = lcd_device_register("gpm940b0-lcd", &spi->dev, gpm940b0, ++ &gpm940b0_lcd_ops); ++ ++ if (IS_ERR(gpm940b0->lcd)) { ++ ret = PTR_ERR(gpm940b0->lcd); ++ dev_err(&spi->dev, "Failed to register lcd device: %d\n", ret); ++ goto err_free_gpm940b0; ++ } ++ ++ gpm940b0->lcd->props.max_contrast = 255; ++ ++#if 0 ++ gpm940b0->bl = backlight_device_register("gpm940b0-bl", &spi->dev, gpm940b0, ++ &gpm940b0_bl_ops); ++ ++ if (IS_ERR(gpm940b0->bl)) { ++ ret = PTR_ERR(gpm940b0->bl); ++ dev_err(&spi->dev, "Failed to register backlight device: %d\n", ret); ++ gpm940b0->bl = NULL; ++ } else { ++ gpm940b0->bl->props.max_brightness = 8; ++ gpm940b0->bl->props.brightness = 0; ++ gpm940b0->bl->props.power = FB_BLANK_UNBLANK; ++ } ++#endif ++ ++ ret = device_create_file(&spi->dev, &dev_attr_reg); ++ if (ret) ++ goto err_unregister_lcd; ++ ++ gpm940b0->enabled = 1; ++ dev_set_drvdata(&spi->dev, gpm940b0); ++ ++ gpm940b0_write_reg(spi, 0x13, 0x01); ++ gpm940b0_write_reg(spi, 0x5, 0xc7); ++ return 0; ++err_unregister_lcd: ++ lcd_device_unregister(gpm940b0->lcd); ++err_free_gpm940b0: ++ kfree(gpm940b0); ++ return ret; ++} ++ ++static int __devexit gpm940b0_remove(struct spi_device *spi) ++{ ++ struct gpm940b0 *gpm940b0 = spi_get_drvdata(spi); ++#if 0 ++ if (gpm940b0->bl) ++ backlight_device_unregister(gpm940b0->bl); ++#endif ++ ++ lcd_device_unregister(gpm940b0->lcd); ++ ++ spi_set_drvdata(spi, NULL); ++ kfree(gpm940b0); ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++ ++static int gpm940b0_suspend(struct spi_device *spi, pm_message_t state) ++{ ++ struct gpm940b0 *gpm940b0 = spi_get_drvdata(spi); ++ if (gpm940b0->enabled) { ++ gpm940b0_power_disable(gpm940b0); ++ mdelay(10); ++ } ++ return 0; ++} ++ ++static int gpm940b0_resume(struct spi_device *spi) ++{ ++ struct gpm940b0 *gpm940b0 = spi_get_drvdata(spi); ++ if (gpm940b0->enabled) ++ gpm940b0_power_enable(gpm940b0); ++ return 0; ++} ++ ++#else ++#define gpm940b0_suspend NULL ++#define gpm940b0_resume NULL ++#endif ++ ++static struct spi_driver gpm940b0_driver = { ++ .driver = { ++ .name = "gpm940b0", ++ .owner = THIS_MODULE, ++ }, ++ .probe = gpm940b0_probe, ++ .remove = __devexit_p(gpm940b0_remove), ++ .suspend = gpm940b0_suspend, ++ .resume = gpm940b0_resume, ++}; ++ ++static int __init gpm940b0_init(void) ++{ ++ return spi_register_driver(&gpm940b0_driver); ++} ++module_init(gpm940b0_init); ++ ++static void __exit gpm940b0_exit(void) ++{ ++ return spi_unregister_driver(&gpm940b0_driver); ++} ++module_exit(gpm940b0_exit) ++ ++MODULE_AUTHOR("Lars-Peter Clausen"); ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("LCD and backlight controll for Giantplus GPM940B0"); ++MODULE_ALIAS("spi:gpm940b0"); +diff -ruN linux-2.6.31-vanilla/drivers/video/jz4740_fb.c linux-2.6.31/drivers/video/jz4740_fb.c +--- linux-2.6.31-vanilla/drivers/video/jz4740_fb.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/drivers/video/jz4740_fb.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,486 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC LCD framebuffer driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/types.h> ++#include <linux/platform_device.h> ++#include <linux/fb.h> ++#include <linux/module.h> ++#include <linux/dma-mapping.h> ++#include <linux/jz4740_fb.h> ++ ++#include <linux/delay.h> ++ ++#define JZ_REG_LCD_CFG 0x00 ++#define JZ_REG_LCD_VSYNC 0x04 ++#define JZ_REG_LCD_HSYNC 0x08 ++#define JZ_REG_LCD_VAT 0x0C ++#define JZ_REG_LCD_DAH 0x10 ++#define JZ_REG_LCD_DAV 0x14 ++#define JZ_REG_LCD_PS 0x18 ++#define JZ_REG_LCD_CLS 0x1C ++#define JZ_REG_LCD_SPL 0x20 ++#define JZ_REG_LCD_REV 0x24 ++#define JZ_REG_LCD_CTRL 0x30 ++#define JZ_REG_LCD_STATE 0x34 ++#define JZ_REG_LCD_IID 0x38 ++#define JZ_REG_LCD_DA0 0x40 ++#define JZ_REG_LCD_SA0 0x44 ++#define JZ_REG_LCD_FID0 0x48 ++#define JZ_REG_LCD_CMD0 0x4C ++#define JZ_REG_LCD_DA1 0x50 ++#define JZ_REG_LCD_SA1 0x54 ++#define JZ_REG_LCD_FID1 0x58 ++#define JZ_REG_LCD_CMD1 0x5C ++ ++#define JZ_LCD_CFG_SLCD BIT(31) ++#define JZ_LCD_CFG_PSM BIT(23) ++#define JZ_LCD_CFG_CLSM BIT(22) ++#define JZ_LCD_CFG_SPLM BIT(21) ++#define JZ_LCD_CFG_REVM BIT(20) ++#define JZ_LCD_CFG_HSYNCM BIT(19) ++#define JZ_LCD_CFG_PCLKM BIT(18) ++#define JZ_LCD_CFG_INV BIT(17) ++#define JZ_LCD_CFG_SYNC_DIR BIT(16) ++#define JZ_LCD_CFG_PSP BIT(15) ++#define JZ_LCD_CFG_CLSP BIT(14) ++#define JZ_LCD_CFG_SPLP BIT(13) ++#define JZ_LCD_CFG_REVP BIT(12) ++#define JZ_LCD_CFG_HSYNCP BIT(11) ++#define JZ_LCD_CFG_PCLKP BIT(10) ++#define JZ_LCD_CFG_DEP BIT(9) ++#define JZ_LCD_CFG_VSYNCP BIT(8) ++#define JZ_LCD_CFG_18_BIT BIT(7) ++#define JZ_LCD_CFG_PDW BIT(5) | BIT(4) ++#define JZ_LCD_CFG_MODE_MASK 0xf ++ ++#define JZ_LCD_CTRL_BURST_4 (0x0 << 28) ++#define JZ_LCD_CTRL_BURST_8 (0x1 << 28) ++#define JZ_LCD_CTRL_BURST_16 (0x2 << 28) ++#define JZ_LCD_CTRL_RGB555 BIT(27) ++#define JZ_LCD_CTRL_OFUP BIT(26) ++#define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24) ++#define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24) ++#define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24) ++#define JZ_LCD_CTRL_PDD_MASK (0xff << 16) ++#define JZ_LCD_CTRL_EOF_IRQ BIT(13) ++#define JZ_LCD_CTRL_SOF_IRQ BIT(12) ++#define JZ_LCD_CTRL_OFU_IRQ BIT(11) ++#define JZ_LCD_CTRL_IFU0_IRQ BIT(10) ++#define JZ_LCD_CTRL_IFU1_IRQ BIT(9) ++#define JZ_LCD_CTRL_DD_IRQ BIT(8) ++#define JZ_LCD_CTRL_QDD_IRQ BIT(7) ++#define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6) ++#define JZ_LCD_CTRL_LSB_FISRT BIT(5) ++#define JZ_LCD_CTRL_DISABLE BIT(4) ++#define JZ_LCD_CTRL_ENABLE BIT(3) ++#define JZ_LCD_CTRL_BPP_1 0x0 ++#define JZ_LCD_CTRL_BPP_2 0x1 ++#define JZ_LCD_CTRL_BPP_4 0x2 ++#define JZ_LCD_CTRL_BPP_8 0x3 ++#define JZ_LCD_CTRL_BPP_15_16 0x4 ++#define JZ_LCD_CTRL_BPP_18_24 0x5 ++ ++#define JZ_LCD_CMD_SOF_IRQ BIT(15) ++#define JZ_LCD_CMD_EOF_IRQ BIT(16) ++#define JZ_LCD_CMD_ENABLE_PAL BIT(12) ++ ++#define JZ_LCD_SYNC_MASK 0x3ff ++ ++struct jzfb_framedesc { ++ uint32_t next; ++ uint32_t addr; ++ uint32_t id; ++ uint32_t cmd; ++} __attribute__((packed)); ++ ++struct jzfb { ++ struct fb_info *fb; ++ struct platform_device *pdev; ++ void __iomem *base; ++ struct resource *mem; ++ struct jz4740_fb_platform_data *pdata; ++ ++ void *devmem; ++ size_t devmem_size; ++ dma_addr_t devmem_phys; ++ void *vidmem; ++ size_t vidmem_size; ++ dma_addr_t vidmem_phys; ++ struct jzfb_framedesc *framedesc; ++ ++ uint32_t pseudo_palette[16]; ++}; ++ ++static struct fb_fix_screeninfo jzfb_fix __devinitdata = { ++ .id = "JZ4740 FB", ++ .type = FB_TYPE_PACKED_PIXELS, ++ .visual = FB_VISUAL_TRUECOLOR, ++ .xpanstep = 0, ++ .ypanstep = 0, ++ .ywrapstep = 0, ++ .accel = FB_ACCEL_NONE, ++}; ++ ++int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, ++ unsigned transp, struct fb_info *fb) ++{ ++ ((uint32_t*)fb->pseudo_palette)[regno] = red << 16 | green << 8 | blue; ++ return 0; ++} ++ ++static int jzfb_get_controller_bpp(struct jzfb *jzfb) ++{ ++ switch(jzfb->pdata->bpp) { ++ case 18: ++ case 24: ++ return 32; ++ break; ++ default: ++ return jzfb->pdata->bpp; ++ } ++} ++ ++static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb) ++{ ++ struct jzfb* jzfb = fb->par; ++ struct fb_videomode *mode = jzfb->pdata->modes; ++ int i; ++ ++ if (fb->var.bits_per_pixel != jzfb_get_controller_bpp(jzfb) && ++ fb->var.bits_per_pixel != jzfb->pdata->bpp) ++ return -EINVAL; ++ ++ for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) { ++ if (mode->xres == fb->var.xres && mode->yres == fb->var.yres) ++ break; ++ } ++ ++ if (i == jzfb->pdata->num_modes) ++ return -EINVAL; ++ ++ fb_videomode_to_var(&fb->var, fb->mode); ++ ++ switch (jzfb->pdata->bpp) { ++ case 8: ++ break; ++ case 15: ++ var->red.offset = 10; ++ var->red.length = 5; ++ var->green.offset = 6; ++ var->green.length = 5; ++ var->blue.offset = 0; ++ var->blue.length = 5; ++ break; ++ case 16: ++ var->red.offset = 11; ++ var->red.length = 5; ++ var->green.offset = 6; ++ var->green.length = 6; ++ var->blue.offset = 0; ++ var->blue.length = 5; ++ break; ++ case 18: ++ var->red.offset = 16; ++ var->red.length = 6; ++ var->green.offset = 8; ++ var->green.length = 6; ++ var->blue.offset = 0; ++ var->blue.length = 6; ++ fb->var.bits_per_pixel = 32; ++ break; ++ case 32: ++ case 24: ++ var->transp.offset = 24; ++ var->transp.length = 8; ++ var->red.offset = 16; ++ var->red.length = 8; ++ var->green.offset = 8; ++ var->green.length = 8; ++ var->blue.offset = 0; ++ var->blue.length = 8; ++ fb->var.bits_per_pixel = 32; ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static int jzfb_set_par(struct fb_info *info) ++{ ++ struct jzfb* jzfb = info->par; ++ struct fb_var_screeninfo *var = &info->var; ++ uint16_t hds, vds; ++ uint16_t hde, vde; ++ uint16_t ht, vt; ++ uint32_t ctrl; ++ ++ hds = var->hsync_len + var->left_margin; ++ hde = hds + var->xres; ++ ht = hde + var->right_margin; ++ ++ vds = var->vsync_len + var->upper_margin; ++ vde = vds + var->yres; ++ vt = vde + var->lower_margin; ++ ++ writel(var->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC); ++ writel(var->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC); ++ ++ writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT); ++ ++ writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH); ++ writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV); ++ ++ ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16; ++ ctrl |= JZ_LCD_CTRL_ENABLE; ++ ++ switch (jzfb->pdata->bpp) { ++ case 1: ++ ctrl |= JZ_LCD_CTRL_BPP_1; ++ break; ++ case 2: ++ ctrl |= JZ_LCD_CTRL_BPP_2; ++ break; ++ case 4: ++ ctrl |= JZ_LCD_CTRL_BPP_4; ++ break; ++ case 8: ++ ctrl |= JZ_LCD_CTRL_BPP_8; ++ break; ++ case 15: ++ ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */ ++ case 16: ++ ctrl |= JZ_LCD_CTRL_BPP_15_16; ++ break; ++ case 18: ++ case 24: ++ case 32: ++ ctrl |= JZ_LCD_CTRL_BPP_18_24; ++ break; ++ default: ++ break; ++ } ++ writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); ++ ++ return 0; ++} ++ ++ ++static int jzfb_alloc_vidmem(struct jzfb *jzfb) ++{ ++ size_t devmem_size; ++ int max_videosize = 0; ++ struct fb_videomode *mode = jzfb->pdata->modes; ++ struct jzfb_framedesc *framedesc; ++ void *page; ++ int i; ++ ++ for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) { ++ if (max_videosize < mode->xres * mode->yres) ++ max_videosize = mode->xres * mode->yres; ++ } ++ ++ max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3; ++ ++ devmem_size = max_videosize + sizeof(struct jzfb_framedesc); ++ ++ jzfb->devmem_size = devmem_size; ++ jzfb->devmem = dma_alloc_coherent(&jzfb->pdev->dev, ++ PAGE_ALIGN(devmem_size), ++ &jzfb->devmem_phys, GFP_KERNEL); ++ ++ if (!jzfb->devmem) { ++ return -ENOMEM; ++ } ++ ++ for (page = jzfb->vidmem; ++ page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size); ++ page += PAGE_SIZE) { ++ SetPageReserved(virt_to_page(page)); ++ } ++ ++ ++ framedesc = jzfb->devmem + max_videosize; ++ jzfb->vidmem = jzfb->devmem; ++ jzfb->vidmem_phys = jzfb->devmem_phys; ++ ++ framedesc->next = jzfb->devmem_phys + max_videosize; ++ framedesc->addr = jzfb->devmem_phys; ++ framedesc->id = 0; ++ framedesc->cmd = 0; ++ framedesc->cmd |= max_videosize / 4; ++ ++ jzfb->framedesc = framedesc; ++ ++ ++ return 0; ++} ++ ++static void jzfb_free_devmem(struct jzfb *jzfb) ++{ ++ dma_free_coherent(&jzfb->pdev->dev, jzfb->devmem_size, jzfb->devmem, ++ jzfb->devmem_phys); ++} ++ ++static struct fb_ops jzfb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = jzfb_check_var, ++ .fb_set_par = jzfb_set_par, ++/* .fb_blank = jzfb_blank,*/ ++ .fb_fillrect = sys_fillrect, ++ .fb_copyarea = sys_copyarea, ++ .fb_imageblit = sys_imageblit, ++ .fb_setcolreg = jzfb_setcolreg, ++}; ++ ++static int __devinit jzfb_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct jzfb *jzfb; ++ struct fb_info *fb; ++ struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data; ++ struct resource *mem; ++ ++ if (!pdata) { ++ dev_err(&pdev->dev, "Missing platform data\n"); ++ return -ENOENT; ++ } ++ ++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ++ if (!mem) { ++ dev_err(&pdev->dev, "Failed to get register memory resource\n"); ++ return -ENOENT; ++ } ++ ++ mem = request_mem_region(mem->start, resource_size(mem), pdev->name); ++ ++ if (!mem) { ++ dev_err(&pdev->dev, "Failed to request register memory region\n"); ++ return -EBUSY; ++ } ++ ++ ++ fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev); ++ ++ if (!fb) { ++ dev_err(&pdev->dev, "Failed to allocate framebuffer device\n"); ++ ret = -ENOMEM; ++ goto err_release_mem_region; ++ } ++ ++ fb->fbops = &jzfb_ops; ++ fb->flags = FBINFO_DEFAULT; ++ ++ jzfb = fb->par; ++ jzfb->pdev = pdev; ++ jzfb->pdata = pdata; ++ jzfb->mem = mem; ++ ++ jzfb->base = ioremap(mem->start, resource_size(mem)); ++ ++ if (!jzfb->base) { ++ dev_err(&pdev->dev, "Failed to ioremap register memory region\n"); ++ ret = -EBUSY; ++ goto err_framebuffer_release; ++ } ++ ++ platform_set_drvdata(pdev, jzfb); ++ ++ fb_videomode_to_modelist(pdata->modes, pdata->num_modes, ++ &fb->modelist); ++ fb->mode = pdata->modes; ++ ++ fb_videomode_to_var(&fb->var, fb->mode); ++ fb->var.bits_per_pixel = pdata->bpp; ++ jzfb_check_var(&fb->var, fb); ++ ++ ret = jzfb_alloc_vidmem(jzfb); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to allocate video memory\n"); ++ goto err_iounmap; ++ } ++ ++ fb->fix = jzfb_fix; ++ fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8; ++ fb->fix.mmio_start = mem->start; ++ fb->fix.mmio_len = resource_size(mem); ++ fb->fix.smem_start = jzfb->vidmem_phys; ++ fb->fix.smem_len = fb->fix.line_length * fb->var.yres; ++ fb->screen_base = jzfb->vidmem; ++ fb->pseudo_palette = jzfb->pseudo_palette; ++ ++ fb_alloc_cmap(&fb->cmap, 256, 0); ++ ++ jzfb_set_par(fb); ++ writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0); ++ ++ ret = register_framebuffer(fb); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret); ++ goto err_free_devmem; ++ } ++ ++ return 0; ++err_free_devmem: ++ jzfb_free_devmem(jzfb); ++err_iounmap: ++ iounmap(jzfb->base); ++err_framebuffer_release: ++ framebuffer_release(fb); ++err_release_mem_region: ++ release_mem_region(mem->start, resource_size(mem)); ++ return ret; ++} ++ ++static int __devexit jzfb_remove(struct platform_device *pdev) ++{ ++ struct jzfb *jzfb = platform_get_drvdata(pdev); ++ ++ iounmap(jzfb->base); ++ release_mem_region(jzfb->mem->start, resource_size(jzfb->mem)); ++ jzfb_free_devmem(jzfb); ++ platform_set_drvdata(pdev, NULL); ++ framebuffer_release(jzfb->fb); ++ return 0; ++} ++ ++static struct platform_driver jzfb_driver = { ++ .probe = jzfb_probe, ++ .remove = __devexit_p(jzfb_remove), ++ ++ .driver = { ++ .name = "jz4740-fb", ++ }, ++}; ++ ++int __init jzfb_init(void) ++{ ++ return platform_driver_register(&jzfb_driver); ++} ++module_init(jzfb_init); ++ ++void __exit jzfb_exit(void) ++{ ++ platform_driver_unregister(&jzfb_driver); ++} ++module_exit(jzfb_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver"); ++MODULE_ALIAS("platform:jz4740-fb"); ++MODULE_ALIAS("platform:jz4720-fb"); +diff -ruN linux-2.6.31-vanilla/include/linux/jz4740-adc.h linux-2.6.31/include/linux/jz4740-adc.h +--- linux-2.6.31-vanilla/include/linux/jz4740-adc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/include/linux/jz4740-adc.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,25 @@ ++ ++#ifndef __LINUX_JZ4740_ADC ++#define __LINUX_JZ4740_ADC ++ ++#include <linux/device.h> ++ ++enum jz_adc_battery_scale { ++ JZ_ADC_BATTERY_SCALE_2V5, /* Mesures voltages up to 2.5V */ ++ JZ_ADC_BATTERY_SCALE_7V5, /* Mesures voltages up to 7.5V */ ++}; ++ ++/* ++ * jz4740_adc_read_battery_voltage - Read battery voltage from the ADC PBAT pin ++ * @dev: Pointer to a jz4740-adc device ++ * @scale: Whether to use 2.5V or 7.5V scale ++ * ++ * Returns: Battery voltage in mircovolts ++ * ++ * Context: Process ++*/ ++long jz4740_adc_read_battery_voltage(struct device *dev, ++ enum jz_adc_battery_scale scale); ++ ++ ++#endif +diff -ruN linux-2.6.31-vanilla/include/linux/jz4740_fb.h linux-2.6.31/include/linux/jz4740_fb.h +--- linux-2.6.31-vanilla/include/linux/jz4740_fb.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/include/linux/jz4740_fb.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,52 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#ifndef __LINUX_JZ4740_FB_H ++#define __LINUX_JZ4740_FB_H ++ ++#include <linux/fb.h> ++ ++enum jz4740_fb_lcd_type { ++ JZ_LCD_TYPE_GENERIC_16_18_BIT = 0, ++ JZ_LCD_TYPE_SPECIAL_TFT_1 = 1, ++ JZ_LCD_TYPE_SPECIAL_TFT_2 = 2, ++ JZ_LCD_TYPE_SPECIAL_TFT_3 = 3, ++ JZ_LCD_TYPE_NON_INTERLACED_CCIR656 = 5, ++ JZ_LCD_TYPE_INTERLACED_CCIR656 = 7, ++ JZ_LCD_TYPE_SINGLE_COLOR_STN = 8, ++ JZ_LCD_TYPE_SINGLE_MONOCHROME_STN = 9, ++ JZ_LCD_TYPE_DUAL_COLOR_STN = 10, ++ JZ_LCD_TYPE_8BIT_SERIAL = 11, ++}; ++ ++/* ++* width: width of the lcd display in mm ++* height: height of the lcd display in mm ++* num_modes: size of modes ++* modes: list of valid video modes ++* bpp: bits per pixel for the lcd ++* lcd_type: lcd type ++*/ ++ ++struct jz4740_fb_platform_data { ++ unsigned int width; ++ unsigned int height; ++ ++ size_t num_modes; ++ struct fb_videomode *modes; ++ int bpp; ++ enum jz4740_fb_lcd_type lcd_type; ++}; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/include/linux/mtd/jz4740_nand.h linux-2.6.31/include/linux/mtd/jz4740_nand.h +--- linux-2.6.31-vanilla/include/linux/mtd/jz4740_nand.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/include/linux/mtd/jz4740_nand.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,34 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * JZ4720/JZ4740 SoC NAND controller driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#ifndef __JZ_NAND_H__ ++#define __JZ_NAND_H__ ++ ++#include <linux/mtd/nand.h> ++#include <linux/mtd/partitions.h> ++ ++struct jz_nand_platform_data { ++ int num_partitions; ++ struct mtd_partition *partitions; ++ ++ struct nand_ecclayout *ecc_layout; ++ ++ unsigned int busy_gpio; ++ ++ void (*ident_callback)(struct platform_device *, struct nand_chip *, ++ struct mtd_partition **, int *num_partitions); ++}; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/include/linux/power/jz4740-battery.h linux-2.6.31/include/linux/power/jz4740-battery.h +--- linux-2.6.31-vanilla/include/linux/power/jz4740-battery.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/include/linux/power/jz4740-battery.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,28 @@ ++/* ++ * Copyright (C) 2009, Jiejing Zhang <kzjeef@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#ifndef __JZ4740_BATTERY_H ++#define __JZ4740_BATTERY_H ++ ++struct jz_batt_info { ++ int dc_dect_gpio; /* GPIO port of DC charger detection */ ++ int usb_dect_gpio; /* GPIO port of USB charger detection */ ++ int charg_stat_gpio; /* GPIO port of Charger state */ ++ ++ int min_voltag; /* Mininal battery voltage in uV */ ++ int max_voltag; /* Maximum battery voltage in uV */ ++ int batt_tech; /* Battery technology */ ++}; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/sound/soc/codecs/jzcodec.c linux-2.6.31/sound/soc/codecs/jzcodec.c +--- linux-2.6.31-vanilla/sound/soc/codecs/jzcodec.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/codecs/jzcodec.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,516 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> ++ ++#include <sound/core.h> ++#include <sound/pcm.h> ++#include <sound/pcm_params.h> ++#include <sound/initval.h> ++#include <sound/soc-dapm.h> ++#include <sound/soc.h> ++ ++#define JZ_REG_CODEC_1 0x0 ++#define JZ_REG_CODEC_2 0x1 ++ ++#define JZ_CODEC_1_LINE_ENABLE BIT(29) ++#define JZ_CODEC_1_MIC_ENABLE BIT(28) ++#define JZ_CODEC_1_SW1_ENABLE BIT(27) ++#define JZ_CODEC_1_ADC_ENABLE BIT(26) ++#define JZ_CODEC_1_SW2_ENABLE BIT(25) ++#define JZ_CODEC_1_DAC_ENABLE BIT(24) ++#define JZ_CODEC_1_VREF_DISABLE BIT(20) ++#define JZ_CODEC_1_VREF_AMP_DISABLE BIT(19) ++#define JZ_CODEC_1_VREF_PULL_DOWN BIT(18) ++#define JZ_CODEC_1_VREF_LOW_CURRENT BIT(17) ++#define JZ_CODEC_1_VREF_HIGH_CURRENT BIT(16) ++#define JZ_CODEC_1_HEADPHONE_DISABLE BIT(14) ++#define JZ_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13) ++#define JZ_CODEC_1_HEADPHONE_CHANGE BIT(12) ++#define JZ_CODEC_1_HEADPHONE_PULL_DOWN_M BIT(11) ++#define JZ_CODEC_1_HEADPHONE_PULL_DOWN_R BIT(10) ++#define JZ_CODEC_1_HEADPHONE_POWER_DOWN_M BIT(9) ++#define JZ_CODEC_1_HEADPHONE_POWER_DOWN BIT(8) ++#define JZ_CODEC_1_SUSPEND BIT(1) ++#define JZ_CODEC_1_RESET BIT(0) ++ ++#define JZ_CODEC_1_LINE_ENABLE_OFFSET 29 ++#define JZ_CODEC_1_MIC_ENABLE_OFFSET 28 ++#define JZ_CODEC_1_SW1_ENABLE_OFFSET 27 ++#define JZ_CODEC_1_ADC_ENABLE_OFFSET 26 ++#define JZ_CODEC_1_SW2_ENABLE_OFFSET 25 ++#define JZ_CODEC_1_DAC_ENABLE_OFFSET 24 ++#define JZ_CODEC_1_HEADPHONE_DISABLE_OFFSET 14 ++#define JZ_CODEC_1_HEADPHONE_POWER_DOWN_OFFSET 8 ++ ++#define JZ_CODEC_2_INPUT_VOLUME_MASK 0x1f0000 ++#define JZ_CODEC_2_SAMPLE_RATE_MASK 0x000f00 ++#define JZ_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030 ++#define JZ_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003 ++ ++#define JZ_CODEC_2_INPUT_VOLUME_OFFSET 16 ++#define JZ_CODEC_2_SAMPLE_RATE_OFFSET 8 ++#define JZ_CODEC_2_MIC_BOOST_GAIN_OFFSET 4 ++#define JZ_CODEC_2_HEADPHONE_VOLUME_OFFSET 0 ++ ++struct jz_codec { ++ void __iomem *base; ++ struct resource *mem; ++ ++ uint32_t reg_cache[2]; ++ struct snd_soc_codec codec; ++}; ++ ++inline static struct jz_codec *codec_to_jz(struct snd_soc_codec *codec) ++{ ++ return container_of(codec, struct jz_codec, codec); ++} ++ ++static unsigned int jz_codec_read(struct snd_soc_codec *codec, unsigned int reg) ++{ ++ struct jz_codec *jz_codec = codec_to_jz(codec); ++ return readl(jz_codec->base + (reg << 2)); ++} ++ ++static int jz_codec_write(struct snd_soc_codec *codec, unsigned int reg, ++unsigned int val) ++{ ++ struct jz_codec *jz_codec = codec_to_jz(codec); ++ jz_codec->reg_cache[reg] = val; ++ ++ writel(val, jz_codec->base + (reg << 2)); ++ return 0; ++} ++ ++static const struct snd_kcontrol_new jz_codec_controls[] = { ++ SOC_SINGLE("Master Playback Volume", JZ_REG_CODEC_2, ++ JZ_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0), ++ SOC_SINGLE("Capture Volume", JZ_REG_CODEC_2, ++ JZ_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0), ++ SOC_SINGLE("Master Playback Switch", JZ_REG_CODEC_1, ++ JZ_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1), ++ SOC_SINGLE("Mic Capture Volume", JZ_REG_CODEC_2, ++ JZ_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0), ++}; ++ ++static const struct snd_kcontrol_new jz_codec_output_controls[] = { ++ SOC_DAPM_SINGLE("Bypass Switch", JZ_REG_CODEC_1, ++ JZ_CODEC_1_SW1_ENABLE_OFFSET, 1, 0), ++ SOC_DAPM_SINGLE("DAC Switch", JZ_REG_CODEC_1, ++ JZ_CODEC_1_SW2_ENABLE_OFFSET, 1, 0), ++}; ++ ++static const struct snd_kcontrol_new jz_codec_input_controls[] = ++{ ++ SOC_DAPM_SINGLE("Line Capture Switch", JZ_REG_CODEC_1, ++ JZ_CODEC_1_LINE_ENABLE_OFFSET, 1, 0), ++ SOC_DAPM_SINGLE("Mic Capture Switch", JZ_REG_CODEC_1, ++ JZ_CODEC_1_MIC_ENABLE_OFFSET, 1, 0), ++}; ++ ++static const struct snd_soc_dapm_widget jz_codec_dapm_widgets[] = { ++ SND_SOC_DAPM_ADC("ADC", "Capture", JZ_REG_CODEC_1, ++ JZ_CODEC_1_ADC_ENABLE_OFFSET, 0), ++ SND_SOC_DAPM_DAC("DAC", "Playback", JZ_REG_CODEC_1, ++ JZ_CODEC_1_DAC_ENABLE_OFFSET, 0), ++ ++ SND_SOC_DAPM_MIXER("Output Mixer", JZ_REG_CODEC_1, ++ JZ_CODEC_1_HEADPHONE_POWER_DOWN_OFFSET, 1, ++ jz_codec_output_controls, ++ ARRAY_SIZE(jz_codec_output_controls)), ++ ++ SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0, ++ jz_codec_input_controls, ++ ARRAY_SIZE(jz_codec_input_controls)), ++ SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0), ++ ++ SND_SOC_DAPM_OUTPUT("LOUT"), ++ SND_SOC_DAPM_OUTPUT("ROUT"), ++ ++ SND_SOC_DAPM_INPUT("MIC"), ++ SND_SOC_DAPM_INPUT("LIN"), ++ SND_SOC_DAPM_INPUT("RIN"), ++}; ++ ++static const struct snd_soc_dapm_route jz_codec_dapm_routes[] = { ++ ++ {"Line Input", NULL, "LIN"}, ++ {"Line Input", NULL, "RIN"}, ++ ++ {"Input Mixer", "Line Capture Switch", "Line Input"}, ++ {"Input Mixer", "Mic Capture Switch", "MIC"}, ++ ++ {"ADC", NULL, "Input Mixer"}, ++ ++ {"Output Mixer", "Bypass Switch", "Input Mixer"}, ++ {"Output Mixer", "DAC Switch", "DAC"}, ++ ++ {"LOUT", NULL, "Output Mixer"}, ++ {"ROUT", NULL, "Output Mixer"}, ++}; ++ ++static int jz_codec_hw_params(struct snd_pcm_substream *substream, struct ++snd_pcm_hw_params *params, struct snd_soc_dai *dai) ++{ ++ uint32_t val; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_device *socdev = rtd->socdev; ++ struct snd_soc_codec *codec = socdev->card->codec; ++ ++ switch (params_format(params)) { ++ case SNDRV_PCM_FORMAT_S8: ++ case SNDRV_PCM_FORMAT_S16_LE: ++ case SNDRV_PCM_FORMAT_S18_3LE: ++ break; ++ default: ++ return -EINVAL; ++ break; ++ } ++ ++ switch (params_rate(params)) { ++ case 8000: ++ val = 0; ++ break; ++ case 11025: ++ val = 1; ++ break; ++ case 12000: ++ val = 2; ++ break; ++ case 16000: ++ val = 3; ++ break; ++ case 22050: ++ val = 4; ++ break; ++ case 24000: ++ val = 5; ++ break; ++ case 32000: ++ val = 6; ++ break; ++ case 44100: ++ val = 7; ++ break; ++ case 48000: ++ val = 8; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ val <<= JZ_CODEC_2_SAMPLE_RATE_OFFSET; ++ ++ snd_soc_update_bits(codec, JZ_REG_CODEC_2, ++ JZ_CODEC_2_SAMPLE_RATE_MASK, val); ++ ++ return 0; ++} ++ ++static int jz_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBM_CFM: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_NB_NF: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int jz_codec_set_sysclk(struct snd_soc_dai *codec_dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ return 0; ++} ++ ++ ++static struct snd_soc_dai_ops jz_codec_dai_ops = { ++ .hw_params = jz_codec_hw_params, ++ .set_fmt = jz_codec_set_fmt, ++/* .set_clkdiv = jz_codec_set_clkdiv,*/ ++ .set_sysclk = jz_codec_set_sysclk, ++}; ++ ++struct snd_soc_dai jz_codec_dai = { ++ .name = "jz-codec", ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_8000_44100, ++ .formats = SNDRV_PCM_FORMAT_S18_3LE, ++ }, ++ .capture = { ++ .stream_name = "Capture", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_8000_44100, ++ .formats = SNDRV_PCM_FORMAT_S16_LE, ++ }, ++ .ops = &jz_codec_dai_ops, ++ .symmetric_rates = 1, ++}; ++EXPORT_SYMBOL_GPL(jz_codec_dai); ++ ++static int jz_codec_set_bias_level(struct snd_soc_codec *codec, ++ enum snd_soc_bias_level level) ++{ ++ ++ if (codec->bias_level == SND_SOC_BIAS_OFF && level != SND_SOC_BIAS_OFF) { ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_RESET, JZ_CODEC_1_RESET); ++ udelay(2); ++ ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_SUSPEND | JZ_CODEC_1_RESET, 0); ++ } ++ switch (level) { ++ case SND_SOC_BIAS_ON: ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_VREF_DISABLE | JZ_CODEC_1_VREF_AMP_DISABLE | ++ JZ_CODEC_1_HEADPHONE_POWER_DOWN_M | ++ JZ_CODEC_1_VREF_LOW_CURRENT | JZ_CODEC_1_VREF_HIGH_CURRENT, ++ 0); ++ break; ++ case SND_SOC_BIAS_PREPARE: ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_VREF_LOW_CURRENT | JZ_CODEC_1_VREF_HIGH_CURRENT, ++ JZ_CODEC_1_VREF_LOW_CURRENT | JZ_CODEC_1_VREF_HIGH_CURRENT); ++ break; ++ case SND_SOC_BIAS_STANDBY: ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_VREF_DISABLE | JZ_CODEC_1_VREF_AMP_DISABLE, ++ JZ_CODEC_1_VREF_DISABLE | JZ_CODEC_1_VREF_AMP_DISABLE); ++ break; ++ case SND_SOC_BIAS_OFF: ++ snd_soc_update_bits(codec, JZ_REG_CODEC_1, ++ JZ_CODEC_1_SUSPEND, JZ_CODEC_1_SUSPEND); ++ break; ++ } ++ codec->bias_level = level; ++ ++ return 0; ++} ++ ++ ++static struct snd_soc_codec *jz_codec_codec; ++ ++static int jz_codec_dev_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct snd_soc_device *socdev = platform_get_drvdata(pdev); ++ struct snd_soc_codec *codec = jz_codec_codec; ++ ++ BUG_ON(!codec); ++ ++ socdev->card->codec = codec; ++ ++ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to create pcms: %d\n", ret); ++ goto err; ++ } ++ snd_soc_add_controls(codec, jz_codec_controls, ++ ARRAY_SIZE(jz_codec_controls)); ++ ++ snd_soc_dapm_new_controls(codec, jz_codec_dapm_widgets, ++ ARRAY_SIZE(jz_codec_dapm_widgets)); ++ ++ snd_soc_dapm_add_routes(codec, jz_codec_dapm_routes, ++ ARRAY_SIZE(jz_codec_dapm_routes)); ++ ++ snd_soc_dapm_new_widgets(codec); ++ ++ ret = snd_soc_init_card(socdev); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register card\n"); ++ goto err; ++ } ++ ++ return 0; ++ ++err: ++ snd_soc_free_pcms(socdev); ++ snd_soc_dapm_free(socdev); ++ ++ return ret; ++} ++ ++static int jz_codec_dev_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_device *socdev = platform_get_drvdata(pdev); ++ snd_soc_free_pcms(socdev); ++ snd_soc_dapm_free(socdev); ++ ++ return 0; ++} ++ ++struct snd_soc_codec_device soc_codec_dev_jzcodec = { ++ .probe = jz_codec_dev_probe, ++ .remove = jz_codec_dev_remove, ++}; ++EXPORT_SYMBOL_GPL(soc_codec_dev_jzcodec); ++ ++static int __devinit jz_codec_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct jz_codec *jz_codec; ++ struct snd_soc_codec *codec; ++ ++ jz_codec = kzalloc(sizeof(*jz_codec), GFP_KERNEL); ++ ++ if (!jz_codec) ++ return -ENOMEM; ++ ++ jz_codec->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ++ if (!jz_codec->mem) { ++ dev_err(&pdev->dev, "Failed to get mmio memory resource\n"); ++ ret = -ENOENT; ++ goto err_free_jz_codec; ++ } ++ ++ jz_codec->mem = request_mem_region(jz_codec->mem->start, ++ resource_size(jz_codec->mem), pdev->name); ++ ++ if (!jz_codec->mem) { ++ dev_err(&pdev->dev, "Failed to request mmio memory region\n"); ++ ret = -EBUSY; ++ goto err_free_jz_codec; ++ } ++ ++ jz_codec->base = ioremap(jz_codec->mem->start, resource_size(jz_codec->mem)); ++ ++ if (!jz_codec->base) { ++ dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); ++ ret = -EBUSY; ++ goto err_release_mem_region; ++ } ++ ++ jz_codec_dai.dev = &pdev->dev; ++ ++ codec = &jz_codec->codec; ++ ++ codec->dev = &pdev->dev; ++ codec->name = "jz-codec"; ++ codec->owner = THIS_MODULE; ++ ++ codec->read = jz_codec_read; ++ codec->write = jz_codec_write; ++ codec->set_bias_level = jz_codec_set_bias_level; ++ codec->bias_level = SND_SOC_BIAS_OFF; ++ ++ codec->dai = &jz_codec_dai; ++ codec->num_dai = 1; ++ ++ codec->reg_cache = jz_codec->reg_cache; ++ codec->reg_cache_size = 2; ++ ++ codec->private_data = jz_codec; ++ ++ mutex_init(&codec->mutex); ++ INIT_LIST_HEAD(&codec->dapm_widgets); ++ INIT_LIST_HEAD(&codec->dapm_paths); ++ ++ jz_codec_codec = codec; ++ ++ platform_set_drvdata(pdev, jz_codec); ++ ret = snd_soc_register_codec(codec); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register codec\n"); ++ goto err_iounmap; ++ } ++ ++ ret = snd_soc_register_dai(&jz_codec_dai); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register codec dai\n"); ++ goto err_unregister_codec; ++ } ++ ++ jz_codec_set_bias_level (codec, SND_SOC_BIAS_STANDBY); ++ ++ return 0; ++err_unregister_codec: ++ snd_soc_unregister_codec(codec); ++err_iounmap: ++ iounmap(jz_codec->base); ++err_release_mem_region: ++ release_mem_region(jz_codec->mem->start, resource_size(jz_codec->mem)); ++err_free_jz_codec: ++ kfree(jz_codec); ++ ++ return ret; ++} ++ ++static int __devexit jz_codec_remove(struct platform_device *pdev) ++{ ++ struct jz_codec *jz_codec = platform_get_drvdata(pdev); ++ ++ snd_soc_unregister_dai(&jz_codec_dai); ++ snd_soc_unregister_codec(&jz_codec->codec); ++ ++ iounmap(jz_codec->base); ++ release_mem_region(jz_codec->mem->start, resource_size(jz_codec->mem)); ++ ++ platform_set_drvdata(pdev, NULL); ++ kfree(jz_codec); ++ ++ return 0; ++} ++ ++static struct platform_driver jz_codec_driver = { ++ .probe = jz_codec_probe, ++ .remove = __devexit_p(jz_codec_remove), ++ .driver = { ++ .name = "jz4740-codec", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init jz_codec_init(void) ++{ ++ return platform_driver_register(&jz_codec_driver); ++} ++module_init(jz_codec_init); ++ ++static void __exit jz_codec_exit(void) ++{ ++ platform_driver_unregister(&jz_codec_driver); ++} ++module_exit(jz_codec_exit); ++ ++MODULE_DESCRIPTION("JZ4720/JZ4740 SoC internal codec driver"); ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:jz-codec"); +diff -ruN linux-2.6.31-vanilla/sound/soc/codecs/jzcodec.h linux-2.6.31/sound/soc/codecs/jzcodec.h +--- linux-2.6.31-vanilla/sound/soc/codecs/jzcodec.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/codecs/jzcodec.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,22 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#ifndef _ICODEC_H ++#define _ICODEC_H ++ ++#define JZCODEC_SYSCLK 0 ++ ++extern struct snd_soc_dai jz_codec_dai; ++extern struct snd_soc_codec_device soc_codec_dev_jzcodec; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/Kconfig linux-2.6.31/sound/soc/jz4740/Kconfig +--- linux-2.6.31-vanilla/sound/soc/jz4740/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/Kconfig 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,21 @@ ++config SND_JZ4740_SOC ++ tristate "SoC Audio for Ingenic JZ4740 SoC" ++ depends on SOC_JZ4740 && SND_SOC ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the Jz4740 AC97, I2S or SSP interface. You will also need ++ to select the audio interfaces to support below. ++ ++config SND_JZ4740_SOC_QI_LB60 ++ tristate "SoC Audio support for Qi Hardware Ben Nanonote" ++ depends on SND_JZ4740_SOC && JZ4740_QI_LB60 ++ select SND_JZ4740_SOC_I2S ++ select SND_SOC_JZCODEC ++ help ++ Say Y if you want to add support for SoC audio of internal codec on Ingenic Jz4740 QI_LB60 board. ++ ++config SND_JZ4740_SOC_I2S ++ depends on SND_JZ4740_SOC ++ tristate "SoC Audio (I2S protocol) for Ingenic jz4740 chip" ++ help ++ Say Y if you want to use I2S protocol and I2S codec on Ingenic Jz4740 QI_LB60 board. +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/Makefile linux-2.6.31/sound/soc/jz4740/Makefile +--- linux-2.6.31-vanilla/sound/soc/jz4740/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/Makefile 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,13 @@ ++# ++# Jz4740 Platform Support ++# ++snd-soc-jz4740-objs := jz4740-pcm.o ++snd-soc-jz4740-i2s-objs := jz4740-i2s.o ++ ++obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o ++obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o ++ ++# Jz4740 Machine Support ++snd-soc-qi-lb60-objs := qi_lb60.o ++ ++obj-$(CONFIG_SND_JZ4740_SOC_QI_LB60) += snd-soc-qi-lb60.o +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-i2s.c linux-2.6.31/sound/soc/jz4740/jz4740-i2s.c +--- linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-i2s.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/jz4740-i2s.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,309 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * Jiejing Zhang(kzjeef(at)gmail.com) 2009: Make jz soc sound card ++ * loaded by soc-core. ++ */ ++ ++#include <linux/init.h> ++#include <linux/module.h> ++#include <linux/device.h> ++#include <linux/delay.h> ++#include <sound/core.h> ++#include <sound/pcm.h> ++#include <sound/pcm_params.h> ++#include <sound/initval.h> ++#include <sound/soc.h> ++ ++#include "jz4740-pcm.h" ++#include "jz4740-i2s.h" ++ ++static struct jz4740_dma_client jz4740_dma_client_out = { ++ .name = "I2S PCM Stereo out" ++}; ++ ++static struct jz4740_dma_client jz4740_dma_client_in = { ++ .name = "I2S PCM Stereo in" ++}; ++ ++static struct jz4740_pcm_dma_params jz4740_i2s_pcm_stereo_out = { ++ .client = &jz4740_dma_client_out, ++ .channel = DMA_ID_AIC_TX, ++ .dma_addr = AIC_DR, ++ .dma_size = 2, ++}; ++ ++static struct jz4740_pcm_dma_params jz4740_i2s_pcm_stereo_in = { ++ .client = &jz4740_dma_client_in, ++ .channel = DMA_ID_AIC_RX, ++ .dma_addr = AIC_DR, ++ .dma_size = 2, ++}; ++ ++static int jz4740_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) ++{ ++ /*struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;*/ ++ ++ return 0; ++} ++ ++static int jz4740_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, ++ unsigned int fmt) ++{ ++ /* interface format */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ /* 1 : ac97 , 0 : i2s */ ++ break; ++ case SND_SOC_DAIFMT_LEFT_J: ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBS_CFS: ++ /* 0 : slave */ ++ break; ++ case SND_SOC_DAIFMT_CBM_CFS: ++ /* 1 : master */ ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++/* ++* Set Jz4740 Clock source ++*/ ++static int jz4740_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ return 0; ++} ++ ++static void jz4740_snd_tx_ctrl(int on) ++{ ++ if (on) { ++ /* enable replay */ ++ __i2s_enable_transmit_dma(); ++ __i2s_enable_replay(); ++ __i2s_enable(); ++ ++ } else { ++ /* disable replay & capture */ ++ __i2s_disable_replay(); ++ __i2s_disable_record(); ++ __i2s_disable_receive_dma(); ++ __i2s_disable_transmit_dma(); ++ __i2s_disable(); ++ } ++} ++ ++static void jz4740_snd_rx_ctrl(int on) ++{ ++ if (on) { ++ /* enable capture */ ++ __i2s_enable_receive_dma(); ++ __i2s_enable_record(); ++ __i2s_enable(); ++ ++ } else { ++ /* disable replay & capture */ ++ __i2s_disable_replay(); ++ __i2s_disable_record(); ++ __i2s_disable_receive_dma(); ++ __i2s_disable_transmit_dma(); ++ __i2s_disable(); ++ } ++} ++ ++static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; ++ /* int channels = params_channels(params); */ ++ ++ jz4740_snd_rx_ctrl(0); ++ jz4740_snd_rx_ctrl(0); ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ cpu_dai->dma_data = &jz4740_i2s_pcm_stereo_out; ++ /*if (channels == 1) ++ __aic_enable_mono2stereo(); ++ else ++ __aic_disable_mono2stereo();*/ ++ } else ++ cpu_dai->dma_data = &jz4740_i2s_pcm_stereo_in; ++ ++ switch (params_format(params)) { ++ case SNDRV_PCM_FORMAT_S8: ++ __i2s_set_transmit_trigger(4); ++ __i2s_set_receive_trigger(3); ++ __i2s_set_oss_sample_size(8); ++ __i2s_set_iss_sample_size(8); ++ break; ++ case SNDRV_PCM_FORMAT_S16_LE: ++ /* playback sample:16 bits, burst:16 bytes */ ++ __i2s_set_transmit_trigger(4); ++ /* capture sample:16 bits, burst:16 bytes */ ++ __i2s_set_receive_trigger(3); ++ __i2s_set_oss_sample_size(16); ++ __i2s_set_iss_sample_size(16); ++ break; ++ } ++ ++ return 0; ++} ++ ++static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) ++{ ++ int ret = 0; ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) ++ jz4740_snd_rx_ctrl(1); ++ else ++ jz4740_snd_tx_ctrl(1); ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) ++ jz4740_snd_rx_ctrl(0); ++ else ++ jz4740_snd_tx_ctrl(0); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) ++{ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ } else { ++ } ++ ++ return; ++} ++ ++static int jz4740_i2s_probe(struct platform_device *pdev, struct snd_soc_dai *dai) ++{ ++ __i2s_internal_codec(); ++ __i2s_as_slave(); ++ __i2s_select_i2s(); ++ __aic_select_i2s(); ++ mdelay(2); ++ ++ __i2s_disable(); ++ __i2s_reset(); ++ mdelay(2); ++ ++ __i2s_disable(); ++ __i2s_internal_codec(); ++ __i2s_as_slave(); ++ __i2s_select_i2s(); ++ __aic_select_i2s(); ++ __i2s_set_oss_sample_size(16); ++ __i2s_set_iss_sample_size(16); ++ __aic_play_lastsample(); ++ ++ __i2s_disable_record(); ++ __i2s_disable_replay(); ++ __i2s_disable_loopback(); ++ __i2s_set_transmit_trigger(7); ++ __i2s_set_receive_trigger(7); ++ ++ jz4740_snd_tx_ctrl(0); ++ jz4740_snd_rx_ctrl(0); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int jz4740_i2s_suspend(struct snd_soc_dai *dai) ++{ ++ if (!dai->active) ++ return 0; ++ ++ return 0; ++} ++ ++static int jz4740_i2s_resume(struct snd_soc_dai *dai) ++{ ++ if (!dai->active) ++ return 0; ++ ++ return 0; ++} ++ ++#else ++#define jz4740_i2s_suspend NULL ++#define jz4740_i2s_resume NULL ++#endif ++ ++#define JZ4740_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ ++ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ ++ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ ++ SNDRV_PCM_RATE_48000) ++ ++struct snd_soc_dai_ops snd_jz4740_i2s_dai_ops = { ++ .startup = jz4740_i2s_startup, ++ .shutdown = jz4740_i2s_shutdown, ++ .trigger = jz4740_i2s_trigger, ++ .hw_params = jz4740_i2s_hw_params, ++ .set_fmt = jz4740_i2s_set_dai_fmt, ++ .set_sysclk = jz4740_i2s_set_dai_sysclk, ++}; ++ ++struct snd_soc_dai jz4740_i2s_dai = { ++ .name = "jz4740-i2s", ++ .id = 0, ++ .probe = jz4740_i2s_probe, ++ .suspend = jz4740_i2s_suspend, ++ .resume = jz4740_i2s_resume, ++ .playback = { ++ .channels_min = 1, ++ .channels_max = 2, ++ .rates = JZ4740_I2S_RATES, ++ .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .capture = { ++ .channels_min = 1, ++ .channels_max = 2, ++ .rates = JZ4740_I2S_RATES, ++ .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .ops = &snd_jz4740_i2s_dai_ops, ++}; ++ ++EXPORT_SYMBOL_GPL(jz4740_i2s_dai); ++ ++static int __init jz4740_i2s_init(void) ++{ ++ return snd_soc_register_dai(&jz4740_i2s_dai); ++} ++ ++static void __exit jz4740_i2s_exit(void) ++{ ++ snd_soc_unregister_dai(&jz4740_i2s_dai); ++} ++ ++module_init(jz4740_i2s_init); ++module_exit(jz4740_i2s_exit); ++ ++/* Module information */ ++MODULE_AUTHOR("Richard, cjfeng@ingenic.cn, www.ingenic.cn"); ++MODULE_DESCRIPTION("jz4740 I2S SoC Interface"); ++MODULE_LICENSE("GPL"); +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-i2s.h linux-2.6.31/sound/soc/jz4740/jz4740-i2s.h +--- linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-i2s.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/jz4740-i2s.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,18 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _JZ4740_I2S_H ++#define _JZ4740_I2S_H ++ ++/* jz4740 DAI ID's */ ++#define JZ4740_DAI_I2S 0 ++ ++/* I2S clock */ ++#define JZ4740_I2S_SYSCLK 0 ++ ++extern struct snd_soc_dai jz4740_i2s_dai; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-pcm.c linux-2.6.31/sound/soc/jz4740/jz4740-pcm.c +--- linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-pcm.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/jz4740-pcm.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,686 @@ ++/* ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/module.h> ++#include <linux/interrupt.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/slab.h> ++#include <linux/dma-mapping.h> ++ ++#include <sound/core.h> ++#include <sound/pcm.h> ++#include <sound/pcm_params.h> ++#include <sound/soc.h> ++ ++#include <asm/io.h> ++#include "jz4740-pcm.h" ++ ++static long sum_bytes = 0; ++static int first_transfer = 0; ++static int printk_flag = 0; ++static int tran_bit = 0; ++#ifdef CONFIG_SND_OSSEMUL ++static int hw_params_cnt = 0; ++#endif ++ ++static struct jz4740_dma_client jz4740_dma_client_out = { ++ .name = "I2S PCM Stereo out" ++}; ++ ++static struct jz4740_dma_client jz4740_dma_client_in = { ++ .name = "I2S PCM Stereo in" ++}; ++ ++static struct jz4740_pcm_dma_params jz4740_i2s_pcm_stereo_out = { ++ .client = &jz4740_dma_client_out, ++ .channel = DMA_ID_AIC_TX, ++ .dma_addr = AIC_DR, ++ .dma_size = 2, ++}; ++ ++static struct jz4740_pcm_dma_params jz4740_i2s_pcm_stereo_in = { ++ .client = &jz4740_dma_client_in, ++ .channel = DMA_ID_AIC_RX, ++ .dma_addr = AIC_DR, ++ .dma_size = 2, ++}; ++ ++ ++struct jz4740_dma_buf_aic { ++ struct jz4740_dma_buf_aic *next; ++ int size; /* buffer size in bytes */ ++ dma_addr_t data; /* start of DMA data */ ++ dma_addr_t ptr; /* where the DMA got to [1] */ ++ void *id; /* client's id */ ++}; ++ ++struct jz4740_runtime_data { ++ spinlock_t lock; ++ int state; ++ int aic_dma_flag; /* start dma transfer or not */ ++ unsigned int dma_loaded; ++ unsigned int dma_limit; ++ unsigned int dma_period; ++ dma_addr_t dma_start; ++ dma_addr_t dma_pos; ++ dma_addr_t dma_end; ++ struct jz4740_pcm_dma_params *params; ++ ++ dma_addr_t user_cur_addr; /* user current write buffer start address */ ++ unsigned int user_cur_len; /* user current write buffer length */ ++ ++ /* buffer list and information */ ++ struct jz4740_dma_buf_aic *curr; /* current dma buffer */ ++ struct jz4740_dma_buf_aic *next; /* next buffer to load */ ++ struct jz4740_dma_buf_aic *end; /* end of queue */ ++ ++}; ++ ++/* identify hardware playback capabilities */ ++static const struct snd_pcm_hardware jz4740_pcm_hardware = { ++ .info = SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_BLOCK_TRANSFER, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S8, ++ .rates = SNDRV_PCM_RATE_8000_48000/*0x3fe*/, ++ .rate_min = 8000, ++ .rate_min = 48000, ++ .channels_min = 2, ++ .channels_max = 2, ++ .buffer_bytes_max = 128 * 1024,//16 * 1024 ++ .period_bytes_min = PAGE_SIZE, ++ .period_bytes_max = PAGE_SIZE * 2, ++ .periods_min = 2, ++ .periods_max = 128,//16, ++ .fifo_size = 32, ++}; ++ ++/* jz4740__dma_buf_enqueue ++ * ++ * queue an given buffer for dma transfer. ++ * ++ * data the physical address of the buffer data ++ * size the size of the buffer in bytes ++ * ++*/ ++static int jz4740_dma_buf_enqueue(struct jz4740_runtime_data *prtd, dma_addr_t data, int size) ++{ ++ struct jz4740_dma_buf_aic *aic_buf; ++ ++ aic_buf = kzalloc(sizeof(struct jz4740_dma_buf_aic), GFP_KERNEL); ++ if (aic_buf == NULL) { ++ printk("aic buffer allocate failed,no memory!\n"); ++ return -ENOMEM; ++ } ++ aic_buf->next = NULL; ++ aic_buf->data = aic_buf->ptr = data; ++ aic_buf->size = size; ++ if( prtd->curr == NULL) { ++ prtd->curr = aic_buf; ++ prtd->end = aic_buf; ++ prtd->next = NULL; ++ } else { ++ if (prtd->end == NULL) ++ printk("prtd->end is NULL\n"); ++ prtd->end->next = aic_buf; ++ prtd->end = aic_buf; ++ } ++ ++ /* if necessary, update the next buffer field */ ++ if (prtd->next == NULL) ++ prtd->next = aic_buf; ++ ++ return 0; ++} ++ ++ ++void audio_start_dma(struct jz4740_runtime_data *prtd, int mode) ++{ ++ unsigned long flags; ++ struct jz4740_dma_buf_aic *aic_buf; ++ int channel; ++ ++ switch (mode) { ++ case DMA_MODE_WRITE: ++ /* free cur aic_buf */ ++ if (first_transfer == 1) { ++ first_transfer = 0; ++ } else { ++ aic_buf = prtd->curr; ++ if (aic_buf != NULL) { ++ prtd->curr = aic_buf->next; ++ prtd->next = aic_buf->next; ++ aic_buf->next = NULL; ++ kfree(aic_buf); ++ aic_buf = NULL; ++ } ++ } ++ ++ aic_buf = prtd->next; ++ channel = prtd->params->channel; ++ if (aic_buf) { ++ disable_dma(channel); ++ jz_set_alsa_dma(channel, mode, tran_bit); ++ set_dma_addr(channel, aic_buf->data); ++ set_dma_count(channel, aic_buf->size); ++ enable_dma(channel); ++ prtd->aic_dma_flag |= AIC_START_DMA; ++ } else { ++ printk("next buffer is NULL for playback\n"); ++ prtd->aic_dma_flag &= ~AIC_START_DMA; ++ return; ++ } ++ break; ++ case DMA_MODE_READ: ++ /* free cur aic_buf */ ++ if (first_transfer == 1) { ++ first_transfer = 0; ++ } else { ++ aic_buf = prtd->curr; ++ if (aic_buf != NULL) { ++ prtd->curr = aic_buf->next; ++ prtd->next = aic_buf->next; ++ aic_buf->next = NULL; ++ kfree(aic_buf); ++ aic_buf = NULL; ++ } ++ } ++ ++ aic_buf = prtd->next; ++ channel = prtd->params->channel; ++ ++ if (aic_buf) { ++ disable_dma(channel); ++ jz_set_alsa_dma(channel, mode, tran_bit); ++ set_dma_addr(channel, aic_buf->data); ++ set_dma_count(channel, aic_buf->size); ++ enable_dma(channel); ++ prtd->aic_dma_flag |= AIC_START_DMA; ++ } else { ++ printk("next buffer is NULL for capture\n"); ++ prtd->aic_dma_flag &= ~AIC_START_DMA; ++ return; ++ } ++ break; ++ } ++ /* dump_jz_dma_channel(channel); */ ++} ++ ++/* ++ * place a dma buffer onto the queue for the dma system to handle. ++*/ ++static void jz4740_pcm_enqueue(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ /*struct snd_dma_buffer *buf = &substream->dma_buffer;*/ ++ dma_addr_t pos = prtd->dma_pos; ++ int ret; ++ ++ while (prtd->dma_loaded < prtd->dma_limit) { ++ unsigned long len = prtd->dma_period; ++ ++ if ((pos + len) > prtd->dma_end) { ++ len = prtd->dma_end - pos; ++ } ++ ret = jz4740_dma_buf_enqueue(prtd, pos, len); ++ if (ret == 0) { ++ prtd->dma_loaded++; ++ pos += prtd->dma_period; ++ if (pos >= prtd->dma_end) ++ pos = prtd->dma_start; ++ } else ++ break; ++ } ++ ++ prtd->dma_pos = pos; ++} ++ ++/* ++ * call the function:jz4740_pcm_dma_irq() after DMA has transfered the current buffer ++ */ ++static irqreturn_t jz4740_pcm_dma_irq(int dma_ch, void *dev_id) ++{ ++ struct snd_pcm_substream *substream = dev_id; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ /*struct jz4740_dma_buf_aic *aic_buf = prtd->curr;*/ ++ int channel = prtd->params->channel; ++ unsigned long flags; ++ ++ disable_dma(channel); ++ prtd->aic_dma_flag &= ~AIC_START_DMA; ++ /* must clear TT bit in DCCSR to avoid interrupt again */ ++ if (__dmac_channel_transmit_end_detected(channel)) { ++ __dmac_channel_clear_transmit_end(channel); ++ } ++ if (__dmac_channel_transmit_halt_detected(channel)) { ++ __dmac_channel_clear_transmit_halt(channel); ++ } ++ ++ if (__dmac_channel_address_error_detected(channel)) { ++ __dmac_channel_clear_address_error(channel); ++ } ++ ++ if (substream) ++ snd_pcm_period_elapsed(substream); ++ ++ spin_lock(&prtd->lock); ++ prtd->dma_loaded--; ++ if (prtd->state & ST_RUNNING) { ++ jz4740_pcm_enqueue(substream); ++ } ++ spin_unlock(&prtd->lock); ++ ++ local_irq_save(flags); ++ if (prtd->state & ST_RUNNING) { ++ if (prtd->dma_loaded) { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ audio_start_dma(prtd, DMA_MODE_WRITE); ++ else ++ audio_start_dma(prtd, DMA_MODE_READ); ++ } ++ } ++ local_irq_restore(flags); ++ return IRQ_HANDLED; ++} ++ ++/* some parameter about DMA operation */ ++static int jz4740_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct jz4740_pcm_dma_params *dma = &jz4740_i2s_pcm_stereo_out; ++ size_t totbytes = params_buffer_bytes(params); ++ int ret; ++ ++ if (!dma) ++ return 0; ++ ++ switch (params_format(params)) { ++ case SNDRV_PCM_FORMAT_S8: ++ tran_bit = 8; ++ break; ++ case SNDRV_PCM_FORMAT_S16_LE: ++ tran_bit = 16; ++ break; ++ } ++ ++ /* prepare DMA */ ++ prtd->params = dma; ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ ret = jz_request_dma(DMA_ID_AIC_TX, prtd->params->client->name, ++ jz4740_pcm_dma_irq, IRQF_DISABLED, substream); ++ if (ret < 0) ++ return ret; ++ prtd->params->channel = ret; ++ } else { ++ ret = jz_request_dma(DMA_ID_AIC_RX, prtd->params->client->name, ++ jz4740_pcm_dma_irq, IRQF_DISABLED, substream); ++ if (ret < 0) ++ return ret; ++ prtd->params->channel = ret; ++ } ++ ++ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); ++ runtime->dma_bytes = totbytes; ++ ++ spin_lock_irq(&prtd->lock); ++ prtd->dma_loaded = 0; ++ prtd->aic_dma_flag = 0; ++ prtd->dma_limit = runtime->hw.periods_min; ++ prtd->dma_period = params_period_bytes(params); ++ prtd->dma_start = runtime->dma_addr; ++ prtd->dma_pos = prtd->dma_start; ++ prtd->dma_end = prtd->dma_start + totbytes; ++ prtd->curr = NULL; ++ prtd->next = NULL; ++ prtd->end = NULL; ++ sum_bytes = 0; ++ first_transfer = 1; ++ printk_flag = 0; ++ ++ __dmac_disable_descriptor(prtd->params->channel); ++ __dmac_channel_disable_irq(prtd->params->channel); ++ spin_unlock_irq(&prtd->lock); ++ return ret; ++} ++ ++static int jz4740_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ struct jz4740_runtime_data *prtd = substream->runtime->private_data; ++ ++ snd_pcm_set_runtime_buffer(substream, NULL); ++ if (prtd->params) { ++ jz_free_dma(prtd->params->channel); ++ prtd->params = NULL; ++ } ++ ++ return 0; ++} ++ ++/* set some dma para for playback/capture */ ++static int jz4740_dma_ctrl(int channel) ++{ ++ ++ disable_dma(channel); ++ ++ /* must clear TT bit in DCCSR to avoid interrupt again */ ++ if (__dmac_channel_transmit_end_detected(channel)) { ++ __dmac_channel_clear_transmit_end(channel); ++ } ++ if (__dmac_channel_transmit_halt_detected(channel)) { ++ __dmac_channel_clear_transmit_halt(channel); ++ } ++ ++ if (__dmac_channel_address_error_detected(channel)) { ++ __dmac_channel_clear_address_error(channel); ++ } ++ ++ return 0; ++ ++} ++ ++static int jz4740_pcm_prepare(struct snd_pcm_substream *substream) ++{ ++ struct jz4740_runtime_data *prtd = substream->runtime->private_data; ++ int ret = 0; ++ ++ /* return if this is a bufferless transfer e.g */ ++ if (!prtd->params) ++ return 0; ++ ++ /* flush the DMA channel and DMA channel bit check */ ++ jz4740_dma_ctrl(prtd->params->channel); ++ prtd->dma_loaded = 0; ++ prtd->dma_pos = prtd->dma_start; ++ ++ /* enqueue dma buffers */ ++ jz4740_pcm_enqueue(substream); ++ ++ return ret; ++ ++} ++ ++static int jz4740_pcm_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ ++ int ret = 0; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ prtd->state |= ST_RUNNING; ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ audio_start_dma(prtd, DMA_MODE_WRITE); ++ } else { ++ audio_start_dma(prtd, DMA_MODE_READ); ++ } ++ ++ break; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ prtd->state &= ~ST_RUNNING; ++ break; ++ ++ case SNDRV_PCM_TRIGGER_RESUME: ++ printk(" RESUME \n"); ++ break; ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ printk(" RESTART \n"); ++ break; ++ ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static snd_pcm_uframes_t ++jz4740_pcm_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ struct jz4740_dma_buf_aic *aic_buf = prtd->curr; ++ long count,res; ++ ++ dma_addr_t ptr; ++ snd_pcm_uframes_t x; ++ int channel = prtd->params->channel; ++ ++ spin_lock(&prtd->lock); ++#if 1 ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ count = get_dma_residue(channel); ++ count = aic_buf->size - count; ++ ptr = aic_buf->data + count; ++ res = ptr - prtd->dma_start; ++ } else { ++ count = get_dma_residue(channel); ++ count = aic_buf->size - count; ++ ptr = aic_buf->data + count; ++ res = ptr - prtd->dma_start; ++ } ++ ++# else ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ if ((prtd->aic_dma_flag & AIC_START_DMA) == 0) { ++ count = get_dma_residue(channel); ++ count = aic_buf->size - count; ++ ptr = aic_buf->data + count; ++ REG_DMAC_DSAR(channel) = ptr; ++ res = ptr - prtd->dma_start; ++ } else { ++ ptr = REG_DMAC_DSAR(channel); ++ if (ptr == 0x0) ++ printk("\ndma address is 00000000 in running!\n"); ++ res = ptr - prtd->dma_start; ++ } ++ } else { ++ if ((prtd->aic_dma_flag & AIC_START_DMA) == 0) { ++ count = get_dma_residue(channel); ++ count = aic_buf->size - count; ++ ptr = aic_buf->data + count; ++ REG_DMAC_DTAR(channel) = ptr; ++ res = ptr - prtd->dma_start; ++ } else { ++ ptr = REG_DMAC_DTAR(channel); ++ if (ptr == 0x0) ++ printk("\ndma address is 00000000 in running!\n"); ++ res = ptr - prtd->dma_start; ++ } ++ } ++#endif ++ spin_unlock(&prtd->lock); ++ x = bytes_to_frames(runtime, res); ++ if (x == runtime->buffer_size) ++ x = 0; ++ ++ return x; ++} ++ ++static int jz4740_pcm_open(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd; ++ ++#ifdef CONFIG_SND_OSSEMUL ++ hw_params_cnt = 0; ++#endif ++ snd_soc_set_runtime_hwparams(substream, &jz4740_pcm_hardware); ++ prtd = kzalloc(sizeof(struct jz4740_runtime_data), GFP_KERNEL); ++ if (prtd == NULL) ++ return -ENOMEM; ++ ++ spin_lock_init(&prtd->lock); ++ ++ runtime->private_data = prtd; ++ REG_AIC_I2SCR = 0x10; ++ return 0; ++} ++ ++static int jz4740_pcm_close(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct jz4740_runtime_data *prtd = runtime->private_data; ++ struct jz4740_dma_buf_aic *aic_buf = NULL; ++ ++#ifdef CONFIG_SND_OSSEMUL ++ hw_params_cnt = 0; ++#endif ++ ++ if (prtd) ++ aic_buf = prtd->curr; ++ ++ while (aic_buf != NULL) { ++ prtd->curr = aic_buf->next; ++ prtd->next = aic_buf->next; ++ aic_buf->next = NULL; ++ kfree(aic_buf); ++ aic_buf = NULL; ++ aic_buf = prtd->curr; ++ } ++ ++ if (prtd) { ++ prtd->curr = NULL; ++ prtd->next = NULL; ++ prtd->end = NULL; ++ kfree(prtd); ++ } ++ ++ return 0; ++} ++ ++static int jz4740_pcm_mmap(struct snd_pcm_substream *substream, ++ struct vm_area_struct *vma) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ ++ return remap_pfn_range(vma, vma->vm_start, ++ substream->dma_buffer.addr >> PAGE_SHIFT, ++ vma->vm_end - vma->vm_start, vma->vm_page_prot); ++} ++ ++struct snd_pcm_ops jz4740_pcm_ops = { ++ .open = jz4740_pcm_open, ++ .close = jz4740_pcm_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = jz4740_pcm_hw_params, ++ .hw_free = jz4740_pcm_hw_free, ++ .prepare = jz4740_pcm_prepare, ++ .trigger = jz4740_pcm_trigger, ++ .pointer = jz4740_pcm_pointer, ++ .mmap = jz4740_pcm_mmap, ++}; ++ ++static int jz4740_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) ++{ ++ struct snd_pcm_substream *substream = pcm->streams[stream].substream; ++ struct snd_dma_buffer *buf = &substream->dma_buffer; ++ size_t size = jz4740_pcm_hardware.buffer_bytes_max; ++ buf->dev.type = SNDRV_DMA_TYPE_DEV; ++ buf->dev.dev = pcm->card->dev; ++ buf->private_data = NULL; ++ ++ /*buf->area = dma_alloc_coherent(pcm->card->dev, size, ++ &buf->addr, GFP_KERNEL);*/ ++ buf->area = dma_alloc_noncoherent(pcm->card->dev, size, ++ &buf->addr, GFP_KERNEL); ++ if (!buf->area) ++ return -ENOMEM; ++ buf->bytes = size; ++ return 0; ++} ++ ++static void jz4740_pcm_free_dma_buffers(struct snd_pcm *pcm) ++{ ++ struct snd_pcm_substream *substream; ++ struct snd_dma_buffer *buf; ++ int stream; ++ ++ for (stream = 0; stream < 2; stream++) { ++ substream = pcm->streams[stream].substream; ++ if (!substream) ++ continue; ++ ++ buf = &substream->dma_buffer; ++ if (!buf->area) ++ continue; ++ ++ dma_free_noncoherent(pcm->card->dev, buf->bytes, ++ buf->area, buf->addr); ++ buf->area = NULL; ++ } ++} ++ ++static u64 jz4740_pcm_dmamask = DMA_BIT_MASK(32); ++ ++int jz4740_pcm_new(struct snd_card *card, struct snd_soc_dai *dai, ++ struct snd_pcm *pcm) ++{ ++ int ret = 0; ++ ++ printk("pcm new\n"); ++ ++ if (!card->dev->dma_mask) ++ card->dev->dma_mask = &jz4740_pcm_dmamask; ++ if (!card->dev->coherent_dma_mask) ++ card->dev->coherent_dma_mask = DMA_BIT_MASK(32); ++ ++ if (dai->playback.channels_min) { ++ ret = jz4740_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_PLAYBACK); ++ if (ret) ++ goto out; ++ } ++ ++ if (dai->capture.channels_min) { ++ ret = jz4740_pcm_preallocate_dma_buffer(pcm, ++ SNDRV_PCM_STREAM_CAPTURE); ++ if (ret) ++ goto out; ++ } ++ out: ++ ++ return ret; ++} ++ ++struct snd_soc_platform jz4740_soc_platform = { ++ .name = "jz4740-audio", ++ .pcm_ops = &jz4740_pcm_ops, ++ .pcm_new = jz4740_pcm_new, ++ .pcm_free = jz4740_pcm_free_dma_buffers, ++}; ++ ++EXPORT_SYMBOL_GPL(jz4740_soc_platform); ++ ++static int __init jz4740_soc_platform_init(void) ++{ ++ return snd_soc_register_platform(&jz4740_soc_platform); ++} ++module_init(jz4740_soc_platform_init); ++ ++static void __exit jz4740_soc_platform_exit(void) ++{ ++ snd_soc_unregister_platform(&jz4740_soc_platform); ++} ++module_exit(jz4740_soc_platform_exit); ++ ++MODULE_AUTHOR("Richard"); ++MODULE_DESCRIPTION("Ingenic Jz4740 PCM DMA module"); ++MODULE_LICENSE("GPL"); +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-pcm.h linux-2.6.31/sound/soc/jz4740/jz4740-pcm.h +--- linux-2.6.31-vanilla/sound/soc/jz4740/jz4740-pcm.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/jz4740-pcm.h 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,33 @@ ++/* ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _JZ4740_PCM_H ++#define _JZ4740_PCM_H ++ ++#include <asm/jzsoc.h> ++ ++#define ST_RUNNING (1<<0) ++#define ST_OPENED (1<<1) ++ ++#define AIC_START_DMA (1<<0) ++#define AIC_END_DMA (1<<1) ++ ++struct jz4740_dma_client { ++ char *name; ++}; ++ ++struct jz4740_pcm_dma_params { ++ struct jz4740_dma_client *client; /* stream identifier */ ++ int channel; /* Channel ID */ ++ dma_addr_t dma_addr; ++ int dma_size; /* Size of the DMA transfer */ ++}; ++ ++/* platform data */ ++extern struct snd_soc_platform jz4740_soc_platform; ++ ++#endif +diff -ruN linux-2.6.31-vanilla/sound/soc/jz4740/qi_lb60.c linux-2.6.31/sound/soc/jz4740/qi_lb60.c +--- linux-2.6.31-vanilla/sound/soc/jz4740/qi_lb60.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.31/sound/soc/jz4740/qi_lb60.c 2009-11-19 19:00:26.000000000 +0100 +@@ -0,0 +1,182 @@ ++/* ++ * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/moduleparam.h> ++#include <linux/timer.h> ++#include <linux/interrupt.h> ++#include <linux/platform_device.h> ++#include <sound/core.h> ++#include <sound/pcm.h> ++#include <sound/soc.h> ++#include <sound/soc-dapm.h> ++#include <linux/gpio.h> ++ ++#include "../codecs/jzcodec.h" ++#include "jz4740-pcm.h" ++#include "jz4740-i2s.h" ++ ++ ++#define QI_LB60_SND_GPIO JZ_GPIO_PORTB(29) ++#define QI_LB60_AMP_GPIO JZ_GPIO_PORTD(4) ++ ++static int qi_lb60_spk_event(struct snd_soc_dapm_widget *widget, ++ struct snd_kcontrol *ctrl, int event) ++{ ++ int on = 0; ++ if (event & SND_SOC_DAPM_POST_PMU) ++ on = 1; ++ else if (event & SND_SOC_DAPM_PRE_PMD) ++ on = 0; ++ ++ gpio_set_value(QI_LB60_SND_GPIO, on); ++ gpio_set_value(QI_LB60_AMP_GPIO, on); ++ ++ return 0; ++} ++ ++static const struct snd_soc_dapm_widget qi_lb60_widgets[] = { ++ SND_SOC_DAPM_SPK("Speaker", qi_lb60_spk_event), ++ SND_SOC_DAPM_MIC("Mic", NULL), ++}; ++ ++static const struct snd_soc_dapm_route qi_lb60_routes[] = { ++ {"Mic", NULL, "MIC"}, ++ {"Speaker", NULL, "LOUT"}, ++ {"Speaker", NULL, "ROUT"}, ++}; ++ ++#define QI_LB60_DAIFMT (SND_SOC_DAIFMT_I2S | \ ++ SND_SOC_DAIFMT_NB_NF | \ ++ SND_SOC_DAIFMT_CBM_CFM) ++ ++static int qi_lb60_codec_init(struct snd_soc_codec *codec) ++{ ++ int ret; ++ struct snd_soc_dai *cpu_dai = codec->socdev->card->dai_link->cpu_dai; ++ struct snd_soc_dai *codec_dai = codec->socdev->card->dai_link->codec_dai; ++ ++ snd_soc_dapm_nc_pin(codec, "LIN"); ++ snd_soc_dapm_nc_pin(codec, "RIN"); ++ ++ ret = snd_soc_dai_set_fmt(codec_dai, QI_LB60_DAIFMT); ++ if (ret < 0) { ++ dev_err(codec->dev, "Failed to set codec dai format: %d\n", ret); ++ return ret; ++ } ++ ++ ret = snd_soc_dai_set_fmt(cpu_dai, QI_LB60_DAIFMT); ++ if (ret < 0) { ++ dev_err(codec->dev, "Failed to set cpu dai format: %d\n", ret); ++ return ret; ++ } ++ ++ ret = snd_soc_dai_set_sysclk(codec_dai, JZCODEC_SYSCLK, 111, ++ SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ dev_err(codec->dev, "Failed to set codec dai sysclk: %d\n", ret); ++ return ret; ++ } ++ ++ snd_soc_dapm_new_controls(codec, qi_lb60_widgets, ARRAY_SIZE(qi_lb60_widgets)); ++ ++ snd_soc_dapm_add_routes(codec, qi_lb60_routes, ARRAY_SIZE(qi_lb60_routes)); ++ ++ snd_soc_dapm_sync(codec); ++ ++ return 0; ++} ++ ++static struct snd_soc_dai_link qi_lb60_dai = { ++ .name = "jz-codec", ++ .stream_name = "JZCODEC", ++ .cpu_dai = &jz4740_i2s_dai, ++ .codec_dai = &jz_codec_dai, ++ .init = qi_lb60_codec_init, ++}; ++ ++static struct snd_soc_card qi_lb60 = { ++ .name = "QI LB60", ++ .dai_link = &qi_lb60_dai, ++ .num_links = 1, ++ .platform = &jz4740_soc_platform, ++}; ++ ++static struct snd_soc_device qi_lb60_snd_devdata = { ++ .card = &qi_lb60, ++ .codec_dev = &soc_codec_dev_jzcodec, ++}; ++ ++static struct platform_device *qi_lb60_snd_device; ++ ++static int __init qi_lb60_init(void) ++{ ++ int ret; ++ ++ qi_lb60_snd_device = platform_device_alloc("soc-audio", -1); ++ ++ if (!qi_lb60_snd_device) ++ return -ENOMEM; ++ ++ ++ ret = gpio_request(QI_LB60_SND_GPIO, "SND"); ++ if (ret) { ++ pr_err("qi_lb60 snd: Failed to request SND GPIO(%d): %d\n", ++ QI_LB60_SND_GPIO, ret); ++ goto err_device_put; ++ } ++ ++ ret = gpio_request(QI_LB60_AMP_GPIO, "AMP"); ++ if (ret) { ++ pr_err("qi_lb60 snd: Failed to request AMP GPIO(%d): %d\n", ++ QI_LB60_AMP_GPIO, ret); ++ goto err_gpio_free_snd; ++ } ++ ++ gpio_direction_output(JZ_GPIO_PORTB(29), 0); ++ gpio_direction_output(JZ_GPIO_PORTD(4), 0); ++ ++ platform_set_drvdata(qi_lb60_snd_device, &qi_lb60_snd_devdata); ++ qi_lb60_snd_devdata.dev = &qi_lb60_snd_device->dev; ++ ret = platform_device_add(qi_lb60_snd_device); ++ if (ret) { ++ pr_err("qi_lb60 snd: Failed to add snd soc device: %d\n", ret); ++ goto err_unset_pdata; ++ } ++ ++ return 0; ++ ++err_unset_pdata: ++ platform_set_drvdata(qi_lb60_snd_device, NULL); ++/*err_gpio_free_amp:*/ ++ gpio_free(QI_LB60_AMP_GPIO); ++err_gpio_free_snd: ++ gpio_free(QI_LB60_SND_GPIO); ++err_device_put: ++ platform_device_put(qi_lb60_snd_device); ++ ++ return ret; ++} ++module_init(qi_lb60_init); ++ ++static void __exit qi_lb60_exit(void) ++{ ++ gpio_free(QI_LB60_AMP_GPIO); ++ gpio_free(QI_LB60_SND_GPIO); ++ platform_device_unregister(qi_lb60_snd_device); ++} ++module_exit(qi_lb60_exit); ++ ++MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); ++MODULE_DESCRIPTION("ALSA SoC QI LB60 Audio support"); ++MODULE_LICENSE("GPL v2"); diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/fix_mips_vmlinux.lds.patch b/recipes/linux/linux-2.6.31/ben-nanonote/fix_mips_vmlinux.lds.patch new file mode 100644 index 0000000000..b2fd44e0a9 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/fix_mips_vmlinux.lds.patch @@ -0,0 +1,24 @@ +--- linux-2.6.31-vanilla/arch/mips/kernel/vmlinux.lds.S 2009-11-19 20:54:28.000000000 +0100 ++++ linux-2.6.31/arch/mips/kernel/vmlinux.lds.S 2009-11-19 20:54:58.000000000 +0100 +@@ -10,15 +10,15 @@ + note PT_NOTE FLAGS(4); /* R__ */ + } + +-ifdef CONFIG_32BIT +- ifdef CONFIG_CPU_LITTLE_ENDIAN ++#ifdef CONFIG_32BIT ++ #ifdef CONFIG_CPU_LITTLE_ENDIAN + jiffies = jiffies_64; +- else ++ #else + jiffies = jiffies_64 + 4; +- endif +-else ++ #endif ++#else + jiffies = jiffies_64; +-endif ++#endif + + SECTIONS + { diff --git a/recipes/linux/linux-2.6.31/ion/defconfig b/recipes/linux/linux-2.6.31/ion/defconfig new file mode 100644 index 0000000000..5bdaffbe69 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ion/defconfig @@ -0,0 +1,3295 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.31.5 +# Fri Nov 20 18:08:17 2009 +# +# CONFIG_64BIT is not set +CONFIG_X86_32=y +# CONFIG_X86_64 is not set +CONFIG_X86=y +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_FAST_CMPXCHG_LOCAL=y +CONFIG_MMU=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_GPIO=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +# CONFIG_RWSEM_GENERIC_SPINLOCK is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME_VSYSCALL is not set +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_DEFAULT_IDLE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y +# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ZONE_DMA32 is not set +CONFIG_ARCH_POPULATES_NODE_MAP=y +# CONFIG_AUDIT_ARCH is not set +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_X86_32_SMP=y +CONFIG_X86_HT=y +CONFIG_X86_TRAMPOLINE=y +CONFIG_X86_32_LAZY_GS=y +CONFIG_KTIME_SCALAR=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +# CONFIG_TASK_DELAY_ACCT is not set +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_FREEZER=y +# CONFIG_CGROUP_DEVICE is not set +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_MEM_RES_CTLR=y +# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set +CONFIG_MM_OWNER=y +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_RELAY=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +# CONFIG_USER_NS is not set +CONFIG_PID_NS=y +# CONFIG_NET_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_HAVE_PERF_COUNTERS=y + +# +# Performance Counters +# +CONFIG_PERF_COUNTERS=y +CONFIG_EVENT_PROFILE=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_TRACEPOINTS=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=y +CONFIG_OPROFILE_IBS=y +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_API_DEBUG=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_DEV_INTEGRITY=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_FREEZER=y + +# +# Processor type and features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_SMP=y +# CONFIG_SPARSE_IRQ is not set +CONFIG_X86_MPPARSE=y +# CONFIG_X86_BIGSMP is not set +CONFIG_X86_EXTENDED_PLATFORM=y +# CONFIG_X86_ELAN is not set +# CONFIG_X86_RDC321X is not set +# CONFIG_X86_32_NON_STANDARD is not set +CONFIG_SCHED_OMIT_FRAME_POINTER=y +CONFIG_PARAVIRT_GUEST=y +CONFIG_VMI=y +CONFIG_KVM_CLOCK=y +CONFIG_KVM_GUEST=y +# CONFIG_LGUEST_GUEST is not set +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_SPINLOCKS is not set +CONFIG_PARAVIRT_CLOCK=y +# CONFIG_PARAVIRT_DEBUG is not set +# CONFIG_MEMTEST is not set +# CONFIG_M386 is not set +# CONFIG_M486 is not set +CONFIG_M586=y +# CONFIG_M586TSC is not set +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPENTIUM4 is not set +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MWINCHIPC6 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +# CONFIG_MPSC is not set +# CONFIG_MCORE2 is not set +# CONFIG_GENERIC_CPU is not set +CONFIG_X86_GENERIC=y +CONFIG_X86_CPU=y +CONFIG_X86_L1_CACHE_BYTES=64 +CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_CMPXCHG=y +CONFIG_X86_L1_CACHE_SHIFT=5 +CONFIG_X86_XADD=y +CONFIG_X86_PPRO_FENCE=y +CONFIG_X86_F00F_BUG=y +CONFIG_X86_WP_WORKS_OK=y +CONFIG_X86_INVLPG=y +CONFIG_X86_BSWAP=y +CONFIG_X86_POPAD_OK=y +CONFIG_X86_ALIGNMENT_16=y +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_MINIMUM_CPU_FAMILY=4 +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_DMI=y +# CONFIG_IOMMU_HELPER is not set +# CONFIG_IOMMU_API is not set +CONFIG_NR_CPUS=8 +CONFIG_SCHED_SMT=y +CONFIG_SCHED_MC=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +# CONFIG_X86_MCE is not set +# CONFIG_X86_ANCIENT_MCE is not set +CONFIG_VM86=y +# CONFIG_TOSHIBA is not set +# CONFIG_I8K is not set +CONFIG_X86_REBOOTFIXUPS=y +CONFIG_MICROCODE=y +CONFIG_MICROCODE_INTEL=y +# CONFIG_MICROCODE_AMD is not set +CONFIG_MICROCODE_OLD_INTERFACE=y +CONFIG_X86_MSR=y +CONFIG_X86_CPUID=y +CONFIG_X86_CPU_DEBUG=y +# CONFIG_NOHIGHMEM is not set +CONFIG_HIGHMEM4G=y +# CONFIG_HIGHMEM64G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_HIGHMEM=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_HIGHPTE=y +CONFIG_X86_CHECK_BIOS_CORRUPTION=y +CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y +CONFIG_X86_RESERVE_LOW_64K=y +# CONFIG_MATH_EMULATION is not set +CONFIG_MTRR=y +CONFIG_MTRR_SANITIZER=y +CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 +CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 +# CONFIG_X86_PAT is not set +CONFIG_EFI=y +CONFIG_SECCOMP=y +# CONFIG_CC_STACKPROTECTOR is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +CONFIG_CRASH_DUMP=y +CONFIG_KEXEC_JUMP=y +CONFIG_PHYSICAL_START=0x100000 +CONFIG_RELOCATABLE=y +CONFIG_X86_NEED_RELOCS=y +CONFIG_PHYSICAL_ALIGN=0x100000 +CONFIG_HOTPLUG_CPU=y +# CONFIG_COMPAT_VDSO is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y + +# +# Power management and ACPI options +# +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_VERBOSE is not set +CONFIG_CAN_PM_TRACE=y +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_PM_TEST_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATION_NVS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_ACPI=y +CONFIG_ACPI_SLEEP=y +CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_SYSFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_FAN=y +CONFIG_ACPI_DOCK=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_CUSTOM_DSDT_FILE="" +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ACPI_BLACKLIST_YEAR=2000 +# CONFIG_ACPI_DEBUG is not set +CONFIG_ACPI_PCI_SLOT=y +CONFIG_X86_PM_TIMER=y +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_SBS=y +CONFIG_X86_APM_BOOT=y +CONFIG_APM=m +# CONFIG_APM_IGNORE_USER_SUSPEND is not set +# CONFIG_APM_DO_ENABLE is not set +# CONFIG_APM_CPU_IDLE is not set +# CONFIG_APM_DISPLAY_BLANK is not set +# CONFIG_APM_ALLOW_INTS is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y + +# +# CPUFreq processor drivers +# +CONFIG_X86_ACPI_CPUFREQ=y +CONFIG_X86_POWERNOW_K6=y +CONFIG_X86_POWERNOW_K7=y +CONFIG_X86_POWERNOW_K7_ACPI=y +CONFIG_X86_POWERNOW_K8=y +CONFIG_X86_GX_SUSPMOD=y +CONFIG_X86_SPEEDSTEP_CENTRINO=y +CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE=y +CONFIG_X86_SPEEDSTEP_ICH=y +CONFIG_X86_SPEEDSTEP_SMI=y +CONFIG_X86_P4_CLOCKMOD=m +CONFIG_X86_CPUFREQ_NFORCE2=y +CONFIG_X86_LONGRUN=y +CONFIG_X86_LONGHAUL=y +CONFIG_X86_E_POWERSAVER=m + +# +# shared options +# +CONFIG_X86_SPEEDSTEP_LIB=y +CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# Bus options (PCI etc.) +# +CONFIG_PCI=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GOMMCONFIG is not set +# CONFIG_PCI_GODIRECT is not set +# CONFIG_PCI_GOOLPC is not set +CONFIG_PCI_GOANY=y +CONFIG_PCI_BIOS=y +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_DOMAINS=y +# CONFIG_DMAR is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIEASPM is not set +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +# CONFIG_PCI_LEGACY is not set +CONFIG_PCI_DEBUG=y +# CONFIG_PCI_STUB is not set +CONFIG_HT_IRQ=y +# CONFIG_PCI_IOV is not set +CONFIG_ISA_DMA_API=y +CONFIG_ISA=y +CONFIG_EISA=y +CONFIG_EISA_VLB_PRIMING=y +CONFIG_EISA_PCI_EISA=y +CONFIG_EISA_VIRTUAL_ROOT=y +CONFIG_EISA_NAMES=y +# CONFIG_MCA is not set +# CONFIG_SCx200 is not set +# CONFIG_OLPC is not set +CONFIG_K8_NB=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats / Emulations +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_HAVE_ATOMIC_IOMAP=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_LRO=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETLABEL is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CT_PROTO_DCCP is not set +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +# CONFIG_NF_CONNTRACK_SANE is not set +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_TPROXY=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HL=m +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_HL=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_AH_ESP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=y +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_RDS is not set +CONFIG_TIPC=y +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +# CONFIG_ATM is not set +CONFIG_STP=y +CONFIG_BRIDGE=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +CONFIG_NET_CLS_ROUTE=y +# CONFIG_DCB is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +CONFIG_NET_TCPPROBE=m +# CONFIG_NET_DROP_MONITOR is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=y +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +# CONFIG_RXKAD is not set +CONFIG_FIB_RULES=y +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +# CONFIG_STANDALONE is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_FW_LOADER=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_PNP=y +# CONFIG_PNP_DEBUG_MESSAGES is not set + +# +# Protocols +# +CONFIG_ISAPNP=y +# CONFIG_PNPBIOS is not set +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +CONFIG_BLK_DEV_FD=m +# CONFIG_BLK_DEV_XD is not set +CONFIG_BLK_CPQ_DA=m +CONFIG_BLK_CPQ_CISS_DA=m +CONFIG_CISS_SCSI_TAPE=y +CONFIG_BLK_DEV_DAC960=m +CONFIG_BLK_DEV_UMEM=m +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_SX8=m +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=65536 +# CONFIG_BLK_DEV_XIP is not set +CONFIG_CDROM_PKTCDVD=y +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=m +CONFIG_VIRTIO_BLK=m +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_TIFM_CORE=m +# CONFIG_DELL_LAPTOP is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_TGT=m +CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_FC_TGT_ATTRS=y +CONFIG_SCSI_ISCSI_ATTRS=m +CONFIG_SCSI_SAS_ATTRS=m +CONFIG_SCSI_SAS_LIBSAS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_SRP_TGT_ATTRS=y +CONFIG_SCSI_LOWLEVEL=y +CONFIG_ISCSI_TCP=m +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +CONFIG_BLK_DEV_3W_XXXX_RAID=m +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_7000FASST=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_AHA152X=m +CONFIG_SCSI_AHA1542=m +CONFIG_SCSI_AHA1740=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 +CONFIG_AIC7XXX_RESET_DELAY_MS=15000 +# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set +CONFIG_AIC7XXX_DEBUG_ENABLE=y +CONFIG_AIC7XXX_DEBUG_MASK=0 +CONFIG_AIC7XXX_REG_PRETTY_PRINT=y +# CONFIG_SCSI_AIC7XXX_OLD is not set +CONFIG_SCSI_AIC79XX=m +CONFIG_AIC79XX_CMDS_PER_DEVICE=32 +CONFIG_AIC79XX_RESET_DELAY_MS=5000 +# CONFIG_AIC79XX_BUILD_FIRMWARE is not set +CONFIG_AIC79XX_DEBUG_ENABLE=y +CONFIG_AIC79XX_DEBUG_MASK=0 +CONFIG_AIC79XX_REG_PRETTY_PRINT=y +CONFIG_SCSI_AIC94XX=m +# CONFIG_AIC94XX_DEBUG is not set +CONFIG_SCSI_MVSAS=m +CONFIG_SCSI_MVSAS_DEBUG=y +CONFIG_SCSI_DPT_I2O=m +CONFIG_SCSI_ADVANSYS=m +CONFIG_SCSI_IN2000=m +CONFIG_SCSI_ARCMSR=m +CONFIG_SCSI_ARCMSR_AER=y +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_MAILBOX=m +CONFIG_MEGARAID_LEGACY=m +CONFIG_MEGARAID_SAS=m +# CONFIG_SCSI_MPT2SAS is not set +CONFIG_SCSI_HPTIOP=m +CONFIG_SCSI_BUSLOGIC=m +# CONFIG_SCSI_FLASHPOINT is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_FCOE_FNIC is not set +CONFIG_SCSI_DMX3191D=m +CONFIG_SCSI_DTC3280=m +CONFIG_SCSI_EATA=m +CONFIG_SCSI_EATA_TAGGED_QUEUE=y +CONFIG_SCSI_EATA_LINKED_COMMANDS=y +CONFIG_SCSI_EATA_MAX_TAGS=16 +CONFIG_SCSI_FUTURE_DOMAIN=m +CONFIG_SCSI_GDTH=m +CONFIG_SCSI_GENERIC_NCR5380=m +CONFIG_SCSI_GENERIC_NCR5380_MMIO=m +CONFIG_SCSI_GENERIC_NCR53C400=y +CONFIG_SCSI_IPS=m +CONFIG_SCSI_INITIO=m +CONFIG_SCSI_INIA100=m +CONFIG_SCSI_NCR53C406A=m +CONFIG_SCSI_STEX=m +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 +CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 +CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 +CONFIG_SCSI_SYM53C8XX_MMIO=y +CONFIG_SCSI_IPR=m +# CONFIG_SCSI_IPR_TRACE is not set +# CONFIG_SCSI_IPR_DUMP is not set +CONFIG_SCSI_PAS16=m +CONFIG_SCSI_QLOGIC_FAS=m +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_QLA_FC=m +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_SCSI_LPFC=m +# CONFIG_SCSI_LPFC_DEBUG_FS is not set +CONFIG_SCSI_SIM710=m +CONFIG_SCSI_SYM53C416=m +CONFIG_SCSI_DC395x=m +CONFIG_SCSI_DC390T=m +CONFIG_SCSI_T128=m +CONFIG_SCSI_U14_34F=m +CONFIG_SCSI_U14_34F_TAGGED_QUEUE=y +CONFIG_SCSI_U14_34F_LINKED_COMMANDS=y +CONFIG_SCSI_U14_34F_MAX_TAGS=8 +CONFIG_SCSI_ULTRASTOR=m +CONFIG_SCSI_NSP32=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_SRP=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_ACPI=y +CONFIG_SATA_PMP=y +CONFIG_SATA_AHCI=y +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +CONFIG_SATA_NV=y +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ACPI is not set +# CONFIG_PATA_ALI is not set +CONFIG_PATA_AMD=y +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5535 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_ISAPNP is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_QDI is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_WINBOND_VLB is not set +# CONFIG_PATA_SCH is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID6_PQ=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=y +CONFIG_DM_MIRROR=y +# CONFIG_DM_LOG_USERSPACE is not set +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=y +# CONFIG_DM_MULTIPATH_QL is not set +# CONFIG_DM_MULTIPATH_ST is not set +# CONFIG_DM_DELAY is not set +CONFIG_DM_UEVENT=y +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# You can enable one or both FireWire driver stacks. +# + +# +# See the help texts for more information. +# +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_OHCI_DEBUG=y +CONFIG_FIREWIRE_SBP2=m +# CONFIG_FIREWIRE_NET is not set +CONFIG_IEEE1394=m +CONFIG_IEEE1394_OHCI1394=m +CONFIG_IEEE1394_PCILYNX=m +CONFIG_IEEE1394_SBP2=m +# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set +CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y +CONFIG_IEEE1394_ETH1394=m +CONFIG_IEEE1394_RAWIO=m +CONFIG_IEEE1394_VIDEO1394=m +CONFIG_IEEE1394_DV1394=m +# CONFIG_IEEE1394_VERBOSEDEBUG is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_NET_SB1000 is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_LANCE is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_RACAL is not set +# CONFIG_DNET is not set +# CONFIG_NET_TULIP is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +# CONFIG_NET_ISA is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_AC3200 is not set +# CONFIG_APRICOT is not set +# CONFIG_B44 is not set +CONFIG_FORCEDETH=y +# CONFIG_FORCEDETH_NAPI is not set +# CONFIG_CS89x0 is not set +# CONFIG_E100 is not set +# CONFIG_LNE390 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_NE3210 is not set +# CONFIG_ES3210 is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_KS8842 is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +# CONFIG_ATL2 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_JME is not set +CONFIG_NETDEV_10000=y +# CONFIG_CHELSIO_T1 is not set +CONFIG_CHELSIO_T3_DEPENDS=y +# CONFIG_CHELSIO_T3 is not set +# CONFIG_ENIC is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set +# CONFIG_MLX4_EN is not set +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_QLGE is not set +# CONFIG_SFC is not set +# CONFIG_BE2NET is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +CONFIG_NETCONSOLE=y +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_VIRTIO_NET is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT_POLLDEV=m + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_GPIO=m +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +CONFIG_MOUSE_PS2_ELANTECH=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_INPORT=m +# CONFIG_MOUSE_ATIXL is not set +CONFIG_MOUSE_LOGIBM=m +CONFIG_MOUSE_PC110PAD=m +CONFIG_MOUSE_VSXXXAA=m +CONFIG_MOUSE_GPIO=m +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_WACOM=m +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +CONFIG_TOUCHSCREEN_DA9034=y +# CONFIG_TOUCHSCREEN_EETI is not set +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_ELO=m +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_HTCPEN=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_UCB1400=m +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_USB_EGALAX=y +CONFIG_TOUCHSCREEN_USB_PANJIT=y +CONFIG_TOUCHSCREEN_USB_3M=y +CONFIG_TOUCHSCREEN_USB_ITM=y +CONFIG_TOUCHSCREEN_USB_ETURBO=y +CONFIG_TOUCHSCREEN_USB_GUNZE=y +CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y +CONFIG_TOUCHSCREEN_USB_IRTOUCH=y +CONFIG_TOUCHSCREEN_USB_IDEALTEK=y +CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y +CONFIG_TOUCHSCREEN_USB_GOTOP=y +CONFIG_TOUCHSCREEN_TOUCHIT213=m +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PCSPKR=m +# CONFIG_INPUT_APANEL is not set +CONFIG_INPUT_WISTRON_BTNS=m +CONFIG_INPUT_ATLAS_BTNS=m +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_YEALINK=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_CT82C710=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_CONSOLE_POLL=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=0 +CONFIG_HVC_DRIVER=y +CONFIG_VIRTIO_CONSOLE=m +CONFIG_IPMI_HANDLER=m +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPMI_POWEROFF=m +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_INTEL=y +# CONFIG_HW_RANDOM_AMD is not set +# CONFIG_HW_RANDOM_GEODE is not set +# CONFIG_HW_RANDOM_VIA is not set +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_NVRAM=y +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_SONYPI is not set +# CONFIG_MWAVE is not set +# CONFIG_PC8736x_GPIO is not set +# CONFIG_NSC_GPIO is not set +# CONFIG_CS5535_GPIO is not set +CONFIG_RAW_DRIVER=y +CONFIG_MAX_RAW_DEVS=256 +CONFIG_HPET=y +CONFIG_HPET_MMAP=y +CONFIG_HANGCHECK_TIMER=m +CONFIG_TCG_TPM=m +CONFIG_TCG_TIS=m +CONFIG_TCG_NSC=m +CONFIG_TCG_ATMEL=m +CONFIG_TCG_INFINEON=m +# CONFIG_TELCLOCK is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_HELPER_AUTO is not set + +# +# I2C Algorithms +# +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD756_S4882=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_I801=m +CONFIG_I2C_ISCH=m +CONFIG_I2C_PIIX4=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_NFORCE2_S4985=m +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_GPIO=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_SIMTEC=m + +# +# External I2C/SMBus adapter drivers +# +CONFIG_I2C_PARPORT_LIGHT=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m + +# +# Graphics adapter I2C/DDC channel drivers +# +CONFIG_I2C_VOODOO3=m + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_PCA_ISA=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_STUB=m +CONFIG_SCx200_ACB=m + +# +# Miscellaneous I2C Chip support +# +CONFIG_DS1682=m +CONFIG_SENSORS_TSL2550=m +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +CONFIG_GPIO_MAX732X=m +CONFIG_GPIO_PCA953X=m +CONFIG_GPIO_PCF857X=m + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set + +# +# SPI GPIO expanders: +# +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +CONFIG_W1_MASTER_MATROX=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_GPIO=m + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +# CONFIG_W1_SLAVE_DS2431 is not set +CONFIG_W1_SLAVE_DS2433=m +# CONFIG_W1_SLAVE_DS2433_CRC is not set +CONFIG_W1_SLAVE_DS2760=m +CONFIG_W1_SLAVE_BQ27000=m +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PDA_POWER=m +# CONFIG_WM8350_POWER is not set +CONFIG_BATTERY_DS2760=m +# CONFIG_BATTERY_DS2782 is not set +CONFIG_BATTERY_BQ27x00=m +# CONFIG_BATTERY_DA9030 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ABITUGURU3 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_K8TEMP is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATK0110 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_FSCHMD is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_CORETEMP is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_HDAPS is not set +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_SENSORS_APPLESMC is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +# CONFIG_WM8350_WATCHDOG is not set +CONFIG_ACQUIRE_WDT=m +CONFIG_ADVANTECH_WDT=m +CONFIG_ALIM1535_WDT=m +CONFIG_ALIM7101_WDT=m +CONFIG_SC520_WDT=m +CONFIG_EUROTECH_WDT=m +CONFIG_IB700_WDT=m +CONFIG_IBMASR=m +CONFIG_WAFER_WDT=m +CONFIG_I6300ESB_WDT=m +CONFIG_ITCO_WDT=m +CONFIG_ITCO_VENDOR_SUPPORT=y +CONFIG_IT8712F_WDT=m +CONFIG_IT87_WDT=m +# CONFIG_HP_WATCHDOG is not set +CONFIG_SC1200_WDT=m +CONFIG_PC87413_WDT=m +CONFIG_60XX_WDT=m +CONFIG_SBC8360_WDT=m +CONFIG_SBC7240_WDT=m +CONFIG_CPU5_WDT=m +# CONFIG_SMSC_SCH311X_WDT is not set +CONFIG_SMSC37B787_WDT=m +CONFIG_W83627HF_WDT=m +CONFIG_W83697HF_WDT=m +CONFIG_W83697UG_WDT=m +CONFIG_W83877F_WDT=m +CONFIG_W83977F_WDT=m +CONFIG_MACHZ_WDT=m +CONFIG_SBC_EPX_C3_WATCHDOG=m + +# +# ISA-based Watchdog Cards +# +CONFIG_PCWATCHDOG=m +CONFIG_MIXCOMWD=m +CONFIG_WDT=m + +# +# PCI-based Watchdog Cards +# +CONFIG_PCIPCWATCHDOG=m +CONFIG_WDTPCI=m + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +# CONFIG_SSB_B43_PCI_BRIDGE is not set +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=m +CONFIG_MFD_SM501=m +# CONFIG_MFD_SM501_GPIO is not set +CONFIG_HTC_PASIC3=m +CONFIG_UCB1400_CORE=m +CONFIG_TPS65010=m +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +CONFIG_PMIC_DA903X=y +CONFIG_MFD_WM8400=m +CONFIG_MFD_WM8350=m +CONFIG_MFD_WM8350_I2C=m +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +CONFIG_REGULATOR_BQ24022=m +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_WM8350=m +CONFIG_REGULATOR_WM8400=m +CONFIG_REGULATOR_DA903X=m +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +CONFIG_AGP=m +CONFIG_AGP_ALI=m +CONFIG_AGP_ATI=m +CONFIG_AGP_AMD=m +CONFIG_AGP_AMD64=m +CONFIG_AGP_INTEL=m +CONFIG_AGP_NVIDIA=m +CONFIG_AGP_SIS=m +CONFIG_AGP_SWORKS=m +CONFIG_AGP_VIA=m +CONFIG_AGP_EFFICEON=m +CONFIG_DRM=m +CONFIG_DRM_TDFX=m +CONFIG_DRM_R128=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_I810=m +CONFIG_DRM_I830=m +CONFIG_DRM_I915=m +# CONFIG_DRM_I915_KMS is not set +CONFIG_DRM_MGA=m +CONFIG_DRM_SIS=m +CONFIG_DRM_VIA=m +CONFIG_DRM_SAVAGE=m +CONFIG_VGASTATE=m +CONFIG_VIDEO_OUTPUT_CONTROL=m +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_DDC=m +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_IMAGEBLIT=m +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_HECUBA=m +CONFIG_FB_SVGALIB=m +# CONFIG_FB_MACMODES is not set +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +CONFIG_FB_CIRRUS=m +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +CONFIG_FB_CYBER2000=m +CONFIG_FB_ARC=m +CONFIG_FB_ASILIANT=y +CONFIG_FB_IMSTT=y +CONFIG_FB_VGA16=m +CONFIG_FB_UVESA=m +# CONFIG_FB_VESA is not set +CONFIG_FB_EFI=y +CONFIG_FB_N411=m +CONFIG_FB_HGA=m +# CONFIG_FB_HGA_ACCEL is not set +CONFIG_FB_S1D13XXX=m +CONFIG_FB_NVIDIA=m +CONFIG_FB_NVIDIA_I2C=y +# CONFIG_FB_NVIDIA_DEBUG is not set +CONFIG_FB_NVIDIA_BACKLIGHT=y +CONFIG_FB_RIVA=m +CONFIG_FB_RIVA_I2C=y +# CONFIG_FB_RIVA_DEBUG is not set +CONFIG_FB_RIVA_BACKLIGHT=y +CONFIG_FB_I810=m +# CONFIG_FB_I810_GTF is not set +CONFIG_FB_LE80578=m +CONFIG_FB_CARILLO_RANCH=m +CONFIG_FB_MATROX=m +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_MATROX_MULTIHEAD=y +CONFIG_FB_RADEON=m +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +CONFIG_FB_ATY128=m +CONFIG_FB_ATY128_BACKLIGHT=y +CONFIG_FB_ATY=m +CONFIG_FB_ATY_CT=y +CONFIG_FB_ATY_GENERIC_LCD=y +CONFIG_FB_ATY_GX=y +CONFIG_FB_ATY_BACKLIGHT=y +CONFIG_FB_S3=m +CONFIG_FB_SAVAGE=m +CONFIG_FB_SAVAGE_I2C=y +CONFIG_FB_SAVAGE_ACCEL=y +CONFIG_FB_SIS=m +CONFIG_FB_SIS_300=y +CONFIG_FB_SIS_315=y +CONFIG_FB_VIA=m +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_KYRO=m +CONFIG_FB_3DFX=m +# CONFIG_FB_3DFX_ACCEL is not set +CONFIG_FB_3DFX_I2C=y +CONFIG_FB_VOODOO1=m +CONFIG_FB_VT8623=m +CONFIG_FB_TRIDENT=m +CONFIG_FB_ARK=m +CONFIG_FB_PM3=m +CONFIG_FB_CARMINE=m +CONFIG_FB_CARMINE_DRAM_EVAL=y +# CONFIG_CARMINE_DRAM_CUSTOM is not set +CONFIG_FB_GEODE=y +CONFIG_FB_GEODE_LX=m +CONFIG_FB_GEODE_GX=m +CONFIG_FB_GEODE_GX1=m +# CONFIG_FB_TMIO is not set +CONFIG_FB_SM501=m +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_METRONOME=m +CONFIG_FB_MB862XX=m +CONFIG_FB_MB862XX_PCI_GDC=y +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_ILI9320 is not set +CONFIG_LCD_PLATFORM=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_PROGEAR=m +CONFIG_BACKLIGHT_CARILLO_RANCH=m +CONFIG_BACKLIGHT_DA903X=m +CONFIG_BACKLIGHT_MBP_NVIDIA=m +CONFIG_BACKLIGHT_SAHARA=m + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=m + +# +# Display hardware drivers +# + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +# CONFIG_VGACON_SOFT_SCROLLBACK is not set +CONFIG_MDA_CONSOLE=m +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=m +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_LOGO is not set +CONFIG_SOUND=m +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_RAWMIDI_SEQ=m +CONFIG_SND_OPL3_LIB_SEQ=m +CONFIG_SND_OPL4_LIB_SEQ=m +CONFIG_SND_SBAWE_SEQ=m +CONFIG_SND_EMU10K1_SEQ=m +CONFIG_SND_MPU401_UART=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_OPL4_LIB=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +CONFIG_SND_PCSP=m +CONFIG_SND_DUMMY=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 +CONFIG_SND_WSS_LIB=m +CONFIG_SND_SB_COMMON=m +CONFIG_SND_SB8_DSP=m +CONFIG_SND_SB16_DSP=m +CONFIG_SND_ISA=y +CONFIG_SND_ADLIB=m +CONFIG_SND_AD1816A=m +CONFIG_SND_AD1848=m +CONFIG_SND_ALS100=m +CONFIG_SND_AZT2320=m +CONFIG_SND_CMI8330=m +CONFIG_SND_CS4231=m +CONFIG_SND_CS4236=m +CONFIG_SND_DT019X=m +CONFIG_SND_ES968=m +CONFIG_SND_ES1688=m +CONFIG_SND_ES18XX=m +CONFIG_SND_SC6000=m +CONFIG_SND_GUSCLASSIC=m +CONFIG_SND_GUSEXTREME=m +CONFIG_SND_GUSMAX=m +CONFIG_SND_INTERWAVE=m +CONFIG_SND_INTERWAVE_STB=m +CONFIG_SND_OPL3SA2=m +CONFIG_SND_OPTI92X_AD1848=m +CONFIG_SND_OPTI92X_CS4231=m +CONFIG_SND_OPTI93X=m +CONFIG_SND_MIRO=m +CONFIG_SND_SB8=m +CONFIG_SND_SB16=m +CONFIG_SND_SBAWE=m +CONFIG_SND_SB16_CSP=y +CONFIG_SND_SGALAXY=m +CONFIG_SND_SSCAPE=m +CONFIG_SND_WAVEFRONT=m +# CONFIG_SND_MSND_PINNACLE is not set +# CONFIG_SND_MSND_CLASSIC is not set +CONFIG_SND_PCI=y +CONFIG_SND_AD1889=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +# CONFIG_SND_BT87X_OVERCLOCK is not set +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_OXYGEN=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CS5530=m +CONFIG_SND_CS5535AUDIO=m +# CONFIG_SND_CTXFI is not set +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +CONFIG_SND_FM801=m +CONFIG_SND_HDA_INTEL=m +# CONFIG_SND_HDA_HWDEP is not set +# CONFIG_SND_HDA_INPUT_BEEP is not set +# CONFIG_SND_HDA_INPUT_JACK is not set +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_NVHDMI=y +CONFIG_SND_HDA_CODEC_INTELHDMI=y +CONFIG_SND_HDA_ELD=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_POWER_SAVE=y +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_HIFIER=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_KORG1212=m +# CONFIG_SND_LX6464ES is not set +CONFIG_SND_MAESTRO3=m +CONFIG_SND_MIXART=m +CONFIG_SND_NM256=m +CONFIG_SND_PCXHR=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SIS7019=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +CONFIG_SND_YMFPCI=m +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_USX2Y=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_US122L=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_I2C_AND_SPI=m +CONFIG_SND_SOC_ALL_CODECS=m +CONFIG_SND_SOC_AD73311=m +CONFIG_SND_SOC_AK4535=m +CONFIG_SND_SOC_CS4270=m +CONFIG_SND_SOC_L3=m +CONFIG_SND_SOC_PCM3008=m +CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_SSM2602=m +CONFIG_SND_SOC_TLV320AIC23=m +CONFIG_SND_SOC_TLV320AIC3X=m +CONFIG_SND_SOC_UDA134X=m +CONFIG_SND_SOC_UDA1380=m +CONFIG_SND_SOC_WM8350=m +CONFIG_SND_SOC_WM8400=m +CONFIG_SND_SOC_WM8510=m +CONFIG_SND_SOC_WM8580=m +CONFIG_SND_SOC_WM8728=m +CONFIG_SND_SOC_WM8731=m +CONFIG_SND_SOC_WM8750=m +CONFIG_SND_SOC_WM8753=m +CONFIG_SND_SOC_WM8900=m +CONFIG_SND_SOC_WM8903=m +CONFIG_SND_SOC_WM8940=m +CONFIG_SND_SOC_WM8960=m +CONFIG_SND_SOC_WM8971=m +CONFIG_SND_SOC_WM8988=m +CONFIG_SND_SOC_WM8990=m +CONFIG_SND_SOC_WM9081=m +CONFIG_SOUND_PRIME=m +CONFIG_SOUND_MSNDCLAS=m +CONFIG_MSNDCLAS_INIT_FILE="/etc/sound/msndinit.bin" +CONFIG_MSNDCLAS_PERM_FILE="/etc/sound/msndperm.bin" +CONFIG_SOUND_MSNDPIN=m +CONFIG_MSNDPIN_INIT_FILE="/etc/sound/pndspini.bin" +CONFIG_MSNDPIN_PERM_FILE="/etc/sound/pndsperm.bin" +CONFIG_SOUND_OSS=m +# CONFIG_SOUND_TRACEINIT is not set +CONFIG_SOUND_DMAP=y +CONFIG_SOUND_SSCAPE=m +CONFIG_SOUND_VMIDI=m +CONFIG_SOUND_TRIX=m +CONFIG_SOUND_MSS=m +CONFIG_SOUND_MPU401=m +CONFIG_SOUND_PAS=m +CONFIG_SOUND_PSS=m +CONFIG_PSS_MIXER=y +# CONFIG_PSS_HAVE_BOOT is not set +CONFIG_SOUND_SB=m +CONFIG_SOUND_YM3812=m +CONFIG_SOUND_UART6850=m +CONFIG_SOUND_AEDSP16=m +CONFIG_SC6600=y +CONFIG_SC6600_JOY=y +CONFIG_SC6600_CDROM=4 +CONFIG_SC6600_CDROMBASE=0 +CONFIG_SOUND_KAHLUA=m +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +CONFIG_HIDRAW=y + +# +# USB Input Devices +# +CONFIG_USB_HID=m +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=m +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +# CONFIG_DRAGONRISE_FF is not set +CONFIG_HID_EZKEY=m +CONFIG_HID_KYE=m +CONFIG_HID_GYRATION=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LOGITECH=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_NTRIG=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_GREENASIA=m +# CONFIG_GREENASIA_FF is not set +CONFIG_HID_SMARTJOYPLUS=m +# CONFIG_SMARTJOYPLUS_FF is not set +CONFIG_HID_TOPSEED=m +CONFIG_HID_THRUSTMASTER=m +# CONFIG_THRUSTMASTER_FF is not set +CONFIG_HID_WACOM=y +CONFIG_HID_ZEROPLUS=m +# CONFIG_ZEROPLUS_FF is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=y +CONFIG_USB_WUSB=m +CONFIG_USB_WUSB_CBAF=m +# CONFIG_USB_WUSB_CBAF_DEBUG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_C67X00_HCD=m +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_OXU210HP_HCD is not set +CONFIG_USB_ISP116X_HCD=m +CONFIG_USB_ISP1760_HCD=m +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_U132_HCD=m +CONFIG_USB_SL811_HCD=m +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_WHCI_HCD=m +CONFIG_USB_HWA_HCD=m +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m +CONFIG_USB_TMC=m + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +# CONFIG_USB_STORAGE_ONETOUCH is not set +CONFIG_USB_STORAGE_KARMA=m +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +# CONFIG_USB_SERIAL_CP210X is not set +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +# CONFIG_USB_SERIAL_IR is not set +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +# CONFIG_USB_SERIAL_IUU is not set +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MOTOROLA=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +# CONFIG_USB_SERIAL_QUALCOMM is not set +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +# CONFIG_USB_SERIAL_SYMBOL is not set +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_OPTICON is not set +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_RIO500=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_LED=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_SISUSBVGA=m +# CONFIG_USB_SISUSBVGA_CON is not set +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +# CONFIG_USB_TEST is not set +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_VST=m +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m +CONFIG_USB_GADGET_DUALSPEED=y +CONFIG_USB_ZERO=m +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_USB_CDC_COMPOSITE=m + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_UWB=m +CONFIG_UWB_HWA=m +CONFIG_UWB_WHCI=m +CONFIG_UWB_WLP=m +CONFIG_UWB_I1480U=m +CONFIG_UWB_I1480U_WLP=m +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=m +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_RICOH_MMC=m +# CONFIG_MMC_SDHCI_PLTFM is not set +CONFIG_MMC_WBSD=m +CONFIG_MMC_TIFM_SD=m +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m + +# +# LED drivers +# +# CONFIG_LEDS_ALIX2 is not set +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_GPIO=m +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_CLEVO_MAIL is not set +CONFIG_LEDS_PCA955X=m +# CONFIG_LEDS_WM8350 is not set +CONFIG_LEDS_DA903X=m +# CONFIG_LEDS_BD2802 is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_ACCESSIBILITY is not set +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_MTHCA=m +CONFIG_INFINIBAND_MTHCA_DEBUG=y +CONFIG_INFINIBAND_AMSO1100=m +CONFIG_INFINIBAND_AMSO1100_DEBUG=y +CONFIG_MLX4_INFINIBAND=m +# CONFIG_INFINIBAND_NES is not set +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_ISER=m +CONFIG_EDAC=y + +# +# Reporting subsystems +# +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_MM_EDAC=m +CONFIG_EDAC_AMD76X=m +CONFIG_EDAC_E7XXX=m +CONFIG_EDAC_E752X=m +CONFIG_EDAC_I82875P=m +CONFIG_EDAC_I82975X=m +CONFIG_EDAC_I3000=m +CONFIG_EDAC_X38=m +# CONFIG_EDAC_I5400 is not set +CONFIG_EDAC_I82860=m +CONFIG_EDAC_R82600=m +CONFIG_EDAC_I5000=m +CONFIG_EDAC_I5100=m +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_TEST=m + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_FM3130=m +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +CONFIG_RTC_DRV_DS1286=m +# CONFIG_RTC_DRV_DS1511 is not set +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_STK17TA8=m +CONFIG_RTC_DRV_M48T86=m +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_V3020=m +CONFIG_RTC_DRV_WM8350=m + +# +# on-CPU RTC drivers +# +CONFIG_DMADEVICES=y + +# +# DMA Devices +# +CONFIG_INTEL_IOATDMA=m +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +CONFIG_NET_DMA=y +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DCA=m +CONFIG_AUXDISPLAY=y +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_SMX=m +# CONFIG_UIO_AEC is not set +CONFIG_UIO_SERCOS3=m + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set +CONFIG_X86_PLATFORM_DEVICES=y +CONFIG_ACER_WMI=m +# CONFIG_ACERHDF is not set +CONFIG_ASUS_LAPTOP=m +# CONFIG_DELL_WMI is not set +CONFIG_FUJITSU_LAPTOP=m +# CONFIG_FUJITSU_LAPTOP_DEBUG is not set +CONFIG_TC1100_WMI=m +CONFIG_HP_WMI=m +CONFIG_MSI_LAPTOP=m +CONFIG_PANASONIC_LAPTOP=m +CONFIG_COMPAL_LAPTOP=m +CONFIG_THINKPAD_ACPI=m +# CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set +# CONFIG_THINKPAD_ACPI_DEBUG is not set +# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set +CONFIG_THINKPAD_ACPI_VIDEO=y +CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y +CONFIG_INTEL_MENLOW=m +CONFIG_ACPI_WMI=y +# CONFIG_ACPI_ASUS is not set +CONFIG_ACPI_TOSHIBA=m + +# +# Firmware Drivers +# +CONFIG_EDD=y +CONFIG_EDD_OFF=y +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_EFI_VARS=y +CONFIG_DELL_RBU=m +CONFIG_DCDBAS=m +CONFIG_DMIID=y +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_IBFT=m + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_PRINT_QUOTA_WARNING=y +CONFIG_QUOTA_TREE=m +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=m +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_LZMA=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_V4_1 is not set +CONFIG_ROOT_NFS=y +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_XPRT_RDMA=m +CONFIG_RPCSEC_GSS_KRB5=y +CONFIG_RPCSEC_GSS_SPKM3=y +# CONFIG_SMB_FS is not set +CONFIG_CIFS=y +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_CIFS_EXPERIMENTAL=y +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +CONFIG_UNUSED_SYMBOLS=y +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_PROVE_LOCKING=y +CONFIG_LOCKDEP=y +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_LOCKDEP is not set +CONFIG_TRACE_IRQFLAGS=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_SG=y +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set +CONFIG_LATENCYTOP=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FTRACE_SYSCALLS=y +CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_TRACING=y +CONFIG_GENERIC_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SYSPROF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_FTRACE_SYSCALLS is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_POWER_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_KMEMTRACE is not set +# CONFIG_WORKQUEUE_TRACER is not set +CONFIG_BLK_DEV_IO_TRACE=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_MMIOTRACE is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_KGDB=y +CONFIG_KGDB_SERIAL_CONSOLE=y +# CONFIG_KGDB_TESTS is not set +CONFIG_HAVE_ARCH_KMEMCHECK=y +# CONFIG_KMEMCHECK is not set +CONFIG_STRICT_DEVMEM=y +# CONFIG_X86_VERBOSE_BOOTUP is not set +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_X86_PTDUMP is not set +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_NX_TEST is not set +# CONFIG_4KSTACKS is not set +CONFIG_DOUBLEFAULT=y +# CONFIG_IOMMU_STRESS is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +# CONFIG_IO_DELAY_0X80 is not set +CONFIG_IO_DELAY_0XED=y +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=1 +# CONFIG_DEBUG_BOOT_PARAMS is not set +# CONFIG_CPA_DEBUG is not set +CONFIG_OPTIMIZE_INLINING=y + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_SECURITY_FILE_CAPABILITIES=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_LSM_MMAP_MIN_ADDR=65536 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_IMA is not set +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_SEQIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XCBC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_AES_586=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=y +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SALSA20_586=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_TWOFISH_586=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=m + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_PADLOCK=y +CONFIG_CRYPTO_DEV_PADLOCK_AES=m +CONFIG_CRYPTO_DEV_PADLOCK_SHA=m +CONFIG_CRYPTO_DEV_GEODE=m +CONFIG_CRYPTO_DEV_HIFN_795X=m +CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=m +CONFIG_KVM_INTEL=m +CONFIG_KVM_AMD=m +# CONFIG_KVM_TRACE is not set +# CONFIG_LGUEST is not set +CONFIG_VIRTIO=m +CONFIG_VIRTIO_RING=m +CONFIG_VIRTIO_PCI=m +CONFIG_VIRTIO_BALLOON=m +CONFIG_BINARY_PRINTF=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +CONFIG_CRC7=m +CONFIG_LIBCRC32C=y +CONFIG_AUDIT_GENERIC=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_LZMA_NEEDED=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CHECK_SIGNATURE=y +CONFIG_NLATTR=y diff --git a/recipes/linux/linux-davinci/da830-omapl137-evm/defconfig b/recipes/linux/linux-davinci/da830-omapl137-evm/defconfig index fc6e2c4bac..daba419b1a 100644 --- a/recipes/linux/linux-davinci/da830-omapl137-evm/defconfig +++ b/recipes/linux/linux-davinci/da830-omapl137-evm/defconfig @@ -1,15 +1,13 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.30-rc2-davinci1 -# Wed May 13 15:33:29 2009 +# Linux kernel version: 2.6.32-rc6 +# Wed Nov 18 00:03:39 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set CONFIG_GENERIC_HARDIRQS=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y @@ -18,14 +16,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ZONE_DMA=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -36,7 +33,7 @@ CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set +CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y @@ -48,11 +45,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y # # RCU Subsystem # -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -62,7 +60,6 @@ CONFIG_FAIR_GROUP_SCHED=y CONFIG_USER_SCHED=y # CONFIG_CGROUP_SCHED is not set # CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED is not set # CONFIG_SYSFS_DEPRECATED_V2 is not set # CONFIG_RELAY is not set # CONFIG_NAMESPACES is not set @@ -78,9 +75,7 @@ CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set -# CONFIG_STRIP_ASM_SYMS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y @@ -93,6 +88,10 @@ CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y CONFIG_COMPAT_BRK=y @@ -100,12 +99,15 @@ CONFIG_COMPAT_BRK=y CONFIG_SLUB=y # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# # CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y @@ -118,7 +120,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_BLOCK=y -# CONFIG_LBD is not set +CONFIG_LBDAF=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -139,19 +141,22 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # # System Type # +CONFIG_MMU=y # CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_GEMINI is not set # CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_NOMADIK is not set # CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set # CONFIG_ARCH_IOP33X is not set @@ -160,25 +165,27 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set # CONFIG_ARCH_LOKI is not set # CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_MSM is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set CONFIG_ARCH_DAVINCI=y # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_BCMRING is not set CONFIG_CP_INTC=y # @@ -189,18 +196,25 @@ CONFIG_CP_INTC=y # DaVinci Core Type # # CONFIG_ARCH_DAVINCI_DM644x is not set -# CONFIG_ARCH_DAVINCI_DM646x is not set # CONFIG_ARCH_DAVINCI_DM355 is not set +# CONFIG_ARCH_DAVINCI_DM646x is not set CONFIG_ARCH_DAVINCI_DA830=y +# CONFIG_ARCH_DAVINCI_DA850 is not set +CONFIG_ARCH_DAVINCI_DA8XX=y +# CONFIG_ARCH_DAVINCI_DM365 is not set +CONFIG_CPPI41=y # # DaVinci Board Type # CONFIG_MACH_DAVINCI_DA830_EVM=y +CONFIG_DA830_UI_LCD=y +# CONFIG_DA830_UI_NAND is not set CONFIG_DAVINCI_MUX=y # CONFIG_DAVINCI_MUX_DEBUG is not set # CONFIG_DAVINCI_MUX_WARNINGS is not set CONFIG_DAVINCI_RESET_CLOCKS=y +# CONFIG_DAVINCI_MCBSP is not set # # Processor Type @@ -209,7 +223,7 @@ CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_PABRT_LEGACY=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_COPY_V4WB=y CONFIG_CPU_TLB_V4WBI=y @@ -224,7 +238,7 @@ CONFIG_ARM_THUMB=y # CONFIG_CPU_DCACHE_DISABLE is not set CONFIG_CPU_DCACHE_WRITETHROUGH=y # CONFIG_CPU_CACHE_ROUND_ROBIN is not set -# CONFIG_OUTER_CACHE is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 CONFIG_COMMON_CLKDEV=y # @@ -245,11 +259,13 @@ CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_HZ=100 CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ARCH_FLATMEM_HAS_HOLES=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_HIGHMEM is not set @@ -265,12 +281,14 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096 CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y CONFIG_HAVE_MLOCK=y CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_LEDS=y # CONFIG_LEDS_CPU is not set CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set # # Boot options @@ -293,6 +311,8 @@ CONFIG_CMDLINE="" # # At least one emulation must be selected # +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set # CONFIG_VFP is not set # @@ -398,6 +418,7 @@ CONFIG_NETFILTER_ADVANCED=y # CONFIG_IP6_NF_IPTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -412,6 +433,7 @@ CONFIG_NETFILTER_ADVANCED=y # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set # CONFIG_NET_SCHED is not set # CONFIG_DCB is not set @@ -437,26 +459,104 @@ CONFIG_NETFILTER_ADVANCED=y # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=1 CONFIG_BLK_DEV_RAM_SIZE=32768 # CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set CONFIG_MISC_DEVICES=y # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -467,7 +567,9 @@ CONFIG_MISC_DEVICES=y # EEPROM support # CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set @@ -476,7 +578,7 @@ CONFIG_HAVE_IDE=y # SCSI device support # # CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m +CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set @@ -485,16 +587,12 @@ CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # -CONFIG_BLK_DEV_SD=m +CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set # CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -519,7 +617,6 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_ATA is not set # CONFIG_MD is not set CONFIG_NETDEVICES=y -CONFIG_COMPAT_NET_DEV_OPS=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set @@ -552,6 +649,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set CONFIG_TI_DAVINCI_EMAC=y # CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set # CONFIG_ETHOC is not set # CONFIG_SMC911X is not set # CONFIG_SMSC911X is not set @@ -564,18 +662,27 @@ CONFIG_TI_DAVINCI_EMAC=y # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# +CONFIG_WLAN=y # CONFIG_WLAN_PRE80211 is not set # CONFIG_WLAN_80211 is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set # CONFIG_WAN is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -585,6 +692,7 @@ CONFIG_NETPOLL=y CONFIG_NETPOLL_TRAP=y CONFIG_NET_POLL_CONTROLLER=y # CONFIG_ISDN is not set +# CONFIG_PHONE is not set # # Input device support @@ -608,31 +716,43 @@ CONFIG_INPUT_EVBUG=m # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set CONFIG_KEYBOARD_ATKBD=m -# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_QT2160 is not set # CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set -CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_SUNKBD is not set +CONFIG_KEYBOARD_XTKBD=m # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set # CONFIG_INPUT_MISC is not set # @@ -667,12 +787,13 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=3 # # Non-8250 serial port support # +# CONFIG_SERIAL_MAX3100 is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_LEGACY_PTY_COUNT=8 # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set @@ -681,6 +802,7 @@ CONFIG_HW_RANDOM=m # CONFIG_TCG_TPM is not set CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_HELPER_AUTO=y @@ -692,6 +814,7 @@ CONFIG_I2C_HELPER_AUTO=y # I2C system bus drivers (mostly embedded / system-on-chip) # CONFIG_I2C_DAVINCI=y +# CONFIG_I2C_DESIGNWARE is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_SIMTEC is not set @@ -701,6 +824,7 @@ CONFIG_I2C_DAVINCI=y # # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers @@ -712,17 +836,34 @@ CONFIG_I2C_DAVINCI=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_MAX6875 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_DAVINCI=y +CONFIG_SPI_DAVINCI_DMA=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set # @@ -733,8 +874,8 @@ CONFIG_GPIOLIB=y # I2C GPIO expanders: # # CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCF857X=y # # PCI GPIO expanders: @@ -743,11 +884,17 @@ CONFIG_GPIO_PCF857X=m # # SPI GPIO expanders: # +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# AC97 GPIO expanders: +# # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set CONFIG_WATCHDOG=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -755,7 +902,12 @@ CONFIG_WATCHDOG=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -# CONFIG_DAVINCI_WATCHDOG is not set +CONFIG_DAVINCI_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set CONFIG_SSB_POSSIBLE=y # @@ -779,31 +931,49 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_TC6393XB is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_PCF50633 is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set +# CONFIG_MFD_MC13783 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set # # Graphics support # # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_DAVINCI is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_DA8XX=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # @@ -816,11 +986,21 @@ CONFIG_SSB_POSSIBLE=y # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -CONFIG_SOUND=m +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y # CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y CONFIG_SND_JACK=y # CONFIG_SND_SEQUENCER is not set # CONFIG_SND_MIXER_OSS is not set @@ -831,57 +1011,324 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set CONFIG_SND_ARM=y -CONFIG_SND_SOC=m -CONFIG_SND_DAVINCI_SOC=m -CONFIG_SND_SOC_I2C_AND_SPI=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_DAVINCI_SOC=y +CONFIG_SND_DAVINCI_SOC_MCASP=y +CONFIG_SND_DA830_SOC_EVM=y +CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_TLV320AIC3X=y # CONFIG_SOUND_PRIME is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# DA830/OMAP-L137 USB support +# # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_PERIPHERAL is not set +CONFIG_USB_MUSB_DUAL_ROLE=y # CONFIG_USB_MUSB_OTG is not set -# CONFIG_USB_GADGET_MUSB_HDRC is not set +CONFIG_USB_GADGET_MUSB_HDRC=y +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_INVENTRA_DMA is not set +# CONFIG_USB_TI_CPPI_DMA is not set +CONFIG_USB_TI_CPPI41_DMA=y +CONFIG_USB_MUSB_DEBUG=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_AT91 is not set # CONFIG_USB_GADGET_ATMEL_USBA is not set # CONFIG_USB_GADGET_FSL_USB2 is not set # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set # CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set # CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set # CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_AMD5536UDC is not set # CONFIG_USB_GADGET_FSL_QE is not set # CONFIG_USB_GADGET_CI13XXX is not set # CONFIG_USB_GADGET_NET2280 is not set # CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y # CONFIG_USB_ZERO is not set -# CONFIG_USB_ETH is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set # CONFIG_USB_GADGETFS is not set # CONFIG_USB_FILE_STORAGE is not set # CONFIG_USB_G_SERIAL is not set # CONFIG_USB_MIDI_GADGET is not set # CONFIG_USB_G_PRINTER is not set # CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_MMC is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +CONFIG_NOP_USB_XCEIV=y +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +CONFIG_MMC_DAVINCI=y +# CONFIG_MMC_SPI is not set # CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set # CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_OMAP=y # CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set -# CONFIG_REGULATOR is not set # CONFIG_UIO is not set + +# +# TI VLYNQ +# # CONFIG_STAGING is not set # @@ -897,19 +1344,21 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set -CONFIG_FILE_LOCKING=y CONFIG_XFS_FS=m # CONFIG_XFS_QUOTA is not set # CONFIG_XFS_POSIX_ACL is not set # CONFIG_XFS_RT is not set # CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y @@ -958,6 +1407,17 @@ CONFIG_MISC_FILESYSTEMS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set @@ -968,7 +1428,6 @@ CONFIG_MINIX_FS=m # CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -# CONFIG_NILFS2_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y @@ -1060,83 +1519,30 @@ CONFIG_NLS_UTF8=m # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_KERNEL is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set -CONFIG_DEBUG_PREEMPT=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_PI_LIST=y -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_FRAME_POINTER=y # CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set # CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_TRACING_SUPPORT=y - -# -# Tracers -# -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_EVENT_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set +# CONFIG_ARM_UNWIND is not set +# CONFIG_DEBUG_USER is not set # # Security options @@ -1150,7 +1556,6 @@ CONFIG_CRYPTO=y # # Crypto core or helper # -# CONFIG_CRYPTO_FIPS is not set # CONFIG_CRYPTO_MANAGER is not set # CONFIG_CRYPTO_MANAGER2 is not set # CONFIG_CRYPTO_GF128MUL is not set @@ -1182,11 +1587,13 @@ CONFIG_CRYPTO=y # # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set @@ -1246,6 +1653,7 @@ CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y CONFIG_DECOMPRESS_GZIP=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_HAS_IOMEM=y diff --git a/recipes/linux/linux-davinci/da850-omapl138-evm/defconfig b/recipes/linux/linux-davinci/da850-omapl138-evm/defconfig index 3432146ac6..05bc1e74e6 100644 --- a/recipes/linux/linux-davinci/da850-omapl138-evm/defconfig +++ b/recipes/linux/linux-davinci/da850-omapl138-evm/defconfig @@ -1,14 +1,13 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.31-rc7-davinci1 -# Mon Sep 14 12:33:57 2009 +# Linux kernel version: 2.6.32-rc6 +# Wed Nov 18 00:04:22 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_MMU=y CONFIG_GENERIC_HARDIRQS=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y @@ -17,6 +16,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ZONE_DMA=y @@ -34,7 +34,7 @@ CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set +CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y @@ -46,11 +46,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y # # RCU Subsystem # -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set # CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -60,7 +61,6 @@ CONFIG_FAIR_GROUP_SCHED=y CONFIG_USER_SCHED=y # CONFIG_CGROUP_SCHED is not set # CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED is not set # CONFIG_SYSFS_DEPRECATED_V2 is not set # CONFIG_RELAY is not set # CONFIG_NAMESPACES is not set @@ -76,7 +76,6 @@ CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y @@ -92,17 +91,15 @@ CONFIG_SHMEM=y CONFIG_AIO=y # -# Performance Counters +# Kernel Performance Events And Counters # CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y -# CONFIG_STRIP_ASM_SYMS is not set CONFIG_COMPAT_BRK=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y @@ -112,7 +109,6 @@ CONFIG_HAVE_CLK=y # # GCOV-based kernel profiling # -# CONFIG_GCOV_KERNEL is not set # CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y @@ -146,6 +142,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # # System Type # +CONFIG_MMU=y # CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_REALVIEW is not set @@ -160,6 +157,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_STMP3XXX is not set # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set # CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set # CONFIG_ARCH_IOP33X is not set @@ -182,11 +180,13 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_U300 is not set CONFIG_ARCH_DAVINCI=y # CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set CONFIG_CP_INTC=y # @@ -203,17 +203,22 @@ CONFIG_CP_INTC=y CONFIG_ARCH_DAVINCI_DA850=y CONFIG_ARCH_DAVINCI_DA8XX=y # CONFIG_ARCH_DAVINCI_DM365 is not set +CONFIG_CPPI41=y # # DaVinci Board Type # CONFIG_MACH_DAVINCI_DA850_EVM=y +CONFIG_DA850_UI_NONE=y +# CONFIG_DA850_UI_RMII is not set +# CONFIG_DA850_UI_CLCD is not set CONFIG_DAVINCI_MUX=y # CONFIG_DAVINCI_MUX_DEBUG is not set # CONFIG_DAVINCI_MUX_WARNINGS is not set CONFIG_DAVINCI_RESET_CLOCKS=y -# CONFIG_DAVINCI_MCBSP is not set -# CONFIG_DA850_RMII is not set +CONFIG_DAVINCI_MCBSP=y +# CONFIG_DAVINCI_MCBSP0 is not set +CONFIG_DAVINCI_MCBSP1=y # # Processor Type @@ -222,7 +227,7 @@ CONFIG_CPU_32=y CONFIG_CPU_ARM926T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5TJ=y -CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_PABRT_LEGACY=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_COPY_V4WB=y CONFIG_CPU_TLB_V4WBI=y @@ -237,6 +242,7 @@ CONFIG_ARM_THUMB=y # CONFIG_CPU_DCACHE_DISABLE is not set # CONFIG_CPU_DCACHE_WRITETHROUGH is not set # CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 CONFIG_COMMON_CLKDEV=y # @@ -257,10 +263,12 @@ CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_HZ=100 CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set +CONFIG_OABI_COMPAT=y CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set @@ -279,6 +287,7 @@ CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y CONFIG_HAVE_MLOCK=y CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_LEDS=y # CONFIG_LEDS_CPU is not set @@ -297,8 +306,24 @@ CONFIG_CMDLINE="" # # CPU Power Management # -# CONFIG_CPU_FREQ is not set -# CONFIG_CPU_IDLE is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y # # Floating point emulation @@ -307,6 +332,8 @@ CONFIG_CMDLINE="" # # At least one emulation must be selected # +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set # CONFIG_VFP is not set # @@ -412,6 +439,7 @@ CONFIG_NETFILTER_ADVANCED=y # CONFIG_IP6_NF_IPTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -452,20 +480,116 @@ CONFIG_NETFILTER_ADVANCED=y # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_DAVINCI=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=1 CONFIG_BLK_DEV_RAM_SIZE=32768 @@ -483,6 +607,7 @@ CONFIG_MISC_DEVICES=y # EEPROM support # CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set @@ -493,7 +618,7 @@ CONFIG_HAVE_IDE=y # SCSI device support # # CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m +CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set @@ -502,7 +627,7 @@ CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # -CONFIG_BLK_DEV_SD=m +CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set @@ -529,7 +654,12 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_DH is not set # CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y +CONFIG_SATA_AHCI=y +# CONFIG_ATA_SFF is not set # CONFIG_MD is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set @@ -564,6 +694,7 @@ CONFIG_MII=y # CONFIG_SMC91X is not set CONFIG_TI_DAVINCI_EMAC=y # CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set # CONFIG_ETHOC is not set # CONFIG_SMC911X is not set # CONFIG_SMSC911X is not set @@ -577,18 +708,26 @@ CONFIG_TI_DAVINCI_EMAC=y # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set # CONFIG_B44 is not set # CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# +CONFIG_WLAN=y # CONFIG_WLAN_PRE80211 is not set # CONFIG_WLAN_80211 is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set # CONFIG_WAN is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set @@ -598,6 +737,7 @@ CONFIG_NETPOLL=y CONFIG_NETPOLL_TRAP=y CONFIG_NET_POLL_CONTROLLER=y # CONFIG_ISDN is not set +# CONFIG_PHONE is not set # # Input device support @@ -621,11 +761,15 @@ CONFIG_INPUT_EVBUG=m # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set CONFIG_KEYBOARD_ATKBD=m +# CONFIG_QT2160 is not set # CONFIG_KEYBOARD_LKKBD is not set CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set CONFIG_KEYBOARD_XTKBD=m @@ -633,19 +777,24 @@ CONFIG_KEYBOARD_XTKBD=m # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set # CONFIG_TOUCHSCREEN_AD7879 is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_TOUCHSCREEN_W90X900 is not set @@ -683,6 +832,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=3 # # Non-8250 serial port support # +# CONFIG_SERIAL_MAX3100 is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y @@ -697,6 +847,7 @@ CONFIG_HW_RANDOM=m # CONFIG_TCG_TPM is not set CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_HELPER_AUTO=y @@ -718,6 +869,7 @@ CONFIG_I2C_DAVINCI=y # # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers @@ -729,16 +881,34 @@ CONFIG_I2C_DAVINCI=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_DAVINCI=y +CONFIG_SPI_DAVINCI_DMA=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set # @@ -749,8 +919,8 @@ CONFIG_GPIOLIB=y # I2C GPIO expanders: # # CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCF857X=y # # PCI GPIO expanders: @@ -759,11 +929,17 @@ CONFIG_GPIO_PCF857X=m # # SPI GPIO expanders: # +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# AC97 GPIO expanders: +# # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set CONFIG_WATCHDOG=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -771,7 +947,12 @@ CONFIG_WATCHDOG=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -# CONFIG_DAVINCI_WATCHDOG is not set +CONFIG_DAVINCI_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set CONFIG_SSB_POSSIBLE=y # @@ -795,9 +976,22 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_TC6393XB is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13783 is not set # CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_TPS65023 is not set +CONFIG_REGULATOR_TPS6507X=y # CONFIG_MEDIA_SUPPORT is not set # @@ -805,7 +999,35 @@ CONFIG_SSB_POSSIBLE=y # # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_DAVINCI is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_DA8XX=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # @@ -818,11 +1040,21 @@ CONFIG_SSB_POSSIBLE=y # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y -CONFIG_SOUND=m +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y # CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y CONFIG_SND_JACK=y # CONFIG_SND_SEQUENCER is not set # CONFIG_SND_MIXER_OSS is not set @@ -844,24 +1076,309 @@ CONFIG_SND_DRIVERS=y # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set CONFIG_SND_ARM=y -CONFIG_SND_SOC=m -CONFIG_SND_DAVINCI_SOC=m -# CONFIG_SND_DA850_SOC_EVM is not set -CONFIG_SND_SOC_I2C_AND_SPI=m +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_DAVINCI_SOC=y +CONFIG_SND_DAVINCI_SOC_MCASP=y +CONFIG_SND_DA850_SOC_EVM=y +CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_TLV320AIC3X=y # CONFIG_SOUND_PRIME is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_MMC is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_PERIPHERAL is not set +CONFIG_USB_MUSB_DUAL_ROLE=y +# CONFIG_USB_MUSB_OTG is not set +CONFIG_USB_GADGET_MUSB_HDRC=y +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_INVENTRA_DMA is not set +# CONFIG_USB_TI_CPPI_DMA is not set +CONFIG_USB_TI_CPPI41_DMA=y +CONFIG_USB_MUSB_DEBUG=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +CONFIG_NOP_USB_XCEIV=y +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +CONFIG_MMC_DAVINCI=y +# CONFIG_MMC_SPI is not set # CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set # CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_OMAP=y # CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set -# CONFIG_REGULATOR is not set # CONFIG_UIO is not set + +# +# TI VLYNQ +# # CONFIG_STAGING is not set # @@ -877,7 +1394,6 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -890,6 +1406,7 @@ CONFIG_XFS_FS=m # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set CONFIG_FILE_LOCKING=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y @@ -940,6 +1457,17 @@ CONFIG_MISC_FILESYSTEMS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set @@ -950,7 +1478,6 @@ CONFIG_MINIX_FS=m # CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -# CONFIG_NILFS2_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y @@ -1042,82 +1569,30 @@ CONFIG_NLS_UTF8=m # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_DETECT_HUNG_TASK=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_KERNEL is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set -# CONFIG_DEBUG_KMEMLEAK is not set -CONFIG_DEBUG_PREEMPT=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_PI_LIST=y -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_FRAME_POINTER=y # CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set # CONFIG_SYSCTL_SYSCALL_CHECK is not set -# CONFIG_PAGE_POISONING is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_BOOT_TRACER is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set +# CONFIG_ARM_UNWIND is not set +# CONFIG_DEBUG_USER is not set # # Security options @@ -1131,7 +1606,6 @@ CONFIG_CRYPTO=y # # Crypto core or helper # -# CONFIG_CRYPTO_FIPS is not set # CONFIG_CRYPTO_MANAGER is not set # CONFIG_CRYPTO_MANAGER2 is not set # CONFIG_CRYPTO_GF128MUL is not set @@ -1163,11 +1637,13 @@ CONFIG_CRYPTO=y # # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # # CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set @@ -1227,6 +1703,7 @@ CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y CONFIG_DECOMPRESS_GZIP=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_HAS_IOMEM=y diff --git a/recipes/linux/linux-davinci/hawkboard/defconfig b/recipes/linux/linux-davinci/hawkboard/defconfig new file mode 100644 index 0000000000..05bc1e74e6 --- /dev/null +++ b/recipes/linux/linux-davinci/hawkboard/defconfig @@ -0,0 +1,1712 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32-rc6 +# Wed Nov 18 00:04:22 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +CONFIG_ARCH_DAVINCI=y +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +CONFIG_CP_INTC=y + +# +# TI DaVinci Implementations +# + +# +# DaVinci Core Type +# +# CONFIG_ARCH_DAVINCI_DM644x is not set +# CONFIG_ARCH_DAVINCI_DM355 is not set +# CONFIG_ARCH_DAVINCI_DM646x is not set +# CONFIG_ARCH_DAVINCI_DA830 is not set +CONFIG_ARCH_DAVINCI_DA850=y +CONFIG_ARCH_DAVINCI_DA8XX=y +# CONFIG_ARCH_DAVINCI_DM365 is not set +CONFIG_CPPI41=y + +# +# DaVinci Board Type +# +CONFIG_MACH_DAVINCI_DA850_EVM=y +CONFIG_DA850_UI_NONE=y +# CONFIG_DA850_UI_RMII is not set +# CONFIG_DA850_UI_CLCD is not set +CONFIG_DAVINCI_MUX=y +# CONFIG_DAVINCI_MUX_DEBUG is not set +# CONFIG_DAVINCI_MUX_WARNINGS is not set +CONFIG_DAVINCI_RESET_CLOCKS=y +CONFIG_DAVINCI_MCBSP=y +# CONFIG_DAVINCI_MCBSP0 is not set +CONFIG_DAVINCI_MCBSP1=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_LEDS=y +# CONFIG_LEDS_CPU is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_XTABLES is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV4 is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_DAVINCI=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y +CONFIG_SATA_AHCI=y +# CONFIG_ATA_SFF is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_LXT_PHY=y +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +CONFIG_LSI_ET1011C_PHY=y +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +CONFIG_TI_DAVINCI_EMAC=y +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN=y +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_NETCONSOLE=y +# CONFIG_NETCONSOLE_DYNAMIC is not set +CONFIG_NETPOLL=y +CONFIG_NETPOLL_TRAP=y +CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=m +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=m +CONFIG_INPUT_EVBUG=m + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +CONFIG_KEYBOARD_ATKBD=m +# CONFIG_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +CONFIG_KEYBOARD_XTKBD=m +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +# CONFIG_VT_CONSOLE is not set +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=8 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_DAVINCI=y +# CONFIG_I2C_DESIGNWARE is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_DAVINCI=y +CONFIG_SPI_DAVINCI_DMA=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCF857X=y + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_DAVINCI_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13783 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_TPS65023 is not set +CONFIG_REGULATOR_TPS6507X=y +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_DAVINCI is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FB_DA8XX=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_SOC=y +CONFIG_SND_DAVINCI_SOC=y +CONFIG_SND_DAVINCI_SOC_MCASP=y +CONFIG_SND_DA850_SOC_EVM=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_TLV320AIC3X=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_ZEROPLUS is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_PERIPHERAL is not set +CONFIG_USB_MUSB_DUAL_ROLE=y +# CONFIG_USB_MUSB_OTG is not set +CONFIG_USB_GADGET_MUSB_HDRC=y +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_INVENTRA_DMA is not set +# CONFIG_USB_TI_CPPI_DMA is not set +CONFIG_USB_TI_CPPI41_DMA=y +CONFIG_USB_MUSB_DEBUG=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +CONFIG_NOP_USB_XCEIV=y +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +CONFIG_MMC_DAVINCI=y +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_OMAP=y +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +CONFIG_MINIX_FS=m +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_FRAME_POINTER=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_ARM_UNWIND is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=m +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y diff --git a/recipes/linux/linux-davinci/hawkboard/patch_hawk.diff b/recipes/linux/linux-davinci/hawkboard/patch_hawk.diff new file mode 100644 index 0000000000..fb323236ac --- /dev/null +++ b/recipes/linux/linux-davinci/hawkboard/patch_hawk.diff @@ -0,0 +1,196 @@ +diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c +index 607dd2d..d7f5dff 100755 +--- a/arch/arm/mach-davinci/board-da850-evm.c ++++ b/arch/arm/mach-davinci/board-da850-evm.c +@@ -37,14 +37,14 @@ + #include <mach/nand.h> + #include <mach/mux.h> + +-#define DA850_EVM_PHY_MASK 0x1 ++#define DA850_EVM_PHY_MASK (1 << 7) + #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ + + #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) + #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) + +-#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) +-#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) ++#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(3, 12) ++#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(3, 13) + + #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) + +@@ -431,8 +431,8 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { + static u8 da850_iis_serializer_direction[] = { + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, +- INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, +- RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, ++ INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, ++ INACTIVE_MODE, TX_MODE, RX_MODE, INACTIVE_MODE, + }; + + static struct snd_platform_data da850_evm_snd_data = { +@@ -866,11 +866,11 @@ static __init void da850_evm_init(void) + { + int ret; + +- ret = pmic_tps65070_init(); ++/* ret = pmic_tps65070_init(); + if (ret) + pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n", + ret); +- ++*/ + ret = da8xx_register_edma(); + if (ret) + pr_warning("da850_evm_init: edma registration failed: %d\n", +@@ -886,12 +886,26 @@ static __init void da850_evm_init(void) + pr_warning("da850_evm_init: i2c0 registration failed: %d\n", + ret); + ++ davinci_serial_init(&da850_evm_uart_config); ++ ++ i2c_register_board_info(1, da850_evm_i2c_devices, ++ ARRAY_SIZE(da850_evm_i2c_devices)); ++ ++ __raw_writel(0, IO_ADDRESS(0x01E13028)); ++ ++ /* ++ * shut down uart 0 and 1; they are not used on the board and ++ * accessing them causes endless "too much work in irq53" messages ++ * with arago fs ++ */ ++ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); ++ __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); + + ret = da8xx_register_watchdog(); + if (ret) + pr_warning("da830_evm_init: watchdog registration failed: %d\n", + ret); +- ++ + if (HAS_MMC) { + ret = da8xx_pinmux_setup(da850_mmcsd0_pins); + if (ret) +@@ -916,19 +930,6 @@ static __init void da850_evm_init(void) + " %d\n", ret); + } + +- davinci_serial_init(&da850_evm_uart_config); +- +- i2c_register_board_info(1, da850_evm_i2c_devices, +- ARRAY_SIZE(da850_evm_i2c_devices)); +- +- /* +- * shut down uart 0 and 1; they are not used on the board and +- * accessing them causes endless "too much work in irq53" messages +- * with arago fs +- */ +- __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); +- __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); +- + if (HAS_MCBSP0) { + if (HAS_EMAC) + pr_warning("WARNING: both MCBSP0 and EMAC are " +@@ -988,15 +989,17 @@ static __init void da850_evm_init(void) + pr_warning("da850_evm_init: lcd initialization failed: %d\n", + ret); + +- ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); ++ ret = da8xx_register_lcdc(&vga_monitor_pdata); + if (ret) + pr_warning("da850_evm_init: lcdc registration failed: %d\n", + ret); + ++#if 0 + ret = da8xx_register_rtc(); + if (ret) + pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); + ++ + ret = da850_register_cpufreq(); + if (ret) + pr_warning("da850_evm_init: cpufreq registration failed: %d\n", +@@ -1006,6 +1009,7 @@ static __init void da850_evm_init(void) + if (ret) + pr_warning("da850_evm_init: cpuidle registration failed: %d\n", + ret); ++#endif + + ret = da8xx_pinmux_setup(da850_spi1_pins); + if (ret) +@@ -1021,6 +1025,7 @@ static __init void da850_evm_init(void) + if (ret) + pr_warning("da850_evm_init: SATA registration failed: %d\n", + ret); ++ + } + + #ifdef CONFIG_SERIAL_8250_CONSOLE +diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c +index 94355fa..cda39a3 100644 +--- a/arch/arm/mach-davinci/da850.c ++++ b/arch/arm/mach-davinci/da850.c +@@ -658,7 +658,7 @@ const short da850_rmii_pins[] __initdata = { + const short da850_mcasp_pins[] __initdata = { + DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, + DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, +- DA850_AXR_11, DA850_AXR_12, ++ DA850_AXR_11, DA850_AXR_12, DA850_AXR_13, DA850_AXR_14, + -1 + }; + +diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c +index b3f1317..7218539 100755 +--- a/arch/arm/mach-davinci/devices-da8xx.c ++++ b/arch/arm/mach-davinci/devices-da8xx.c +@@ -396,6 +396,11 @@ struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = { + .controller_data = &lcd_cfg, + .type = "Sharp_LK043T1DG01", + }; ++struct da8xx_lcdc_platform_data vga_monitor_pdata = { ++ .manu_name = "vga_monitor", ++ .controller_data = &lcd_cfg, ++ .type = "VGA_Monitor", ++}; + + #if !defined(CONFIG_FB_DA8XX) && !defined(CONFIG_FB_DA8XX_MODULE) + static struct da8xx_clcd_platform_data da8xx_evm_clcd_pdata = { +diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h +index 362ff83..8da6983 100644 +--- a/arch/arm/mach-davinci/include/mach/da8xx.h ++++ b/arch/arm/mach-davinci/include/mach/da8xx.h +@@ -110,6 +110,7 @@ extern struct platform_device da8xx_serial_device; + extern struct emac_platform_data da8xx_emac_pdata; + extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; + extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; ++extern struct da8xx_lcdc_platform_data vga_monitor_pdata; + void da8xx_usb20_configure(struct musb_hdrc_platform_data *pdata, u8 num_inst); + + extern const short da830_emif25_pins[]; +diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c +index 67550e6..5e32391 100644 +--- a/drivers/video/da8xx-fb.c ++++ b/drivers/video/da8xx-fb.c +@@ -193,6 +193,20 @@ static struct da8xx_panel known_lcd_panels[] = { + .pxl_clk = 7833600, + .invert_pxl_clk = 0, + }, ++ /* CRT Monitor or LCD Screen */ ++ [2] = { ++ .name = "VGA_Monitor", ++ .width = 640, ++ .height = 480, ++ .hfp = 48, ++ .hbp = 48, ++ .hsw = 63, ++ .vfp = 11, ++ .vbp = 31, ++ .vsw = 1, ++ .pxl_clk = 25000000, ++ .invert_pxl_clk = 1, ++ }, + }; + + /* Disable the Raster Engine of the LCD Controller */ diff --git a/recipes/linux/linux-davinci_git.bb b/recipes/linux/linux-davinci_git.bb index 1b549ef61d..ffa1a35950 100644 --- a/recipes/linux/linux-davinci_git.bb +++ b/recipes/linux/linux-davinci_git.bb @@ -3,24 +3,33 @@ require linux.inc DESCRIPTION = "Linux kernel for Davinci processors" KERNEL_IMAGETYPE = "uImage" -COMPATIBLE_MACHINE = "(dm6446-evm|dm6467-evm|dm6467t-evm|dm355-evm|dm365-evm|da830-omapl137-evm|da850-omapl138-evm|davinci-sffsdr|dm355-leopard)" +COMPATIBLE_MACHINE = "(dm6446-evm|dm6467-evm|dm6467t-evm|dm355-evm|dm365-evm|da830-omapl137-evm|da850-omapl138-evm|davinci-sffsdr|dm355-leopard|hawkboard)" DEFAULT_PREFERENCE = "1" SRCREV = "835d1ac43b1c0428cb0f7f91fbaf708ba8e7e504" -SRCREV_da830-omapl137-evm = "1f3804f945375f699023056a462891b80ea2a36e" -SRCREV_da850-omapl138-evm = "1f3804f945375f699023056a462891b80ea2a36e" + +# OMAPL commits for PSP 3.20.00.07 Release Tag +SRCREV_da830-omapl137-evm = "b60234a5b0ee985912ecb59d3e689c1ed4baa46c" +SRCREV_da850-omapl138-evm = "b60234a5b0ee985912ecb59d3e689c1ed4baa46c" +SRCREV_hawkboard = "b60234a5b0ee985912ecb59d3e689c1ed4baa46c" + +BRANCH = "master" # The main PR is now using MACHINE_KERNEL_PR, for davinci see conf/machine/include/davinci.inc -PV = "2.6.30+2.6.31-rc7-${PR}+gitr${SRCREV}" +PV = "2.6.31+2.6.32-rc6-${PR}+gitr${SRCREV}" SRC_URI = "git://arago-project.org/git/projects/linux-davinci.git;protocol=git \ file://defconfig" -SRC_URI_da830-omapl137-evm = "git://arago-project.org/git/people/sekhar/linux-omapl1.git;protocol=git;branch=staging \ +SRC_URI_da830-omapl137-evm = "git://arago-project.org/git/people/sekhar/linux-omapl1.git;protocol=git;branch=${BRANCH} \ file://defconfig" -SRC_URI_da850-omapl138-evm = "git://arago-project.org/git/people/sekhar/linux-omapl1.git;protocol=git;branch=staging \ +SRC_URI_da850-omapl138-evm = "git://arago-project.org/git/people/sekhar/linux-omapl1.git;protocol=git;branch=${BRANCH} \ file://defconfig" +SRC_URI_hawkboard = "git://arago-project.org/git/people/sekhar/linux-omapl1.git;protocol=git;branch=${BRANCH} \ + file://patch_hawk.diff;patch=1 \ + file://defconfig" + S = "${WORKDIR}/git" diff --git a/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch b/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch new file mode 100644 index 0000000000..0f472d9f75 --- /dev/null +++ b/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch @@ -0,0 +1,19 @@ +diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c +index ad41f19..12fdd39 100644 +--- a/drivers/cpuidle/cpuidle.c ++++ b/drivers/cpuidle/cpuidle.c +@@ -76,8 +76,11 @@ static void cpuidle_idle_call(void) + #endif + /* ask the governor for the next state */ + next_state = cpuidle_curr_governor->select(dev); +- if (need_resched()) ++ if (need_resched()) { ++ local_irq_enable(); + return; ++ } ++ + target_state = &dev->states[next_state]; + + /* enter the state and update stats */ + + diff --git a/recipes/linux/linux-kirkwood_2.6.31.bb b/recipes/linux/linux-kirkwood_2.6.31.bb index 49833a488e..f046feaadd 100644 --- a/recipes/linux/linux-kirkwood_2.6.31.bb +++ b/recipes/linux/linux-kirkwood_2.6.31.bb @@ -9,6 +9,8 @@ COMPATIBLE_MACHINE = "openrd-base" require linux.inc +FILESPATHPKG_prepend = "linux-2.6.31:" + # Change MACHINE_KERNEL_PR in conf/machine/include/kirkwood.inc PV = "2.6.31" @@ -18,8 +20,16 @@ SRCREV = "8cb424312d88810bb62edbeef42a510725ceb482" SRC_URI = "git://git.marvell.com/orion.git;protocol=git \ file://defconfig" -SRC_URI_append_openrd-base = " file://openrd-base-enable-pcie.patch;patch=1" - +SRC_URI_append_openrd-base = " file://openrd-base-enable-pcie.patch;patch=1 \ + file://cpuidle-reenable-interrupts.patch;patch=1 \ + file://0001-Squashfs-move-zlib-decompression-wrapper-code-into.patch;patch=1 \ + file://0002-Squashfs-Factor-out-remaining-zlib-dependencies-int.patch;patch=1 \ + file://0003-Squashfs-add-a-decompressor-framework.patch;patch=1 \ + file://0004-Squashfs-add-decompressor-entries-for-lzma-and-lzo.patch;patch=1 \ + file://0005-Squashfs-add-an-extra-parameter-to-the-decompressor.patch;patch=1 \ + file://0006-Squashfs-add-LZMA-compression.patch;patch=1 \ + file://0007-Squashfs-Make-unlzma-available-to-non-initramfs-ini.patch;patch=1 \ + " # update machine types list for ARM architecture, only for machines that need it do_arm_mach_types() { if test ${MACHINE} == openrd-base; then diff --git a/recipes/linux/linux-openmoko-2.6.31/0001-DRM-for-platform-devices.patch b/recipes/linux/linux-openmoko-2.6.31/0001-DRM-for-platform-devices.patch new file mode 100644 index 0000000000..2c9b611165 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0001-DRM-for-platform-devices.patch @@ -0,0 +1,458 @@ +From da270cf61e67d912b38e314719511efc4c2ea085 Mon Sep 17 00:00:00 2001 +From: Thomas White <taw@bitwiz.org.uk> +Date: Tue, 20 Oct 2009 15:52:30 +0200 +Subject: [PATCH 1/4] DRM for platform devices + +This modifies the DRM core in a small number of places to allow platform +devices to be used for direct rendering, alongside PCI devices. + +Signed-off-by: Thomas White <taw@bitwiz.org.uk> +--- + drivers/gpu/drm/Kconfig | 2 +- + drivers/gpu/drm/drm_bufs.c | 2 +- + drivers/gpu/drm/drm_drv.c | 27 ++++++++++ + drivers/gpu/drm/drm_info.c | 27 ++++++++-- + drivers/gpu/drm/drm_ioctl.c | 118 ++++++++++++++++++++++++++++++------------- + drivers/gpu/drm/drm_stub.c | 76 +++++++++++++++++++++++++++- + drivers/gpu/drm/drm_sysfs.c | 6 ++- + include/drm/drmP.h | 13 +++++ + 8 files changed, 224 insertions(+), 47 deletions(-) + +diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig +index 39b393d..cef3d2c 100644 +--- a/drivers/gpu/drm/Kconfig ++++ b/drivers/gpu/drm/Kconfig +@@ -6,7 +6,7 @@ + # + menuconfig DRM + tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" +- depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU ++ depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU + select I2C + select I2C_ALGOBIT + help +diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c +index 6246e3f..b9f15bf 100644 +--- a/drivers/gpu/drm/drm_bufs.c ++++ b/drivers/gpu/drm/drm_bufs.c +@@ -188,7 +188,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset, + switch (map->type) { + case _DRM_REGISTERS: + case _DRM_FRAME_BUFFER: +-#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) ++#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__) + if (map->offset + (map->size-1) < map->offset || + map->offset < virt_to_phys(high_memory)) { + kfree(map); +diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c +index b39d7bf..a7861e8 100644 +--- a/drivers/gpu/drm/drm_drv.c ++++ b/drivers/gpu/drm/drm_drv.c +@@ -247,6 +247,7 @@ int drm_lastclose(struct drm_device * dev) + */ + int drm_init(struct drm_driver *driver) + { ++#ifdef CONFIG_PCI + struct pci_dev *pdev = NULL; + const struct pci_device_id *pid; + int i; +@@ -280,11 +281,37 @@ int drm_init(struct drm_driver *driver) + drm_get_dev(pdev, pid, driver); + } + } ++#endif + return 0; + } + + EXPORT_SYMBOL(drm_init); + ++/** ++ * Call this to associate a drm_driver with a platform_device. ++ * ++ * \return zero on success or a negative number on failure. ++ * ++ * This is a replacement for drm_init(), but for platform drivers. ++ * In this case, the caller must provide the matching platform_device ++ * ++ * since there is no physical bus to scan through. ++ * ++ * \sa drm_init ++ * ++ */ ++int drm_platform_init(struct drm_driver *driver, struct platform_device *pdev, ++ void *priv) ++{ ++ DRM_DEBUG("\n"); ++ ++ INIT_LIST_HEAD(&driver->device_list); ++ ++ return drm_get_platform_dev(pdev, driver, priv); ++} ++ ++EXPORT_SYMBOL(drm_platform_init); ++ + void drm_exit(struct drm_driver *driver) + { + struct drm_device *dev, *tmp; +diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c +index f0f6c6b..838c2ee 100644 +--- a/drivers/gpu/drm/drm_info.c ++++ b/drivers/gpu/drm/drm_info.c +@@ -52,12 +52,28 @@ int drm_name_info(struct seq_file *m, void *data) + return 0; + + if (master->unique) { +- seq_printf(m, "%s %s %s\n", +- dev->driver->pci_driver.name, +- pci_name(dev->pdev), master->unique); ++ ++ if (drm_core_is_platform(dev)) { ++ seq_printf(m, "%s %s %s\n", ++ dev->driver->name, ++ dev_name(&dev->platform_dev->dev), ++ master->unique); ++ } else { ++ seq_printf(m, "%s %s %s\n", ++ dev->driver->pci_driver.name, ++ pci_name(dev->pdev), master->unique); ++ } ++ + } else { +- seq_printf(m, "%s %s\n", dev->driver->pci_driver.name, +- pci_name(dev->pdev)); ++ ++ if (drm_core_is_platform(dev)) { ++ seq_printf(m, "%s %s\n", dev->driver->name, ++ dev_name(&dev->platform_dev->dev)); ++ } else { ++ seq_printf(m, "%s %s\n", dev->driver->pci_driver.name, ++ pci_name(dev->pdev)); ++ } ++ + } + + return 0; +@@ -325,4 +341,3 @@ int drm_vma_info(struct seq_file *m, void *data) + } + + #endif +- +diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c +index 9b9ff46..133ef29 100644 +--- a/drivers/gpu/drm/drm_ioctl.c ++++ b/drivers/gpu/drm/drm_ioctl.c +@@ -83,7 +83,6 @@ int drm_setunique(struct drm_device *dev, void *data, + { + struct drm_unique *u = data; + struct drm_master *master = file_priv->master; +- int domain, bus, slot, func, ret; + + if (master->unique_len || master->unique) + return -EBUSY; +@@ -101,28 +100,46 @@ int drm_setunique(struct drm_device *dev, void *data, + + master->unique[master->unique_len] = '\0'; + +- dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + +- strlen(master->unique) + 2, GFP_KERNEL); +- if (!dev->devname) +- return -ENOMEM; ++ if ( !drm_core_is_platform(dev) ) { + +- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, +- master->unique); ++ int domain, bus, slot, func, ret; + +- /* Return error if the busid submitted doesn't match the device's actual +- * busid. +- */ +- ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func); +- if (ret != 3) +- return -EINVAL; +- domain = bus >> 8; +- bus &= 0xff; ++ /* PCI device */ ++ dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + ++ strlen(master->unique) + 2, GFP_KERNEL); ++ if (!dev->devname) ++ return -ENOMEM; + +- if ((domain != drm_get_pci_domain(dev)) || +- (bus != dev->pdev->bus->number) || +- (slot != PCI_SLOT(dev->pdev->devfn)) || +- (func != PCI_FUNC(dev->pdev->devfn))) +- return -EINVAL; ++ sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, ++ master->unique); ++ ++ /* Return error if the busid submitted doesn't match the ++ * device's actual busid. ++ */ ++ ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func); ++ if (ret != 3) ++ return -EINVAL; ++ domain = bus >> 8; ++ bus &= 0xff; ++ ++ if ((domain != drm_get_pci_domain(dev)) || ++ (bus != dev->pdev->bus->number) || ++ (slot != PCI_SLOT(dev->pdev->devfn)) || ++ (func != PCI_FUNC(dev->pdev->devfn))) ++ return -EINVAL; ++ ++ } else { ++ ++ /* Platform device */ ++ dev->devname = kmalloc(strlen(dev->driver->name) + ++ strlen(master->unique) + 2, GFP_KERNEL); ++ if (!dev->devname) ++ return -ENOMEM; ++ ++ sprintf(dev->devname, "%s@%s", dev->driver->name, ++ master->unique); ++ ++ } + + return 0; + } +@@ -141,23 +158,52 @@ static int drm_set_busid(struct drm_device *dev, struct drm_file *file_priv) + if (master->unique == NULL) + return -ENOMEM; + +- len = snprintf(master->unique, master->unique_len, "pci:%04x:%02x:%02x.%d", +- drm_get_pci_domain(dev), +- dev->pdev->bus->number, +- PCI_SLOT(dev->pdev->devfn), +- PCI_FUNC(dev->pdev->devfn)); +- if (len >= master->unique_len) +- DRM_ERROR("buffer overflow"); +- else +- master->unique_len = len; +- +- dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + +- master->unique_len + 2, GFP_KERNEL); +- if (dev->devname == NULL) +- return -ENOMEM; ++ if ( !drm_core_is_platform(dev) ) { ++ ++ /* PCI device */ + +- sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, +- master->unique); ++ len = snprintf(master->unique, master->unique_len, ++ "pci:%04x:%02x:%02x.%d", ++ drm_get_pci_domain(dev), ++ dev->pdev->bus->number, ++ PCI_SLOT(dev->pdev->devfn), ++ PCI_FUNC(dev->pdev->devfn)); ++ if (len >= master->unique_len) ++ DRM_ERROR("buffer overflow"); ++ else ++ master->unique_len = len; ++ ++ dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + ++ master->unique_len + 2, GFP_KERNEL); ++ if (dev->devname == NULL) ++ return -ENOMEM; ++ ++ sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, ++ master->unique); ++ ++ } else { ++ ++ /* Platform device */ ++ ++ int len; ++ ++ len = snprintf(master->unique, master->unique_len, ++ "platform:%s", dev->platform_dev->name); ++ ++ if (len >= master->unique_len) ++ DRM_ERROR("buffer overflow"); ++ else ++ master->unique_len = len; ++ ++ dev->devname = kmalloc(strlen(dev->driver->name) ++ + master->unique_len + 2, GFP_KERNEL); ++ if (dev->devname == NULL) ++ return -ENOMEM; ++ ++ sprintf(dev->devname, "%s@%s", dev->driver->name, ++ master->unique); ++ ++ } + + return 0; + } +diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c +index 55bb8a8..a7069ad 100644 +--- a/drivers/gpu/drm/drm_stub.c ++++ b/drivers/gpu/drm/drm_stub.c +@@ -230,8 +230,10 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev, + idr_init(&dev->drw_idr); + + dev->pdev = pdev; +- dev->pci_device = pdev->device; +- dev->pci_vendor = pdev->vendor; ++ if (pdev) { ++ dev->pci_device = pdev->device; ++ dev->pci_vendor = pdev->vendor; ++ } + + #ifdef __alpha__ + dev->hose = pdev->sysdata; +@@ -449,6 +451,76 @@ err_g1: + EXPORT_SYMBOL(drm_get_dev); + + /** ++ * ++ * Register a platform device as a DRM device ++ * ++ * \param pdev - platform device structure ++ * \param driver - the matching drm_driver structure ++ * \return zero on success or a negative number on failure. ++ * ++ * Attempt to gets inter module "drm" information. If we are first ++ * then register the character device and inter module information. ++ * Try and register, if we fail to register, backout previous work. ++ * ++ * \sa drm_get_dev ++ */ ++int drm_get_platform_dev(struct platform_device *pdev, ++ struct drm_driver *driver, void *priv) ++{ ++ struct drm_device *dev; ++ int ret; ++ DRM_DEBUG("\n"); ++ ++ dev = kmalloc(sizeof(*dev), GFP_KERNEL); ++ if (!dev) ++ return -ENOMEM; ++ dev->dev_private = priv; ++ ++ if ((ret = drm_fill_in_dev(dev, NULL, NULL, driver))) { ++ printk(KERN_ERR "DRM: Fill_in_dev failed.\n"); ++ goto err_g1; ++ } ++ dev->platform_dev = pdev; ++ ++ if (drm_core_check_feature(dev, DRIVER_MODESET)) { ++ ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL); ++ if (ret) ++ goto err_g2; ++ } ++ ++ if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY))) ++ goto err_g3; ++ ++ if (dev->driver->load) { ++ ret = dev->driver->load(dev, 0); ++ if (ret) ++ goto err_g3; ++ } ++ ++ /* setup the grouping for the legacy output */ ++ if (drm_core_check_feature(dev, DRIVER_MODESET)) { ++ ret = drm_mode_group_init_legacy_group(dev, &dev->primary->mode_group); ++ if (ret) ++ goto err_g3; ++ } ++ ++ list_add_tail(&dev->driver_item, &driver->device_list); ++ ++ DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", ++ driver->name, driver->major, driver->minor, driver->patchlevel, ++ driver->date, dev->primary->index); ++ ++ return 0; ++ ++err_g3: ++ drm_put_minor(&dev->primary); ++err_g2: ++err_g1: ++ kfree(dev); ++ return ret; ++} ++ ++/** + * Put a secondary minor number. + * + * \param sec_minor - structure to be released +diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c +index f7a615b..fea2b71 100644 +--- a/drivers/gpu/drm/drm_sysfs.c ++++ b/drivers/gpu/drm/drm_sysfs.c +@@ -482,7 +482,11 @@ int drm_sysfs_device_add(struct drm_minor *minor) + int err; + char *minor_str; + +- minor->kdev.parent = &minor->dev->pdev->dev; ++ if (minor->dev->pdev) { ++ minor->kdev.parent = &minor->dev->pdev->dev; ++ } else { ++ minor->kdev.parent = &minor->dev->platform_dev->dev; ++ } + minor->kdev.class = drm_class; + minor->kdev.release = drm_sysfs_device_release; + minor->kdev.devt = minor->device; +diff --git a/include/drm/drmP.h b/include/drm/drmP.h +index 45b67d9..66253f9 100644 +--- a/include/drm/drmP.h ++++ b/include/drm/drmP.h +@@ -55,6 +55,7 @@ + #include <linux/mm.h> + #include <linux/cdev.h> + #include <linux/mutex.h> ++#include <linux/platform_device.h> + #if defined(__alpha__) || defined(__powerpc__) + #include <asm/pgtable.h> /* For pte_wrprotect */ + #endif +@@ -113,6 +114,7 @@ extern void drm_ut_debug_printk(unsigned int request_level, + #define DRIVER_IRQ_VBL2 0x800 + #define DRIVER_GEM 0x1000 + #define DRIVER_MODESET 0x2000 ++#define DRIVER_IS_PLATFORM 0x4000 + + /***********************************************************************/ + /** \name Begin the DRM... */ +@@ -981,6 +983,7 @@ struct drm_device { + wait_queue_head_t buf_writers; /**< Processes waiting to ctx switch */ + + struct drm_agp_head *agp; /**< AGP data */ ++ struct platform_device *platform_dev; /**< platform device structure */ + + struct pci_dev *pdev; /**< PCI device structure */ + int pci_vendor; /**< PCI vendor id */ +@@ -1091,12 +1094,20 @@ static inline int drm_mtrr_del(int handle, unsigned long offset, + } + #endif + ++static inline int drm_core_is_platform(struct drm_device *dev) ++{ ++ return drm_core_check_feature(dev, DRIVER_IS_PLATFORM); ++} ++ + /******************************************************************/ + /** \name Internal function definitions */ + /*@{*/ + + /* Driver support (drm_drv.h) */ + extern int drm_init(struct drm_driver *driver); ++extern int drm_platform_init(struct drm_driver *driver, ++ struct platform_device *pdev, ++ void *dev_private); + extern void drm_exit(struct drm_driver *driver); + extern int drm_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +@@ -1314,6 +1325,8 @@ extern int drm_dropmaster_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + struct drm_master *drm_master_create(struct drm_minor *minor); + extern struct drm_master *drm_master_get(struct drm_master *master); ++extern int drm_get_platform_dev(struct platform_device *pdev, ++ struct drm_driver *driver, void *priv); + extern void drm_master_put(struct drm_master **master); + extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, + struct drm_driver *driver); +-- +1.6.5.3 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0001-gta02_defconfig-Enable-GLAMO_DRM.patch b/recipes/linux/linux-openmoko-2.6.31/0001-gta02_defconfig-Enable-GLAMO_DRM.patch new file mode 100644 index 0000000000..94fced1741 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0001-gta02_defconfig-Enable-GLAMO_DRM.patch @@ -0,0 +1,37 @@ +From 6cc1ca971b357db4760a40729728c05e403857d7 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Thu, 19 Nov 2009 11:39:51 +0100 +Subject: [PATCH] gta02_defconfig: Enable GLAMO_DRM + +--- + arch/arm/configs/gta02_defconfig | 7 ++++++- + 1 files changed, 6 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/configs/gta02_defconfig b/arch/arm/configs/gta02_defconfig +index 0f53baf..1cce709 100644 +--- a/arch/arm/configs/gta02_defconfig ++++ b/arch/arm/configs/gta02_defconfig +@@ -1000,14 +1000,19 @@ CONFIG_PCF50633_GPIO=y + # CONFIG_EZX_PCAP is not set + # CONFIG_MFD_PCF50606 is not set + CONFIG_MFD_GLAMO=y +-CONFIG_MFD_GLAMO_FB=y ++# CONFIG_MFD_GLAMO_FB is not set + CONFIG_MFD_GLAMO_GPIO=y + CONFIG_MFD_GLAMO_MCI=y ++CONFIG_MFD_GLAMO_DRM=y + # CONFIG_MEDIA_SUPPORT is not set + + # + # Graphics support + # ++CONFIG_DRM=y ++# CONFIG_DRM_MGA is not set ++# CONFIG_DRM_VIA is not set ++# CONFIG_DRM_SAVAGE is not set + # CONFIG_VGASTATE is not set + CONFIG_VIDEO_OUTPUT_CONTROL=y + CONFIG_FB=y +-- +1.6.5.3 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0001-wm8753-fix-build-with-gcc-4.4.2-which-works-ok-with-.patch b/recipes/linux/linux-openmoko-2.6.31/0001-wm8753-fix-build-with-gcc-4.4.2-which-works-ok-with-.patch new file mode 100644 index 0000000000..c6b989f997 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0001-wm8753-fix-build-with-gcc-4.4.2-which-works-ok-with-.patch @@ -0,0 +1,27 @@ +From 63b619f9466dc36648d082dc4e4fad714a343d80 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sat, 7 Nov 2009 20:33:06 +0100 +Subject: [PATCH 1/5] wm8753: fix build with gcc-4.4.2, which works ok with 4.1.2 + +--- + sound/soc/codecs/wm8753.c | 4 +++- + 1 files changed, 3 insertions(+), 1 deletions(-) + +diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c +index d80d414..1e685b2 100644 +--- a/sound/soc/codecs/wm8753.c ++++ b/sound/soc/codecs/wm8753.c +@@ -709,7 +709,9 @@ static void pll_factors(struct _pll_div *pll_div, unsigned int target, + Nmod = target % source; + Kpart = FIXED_PLL_SIZE * (long long)Nmod; + +- do_div(Kpart, source); ++ // with this, gcc-4.4.2 emits the reference to uldivmod, but then optimizes it out ++ //do_div(Kpart, source); ++ __do_div_asm(Kpart, source); + + K = Kpart & 0xFFFFFFFF; + +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0002-Glamo-DRM-and-KMS-driver.patch b/recipes/linux/linux-openmoko-2.6.31/0002-Glamo-DRM-and-KMS-driver.patch new file mode 100644 index 0000000000..4a837e9b08 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0002-Glamo-DRM-and-KMS-driver.patch @@ -0,0 +1,3818 @@ +From 01435b6f8fba2031e6941756a6a4e42be553f4a0 Mon Sep 17 00:00:00 2001 +From: Thomas White <taw@bitwiz.org.uk> +Date: Tue, 20 Oct 2009 16:14:55 +0200 +Subject: [PATCH 2/4] Glamo DRM and KMS driver + +This adds the Glamo DRM and KMS driver, but not the modifications needed +elsewhere to support it. + +Signed-off-by: Thomas White <taw@bitwiz.org.uk> +--- + drivers/gpu/drm/drm_stub.c | 2 +- + drivers/mfd/glamo/Kconfig | 15 + + drivers/mfd/glamo/Makefile | 5 +- + drivers/mfd/glamo/glamo-buffer.c | 372 ++++++++++++++ + drivers/mfd/glamo/glamo-buffer.h | 60 +++ + drivers/mfd/glamo/glamo-cmdq.c | 528 ++++++++++++++++++++ + drivers/mfd/glamo/glamo-cmdq.h | 49 ++ + drivers/mfd/glamo/glamo-display.c | 875 +++++++++++++++++++++++++++++++++ + drivers/mfd/glamo/glamo-display.h | 39 ++ + drivers/mfd/glamo/glamo-drm-drv.c | 453 +++++++++++++++++ + drivers/mfd/glamo/glamo-drm-private.h | 156 ++++++ + drivers/mfd/glamo/glamo-fence.c | 329 +++++++++++++ + drivers/mfd/glamo/glamo-fence.h | 36 ++ + drivers/mfd/glamo/glamo-kms-fb.c | 540 ++++++++++++++++++++ + drivers/mfd/glamo/glamo-kms-fb.h | 41 ++ + include/drm/Kbuild | 1 + + include/drm/glamo_drm.h | 153 ++++++ + 17 files changed, 3652 insertions(+), 2 deletions(-) + create mode 100644 drivers/mfd/glamo/glamo-buffer.c + create mode 100644 drivers/mfd/glamo/glamo-buffer.h + create mode 100644 drivers/mfd/glamo/glamo-cmdq.c + create mode 100644 drivers/mfd/glamo/glamo-cmdq.h + create mode 100644 drivers/mfd/glamo/glamo-display.c + create mode 100644 drivers/mfd/glamo/glamo-display.h + create mode 100644 drivers/mfd/glamo/glamo-drm-drv.c + create mode 100644 drivers/mfd/glamo/glamo-drm-private.h + create mode 100644 drivers/mfd/glamo/glamo-fence.c + create mode 100644 drivers/mfd/glamo/glamo-fence.h + create mode 100644 drivers/mfd/glamo/glamo-kms-fb.c + create mode 100644 drivers/mfd/glamo/glamo-kms-fb.h + create mode 100644 include/drm/glamo_drm.h + +diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c +index a7069ad..5e3d65a 100644 +--- a/drivers/gpu/drm/drm_stub.c ++++ b/drivers/gpu/drm/drm_stub.c +@@ -471,7 +471,7 @@ int drm_get_platform_dev(struct platform_device *pdev, + int ret; + DRM_DEBUG("\n"); + +- dev = kmalloc(sizeof(*dev), GFP_KERNEL); ++ dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + dev->dev_private = priv; +diff --git a/drivers/mfd/glamo/Kconfig b/drivers/mfd/glamo/Kconfig +index 8c93bcb..375e5db 100644 +--- a/drivers/mfd/glamo/Kconfig ++++ b/drivers/mfd/glamo/Kconfig +@@ -39,3 +39,18 @@ config MFD_GLAMO_MCI + neo1973 GTA-02. + + If unsure, say N. ++ ++config MFD_GLAMO_DRM ++ tristate "Glamo direct rendering and kernel modesetting support" ++ depends on MFD_GLAMO && DRM ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ help ++ Direct Rendering Manager interface for the S-Media Glamo chip, as ++ used in Openmoko FreeRunner (GTA02). ++ ++ This DRM driver includes kernel modesetting (KMS) support. As such, ++ do not select MFD_GLAMO_FB above if you choose to enable this option. ++ ++ If unsure, say N. +diff --git a/drivers/mfd/glamo/Makefile b/drivers/mfd/glamo/Makefile +index ebf26f7..d5ebf8f 100644 +--- a/drivers/mfd/glamo/Makefile ++++ b/drivers/mfd/glamo/Makefile +@@ -1,5 +1,5 @@ + # +-# Makefile for the Smedia Glamo framebuffer driver ++# Makefile for the Smedia Glamo driver(s) + # + + obj-$(CONFIG_MFD_GLAMO) += glamo-core.o +@@ -8,4 +8,7 @@ obj-$(CONFIG_MFD_GLAMO_SPI) += glamo-spi.o + + obj-$(CONFIG_MFD_GLAMO_FB) += glamo-fb.o + obj-$(CONFIG_MFD_GLAMO_MCI) += glamo-mci.o ++obj-$(CONFIG_MFD_GLAMO_DRM) += glamo-drm.o + ++glamo-drm-objs := glamo-drm-drv.o glamo-cmdq.o glamo-buffer.o \ ++ glamo-display.o glamo-kms-fb.o glamo-fence.o +diff --git a/drivers/mfd/glamo/glamo-buffer.c b/drivers/mfd/glamo/glamo-buffer.c +new file mode 100644 +index 0000000..45500d3 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-buffer.c +@@ -0,0 +1,372 @@ ++/* ++ * SMedia Glamo 336x/337x memory management ++ * ++ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ * ++ * ++ * Memory mapping functions based on i915_gem.c, to which the following ++ * notice applies: ++ * ++ * Copyright © 2008 Intel Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ * ++ * Authors: ++ * Eric Anholt <eric@anholt.net> ++ */ ++ ++ ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++ ++#include "glamo-drm-private.h" ++#include "glamo-cmdq.h" /* For glamo_cmdq_blank() */ ++ ++ ++struct drm_gem_object *glamo_gem_object_alloc(struct drm_device *dev, int size, ++ int alignment) ++{ ++ struct drm_gem_object *obj; ++ struct glamodrm_handle *gdrm; ++ struct drm_glamo_gem_object *gobj; ++ ++ gdrm = dev->dev_private; ++ ++ size = roundup(size, PAGE_SIZE); ++ ++ obj = drm_gem_object_alloc(dev, size); ++ if (obj == NULL) return NULL; ++ ++ /* See glamodrm_gem_init_object() below */ ++ gobj = obj->driver_private; ++ ++ /* Allocate memory for this object in VRAM */ ++ gobj->block = drm_mm_search_free(gdrm->mmgr, size, alignment, 1); ++ if (!gobj->block) { ++ goto fail; ++ } ++ gobj->block = drm_mm_get_block(gobj->block, size, alignment); ++ if (!gobj->block) { ++ goto fail; ++ } ++ ++ /* Arrange for the contents to be set to zero */ ++ glamo_cmdq_blank(gdrm, obj); ++ ++ return obj; ++ ++fail: ++ mutex_lock(&dev->struct_mutex); ++ drm_gem_object_unreference(obj); ++ mutex_unlock(&dev->struct_mutex); ++ printk(KERN_INFO "[glamo-drm] Failed to allocate object\n"); ++ ++ return NULL; ++} ++ ++ ++int glamo_ioctl_gem_create(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ struct drm_glamo_gem_create *args = data; ++ struct drm_gem_object *obj; ++ int handle, ret, alignment, size; ++ ++ /* Alignment must be a non-zero multiple of 2 */ ++ alignment = args->alignment; ++ if ( alignment < 2 ) alignment = 2; ++ if ( alignment % 2 ) alignment *= 2; ++ ++ /* Size must be similarly sanitised */ ++ size = args->size; ++ if ( size < 2 ) size = 2; ++ if ( size % 2 ) size += 1; ++ ++ /* Create an object */ ++ obj = glamo_gem_object_alloc(dev, size, alignment); ++ if ( obj == NULL ) return -ENOMEM; ++ ++ /* Create a handle for it */ ++ ret = drm_gem_handle_create(file_priv, obj, &handle); ++ mutex_lock(&dev->struct_mutex); ++ drm_gem_object_handle_unreference(obj); ++ mutex_unlock(&dev->struct_mutex); ++ if (ret) goto fail; ++ ++ /* Return */ ++ args->handle = handle; ++ return 0; ++ ++fail: ++ mutex_lock(&dev->struct_mutex); ++ drm_gem_object_unreference(obj); ++ mutex_unlock(&dev->struct_mutex); ++ printk(KERN_INFO "[glamo-drm] Failed to allocate object\n"); ++ return ret; ++} ++ ++ ++int glamodrm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) ++{ ++ struct drm_gem_object *obj = vma->vm_private_data; ++ struct drm_device *dev = obj->dev; ++ struct drm_glamo_gem_object *gobj = obj->driver_private; ++ struct glamodrm_handle *gdrm = dev->dev_private; ++ pgoff_t page_offset; ++ unsigned long pfn; ++ int ret = 0; ++ ++ /* We don't use vmf->pgoff since that has the fake offset */ ++ page_offset = ((unsigned long)vmf->virtual_address - vma->vm_start) >> ++ PAGE_SHIFT; ++ ++ mutex_lock(&dev->struct_mutex); ++ pfn = ((gdrm->vram->start + GLAMO_OFFSET_FB + gobj->block->start) ++ >> PAGE_SHIFT) + page_offset; ++ ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn); ++ mutex_unlock(&dev->struct_mutex); ++ ++ switch (ret) { ++ case -ENOMEM: ++ case -EAGAIN: ++ return VM_FAULT_OOM; ++ case -EFAULT: ++ case -EBUSY: ++ DRM_ERROR("can't insert pfn?? fault or busy...\n"); ++ return VM_FAULT_SIGBUS; ++ default: ++ return VM_FAULT_NOPAGE; ++ } ++} ++ ++ ++static int glamo_gem_create_mmap_offset(struct drm_gem_object *obj) ++{ ++ struct drm_device *dev = obj->dev; ++ struct drm_gem_mm *mm = dev->mm_private; ++ struct drm_glamo_gem_object *gobj = obj->driver_private; ++ struct drm_map_list *list; ++ struct drm_local_map *map; ++ int ret = 0; ++ ++ /* Set the object up for mmap'ing */ ++ list = &obj->map_list; ++ list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL); ++ if (!list->map) ++ return -ENOMEM; ++ ++ map = list->map; ++ map->type = _DRM_GEM; ++ map->size = obj->size; ++ map->handle = obj; ++ ++ /* Get a DRM GEM mmap offset allocated... */ ++ list->file_offset_node = drm_mm_search_free(&mm->offset_manager, ++ obj->size / PAGE_SIZE, 0, 0); ++ if (!list->file_offset_node) { ++ DRM_ERROR("failed to allocate offset for bo %d\n", obj->name); ++ ret = -ENOMEM; ++ goto out_free_list; ++ } ++ ++ list->file_offset_node = drm_mm_get_block(list->file_offset_node, ++ obj->size / PAGE_SIZE, 0); ++ if (!list->file_offset_node) { ++ ret = -ENOMEM; ++ goto out_free_list; ++ } ++ ++ list->hash.key = list->file_offset_node->start; ++ if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) { ++ DRM_ERROR("failed to add to map hash\n"); ++ goto out_free_mm; ++ } ++ ++ /* By now we should be all set, any drm_mmap request on the offset ++ * below will get to our mmap & fault handler */ ++ gobj->mmap_offset = ((uint64_t) list->hash.key) << PAGE_SHIFT; ++ ++ return 0; ++ ++out_free_mm: ++ drm_mm_put_block(list->file_offset_node); ++out_free_list: ++ kfree(list->map); ++ ++ return ret; ++} ++ ++ ++int glamo_ioctl_gem_mmap(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ struct drm_glamo_gem_mmap *args = data; ++ struct drm_gem_object *obj; ++ struct drm_glamo_gem_object *gobj; ++ int ret; ++ ++ obj = drm_gem_object_lookup(dev, file_priv, args->handle); ++ if (obj == NULL) ++ return -EBADF; ++ ++ mutex_lock(&dev->struct_mutex); ++ ++ gobj = obj->driver_private; ++ if (!gobj->mmap_offset) { ++ ret = glamo_gem_create_mmap_offset(obj); ++ if (ret) { ++ mutex_unlock(&dev->struct_mutex); ++ return ret; ++ } ++ } ++ ++ args->offset = gobj->mmap_offset; ++ ++ drm_gem_object_unreference(obj); ++ mutex_unlock(&dev->struct_mutex); ++ ++ return 0; ++} ++ ++ ++int glamo_ioctl_gem_pin(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_gem_pin\n"); ++ return 0; ++} ++ ++ ++int glamo_ioctl_gem_unpin(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_gem_unpin\n"); ++ return 0; ++} ++ ++ ++int glamo_ioctl_gem_pread(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_gem_pread\n"); ++ return 0; ++} ++ ++ ++int glamo_ioctl_gem_pwrite(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_gem_pwrite\n"); ++ return 0; ++} ++ ++ ++int glamodrm_gem_init_object(struct drm_gem_object *obj) ++{ ++ struct drm_glamo_gem_object *gobj; ++ ++ /* Allocate a private structure */ ++ gobj = kzalloc(sizeof(*gobj), GFP_KERNEL); ++ if (!gobj) return -ENOMEM; ++ ++ obj->driver_private = gobj; ++ gobj->obj = obj; ++ ++ return 0; ++} ++ ++ ++void glamodrm_gem_free_object(struct drm_gem_object *obj) ++{ ++ struct drm_glamo_gem_object *gobj; ++ struct drm_map_list *list; ++ struct drm_device *dev; ++ struct drm_gem_mm *mm; ++ struct drm_local_map *map; ++ ++ dev = obj->dev; ++ mm = dev->mm_private; ++ gobj = obj->driver_private; ++ ++ /* Free the VRAM */ ++ if ( gobj->block != NULL ) { ++ drm_mm_put_block(gobj->block); ++ } ++ ++ /* Release mappings */ ++ list = &obj->map_list; ++ drm_ht_remove_item(&mm->offset_hash, &list->hash); ++ if (list->file_offset_node) { ++ drm_mm_put_block(list->file_offset_node); ++ list->file_offset_node = NULL; ++ } ++ map = list->map; ++ if (map) { ++ kfree(map); ++ list->map = NULL; ++ } ++ ++ /* Free the private structure */ ++ kfree(obj->driver_private); ++} ++ ++ ++/* Memory management initialisation */ ++int glamo_buffer_init(struct glamodrm_handle *gdrm) ++{ ++ gdrm->mmgr = kzalloc(sizeof(struct drm_mm), GFP_KERNEL); ++ drm_mm_init(gdrm->mmgr, 0, gdrm->vram_size); ++ ++ /* Reserve a scratch buffer. We do this outside the protections ++ * of the other GEM code. To do this safely, the allocation must ++ * be a multiple of PAGE_SIZE. */ ++ gdrm->scratch = drm_mm_search_free(gdrm->mmgr, PAGE_SIZE, 4, 1); ++ if ( gdrm->scratch ) { ++ gdrm->scratch = drm_mm_get_block(gdrm->scratch, PAGE_SIZE, 4); ++ } ++ if ( !gdrm->scratch ) { ++ printk(KERN_WARNING "[glamo-drm] Couldn't allocate" ++ " scratch buffer!\n"); ++ } ++ ++ return 0; ++} ++ ++ ++/* Memory management finalisation */ ++int glamo_buffer_final(struct glamodrm_handle *gdrm) ++{ ++ drm_mm_takedown(gdrm->mmgr); ++ kfree(gdrm->mmgr); ++ return 0; ++} +diff --git a/drivers/mfd/glamo/glamo-buffer.h b/drivers/mfd/glamo/glamo-buffer.h +new file mode 100644 +index 0000000..41f18fd +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-buffer.h +@@ -0,0 +1,60 @@ ++/* ++ * SMedia Glamo 336x/337x memory management ++ * ++ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#ifndef __GLAMO_BUFFER_H ++#define __GLAMO_BUFFER_H ++ ++#include <drm/drmP.h> ++ ++#include "glamo-drm-private.h" ++ ++extern int glamo_buffer_init(struct glamodrm_handle *gdrm); ++extern int glamo_buffer_final(struct glamodrm_handle *gdrm); ++ ++extern int glamodrm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf); ++ ++extern int glamodrm_gem_init_object(struct drm_gem_object *obj); ++ ++extern void glamodrm_gem_free_object(struct drm_gem_object *obj); ++ ++extern struct drm_gem_object *glamo_gem_object_alloc(struct drm_device *dev, ++ int size, int alignment); ++ ++extern int glamo_ioctl_gem_create(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++extern int glamo_ioctl_gem_mmap(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++extern int glamo_ioctl_gem_pin(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++extern int glamo_ioctl_gem_unpin(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++extern int glamo_ioctl_gem_pread(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++extern int glamo_ioctl_gem_pwrite(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++#endif /* __GLAMO_BUFFER_H */ +diff --git a/drivers/mfd/glamo/glamo-cmdq.c b/drivers/mfd/glamo/glamo-cmdq.c +new file mode 100644 +index 0000000..caedc27 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-cmdq.c +@@ -0,0 +1,528 @@ ++/* ++ * SMedia Glamo 336x/337x command queue handling ++ * ++ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com> ++ * Based on xf86-video-glamo (see below for details) ++ * ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * Command queue handling functions based on those from xf86-video-glamo, to ++ * which the following licence applies: ++ * ++ * Copyright 2007 OpenMoko, Inc. ++ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * This driver is based on Xati, ++ * Copyright 2004 Eric Anholt ++ * ++ * Permission to use, copy, modify, distribute, and sell this software and its ++ * documentation for any purpose is hereby granted without fee, provided that ++ * the above copyright notice appear in all copies and that both that copyright ++ * notice and this permission notice appear in supporting documentation, and ++ * that the name of the copyright holders not be used in advertising or ++ * publicity pertaining to distribution of the software without specific, ++ * written prior permission. The copyright holders make no representations ++ * about the suitability of this software for any purpose. It is provided "as ++ * is" without express or implied warranty. ++ * ++ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, ++ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO ++ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR ++ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, ++ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER ++ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE ++ * OF THIS SOFTWARE. ++ */ ++ ++ ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++ ++#include "glamo-core.h" ++#include "glamo-drm-private.h" ++#include "glamo-regs.h" ++ ++ ++static inline void reg_write(struct glamodrm_handle *gdrm, ++ u_int16_t reg, u_int16_t val) ++{ ++ iowrite16(val, gdrm->reg_base + reg); ++} ++ ++ ++static inline u16 reg_read(struct glamodrm_handle *gdrm, u_int16_t reg) ++{ ++ return ioread16(gdrm->reg_base + reg); ++} ++ ++ ++static u32 glamo_get_read(struct glamodrm_handle *gdrm) ++{ ++ /* we could turn off clock here */ ++ u32 ring_read = reg_read(gdrm, GLAMO_REG_CMDQ_READ_ADDRL); ++ ring_read |= (reg_read(gdrm, GLAMO_REG_CMDQ_READ_ADDRH) & 0x7) << 16; ++ ++ return ring_read; ++} ++ ++ ++static u32 glamo_get_write(struct glamodrm_handle *gdrm) ++{ ++ u32 ring_write = reg_read(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL); ++ ring_write |= (reg_read(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH) & 0x7) << 16; ++ ++ return ring_write; ++} ++ ++ ++/* Add commands to the ring buffer */ ++int glamo_add_to_ring(struct glamodrm_handle *gdrm, u16 *addr, ++ unsigned int count) ++{ ++ size_t ring_write, ring_read; ++ size_t new_ring_write; ++ ++ if ( count >= GLAMO_CMDQ_SIZE ) { ++ printk(KERN_WARNING "[glamo-drm] CmdQ submission too large\n"); ++ return -EINVAL; ++ } ++ ++ down(&gdrm->add_to_ring); ++ ++ ring_write = glamo_get_write(gdrm); ++ ++ /* Calculate where we'll end up */ ++ new_ring_write = (ring_write + count) % GLAMO_CMDQ_SIZE; ++ ++ /* Wait until there is enough space to queue the cmd buffer */ ++ if (new_ring_write > ring_write) { ++ /* Loop while the read pointer is between the old and new ++ * positions */ ++ do { ++ ring_read = glamo_get_read(gdrm); ++ } while (ring_read > ring_write && ring_read < new_ring_write); ++ } else { ++ /* Same, but kind of inside-out */ ++ do { ++ ring_read = glamo_get_read(gdrm); ++ } while (ring_read > ring_write || ring_read < new_ring_write); ++ } ++ ++ /* Are we about to wrap around? */ ++ if (ring_write >= new_ring_write) { ++ ++ u32 rest_size; ++ ++ /* Wrap around */ ++ rest_size = GLAMO_CMDQ_SIZE - ring_write; /* Space left */ ++ ++ /* Write from current position to end */ ++ memcpy_toio(gdrm->cmdq_base+ring_write, addr, rest_size); ++ ++ /* Write from start */ ++ memcpy_toio(gdrm->cmdq_base, addr+(rest_size>>1), ++ count - rest_size); ++ ++ /* ring_write being 0 will result in a deadlock because the ++ * cmdq read will never stop. To avoid such an behaviour insert ++ * an empty instruction. */ ++ if (new_ring_write == 0) { ++ iowrite16(0x0000, gdrm->cmdq_base); ++ iowrite16(0x0000, gdrm->cmdq_base + 2); ++ new_ring_write = 4; ++ } ++ ++ } else { ++ ++ memcpy_toio(gdrm->cmdq_base+ring_write, addr, count); ++ ++ } ++ ++ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH, ++ (new_ring_write >> 16) & 0x7f); ++ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL, ++ new_ring_write & 0xffff); ++ ++ if ( !(reg_read(gdrm, GLAMO_REG_CMDQ_STATUS) & 1<<3) ) { ++ printk(KERN_ERR "[glamo-drm] CmdQ decode failure.\n"); ++ } ++ ++ up(&gdrm->add_to_ring); ++ ++ return 0; ++} ++ ++ ++/* Return true for a legal sequence of commands, otherwise false */ ++static int glamo_sanitize_buffer(u16 *cmds, unsigned int count) ++{ ++ /* XXX FIXME TODO: Implementation... */ ++ return 1; ++} ++ ++ ++/* Substitute the real addresses in VRAM for any required buffer objects */ ++static int glamo_do_relocation(struct glamodrm_handle *gdrm, ++ drm_glamo_cmd_buffer_t *cbuf, u16 *cmds, ++ struct drm_device *dev, ++ struct drm_file *file_priv) ++{ ++ u32 *handles; ++ int *offsets; ++ int nobjs = cbuf->nobjs; ++ int i; ++ ++ if ( nobjs > 32 ) return -EINVAL; /* Get real... */ ++ ++ handles = kmalloc(nobjs*sizeof(u32), GFP_KERNEL); ++ if ( handles == NULL ) return -1; ++ if ( copy_from_user(handles, cbuf->objs, nobjs*sizeof(u32)) ) ++ return -1; ++ ++ offsets = kmalloc(nobjs*sizeof(int), GFP_KERNEL); ++ if ( offsets == NULL ) return -1; ++ if ( copy_from_user(offsets, cbuf->obj_pos, nobjs*sizeof(int)) ) ++ return -1; ++ ++ for ( i=0; i<nobjs; i++ ) { ++ ++ u32 handle = handles[i]; ++ int offset = offsets[i]; ++ struct drm_gem_object *obj; ++ struct drm_glamo_gem_object *gobj; ++ u32 addr; ++ u16 addr_low, addr_high; ++ ++ if ( offset > cbuf->bufsz ) { ++ printk(KERN_WARNING "[glamo-drm] Offset out of range" ++ " for this relocation!\n"); ++ goto fail; ++ } ++ ++ obj = drm_gem_object_lookup(dev, file_priv, handle); ++ if ( obj == NULL ) return -1; ++ ++ /* Unref the object now, or it'll never get freed. ++ * This should really happen after the GPU has finished ++ * the commands which are about to be submitted. */ ++ drm_gem_object_unreference(obj); ++ ++ gobj = obj->driver_private; ++ if ( gobj == NULL ) { ++ printk(KERN_WARNING "[glamo-drm] This object has no" ++ " private data!\n"); ++ goto fail; ++ } ++ ++ addr = GLAMO_OFFSET_FB + gobj->block->start; ++ addr_low = addr & 0xffff; ++ addr_high = (addr >> 16) & 0x7f; ++ ++ /* FIXME: Should really check that the register is a ++ * valid one for this relocation. */ ++ ++ *(cmds+(offset/2)+1) = addr_low; ++ *(cmds+(offset/2)+3) = addr_high; ++ ++ } ++ ++ kfree(handles); ++ kfree(offsets); ++ return 0; ++ ++fail: ++ kfree(handles); ++ kfree(offsets); ++ return -1; ++} ++ ++ ++/* This is DRM_IOCTL_GLAMO_CMDBUF */ ++int glamo_ioctl_cmdbuf(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ int ret = 0; ++ struct glamodrm_handle *gdrm; ++ unsigned int count; ++ drm_glamo_cmd_buffer_t *cbuf = data; ++ u16 *cmds; ++ ++ gdrm = dev->dev_private; ++ ++ count = cbuf->bufsz; ++ ++ if ( count > PAGE_SIZE ) return -EINVAL; ++ ++ cmds = kmalloc(count, GFP_KERNEL); ++ if ( cmds == NULL ) return -ENOMEM; ++ if ( copy_from_user(cmds, cbuf->buf, count) ) { ++ printk(KERN_WARNING "[glamo-drm] copy from user failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ ++ /* Check the buffer isn't going to tell Glamo to enact naughtiness */ ++ if ( !glamo_sanitize_buffer(cmds, count) ) { ++ printk(KERN_WARNING "[glamo-drm] sanitize buffer failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ ++ /* Perform relocation, if necessary */ ++ if ( cbuf->nobjs ) { ++ if ( glamo_do_relocation(gdrm, cbuf, cmds, dev, file_priv) ) ++ { ++ printk(KERN_WARNING "[glamo-drm] Relocation failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ } ++ ++ glamo_add_to_ring(gdrm, cmds, count); ++ ++cleanup: ++ kfree(cmds); ++ ++ return ret; ++} ++ ++ ++/* Return true for a legal sequence of commands, otherwise false */ ++static int glamo_sanitize_burst(u16 base, u16 *cmds, unsigned int count) ++{ ++ /* XXX FIXME TODO: Implementation... */ ++ return 1; ++} ++ ++ ++static int glamo_relocate_burst(struct glamodrm_handle *gdrm, ++ drm_glamo_cmd_burst_t *cbuf, u16 *data, ++ struct drm_device *dev, ++ struct drm_file *file_priv) ++{ ++ u32 *handles; ++ int *offsets; ++ int nobjs = cbuf->nobjs; ++ int i; ++ ++ if ( nobjs > 32 ) return -EINVAL; /* Get real... */ ++ ++ handles = kmalloc(nobjs*sizeof(u32), GFP_KERNEL); ++ if ( handles == NULL ) return -1; ++ if ( copy_from_user(handles, cbuf->objs, nobjs*sizeof(u32)) ) ++ return -1; ++ ++ offsets = kmalloc(nobjs*sizeof(int), GFP_KERNEL); ++ if ( offsets == NULL ) return -1; ++ if ( copy_from_user(offsets, cbuf->obj_pos, nobjs*sizeof(int)) ) ++ return -1; ++ ++ for ( i=0; i<nobjs; i++ ) { ++ ++ u32 handle = handles[i]; ++ int offset = offsets[i]; ++ struct drm_gem_object *obj; ++ struct drm_glamo_gem_object *gobj; ++ u32 addr; ++ u16 addr_low, addr_high; ++ ++ if ( offset > cbuf->bufsz ) { ++ printk(KERN_WARNING "[glamo-drm] Offset out of range" ++ " for this relocation!\n"); ++ goto fail; ++ } ++ ++ obj = drm_gem_object_lookup(dev, file_priv, handle); ++ if ( obj == NULL ) return -1; ++ ++ /* Unref the object now, or it'll never get freed. ++ * FIXME: This should really happen after the GPU has ++ * finished executing these commands. */ ++ drm_gem_object_unreference(obj); ++ ++ gobj = obj->driver_private; ++ if ( gobj == NULL ) { ++ printk(KERN_WARNING "[glamo-drm] This object has no" ++ " private data!\n"); ++ goto fail; ++ } ++ ++ addr = GLAMO_OFFSET_FB + gobj->block->start; ++ addr_low = addr & 0xffff; ++ addr_high = (addr >> 16) & 0x7f; ++ ++ /* FIXME: Should really check that the register is a ++ * valid one for this relocation. */ ++ ++ *(data+(offset/2)+0) = addr_low; ++ *(data+(offset/2)+1) = addr_high; ++ ++ } ++ ++ kfree(handles); ++ kfree(offsets); ++ return 0; ++ ++fail: ++ kfree(handles); ++ kfree(offsets); ++ return -1; ++} ++ ++ ++/* This is DRM_IOCTL_GLAMO_CMDBURST */ ++int glamo_ioctl_cmdburst(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ int ret = 0; ++ struct glamodrm_handle *gdrm; ++ drm_glamo_cmd_burst_t *cbuf = data; ++ u16 *burst; ++ size_t burst_size; ++ size_t data_size; ++ ++ gdrm = dev->dev_private; ++ ++ data_size = cbuf->bufsz; ++ if ( data_size % 4 ) data_size += 2; ++ if ( data_size % 4 ) return -EINVAL; ++ burst_size = data_size + 4; /* Add space for header */ ++ if ( burst_size > PAGE_SIZE ) return -EINVAL; ++ ++ burst = kmalloc(burst_size, GFP_KERNEL); ++ if ( burst == NULL ) return -ENOMEM; ++ ++ /* Get data from userspace */ ++ if ( copy_from_user(burst+2, cbuf->data, cbuf->bufsz) ) { ++ printk(KERN_WARNING "[glamo-drm] copy from user failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ ++ /* Sanitise */ ++ if ( !glamo_sanitize_burst(cbuf->base, burst+2, cbuf->bufsz) ) { ++ printk(KERN_WARNING "[glamo-drm] sanitize buffer failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ ++ /* Relocate */ ++ if ( cbuf->nobjs ) { ++ if ( glamo_relocate_burst(gdrm, cbuf, burst+2, dev, file_priv) ) ++ { ++ printk(KERN_WARNING "[glamo-drm] Relocation failed\n"); ++ ret = -EINVAL; ++ goto cleanup; ++ } ++ } ++ ++ /* Add burst header */ ++ burst[0] = 1<<15 | cbuf->base; ++ burst[1] = data_size / 2; /* -> 2-byte words */ ++ if ( burst[1] & 0x01 ) { ++ printk(KERN_CRIT "Burst not aligned!\n"); ++ goto cleanup; ++ } ++ ++ /* Zero-pad if necessary */ ++ if ( data_size % 4 ) { ++ burst[burst_size-1] = 0x0000; ++ } ++ ++ /* Add to command queue */ ++ glamo_add_to_ring(gdrm, burst, burst_size); ++ ++cleanup: ++ kfree(burst); ++ ++ return ret; ++} ++ ++ ++int glamo_cmdq_init(struct glamodrm_handle *gdrm) ++{ ++ unsigned int i; ++ ++ init_MUTEX(&gdrm->add_to_ring); ++ ++ /* Enable 2D and 3D */ ++ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_2D); ++ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_2D); ++ ++ /* Start by zeroing the command queue memory */ ++ for ( i=0; i<GLAMO_CMDQ_SIZE; i+=2 ) { ++ iowrite16(0x0000, gdrm->cmdq_base+i); ++ } ++ ++ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_CMDQ); ++ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_CMDQ); ++ ++ /* Set up command queue location */ ++ reg_write(gdrm, GLAMO_REG_CMDQ_BASE_ADDRL, ++ GLAMO_OFFSET_CMDQ & 0xffff); ++ reg_write(gdrm, GLAMO_REG_CMDQ_BASE_ADDRH, ++ (GLAMO_OFFSET_CMDQ >> 16) & 0x7f); ++ ++ /* Length of command queue in 1k blocks, minus one */ ++ reg_write(gdrm, GLAMO_REG_CMDQ_LEN, (GLAMO_CMDQ_SIZE >> 10)-1); ++ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRH, 0); ++ reg_write(gdrm, GLAMO_REG_CMDQ_WRITE_ADDRL, 0); ++ reg_write(gdrm, GLAMO_REG_CMDQ_CONTROL, ++ 1 << 12 | /* Turbo flip (?) */ ++ 5 << 8 | /* no interrupt */ ++ 8 << 4); /* HQ threshold */ ++ ++ return 0; ++} ++ ++ ++int glamo_cmdq_shutdown(struct glamodrm_handle *gdrm) ++{ ++ return 0; ++} ++ ++ ++void glamo_cmdq_suspend(struct glamodrm_handle *gdrm) ++{ ++ /* Placeholder... */ ++} ++ ++ ++void glamo_cmdq_resume(struct glamodrm_handle *gdrm) ++{ ++ glamo_cmdq_init(gdrm); ++} ++ ++ ++/* Initialise an object's contents to zero. ++ * This is in glamo-cmdq.c in the hope that we can accelerate it later. */ ++void glamo_cmdq_blank(struct glamodrm_handle *gdrm, struct drm_gem_object *obj) ++{ ++ char __iomem *cookie; ++ struct drm_glamo_gem_object *gobj; ++ int i; ++ ++ gobj = obj->driver_private; ++ ++ cookie = ioremap(gdrm->vram->start + gobj->block->start, obj->size); ++ for ( i=0; i<obj->size; i+=2 ) { ++ iowrite16(0, cookie+i); ++ } ++ iounmap(cookie); ++} +diff --git a/drivers/mfd/glamo/glamo-cmdq.h b/drivers/mfd/glamo/glamo-cmdq.h +new file mode 100644 +index 0000000..510d195 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-cmdq.h +@@ -0,0 +1,49 @@ ++/* Smedia Glamo 336x/337x command queue handling ++ * ++ * Copyright (c) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * Copyright (c) 2009 Andreas Pokorny <andreas.pokorny@gmail.com> ++ * Based on xf86-video-glamo ++ * Copyright 2007 OpenMoko, Inc. ++ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __GLAMO_CMDQ_H ++#define __GLAMO_CMDQ_H ++ ++#include <drm/drmP.h> ++ ++#include "glamo-drm-private.h" ++ ++extern int glamo_ioctl_cmdbuf(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++extern int glamo_ioctl_cmdburst(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++extern void glamo_cmdq_blank(struct glamodrm_handle *gdrm, ++ struct drm_gem_object *obj); ++ ++extern int glamo_cmdq_init(struct glamodrm_handle *gdrm); ++extern int glamo_cmdq_shutdown(struct glamodrm_handle *gdrm); ++extern void glamo_cmdq_suspend(struct glamodrm_handle *gdrm); ++extern void glamo_cmdq_resume(struct glamodrm_handle *gdrm); ++ ++extern int glamo_add_to_ring(struct glamodrm_handle *gdrm, u16 *addr, ++ unsigned int count); ++ ++#endif /* __GLAMO_CMDQ_H */ +diff --git a/drivers/mfd/glamo/glamo-display.c b/drivers/mfd/glamo/glamo-display.c +new file mode 100644 +index 0000000..93aa917 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-display.c +@@ -0,0 +1,875 @@ ++/* ++ * SMedia Glamo 336x/337x display ++ * ++ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc. ++ * Author: Harald Welte <laforge@openmoko.org> ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * ++ * Based on intel_display.c and intel_crt.c from drivers/gpu/drm/i915 ++ * to which the following licence applies: ++ * ++ * Copyright © 2006-2007 Intel Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: ++ * Eric Anholt <eric@anholt.net> ++ * ++ */ ++ ++#define DEBUG 1 ++ ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++#include <drm/drm_crtc_helper.h> ++#include <drm/drm_crtc.h> ++ ++#include "glamo-core.h" ++#include "glamo-drm-private.h" ++#include "glamo-regs.h" ++#include "glamo-kms-fb.h" ++#include "glamo-display.h" ++#include <linux/glamofb.h> ++ ++ ++#define GLAMO_LCD_WIDTH_MASK 0x03FF ++#define GLAMO_LCD_HEIGHT_MASK 0x03FF ++#define GLAMO_LCD_PITCH_MASK 0x07FE ++#define GLAMO_LCD_HV_TOTAL_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_START_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_END_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF ++#define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF ++ ++ ++struct glamofb_par { ++ struct drm_device *dev; ++ struct drm_display_mode *our_mode; ++ struct glamo_framebuffer *glamo_fb; ++ int crtc_count; ++ /* crtc currently bound to this */ ++ uint32_t crtc_ids[2]; ++}; ++ ++ ++static int reg_read_lcd(struct glamodrm_handle *gdrm, u_int16_t reg) ++{ ++ int i = 0; ++ ++ for (i = 0; i != 2; i++) ++ nop(); ++ ++ return ioread16(gdrm->lcd_base + reg); ++} ++ ++ ++static void reg_write_lcd(struct glamodrm_handle *gdrm, ++ u_int16_t reg, u_int16_t val) ++{ ++ int i = 0; ++ ++ for (i = 0; i != 2; i++) ++ nop(); ++ ++ iowrite16(val, gdrm->lcd_base + reg); ++} ++ ++ ++static void reg_set_bit_mask_lcd(struct glamodrm_handle *gdrm, ++ u_int16_t reg, u_int16_t mask, ++ u_int16_t val) ++{ ++ u_int16_t tmp; ++ ++ val &= mask; ++ ++ tmp = reg_read_lcd(gdrm, reg); ++ tmp &= ~mask; ++ tmp |= val; ++ reg_write_lcd(gdrm, reg, tmp); ++} ++ ++ ++/* Note that this has nothing at all to do with the engine command queue ++ * in glamo-cmdq.c */ ++static inline int glamo_lcd_cmdq_empty(struct glamodrm_handle *gdrm) ++{ ++ /* DGCMdQempty -- 1 == command queue is empty */ ++ return reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS1) & (1 << 15); ++} ++ ++ ++/* call holding gfb->lock_cmd when locking, until you unlock */ ++int glamo_lcd_cmd_mode(struct glamodrm_handle *gdrm, int on) ++{ ++ int timeout = 2000000; ++ ++ dev_dbg(gdrm->dev, "glamofb_cmd_mode(on=%d)\n", on); ++ if (on) { ++ ++ while ((!glamo_lcd_cmdq_empty(gdrm)) && (timeout--)) ++ /* yield() */; ++ if (timeout < 0) { ++ printk(KERN_ERR "*************" ++ " LCD command queue never got empty " ++ "*************\n"); ++ return -EIO; ++ } ++ ++ /* display the entire frame then switch to command */ ++ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_FIRE_VSYNC); ++ ++ /* wait until lcd idle */ ++ timeout = 2000000; ++ while ((!reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS2) & (1 << 12)) ++ && (timeout--)) ++ /* yield() */; ++ if (timeout < 0) { ++ printk(KERN_ERR"*************" ++ " LCD never idle " ++ "*************\n"); ++ return -EIO; ++ } ++ ++ mdelay(100); ++ ++ } else { ++ /* RGB interface needs vsync/hsync */ ++ int mode; ++ mode = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3); ++ if ( mode & GLAMO_LCD_MODE3_RGB) ++ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_DISP_SYNC); ++ ++ reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1, ++ GLAMO_LCD_CMD_TYPE_DISP | ++ GLAMO_LCD_CMD_DATA_DISP_FIRE); ++ } ++ ++ return 0; ++} ++ ++ ++static struct glamo_script lcd_init_script[] = { ++ { GLAMO_REG_LCD_MODE1, 0x0020 }, ++ /* no display rotation, no hardware cursor, no dither, no gamma, ++ * no retrace flip, vsync low-active, hsync low active, ++ * no TVCLK, no partial display, hw dest color from fb, ++ * no partial display mode, LCD1, software flip, */ ++ { GLAMO_REG_LCD_MODE2, 0x9020 }, ++ /* video flip, no ptr, no ptr, dhclk off, ++ * normal mode, no cpuif, ++ * res, serial msb first, single fb, no fr ctrl, ++ * cpu if bits all zero, no crc ++ * 0000 0000 0010 0000 */ ++ { GLAMO_REG_LCD_MODE3, 0x0b40 }, ++ /* src data rgb565, res, 18bit rgb666 ++ * 000 01 011 0100 0000 */ ++ { GLAMO_REG_LCD_POLARITY, 0x440c }, ++ /* DE high active, no cpu/lcd if, cs0 force low, a0 low active, ++ * np cpu if, 9bit serial data, sclk rising edge latch data ++ * 01 00 0 100 0 000 01 0 0 */ ++ /* The following values assume 640*480@16bpp */ ++ /* FIXME: fb0 has not yet been allocated! */ ++ { GLAMO_REG_LCD_A_BASE1, PAGE_SIZE }, /* display A base address 15:0 */ ++ { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */ ++ { GLAMO_REG_LCD_B_BASE1, 0x6000 }, /* display B base address 15:0 */ ++ { GLAMO_REG_LCD_B_BASE2, 0x0009 }, /* display B base address 22:16 */ ++ { GLAMO_REG_LCD_CURSOR_BASE1, 0xC000 }, /* cursor base address 15:0 */ ++ { GLAMO_REG_LCD_CURSOR_BASE2, 0x0012 }, /* cursor base address 22:16 */ ++ { GLAMO_REG_LCD_COMMAND2, 0x0000 }, /* display page A */ ++}; ++ ++ ++static int glamo_run_lcd_script(struct glamodrm_handle *gdrm, ++ struct glamo_script *script, int len) ++{ ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ struct glamo_script *line = &script[i]; ++ ++ if (line->reg == 0xffff) ++ return 0; ++ else if (line->reg == 0xfffe) ++ msleep(line->val); ++ else ++ reg_write_lcd(gdrm, script[i].reg, script[i].val); ++ } ++ ++ return 0; ++} ++ ++ ++extern void jbt6k74_action(int val); ++ ++/* Power on/off */ ++static void glamo_crtc_dpms(struct drm_crtc *crtc, int mode) ++{ ++} ++ ++ ++static bool glamo_crtc_mode_fixup(struct drm_crtc *crtc, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++ return true; ++} ++ ++ ++static int glamo_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, ++ struct drm_framebuffer *old_fb) ++{ ++ struct glamodrm_handle *gdrm; ++ struct glamo_crtc *gcrtc; ++ struct glamo_framebuffer *gfb; ++ struct drm_gem_object *obj; ++ struct drm_glamo_gem_object *gobj; ++ u32 addr; ++ u16 addr_low, addr_high; ++ ++ if (!crtc->fb) { ++ DRM_DEBUG("No FB bound\n"); ++ return -EINVAL; ++ } ++ ++ /* Dig out our handle */ ++ gcrtc = to_glamo_crtc(crtc); ++ gdrm = gcrtc->gdrm; /* Here it is! */ ++ ++ gfb = to_glamo_framebuffer(crtc->fb); ++ obj = gfb->obj; ++ gobj = obj->driver_private; ++ ++ addr = GLAMO_OFFSET_FB + gobj->block->start; ++ addr_low = addr & 0xffff; ++ addr_high = ((addr >> 16) & 0x7f) | 0x4000; ++ ++ glamo_lcd_cmd_mode(gdrm, 1); ++ reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE1, addr_low); ++ reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE2, addr_high); ++ glamo_lcd_cmd_mode(gdrm, 0); ++ ++ return 0; ++} ++ ++ ++static int glamo_crtc_mode_set(struct drm_crtc *crtc, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode, ++ int x, int y, ++ struct drm_framebuffer *old_fb) ++{ ++ struct glamodrm_handle *gdrm; ++ struct glamo_crtc *gcrtc; ++ int retr_start, retr_end, disp_start, disp_end; ++ ++ /* Dig out our handle */ ++ gcrtc = to_glamo_crtc(crtc); ++ gdrm = gcrtc->gdrm; /* Here it is! */ ++ ++ glamo_lcd_cmd_mode(gdrm, 1); ++ ++ glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD, mode->clock); ++ gdrm->saved_clock = mode->clock; ++ ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH, ++ GLAMO_LCD_WIDTH_MASK, mode->hdisplay); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT, ++ GLAMO_LCD_HEIGHT_MASK, mode->vdisplay); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH, ++ GLAMO_LCD_PITCH_MASK, mode->hdisplay*2); ++ ++ /* Convert "X modeline timings" into "Glamo timings" */ ++ retr_start = 0; ++ retr_end = retr_start + mode->hsync_end - mode->hsync_start; ++ disp_start = mode->htotal - mode->hsync_start; ++ disp_end = disp_start + mode->hdisplay; ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, mode->htotal); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, retr_start); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, retr_end); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp_start); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end); ++ ++ /* The same in the vertical direction */ ++ retr_start = 0; ++ retr_end = retr_start + mode->vsync_end - mode->vsync_start; ++ disp_start = mode->vtotal - mode->vsync_start; ++ disp_end = disp_start + mode->vdisplay; ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, retr_start); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, retr_end); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, disp_start); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end); ++ ++ glamo_lcd_cmd_mode(gdrm, 0); ++ ++ glamo_crtc_mode_set_base(crtc, 0, 0, old_fb); ++ ++ return 0; ++} ++ ++ ++static void glamo_crtc_prepare(struct drm_crtc *crtc) ++{ ++} ++ ++ ++static void glamo_crtc_commit(struct drm_crtc *crtc) ++{ ++} ++ ++ ++static int glamo_crtc_cursor_set(struct drm_crtc *crtc, ++ struct drm_file *file_priv, ++ uint32_t handle, ++ uint32_t width, uint32_t height) ++{ ++ return 0; ++} ++ ++ ++static int glamo_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) ++{ ++ return 0; ++} ++ ++ ++static void glamo_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, ++ u16 *blue, uint32_t size) ++{ ++} ++ ++ ++static void glamo_crtc_destroy(struct drm_crtc *crtc) ++{ ++ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc); ++ drm_crtc_cleanup(crtc); ++ kfree(glamo_crtc); ++} ++ ++ ++static enum drm_connector_status ++glamo_connector_detect(struct drm_connector *connector) ++{ ++ /* One hopes it hasn't been de-soldered... */ ++ return connector_status_connected; ++} ++ ++ ++static void glamo_connector_destroy(struct drm_connector *connector) ++{ ++ drm_sysfs_connector_remove(connector); ++ drm_connector_cleanup(connector); ++ kfree(connector); ++} ++ ++ ++static int glamo_connector_get_modes(struct drm_connector *connector) ++{ ++ struct drm_display_mode *mode; ++ struct glamo_fb_platform_data *fb_info; ++ struct glamo_output *goutput = to_glamo_output(connector); ++ struct glamodrm_handle *gdrm = goutput->gdrm; ++ ++ /* Dig out the record which will tell us about the hardware */ ++ fb_info = gdrm->glamo_core->pdata->fb_data; ++ ++ mode = drm_mode_create(connector->dev); ++ if (!mode) ++ return 0; ++ /* Fill in 'mode' here */ ++ mode->type = DRM_MODE_TYPE_DEFAULT | DRM_MODE_TYPE_PREFERRED; ++ ++ /* Convert framebuffer timings into KMS timings */ ++ mode->clock = 1000000000UL / fb_info->modes[0].pixclock; /* ps -> kHz */ ++ mode->clock *= 1000; /* kHz -> Hz */ ++ mode->hdisplay = fb_info->modes[0].xres; ++ mode->hsync_start = fb_info->modes[0].right_margin + mode->hdisplay; ++ mode->hsync_end = mode->hsync_start + fb_info->modes[0].hsync_len; ++ mode->htotal = mode->hsync_end + fb_info->modes[0].left_margin; ++ mode->hskew = 0; ++ ++ mode->vdisplay = fb_info->modes[0].yres; ++ mode->vsync_start = fb_info->modes[0].lower_margin + mode->vdisplay; ++ mode->vsync_end = mode->vsync_start + fb_info->modes[0].vsync_len; ++ mode->vtotal = mode->vsync_end + fb_info->modes[0].upper_margin; ++ mode->vscan = 0; ++ ++ /* Physical size */ ++ mode->width_mm = fb_info->width; ++ mode->height_mm = fb_info->height; ++ ++ drm_mode_set_name(mode); ++ drm_mode_probed_add(connector, mode); ++ ++ return 1; /* one mode, for now */ ++} ++ ++ ++static int glamo_connector_set_property(struct drm_connector *connector, ++ struct drm_property *property, ++ uint64_t value) ++{ ++ return 0; ++} ++ ++ ++static int glamo_connector_mode_valid(struct drm_connector *connector, ++ struct drm_display_mode *mode) ++{ ++ if (mode->flags & DRM_MODE_FLAG_DBLSCAN) ++ return MODE_NO_DBLESCAN; ++ ++ return MODE_OK; ++} ++ ++ ++struct drm_encoder * ++glamo_connector_best_encoder(struct drm_connector *connector) ++{ ++ struct glamo_output *glamo_output = to_glamo_output(connector); ++ return &glamo_output->enc; ++} ++ ++ ++static void glamo_encoder_dpms(struct drm_encoder *encoder, int mode) ++{ ++} ++ ++ ++static bool glamo_encoder_mode_fixup(struct drm_encoder *encoder, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++ return true; ++} ++ ++ ++void glamo_encoder_prepare(struct drm_encoder *encoder) ++{ ++} ++ ++ ++void glamo_encoder_commit(struct drm_encoder *encoder) ++{ ++} ++ ++ ++static void glamo_encoder_mode_set(struct drm_encoder *encoder, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++} ++ ++ ++static void glamo_encoder_destroy(struct drm_encoder *encoder) ++{ ++ drm_encoder_cleanup(encoder); ++} ++ ++ ++static void glamo_framebuffer_destroy(struct drm_framebuffer *fb) ++{ ++ struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb); ++ struct drm_device *dev = fb->dev; ++ ++ drm_framebuffer_cleanup(fb); ++ mutex_lock(&dev->struct_mutex); ++ drm_gem_object_unreference(glamo_fb->obj); ++ mutex_unlock(&dev->struct_mutex); ++ ++ kfree(glamo_fb); ++} ++ ++static int glamo_framebuffer_create_handle(struct drm_framebuffer *fb, ++ struct drm_file *file_priv, ++ unsigned int *handle) ++{ ++ struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb); ++ struct drm_gem_object *object = glamo_fb->obj; ++ ++ return drm_gem_handle_create(file_priv, object, handle); ++} ++ ++ ++static const struct drm_framebuffer_funcs glamo_fb_funcs = { ++ .destroy = glamo_framebuffer_destroy, ++ .create_handle = glamo_framebuffer_create_handle, ++}; ++ ++ ++int glamo_framebuffer_create(struct drm_device *dev, ++ struct drm_mode_fb_cmd *mode_cmd, ++ struct drm_framebuffer **fb, ++ struct drm_gem_object *obj) ++{ ++ struct glamo_framebuffer *glamo_fb; ++ int ret; ++ ++ glamo_fb = kzalloc(sizeof(*glamo_fb), GFP_KERNEL); ++ if (!glamo_fb) ++ return -ENOMEM; ++ ++ ret = drm_framebuffer_init(dev, &glamo_fb->base, &glamo_fb_funcs); ++ if (ret) { ++ DRM_ERROR("framebuffer init failed %d\n", ret); ++ return ret; ++ } ++ ++ drm_helper_mode_fill_fb_struct(&glamo_fb->base, mode_cmd); ++ ++ glamo_fb->obj = obj; ++ ++ *fb = &glamo_fb->base; ++ ++ return 0; ++} ++ ++ ++static struct drm_framebuffer * ++glamo_user_framebuffer_create(struct drm_device *dev, ++ struct drm_file *filp, ++ struct drm_mode_fb_cmd *mode_cmd) ++{ ++ struct drm_gem_object *obj; ++ struct drm_framebuffer *fb; ++ int ret; ++ ++ obj = drm_gem_object_lookup(dev, filp, mode_cmd->handle); ++ if (!obj) ++ return NULL; ++ ++ ret = glamo_framebuffer_create(dev, mode_cmd, &fb, obj); ++ if (ret) { ++ drm_gem_object_unreference(obj); ++ return NULL; ++ } ++ ++ return fb; ++} ++ ++ ++int glamo_fbchanged(struct drm_device *dev) ++{ ++ return 0; ++} ++ ++ ++/* CRTC functions */ ++static const struct drm_crtc_funcs glamo_crtc_funcs = { ++ .cursor_set = glamo_crtc_cursor_set, ++ .cursor_move = glamo_crtc_cursor_move, ++ .gamma_set = glamo_crtc_gamma_set, ++ .set_config = drm_crtc_helper_set_config, ++ .destroy = glamo_crtc_destroy, ++}; ++ ++ ++/* CRTC helper functions */ ++static const struct drm_crtc_helper_funcs glamo_crtc_helper_funcs = { ++ .dpms = glamo_crtc_dpms, ++ .mode_fixup = glamo_crtc_mode_fixup, ++ .mode_set = glamo_crtc_mode_set, ++ .mode_set_base = glamo_crtc_mode_set_base, ++ .prepare = glamo_crtc_prepare, ++ .commit = glamo_crtc_commit, ++}; ++ ++ ++/* Connector functions */ ++static const struct drm_connector_funcs glamo_connector_funcs = { ++ .detect = glamo_connector_detect, ++ .fill_modes = drm_helper_probe_single_connector_modes, ++ .destroy = glamo_connector_destroy, ++ .set_property = glamo_connector_set_property, ++}; ++ ++ ++/* Connector helper functions */ ++static const struct drm_connector_helper_funcs glamo_connector_helper_funcs = { ++ .mode_valid = glamo_connector_mode_valid, ++ .get_modes = glamo_connector_get_modes, ++ .best_encoder = glamo_connector_best_encoder, ++}; ++ ++ ++/* Encoder functions */ ++static const struct drm_encoder_funcs glamo_encoder_funcs = { ++ .destroy = glamo_encoder_destroy, ++}; ++ ++ ++/* Encoder helper functions */ ++static const struct drm_encoder_helper_funcs glamo_encoder_helper_funcs = { ++ .dpms = glamo_encoder_dpms, ++ .mode_fixup = glamo_encoder_mode_fixup, ++ .prepare = glamo_encoder_prepare, ++ .commit = glamo_encoder_commit, ++ .mode_set = glamo_encoder_mode_set, ++}; ++ ++ ++/* Mode functions */ ++static const struct drm_mode_config_funcs glamo_mode_funcs = { ++ .fb_create = glamo_user_framebuffer_create, ++ .fb_changed = glamo_fbchanged ++}; ++ ++ ++static struct drm_mode_set kernelfb_mode; ++ ++ ++/* Restore's the kernel's fbcon mode, used for panic path */ ++void glamo_display_restore(void) ++{ ++ drm_crtc_helper_set_config(&kernelfb_mode); ++} ++ ++ ++static int glamo_display_panic(struct notifier_block *n, unsigned long ununsed, ++ void *panic_str) ++{ ++ DRM_ERROR("panic occurred, switching back to text console\n"); ++ ++ glamo_display_restore(); ++ return 0; ++} ++ ++ ++static struct notifier_block paniced = { ++ .notifier_call = glamo_display_panic, ++}; ++ ++ ++int glamo_display_init(struct drm_device *dev) ++{ ++ struct glamodrm_handle *gdrm; ++ struct glamo_crtc *glamo_crtc; ++ struct glamo_output *glamo_output; ++ struct drm_connector *connector; ++ struct glamo_framebuffer *glamo_fb; ++ struct fb_info *info; ++ struct glamofb_par *par; ++ struct drm_mode_set *modeset; ++ ++ gdrm = dev->dev_private; ++ ++ /* Initial setup of the LCD controller */ ++ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD); ++ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD); ++ ++ glamo_run_lcd_script(gdrm, lcd_init_script, ++ ARRAY_SIZE(lcd_init_script)); ++ ++ drm_mode_config_init(dev); ++ ++ dev->mode_config.min_width = 240; ++ dev->mode_config.min_height = 320; ++ dev->mode_config.max_width = 480; ++ dev->mode_config.max_height = 640; ++ ++ dev->mode_config.funcs = (void *)&glamo_mode_funcs; ++ ++ /* Initialise our CRTC object. ++ * Only one connector per CRTC. We know this: it's kind of soldered. */ ++ glamo_crtc = kzalloc(sizeof(struct glamo_crtc) ++ + sizeof(struct drm_connector *), GFP_KERNEL); ++ if (glamo_crtc == NULL) return 1; ++ glamo_crtc->gdrm = gdrm; ++ glamo_crtc->blank_mode = DRM_MODE_DPMS_OFF; ++ drm_crtc_init(dev, &glamo_crtc->base, &glamo_crtc_funcs); ++ drm_crtc_helper_add(&glamo_crtc->base, &glamo_crtc_helper_funcs); ++ ++ glamo_crtc->mode_set.crtc = &glamo_crtc->base; ++ glamo_crtc->mode_set.connectors = ++ (struct drm_connector **)(glamo_crtc + 1); ++ glamo_crtc->mode_set.num_connectors = 0; ++ ++ /* Create our "output" object: consists of an output and an encoder */ ++ glamo_output = kzalloc(sizeof(struct glamo_output), GFP_KERNEL); ++ if (glamo_output == NULL) return 1; ++ connector = &glamo_output->base; ++ glamo_output->gdrm = gdrm; ++ ++ /* Initialise the connector */ ++ drm_connector_init(dev, connector, &glamo_connector_funcs, ++ DRM_MODE_CONNECTOR_Unknown); ++ drm_sysfs_connector_add(connector); ++ connector->interlace_allowed = 0; ++ connector->doublescan_allowed = 0; ++ ++ /* Initialise the encoder */ ++ drm_encoder_init(dev, &glamo_output->enc, &glamo_encoder_funcs, ++ DRM_MODE_ENCODER_DAC); ++ glamo_output->enc.possible_crtcs = 1 << 0; ++ drm_mode_connector_attach_encoder(&glamo_output->base, ++ &glamo_output->enc); ++ ++ drm_encoder_helper_add(&glamo_output->enc, &glamo_encoder_helper_funcs); ++ drm_connector_helper_add(connector, &glamo_connector_helper_funcs); ++ ++ drm_helper_initial_config(dev); ++ ++ if (list_empty(&dev->mode_config.fb_kernel_list)) { ++ int ret, cols, cols_g; ++ cols_g = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3) & 0xc000; ++ switch ( cols_g ) { ++ case GLAMO_LCD_SRC_RGB565 : ++ cols = GLAMO_FB_RGB565; break; ++ case GLAMO_LCD_SRC_ARGB1555 : ++ cols = GLAMO_FB_ARGB1555; break; ++ case GLAMO_LCD_SRC_ARGB4444 : ++ cols = GLAMO_FB_ARGB4444; break; ++ default : ++ printk(KERN_WARNING "Unrecognised LCD colour mode\n"); ++ cols = GLAMO_FB_RGB565; break; /* Take a guess */ ++ } ++ ret = glamofb_create(dev, 480, 640, 480, 640, cols, &glamo_fb); ++ if (ret) return -EINVAL; ++ } ++ ++ info = glamo_fb->base.fbdev; ++ par = info->par; ++ ++ modeset = &glamo_crtc->mode_set; ++ modeset->fb = &glamo_fb->base; ++ modeset->connectors[0] = connector; ++ ++ par->crtc_ids[0] = glamo_crtc->base.base.id; ++ ++ modeset->num_connectors = 1; ++ modeset->mode = modeset->crtc->desired_mode; ++ ++ par->crtc_count = 1; ++ ++ if (register_framebuffer(info) < 0) ++ return -EINVAL; ++ ++ printk(KERN_INFO "[glamo-drm] fb%d: %s frame buffer device\n", ++ info->node, info->fix.id); ++ ++ /* Switch back to kernel console on panic */ ++ kernelfb_mode = *modeset; ++ atomic_notifier_chain_register(&panic_notifier_list, &paniced); ++ printk(KERN_INFO "[glamo-drm] Registered panic notifier\n"); ++ ++ return 0; ++} ++ ++ ++void glamo_display_suspend(struct glamodrm_handle *gdrm) ++{ ++ gdrm->saved_width = reg_read_lcd(gdrm, GLAMO_REG_LCD_WIDTH); ++ gdrm->saved_height = reg_read_lcd(gdrm, GLAMO_REG_LCD_HEIGHT); ++ gdrm->saved_pitch = reg_read_lcd(gdrm, GLAMO_REG_LCD_PITCH); ++ gdrm->saved_htotal = reg_read_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL); ++ gdrm->saved_hrtrst = reg_read_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START); ++ gdrm->saved_hrtren = reg_read_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END); ++ gdrm->saved_hdspst = reg_read_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START); ++ gdrm->saved_hdspen = reg_read_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END); ++ gdrm->saved_vtotal = reg_read_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL); ++ gdrm->saved_vrtrst = reg_read_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START); ++ gdrm->saved_vrtren = reg_read_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END); ++ gdrm->saved_vdspst = reg_read_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START); ++ gdrm->saved_vdspen = reg_read_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END); ++} ++ ++ ++void glamo_display_resume(struct glamodrm_handle *gdrm) ++{ ++ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD); ++ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD); ++ glamo_run_lcd_script(gdrm, lcd_init_script, ++ ARRAY_SIZE(lcd_init_script)); ++ ++ /* Enable pixel clock */ ++ glamo_engine_clkreg_set(gdrm->glamo_core, ++ GLAMO_ENGINE_LCD, ++ GLAMO_CLOCK_LCD_EN_DCLK, ++ GLAMO_CLOCK_LCD_EN_DCLK); ++ ++ /* Restore timings */ ++ glamo_lcd_cmd_mode(gdrm, 1); ++ glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD, ++ gdrm->saved_clock); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH, GLAMO_LCD_WIDTH_MASK, ++ gdrm->saved_width); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT, GLAMO_LCD_HEIGHT_MASK, ++ gdrm->saved_height); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH, GLAMO_LCD_PITCH_MASK, ++ gdrm->saved_pitch); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, gdrm->saved_htotal); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, gdrm->saved_hrtrst); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, gdrm->saved_hrtren); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, ++ gdrm->saved_hdspst); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, ++ gdrm->saved_hdspen); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL, ++ GLAMO_LCD_HV_TOTAL_MASK, gdrm->saved_vtotal); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START, ++ GLAMO_LCD_HV_RETR_START_MASK, gdrm->saved_vrtrst); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END, ++ GLAMO_LCD_HV_RETR_END_MASK, gdrm->saved_vrtren); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START, ++ GLAMO_LCD_HV_RETR_DISP_START_MASK, ++ gdrm->saved_vdspst); ++ reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END, ++ GLAMO_LCD_HV_RETR_DISP_END_MASK, ++ gdrm->saved_vdspen); ++ glamo_lcd_cmd_mode(gdrm, 0); ++} +diff --git a/drivers/mfd/glamo/glamo-display.h b/drivers/mfd/glamo/glamo-display.h +new file mode 100644 +index 0000000..d6f21bc +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-display.h +@@ -0,0 +1,39 @@ ++/* Smedia Glamo 336x/337x Display ++ * ++ * Copyright (c) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __GLAMO_DISPLAY_H ++#define __GLAMO_DISPLAY_H ++ ++#include <drm/drmP.h> ++#include "glamo-drm-private.h" ++ ++extern int glamo_display_init(struct drm_device *dev); ++ ++extern int glamo_framebuffer_create(struct drm_device *dev, ++ struct drm_mode_fb_cmd *mode_cmd, ++ struct drm_framebuffer **fb, ++ struct drm_gem_object *obj); ++ ++extern void glamo_display_suspend(struct glamodrm_handle *gdrm); ++extern void glamo_display_resume(struct glamodrm_handle *gdrm); ++ ++#endif /* __GLAMO_DISPLAY_H */ +diff --git a/drivers/mfd/glamo/glamo-drm-drv.c b/drivers/mfd/glamo/glamo-drm-drv.c +new file mode 100644 +index 0000000..81215f4 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-drm-drv.c +@@ -0,0 +1,453 @@ ++/* Smedia Glamo 336x/337x Graphics Driver ++ * ++ * Copyright (C) 2009 Openmoko, Inc. Jorge Luis Zapata <turran@openmoko.com> ++ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com> ++ * ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++ ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++#include <linux/glamofb.h> ++ ++#include "glamo-core.h" ++#include "glamo-cmdq.h" ++#include "glamo-buffer.h" ++#include "glamo-drm-private.h" ++#include "glamo-display.h" ++#include "glamo-kms-fb.h" ++#include "glamo-fence.h" ++ ++#define DRIVER_AUTHOR "Openmoko, Inc." ++#define DRIVER_NAME "glamo-drm" ++#define DRIVER_DESC "SMedia Glamo 3362" ++#define DRIVER_DATE "20090614" ++ ++ ++static int glamo_ioctl_swap(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_swap\n"); ++ return 0; ++} ++ ++ ++static int glamo_ioctl_gem_info(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ printk(KERN_INFO "glamo_ioctl_gem_info\n"); ++ return 0; ++} ++ ++ ++struct drm_ioctl_desc glamo_ioctls[] = { ++ DRM_IOCTL_DEF(DRM_GLAMO_CMDBUF, glamo_ioctl_cmdbuf, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_SWAP, glamo_ioctl_swap, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_CMDBURST, glamo_ioctl_cmdburst, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_INFO, glamo_ioctl_gem_info, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_CREATE, glamo_ioctl_gem_create, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_MMAP, glamo_ioctl_gem_mmap, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PIN, glamo_ioctl_gem_pin, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_UNPIN, glamo_ioctl_gem_unpin, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PREAD, glamo_ioctl_gem_pread, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_PWRITE, glamo_ioctl_gem_pwrite, DRM_AUTH), ++ DRM_IOCTL_DEF(DRM_GLAMO_GEM_WAIT_RENDERING, ++ glamo_ioctl_wait_rendering, DRM_AUTH), ++}; ++ ++ ++static int glamodrm_firstopen(struct drm_device *dev) ++{ ++ DRM_DEBUG("\n"); ++ return 0; ++} ++ ++ ++static int glamodrm_open(struct drm_device *dev, struct drm_file *fh) ++{ ++ DRM_DEBUG("\n"); ++ return 0; ++} ++ ++ ++static void glamodrm_preclose(struct drm_device *dev, struct drm_file *fh) ++{ ++ DRM_DEBUG("\n"); ++} ++ ++static void glamodrm_postclose(struct drm_device *dev, struct drm_file *fh) ++{ ++ DRM_DEBUG("\n"); ++} ++ ++ ++static void glamodrm_lastclose(struct drm_device *dev) ++{ ++ DRM_DEBUG("\n"); ++} ++ ++ ++static int glamodrm_master_create(struct drm_device *dev, ++ struct drm_master *master) ++{ ++ DRM_DEBUG("\n"); ++ ++ return 0; ++} ++ ++ ++static void glamodrm_master_destroy(struct drm_device *dev, ++ struct drm_master *master) ++{ ++ DRM_DEBUG("\n"); ++} ++ ++ ++static int glamodrm_load(struct drm_device *dev, unsigned long flags) ++{ ++ struct glamodrm_handle *gdrm; ++ gdrm = dev->dev_private; ++ ++ glamo_buffer_init(gdrm); ++ glamo_cmdq_init(gdrm); ++ glamo_fence_init(gdrm); ++ glamo_display_init(dev); ++ ++ return 0; ++} ++ ++ ++static int glamodrm_unload(struct drm_device *dev) ++{ ++ struct glamodrm_handle *gdrm; ++ ++ gdrm = dev->dev_private; ++ ++ glamo_engine_disable(gdrm->glamo_core, GLAMO_ENGINE_2D); ++ glamo_engine_disable(gdrm->glamo_core, GLAMO_ENGINE_3D); ++ glamo_buffer_final(gdrm); ++ glamo_fence_shutdown(gdrm); ++ ++ return 0; ++} ++ ++ ++static struct vm_operations_struct glamodrm_gem_vm_ops = { ++ .fault = glamodrm_gem_fault, ++}; ++ ++static struct drm_driver glamodrm_drm_driver = { ++ .driver_features = DRIVER_IS_PLATFORM | DRIVER_GEM | DRIVER_MODESET, ++ .firstopen = glamodrm_firstopen, ++ .load = glamodrm_load, ++ .unload = glamodrm_unload, ++ .open = glamodrm_open, ++ .preclose = glamodrm_preclose, ++ .postclose = glamodrm_postclose, ++ .lastclose = glamodrm_lastclose, ++ .reclaim_buffers = drm_core_reclaim_buffers, ++ .get_map_ofs = drm_core_get_map_ofs, ++ .get_reg_ofs = drm_core_get_reg_ofs, ++ .master_create = glamodrm_master_create, ++ .master_destroy = glamodrm_master_destroy, ++ .gem_init_object = glamodrm_gem_init_object, ++ .gem_free_object = glamodrm_gem_free_object, ++ .gem_vm_ops = &glamodrm_gem_vm_ops, ++ .ioctls = glamo_ioctls, ++ .fops = { ++ .owner = THIS_MODULE, ++ .open = drm_open, ++ .release = drm_release, ++ .ioctl = drm_ioctl, ++ .mmap = drm_gem_mmap, ++ .poll = drm_poll, ++ .fasync = drm_fasync, ++ }, ++ .major = 0, ++ .minor = 1, ++ .patchlevel = 0, ++ .name = DRIVER_NAME, ++ .desc = DRIVER_DESC, ++ .date = DRIVER_DATE, ++}; ++ ++ ++static int glamodrm_probe(struct platform_device *pdev) ++{ ++ int rc; ++ struct glamodrm_handle *gdrm; ++ struct glamo_core *core = dev_get_drvdata(pdev->dev.parent); ++ ++ printk(KERN_INFO "[glamo-drm] SMedia Glamo Direct Rendering Support\n"); ++ ++ gdrm = kzalloc(sizeof(*gdrm), GFP_KERNEL); ++ if ( !gdrm ) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, gdrm); ++ gdrm->glamo_core = core; ++ gdrm->dev = &pdev->dev; ++ ++ /* Find the command queue registers */ ++ gdrm->reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-cmdq-regs"); ++ if ( !gdrm->reg ) { ++ dev_err(&pdev->dev, "Unable to find cmdq registers.\n"); ++ rc = -ENOENT; ++ goto out_free; ++ } ++ gdrm->reg = request_mem_region(gdrm->reg->start, ++ resource_size(gdrm->reg), pdev->name); ++ if ( !gdrm->reg ) { ++ dev_err(&pdev->dev, "failed to request MMIO region\n"); ++ rc = -ENOENT; ++ goto out_free; ++ } ++ gdrm->reg_base = ioremap_nocache(gdrm->reg->start, ++ resource_size(gdrm->reg)); ++ if ( !gdrm->reg_base ) { ++ dev_err(&pdev->dev, "failed to ioremap() MMIO registers\n"); ++ rc = -ENOENT; ++ goto out_release_regs; ++ } ++ ++ /* Find the command queue itself */ ++ gdrm->cmdq = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-command-queue"); ++ if ( !gdrm->cmdq ) { ++ dev_err(&pdev->dev, "Unable to find command queue.\n"); ++ rc = -ENOENT; ++ goto out_unmap_regs; ++ } ++ gdrm->cmdq = request_mem_region(gdrm->cmdq->start, ++ resource_size(gdrm->cmdq), pdev->name); ++ if ( !gdrm->cmdq ) { ++ dev_err(&pdev->dev, "failed to request command queue region\n"); ++ rc = -ENOENT; ++ goto out_unmap_regs; ++ } ++ gdrm->cmdq_base = ioremap_nocache(gdrm->cmdq->start, ++ resource_size(gdrm->cmdq)); ++ if ( !gdrm->cmdq_base ) { ++ dev_err(&pdev->dev, "failed to ioremap() command queue\n"); ++ rc = -ENOENT; ++ goto out_release_cmdq; ++ } ++ ++ /* Find the VRAM */ ++ gdrm->vram = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-fb-mem"); ++ if ( !gdrm->vram ) { ++ dev_err(&pdev->dev, "Unable to find VRAM.\n"); ++ rc = -ENOENT; ++ goto out_unmap_cmdq; ++ } ++ gdrm->vram = request_mem_region(gdrm->vram->start, ++ resource_size(gdrm->vram), pdev->name); ++ if ( !gdrm->vram ) { ++ dev_err(&pdev->dev, "failed to request VRAM region\n"); ++ rc = -ENOENT; ++ goto out_unmap_cmdq; ++ } ++ ++ /* Find the LCD controller */ ++ gdrm->lcd_regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "glamo-fb-regs"); ++ if ( !gdrm->lcd_regs ) { ++ dev_err(&pdev->dev, "Unable to find LCD registers.\n"); ++ rc = -ENOENT; ++ goto out_release_vram; ++ } ++ gdrm->lcd_regs = request_mem_region(gdrm->lcd_regs->start, ++ resource_size(gdrm->lcd_regs), ++ pdev->name); ++ if ( !gdrm->lcd_regs ) { ++ dev_err(&pdev->dev, "failed to request LCD registers\n"); ++ rc = -ENOENT; ++ goto out_release_vram; ++ } ++ gdrm->lcd_base = ioremap_nocache(gdrm->lcd_regs->start, ++ resource_size(gdrm->lcd_regs)); ++ if ( !gdrm->lcd_base ) { ++ dev_err(&pdev->dev, "failed to ioremap() LCD registers\n"); ++ rc = -ENOENT; ++ goto out_release_lcd; ++ } ++ ++ /* Find the 2D engine */ ++ gdrm->twod_regs = platform_get_resource(pdev, IORESOURCE_MEM, 4); ++ if ( !gdrm->twod_regs ) { ++ dev_err(&pdev->dev, "Unable to find 2D registers.\n"); ++ rc = -ENOENT; ++ goto out_unmap_lcd; ++ } ++ gdrm->twod_regs = request_mem_region(gdrm->twod_regs->start, ++ resource_size(gdrm->twod_regs), ++ pdev->name); ++ if ( !gdrm->twod_regs ) { ++ dev_err(&pdev->dev, "failed to request 2D registers\n"); ++ rc = -ENOENT; ++ goto out_unmap_lcd; ++ } ++ gdrm->twod_base = ioremap(gdrm->twod_regs->start, ++ resource_size(gdrm->twod_regs)); ++ if ( !gdrm->twod_base ) { ++ dev_err(&pdev->dev, "failed to ioremap() 2D registers\n"); ++ rc = -ENOENT; ++ goto out_release_2d; ++ } ++ ++ /* Hook up IRQ handle for fence processing */ ++ gdrm->twod_irq = platform_get_irq_byname(pdev, "glamo-2d-irq"); ++ rc = request_irq(gdrm->twod_irq, glamo_fence_irq_handler, ++ IRQF_SHARED, pdev->name, gdrm); ++ if ( rc ) { ++ dev_err(&pdev->dev, "failed to register irq.\n"); ++ goto out_unmap_2d; ++ } ++ ++ gdrm->vram_size = GLAMO_FB_SIZE; ++ printk(KERN_INFO "[glamo-drm] %lli bytes of VRAM\n", ++ (long long int)gdrm->vram_size); ++ ++ /* Initialise DRM */ ++ drm_platform_init(&glamodrm_drm_driver, pdev, (void *)gdrm); ++ ++ return 0; ++ ++out_unmap_2d: ++ iounmap(gdrm->twod_base); ++out_release_2d: ++ release_mem_region(gdrm->twod_regs->start, ++ resource_size(gdrm->twod_regs)); ++out_unmap_lcd: ++ iounmap(gdrm->lcd_base); ++out_release_lcd: ++ release_mem_region(gdrm->lcd_regs->start, ++ resource_size(gdrm->lcd_regs)); ++out_release_vram: ++ release_mem_region(gdrm->vram->start, resource_size(gdrm->vram)); ++out_unmap_cmdq: ++ iounmap(gdrm->cmdq_base); ++out_release_cmdq: ++ release_mem_region(gdrm->cmdq->start, resource_size(gdrm->cmdq)); ++out_unmap_regs: ++ iounmap(gdrm->reg_base); ++out_release_regs: ++ release_mem_region(gdrm->reg->start, resource_size(gdrm->reg)); ++out_free: ++ kfree(gdrm); ++ pdev->dev.driver_data = NULL; ++ return rc; ++} ++ ++ ++static int glamodrm_remove(struct platform_device *pdev) ++{ ++ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev); ++ ++ glamo_buffer_final(gdrm); ++ glamo_cmdq_shutdown(gdrm); ++ ++ drm_exit(&glamodrm_drm_driver); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ /* Release registers */ ++ iounmap(gdrm->reg_base); ++ release_mem_region(gdrm->reg->start, resource_size(gdrm->reg)); ++ ++ /* Release VRAM */ ++ release_mem_region(gdrm->vram->start, resource_size(gdrm->vram)); ++ ++ /* Release command queue */ ++ iounmap(gdrm->cmdq_base); ++ release_mem_region(gdrm->cmdq->start, resource_size(gdrm->cmdq)); ++ ++ /* Release 2D engine */ ++ free_irq(gdrm->twod_irq, gdrm); ++ iounmap(gdrm->twod_base); ++ release_mem_region(gdrm->twod_regs->start, ++ resource_size(gdrm->twod_regs)); ++ ++ kfree(gdrm); ++ ++ return 0; ++} ++ ++ ++static int glamodrm_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev); ++ ++ glamo_kmsfb_suspend(gdrm); ++ glamo_display_suspend(gdrm); ++ glamo_cmdq_suspend(gdrm); ++ ++ /* glamo_core.c will suspend the engines for us */ ++ ++ return 0; ++} ++ ++ ++static int glamodrm_resume(struct platform_device *pdev) ++{ ++ struct glamodrm_handle *gdrm = platform_get_drvdata(pdev); ++ ++ glamo_cmdq_resume(gdrm); ++ glamo_display_resume(gdrm); ++ glamo_kmsfb_resume(gdrm); ++ ++ return 0; ++} ++ ++ ++static struct platform_driver glamodrm_driver = { ++ .probe = glamodrm_probe, ++ .remove = glamodrm_remove, ++ .suspend = glamodrm_suspend, ++ .resume = glamodrm_resume, ++ .driver = { ++ .name = "glamo-fb", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++ ++static int __devinit glamodrm_init(void) ++{ ++ glamodrm_drm_driver.num_ioctls = DRM_ARRAY_SIZE(glamo_ioctls); ++ return platform_driver_register(&glamodrm_driver); ++} ++ ++ ++static void __exit glamodrm_exit(void) ++{ ++ platform_driver_unregister(&glamodrm_driver); ++} ++ ++ ++module_init(glamodrm_init); ++module_exit(glamodrm_exit); ++ ++MODULE_AUTHOR(DRIVER_AUTHOR); ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/glamo/glamo-drm-private.h b/drivers/mfd/glamo/glamo-drm-private.h +new file mode 100644 +index 0000000..7949a2e +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-drm-private.h +@@ -0,0 +1,156 @@ ++/* Smedia Glamo 336x/337x DRM private bits ++ * ++ * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk> ++ * Copyright (C) 2009 Andreas Pokorny <andreas.pokorny@gmail.com> ++ * Based on xf86-video-glamo ++ * Copyright 2007 OpenMoko, Inc. ++ * Copyright © 2009 Lars-Peter Clausen <lars@metafoo.de> ++ * ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef __GLAMO_DRMPRIV_H ++#define __GLAMO_DRMPRIV_H ++ ++ ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/semaphore.h> ++#include <linux/spinlock.h> ++#include <linux/wait.h> ++ ++#include "glamo-core.h" ++ ++ ++/* Memory to allocate for the framebuffer. ++ * The rest is reserved for the DRM memory manager */ ++#define GLAMO_FRAMEBUFFER_ALLOCATION (2*480*640) ++ ++ ++struct glamodrm_handle { ++ ++ /* This device */ ++ struct device *dev; ++ ++ /* The parent device handle */ ++ struct glamo_core *glamo_core; ++ ++ /* Framebuffer handle for the console (i.e. /dev/fb0) */ ++ struct fb_info *fb; ++ ++ /* Command queue registers */ ++ struct resource *reg; ++ char __iomem *reg_base; ++ ++ /* VRAM region */ ++ struct resource *vram; ++ ++ /* Command queue region */ ++ struct resource *cmdq; ++ char __iomem *cmdq_base; ++ ++ /* LCD controller registers */ ++ struct resource *lcd_regs; ++ char __iomem *lcd_base; ++ ++ /* 2D engine registers and IRQ */ ++ struct resource *twod_regs; ++ char __iomem *twod_base; ++ unsigned int twod_irq; ++ ++ ssize_t vram_size; ++ ++ /* Memory management */ ++ struct drm_mm *mmgr; ++ ++ /* semaphore against concurrent ioctl */ ++ struct semaphore add_to_ring; ++ ++ /* Saved state */ ++ u_int16_t saved_clock; ++ u_int16_t saved_width; ++ u_int16_t saved_height; ++ u_int16_t saved_pitch; ++ u_int16_t saved_htotal; ++ u_int16_t saved_hrtrst; ++ u_int16_t saved_hrtren; ++ u_int16_t saved_hdspst; ++ u_int16_t saved_hdspen; ++ u_int16_t saved_vtotal; ++ u_int16_t saved_vrtrst; ++ u_int16_t saved_vrtren; ++ u_int16_t saved_vdspst; ++ u_int16_t saved_vdspen; ++ ++ /* Fencing */ ++ atomic_t curr_seq; /* The last used stamp number */ ++ struct list_head fence_list; /* List of active fences */ ++ rwlock_t fence_list_lock; /* Lock to protect fence_list */ ++ wait_queue_head_t fence_queue; /* Waitqueue */ ++ struct tasklet_struct fence_tl; /* Tasklet for fence IRQ */ ++ ++ /* A scratch block */ ++ struct drm_mm_node *scratch; ++}; ++ ++ ++/* Private data. This is where we keep our memory management bits */ ++struct drm_glamo_gem_object { ++ struct drm_gem_object *obj; /* The GEM object this refers to */ ++ struct drm_mm_node *block; /* Block handle for drm_mm */ ++ uint64_t mmap_offset; ++}; ++ ++ ++struct glamo_crtc { ++ struct drm_crtc base; ++ struct glamodrm_handle *gdrm; ++ /* a mode_set for fbdev users on this crtc */ ++ struct drm_mode_set mode_set; ++ int blank_mode; ++}; ++ ++ ++struct glamo_framebuffer { ++ struct drm_framebuffer base; ++ struct drm_gem_object *obj; ++}; ++ ++ ++struct glamo_output { ++ struct drm_connector base; ++ struct drm_encoder enc; ++ struct glamodrm_handle *gdrm; ++}; ++ ++ ++/* Colour mode for KMS framebuffer */ ++enum { ++ GLAMO_FB_RGB565, ++ GLAMO_FB_ARGB1555, ++ GLAMO_FB_ARGB4444 ++}; ++ ++ ++#define to_glamo_crtc(x) container_of(x, struct glamo_crtc, base) ++#define to_glamo_output(x) container_of(x, struct glamo_output, base) ++#define enc_to_glamo_output(x) container_of(x, struct glamo_output, enc) ++#define to_glamo_framebuffer(x) container_of(x, struct glamo_framebuffer, base) ++ ++ ++#endif /* __GLAMO_DRMPRIV_H */ +diff --git a/drivers/mfd/glamo/glamo-fence.c b/drivers/mfd/glamo/glamo-fence.c +new file mode 100644 +index 0000000..ab77241 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-fence.c +@@ -0,0 +1,329 @@ ++/* ++ * SMedia Glamo 336x/337x fence objects ++ * ++ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ * ++ * ++ * Loosely based on radeon_fence.c, to which the following notice applies: ++ * ++ * Copyright 2009 Jerome Glisse. ++ * All Rights Reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sub license, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, ++ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR ++ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE ++ * USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * The above copyright notice and this permission notice (including the ++ * next paragraph) shall be included in all copies or substantial portions ++ * of the Software. ++ * ++ */ ++/* ++ * Authors: ++ * Jerome Glisse <glisse@freedesktop.org> ++ * Dave Airlie ++ */ ++ ++ ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++#include <linux/kernel.h> ++#include <linux/irq.h> ++#include <linux/interrupt.h> ++#include <linux/spinlock.h> ++#include <linux/lockdep.h> ++ ++#include "glamo-drm-private.h" ++#include "glamo-regs.h" ++#include "glamo-core.h" ++#include "glamo-cmdq.h" ++ ++ ++static struct lock_class_key glamo_fence_lock_key; ++ ++ ++struct glamo_fence ++{ ++ struct list_head list; ++ uint16_t seq; /* Wait for at least this ID */ ++ int signalled; /* Non-zero when fence has passed */ ++ struct glamodrm_handle *gdrm; ++}; ++ ++ ++static void glamo_fence_emit(struct glamo_fence *fence) ++{ ++ u16 fring[6]; ++ ++ fring[0] = 0x8000 | GLAMO_REG_2D_ID1; ++ fring[1] = 3; ++ fence->seq = atomic_inc_return(&fence->gdrm->curr_seq); ++ if ( fence->seq > 1<<14 ) { ++ atomic_set(&fence->gdrm->curr_seq, 0); ++ fence->seq = atomic_inc_return(&fence->gdrm->curr_seq); ++ } ++ fring[2] = 1<<15 | fence->seq; ++ fring[3] = 0; /* Unused */ ++ fring[4] = 0; /* Unused */ ++ fring[5] = 0; /* Padding */ ++ ++ glamo_add_to_ring(fence->gdrm, fring, 12); ++} ++ ++ ++static void glamo_fence_enable(struct glamodrm_handle *gdrm) ++{ ++ glamo_enable_irq(gdrm->glamo_core, GLAMO_IRQ_2D); ++} ++ ++ ++static inline u16 reg_read_2d(struct glamodrm_handle *gdrm, u_int16_t reg) ++{ ++ /* For command queue, the address is given relative to ++ * the overall base of Glamo. This isn't the case here. */ ++ return ioread16(gdrm->twod_base + reg-GLAMO_REGOFS_2D); ++} ++ ++ ++static inline u16 reg_read_cmdq(struct glamodrm_handle *gdrm, u_int16_t reg) ++{ ++ return ioread16(gdrm->reg_base + reg); ++} ++ ++ ++static void glamo_cmdq_wait(struct glamodrm_handle *gdrm, ++ enum glamo_engine engine) ++{ ++ u16 mask, val, status; ++ int i; ++ ++ switch (engine) ++ { ++ case GLAMO_ENGINE_ALL: ++ mask = 1 << 2; ++ val = mask; ++ break; ++ default: ++ return; ++ } ++ ++ for ( i=0; i<1000; i++ ) { ++ status = reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_STATUS); ++ if ((status & mask) == val) break; ++ mdelay(1); ++ } ++ if ( i == 1000 ) { ++ size_t ring_read; ++ printk(KERN_WARNING "[glamo-drm] CmdQ timeout!\n"); ++ printk(KERN_WARNING "[glamo-drm] status = %x\n", status); ++ ring_read = reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_READ_ADDRL); ++ ring_read |= ((reg_read_cmdq(gdrm, GLAMO_REG_CMDQ_READ_ADDRH) ++ & 0x7) << 16); ++ printk(KERN_INFO "[glamo-drm] ring_read now 0x%x\n", ++ ring_read); ++ } ++} ++ ++ ++irqreturn_t glamo_fence_irq_handler(unsigned int irq, void *data) ++{ ++ struct glamodrm_handle *gdrm = data; ++ ++ if (!gdrm) { ++ printk(KERN_ERR "[glamo-drm] 2D IRQ called with no data\n"); ++ return IRQ_NONE; ++ } ++ glamo_clear_irq(gdrm->glamo_core, GLAMO_IRQ_2D); ++ ++ tasklet_schedule(&gdrm->fence_tl); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++/* This is nasty. I'm sorry. */ ++static void glamo_fence_debodge(struct glamodrm_handle *gdrm) ++{ ++ struct list_head *tmp; ++ ++ printk(KERN_ERR "[glamo-drm] Attempting to recover...\n"); ++ ++ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL); ++ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_2D); ++ ++ read_lock(&gdrm->fence_list_lock); ++ list_for_each(tmp, &gdrm->fence_list) { ++ ++ struct glamo_fence *fence; ++ ++ fence = list_entry(tmp, struct glamo_fence, list); ++ ++ if ( fence->signalled != 1 ) { ++ printk(KERN_ERR "[glamo-drm] Fence seq#%i was not" ++ " signalled\n", fence->seq); ++ } ++ fence->signalled = 1; ++ ++ } ++ read_unlock(&gdrm->fence_list_lock); ++ ++ wake_up_all(&gdrm->fence_queue); ++} ++ ++ ++static void glamo_fence_tl(unsigned long data) ++{ ++ struct glamodrm_handle *gdrm = (struct glamodrm_handle *)data; ++ int wake = 0; ++ u16 seq; ++ struct list_head *tmp; ++ ++ seq = reg_read_2d(gdrm, GLAMO_REG_2D_ID1) & 0x7fff; ++ ++ read_lock(&gdrm->fence_list_lock); ++ list_for_each(tmp, &gdrm->fence_list) { ++ ++ struct glamo_fence *fence; ++ ++ fence = list_entry(tmp, struct glamo_fence, list); ++ if ( seq >= fence->seq ) { ++ fence->signalled = 1; ++ wake = 1; ++ } ++ ++ } ++ read_unlock(&gdrm->fence_list_lock); ++ ++ if ( wake ) wake_up_all(&gdrm->fence_queue); ++} ++ ++ ++static struct glamo_fence *glamo_fence_new(struct glamodrm_handle *gdrm) ++{ ++ struct glamo_fence *fence; ++ unsigned long irq_flags; ++ ++ fence = kmalloc(sizeof(*fence), GFP_KERNEL); ++ fence->signalled = 0; ++ fence->gdrm = gdrm; ++ ++ /* Add to list */ ++ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags); ++ list_add(&fence->list, &gdrm->fence_list); ++ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags); ++ ++ return fence; ++} ++ ++ ++static struct glamo_fence *glamo_fence_destroy(struct glamo_fence *fence) ++{ ++ unsigned long irq_flags; ++ struct glamodrm_handle *gdrm = fence->gdrm; ++ ++ /* Remove from list */ ++ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags); ++ list_del(&fence->list); ++ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags); ++ ++ kfree(fence); ++ ++ return fence; ++} ++ ++ ++int glamo_ioctl_wait_rendering(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ struct glamodrm_handle *gdrm; ++ struct drm_glamo_gem_wait_rendering *args = data; ++ struct glamo_fence *fence; ++ int r; ++ ++ gdrm = dev->dev_private; ++ ++ if ( !args->have_handle ) { ++ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL); ++ return 0; ++ } ++ ++ fence = glamo_fence_new(gdrm); ++ if ( fence == NULL ) { ++ printk(KERN_WARNING "[glamo-drm] Couldn't allocate fence -" ++ " falling back to busy wait.\n"); ++ glamo_cmdq_wait(gdrm, GLAMO_ENGINE_ALL); ++ return 0; ++ } ++ ++ glamo_fence_emit(fence); ++ ++ /* Wait... */ ++ r = wait_event_interruptible_timeout(gdrm->fence_queue, ++ fence->signalled, HZ); ++ if ( r == 0 ) { ++ printk(KERN_ERR "[glamo-drm] Timeout!\n"); ++ glamo_fence_debodge(gdrm); ++ } ++ ++ glamo_fence_destroy(fence); ++ ++ return 0; ++} ++ ++ ++void glamo_fence_init(struct glamodrm_handle *gdrm) ++{ ++ unsigned long irq_flags; ++ ++ if ( gdrm->twod_irq == 0 ) { ++ printk(KERN_ERR "[glamo-drm] Attempted to initialise fence" ++ " system before 2D IRQ registered\n"); ++ return; ++ } ++ ++ gdrm->fence_list_lock = __RW_LOCK_UNLOCKED(gdrm->fence_list_lock); ++ lockdep_set_class(&gdrm->fence_list_lock, &glamo_fence_lock_key); ++ init_waitqueue_head(&gdrm->fence_queue); ++ ++ atomic_set(&gdrm->curr_seq, 0); ++ ++ write_lock_irqsave(&gdrm->fence_list_lock, irq_flags); ++ INIT_LIST_HEAD(&gdrm->fence_list); ++ write_unlock_irqrestore(&gdrm->fence_list_lock, irq_flags); ++ ++ tasklet_init(&gdrm->fence_tl, glamo_fence_tl, (unsigned long)gdrm); ++ ++ glamo_fence_enable(gdrm); ++} ++ ++ ++void glamo_fence_shutdown(struct glamodrm_handle *gdrm) ++{ ++ wake_up_all(&gdrm->fence_queue); ++ tasklet_kill(&gdrm->fence_tl); ++} +diff --git a/drivers/mfd/glamo/glamo-fence.h b/drivers/mfd/glamo/glamo-fence.h +new file mode 100644 +index 0000000..948fae3 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-fence.h +@@ -0,0 +1,36 @@ ++/* ++ * SMedia Glamo 336x/337x fence objects ++ * ++ * Copyright (c) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see <http://www.gnu.org/licenses/>. ++ * ++ */ ++ ++#ifndef __GLAMO_FENCE_H ++#define __GLAMO_FENCE_H ++ ++#include <drm/drmP.h> ++ ++#include "glamo-drm-private.h" ++ ++extern void glamo_fence_irq_handler(unsigned int irq, struct irq_desc *desc); ++ ++extern void glamo_fence_init(struct glamodrm_handle *gdrm); ++extern void glamo_fence_shutdown(struct glamodrm_handle *gdrm); ++ ++extern int glamo_ioctl_wait_rendering(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); ++ ++#endif /* __GLAMO_FENCE_H */ +diff --git a/drivers/mfd/glamo/glamo-kms-fb.c b/drivers/mfd/glamo/glamo-kms-fb.c +new file mode 100644 +index 0000000..61cd605 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-kms-fb.c +@@ -0,0 +1,540 @@ ++/* ++ * SMedia Glamo 336x/337x KMS Framebuffer ++ * ++ * Copyright (C) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc. ++ * Author: Harald Welte <laforge@openmoko.org> ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * ++ * Based on intel_fb.c from drivers/gpu/drm/i915 ++ * to which the following licence applies: ++ * ++ * Copyright © 2006-2007 Intel Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: ++ * Eric Anholt <eric@anholt.net> ++ * ++ */ ++ ++ ++#include <drm/drmP.h> ++#include <drm/glamo_drm.h> ++#include <drm/drm_crtc_helper.h> ++#include <drm/drm_crtc.h> ++ ++#include "glamo-core.h" ++#include "glamo-drm-private.h" ++#include "glamo-display.h" ++#include "glamo-buffer.h" ++ ++ ++struct glamofb_par { ++ struct drm_device *dev; ++ struct drm_display_mode *our_mode; ++ struct glamo_framebuffer *glamo_fb; ++ int crtc_count; ++ /* crtc currently bound to this */ ++ uint32_t crtc_ids[2]; ++}; ++ ++ ++static int glamofb_setcolreg(unsigned regno, unsigned red, unsigned green, ++ unsigned blue, unsigned transp, ++ struct fb_info *info) ++{ ++ struct glamofb_par *par = info->par; ++ struct drm_device *dev = par->dev; ++ struct drm_crtc *crtc; ++ int i; ++ ++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { ++ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc); ++ struct drm_mode_set *modeset = &glamo_crtc->mode_set; ++ struct drm_framebuffer *fb = modeset->fb; ++ ++ for (i = 0; i < par->crtc_count; i++) ++ if (crtc->base.id == par->crtc_ids[i]) ++ break; ++ ++ if (i == par->crtc_count) ++ continue; ++ ++ ++ if (regno > 255) ++ return 1; ++ ++ if (regno < 16) { ++ switch (fb->depth) { ++ case 15: ++ fb->pseudo_palette[regno] = ((red & 0xf800) >> 1) | ++ ((green & 0xf800) >> 6) | ++ ((blue & 0xf800) >> 11); ++ break; ++ case 16: ++ fb->pseudo_palette[regno] = (red & 0xf800) | ++ ((green & 0xfc00) >> 5) | ++ ((blue & 0xf800) >> 11); ++ break; ++ case 24: ++ case 32: ++ fb->pseudo_palette[regno] = ((red & 0xff00) << 8) | ++ (green & 0xff00) | ++ ((blue & 0xff00) >> 8); ++ break; ++ } ++ } ++ } ++ return 0; ++} ++ ++static int glamofb_check_var(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ struct glamofb_par *par = info->par; ++ struct glamo_framebuffer *glamo_fb = par->glamo_fb; ++ struct drm_framebuffer *fb = &glamo_fb->base; ++ int depth; ++ ++ /* Need to resize the fb object !!! */ ++ if (var->xres > fb->width || var->yres > fb->height) { ++ DRM_ERROR("Cannot resize framebuffer object (%dx%d > %dx%d)\n", ++ var->xres,var->yres,fb->width,fb->height); ++ DRM_ERROR("Need resizing code.\n"); ++ return -EINVAL; ++ } ++ ++ switch (var->bits_per_pixel) { ++ case 16: ++ depth = (var->green.length == 6) ? 16 : 15; ++ break; ++ case 32: ++ depth = (var->transp.length > 0) ? 32 : 24; ++ break; ++ default: ++ depth = var->bits_per_pixel; ++ break; ++ } ++ ++ switch (depth) { ++ case 16: ++ var->red.offset = 11; ++ var->green.offset = 5; ++ var->blue.offset = 0; ++ var->red.length = 5; ++ var->green.length = 6; ++ var->blue.length = 5; ++ var->transp.length = 0; ++ var->transp.offset = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/* this will let fbcon do the mode init */ ++/* FIXME: take mode config lock? */ ++static int glamofb_set_par(struct fb_info *info) ++{ ++ struct glamofb_par *par = info->par; ++ struct drm_device *dev = par->dev; ++ struct fb_var_screeninfo *var = &info->var; ++ int i; ++ ++ DRM_DEBUG("%d %d\n", var->xres, var->pixclock); ++ ++ if (var->pixclock != -1) { ++ ++ DRM_ERROR("PIXEL CLOCK SET\n"); ++ return -EINVAL; ++ } else { ++ struct drm_crtc *crtc; ++ int ret; ++ ++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { ++ struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc); ++ ++ for (i = 0; i < par->crtc_count; i++) ++ if (crtc->base.id == par->crtc_ids[i]) ++ break; ++ ++ if (i == par->crtc_count) ++ continue; ++ ++ if (crtc->fb == glamo_crtc->mode_set.fb) { ++ mutex_lock(&dev->mode_config.mutex); ++ ret = crtc->funcs->set_config(&glamo_crtc->mode_set); ++ mutex_unlock(&dev->mode_config.mutex); ++ if (ret) ++ return ret; ++ } ++ } ++ return 0; ++ } ++} ++ ++static int glamofb_pan_display(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ struct glamofb_par *par = info->par; ++ struct drm_device *dev = par->dev; ++ struct drm_mode_set *modeset; ++ struct drm_crtc *crtc; ++ struct glamo_crtc *glamo_crtc; ++ int ret = 0; ++ int i; ++ ++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { ++ for (i = 0; i < par->crtc_count; i++) ++ if (crtc->base.id == par->crtc_ids[i]) ++ break; ++ ++ if (i == par->crtc_count) ++ continue; ++ ++ glamo_crtc = to_glamo_crtc(crtc); ++ modeset = &glamo_crtc->mode_set; ++ ++ modeset->x = var->xoffset; ++ modeset->y = var->yoffset; ++ ++ if (modeset->num_connectors) { ++ mutex_lock(&dev->mode_config.mutex); ++ ret = crtc->funcs->set_config(modeset); ++ mutex_unlock(&dev->mode_config.mutex); ++ if (!ret) { ++ info->var.xoffset = var->xoffset; ++ info->var.yoffset = var->yoffset; ++ } ++ } ++ } ++ ++ return ret; ++} ++ ++static void glamofb_on(struct fb_info *info) ++{ ++ struct glamofb_par *par = info->par; ++ struct drm_device *dev = par->dev; ++ struct drm_crtc *crtc; ++ struct drm_encoder *encoder; ++ int i; ++ ++ /* ++ * For each CRTC in this fb, find all associated encoders ++ * and turn them off, then turn off the CRTC. ++ */ ++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { ++ struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; ++ ++ for (i = 0; i < par->crtc_count; i++) ++ if (crtc->base.id == par->crtc_ids[i]) ++ break; ++ ++ crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON); ++ ++ /* Found a CRTC on this fb, now find encoders */ ++ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { ++ if (encoder->crtc == crtc) { ++ struct drm_encoder_helper_funcs *encoder_funcs; ++ encoder_funcs = encoder->helper_private; ++ encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON); ++ } ++ } ++ } ++} ++ ++static void glamofb_off(struct fb_info *info, int dpms_mode) ++{ ++ struct glamofb_par *par = info->par; ++ struct drm_device *dev = par->dev; ++ struct drm_crtc *crtc; ++ struct drm_encoder *encoder; ++ int i; ++ ++ /* ++ * For each CRTC in this fb, find all associated encoders ++ * and turn them off, then turn off the CRTC. ++ */ ++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { ++ struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; ++ ++ for (i = 0; i < par->crtc_count; i++) ++ if (crtc->base.id == par->crtc_ids[i]) ++ break; ++ ++ /* Found a CRTC on this fb, now find encoders */ ++ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { ++ if (encoder->crtc == crtc) { ++ struct drm_encoder_helper_funcs *encoder_funcs; ++ encoder_funcs = encoder->helper_private; ++ encoder_funcs->dpms(encoder, dpms_mode); ++ } ++ } ++ if (dpms_mode == DRM_MODE_DPMS_OFF) ++ crtc_funcs->dpms(crtc, dpms_mode); ++ } ++} ++ ++static int glamofb_blank(int blank, struct fb_info *info) ++{ ++ switch (blank) { ++ case FB_BLANK_UNBLANK: ++ glamofb_on(info); ++ break; ++ case FB_BLANK_NORMAL: ++ glamofb_off(info, DRM_MODE_DPMS_STANDBY); ++ break; ++ case FB_BLANK_HSYNC_SUSPEND: ++ glamofb_off(info, DRM_MODE_DPMS_STANDBY); ++ break; ++ case FB_BLANK_VSYNC_SUSPEND: ++ glamofb_off(info, DRM_MODE_DPMS_SUSPEND); ++ break; ++ case FB_BLANK_POWERDOWN: ++ glamofb_off(info, DRM_MODE_DPMS_OFF); ++ break; ++ } ++ return 0; ++} ++ ++static struct fb_ops glamofb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = glamofb_check_var, ++ .fb_set_par = glamofb_set_par, ++ .fb_setcolreg = glamofb_setcolreg, ++ .fb_fillrect = cfb_fillrect, ++ .fb_copyarea = cfb_copyarea, ++ .fb_imageblit = cfb_imageblit, ++ .fb_pan_display = glamofb_pan_display, ++ .fb_blank = glamofb_blank, ++}; ++ ++ ++#define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1) ++ ++ ++/* Here, we create a GEM object of the correct size, and then turn it into ++ * /dev/fbX so that the kernel can put a console on it. */ ++int glamofb_create(struct drm_device *dev, uint32_t fb_width, ++ uint32_t fb_height, uint32_t surface_width, ++ uint32_t surface_height, int colour_mode, ++ struct glamo_framebuffer **glamo_fb_p) ++{ ++ struct fb_info *info; ++ struct glamofb_par *par; ++ struct drm_framebuffer *fb; ++ struct glamo_framebuffer *glamo_fb; ++ struct drm_mode_fb_cmd mode_cmd; ++ struct drm_gem_object *fbo = NULL; ++ struct drm_glamo_gem_object *gobj; ++ struct device *device = &dev->platform_dev->dev; ++ struct glamodrm_handle *gdrm; ++ int size, ret; ++ unsigned long offs; ++ ++ gdrm = dev->dev_private; ++ ++ mode_cmd.width = surface_width; ++ mode_cmd.height = surface_height; ++ ++ mode_cmd.bpp = 16; ++ mode_cmd.pitch = ALIGN(mode_cmd.width * ((mode_cmd.bpp + 1) / 8), 64); ++ mode_cmd.depth = 16; ++ ++ size = mode_cmd.pitch * mode_cmd.height; ++ size = ALIGN(size, PAGE_SIZE); ++ if ( size > GLAMO_FRAMEBUFFER_ALLOCATION ) { ++ printk(KERN_ERR "[glamo-drm] Not enough memory for fb\n"); ++ ret = -ENOMEM; ++ goto out; ++ } ++ fbo = glamo_gem_object_alloc(dev, GLAMO_FRAMEBUFFER_ALLOCATION, 2); ++ if (!fbo) { ++ printk(KERN_ERR "[glamo-drm] Failed to allocate framebuffer\n"); ++ ret = -ENOMEM; ++ goto out; ++ } ++ gobj = fbo->driver_private; ++ ++ mutex_lock(&dev->struct_mutex); ++ ++ ret = glamo_framebuffer_create(dev, &mode_cmd, &fb, fbo); ++ if (ret) { ++ DRM_ERROR("failed to allocate fb.\n"); ++ goto out_unref; ++ } ++ ++ list_add(&fb->filp_head, &dev->mode_config.fb_kernel_list); ++ ++ glamo_fb = to_glamo_framebuffer(fb); ++ *glamo_fb_p = glamo_fb; ++ ++ info = framebuffer_alloc(sizeof(struct glamofb_par), device); ++ if (!info) { ++ ret = -ENOMEM; ++ goto out_unref; ++ } ++ ++ par = info->par; ++ ++ strcpy(info->fix.id, "glamodrmfb"); ++ info->fix.type = FB_TYPE_PACKED_PIXELS; ++ info->fix.visual = FB_VISUAL_TRUECOLOR; ++ info->fix.type_aux = 0; ++ info->fix.xpanstep = 1; /* doing it in hw */ ++ info->fix.ypanstep = 1; /* doing it in hw */ ++ info->fix.ywrapstep = 0; ++ info->fix.accel = FB_ACCEL_GLAMO; ++ info->fix.type_aux = 0; ++ info->flags = FBINFO_DEFAULT; ++ ++ info->fbops = &glamofb_ops; ++ ++ info->fix.line_length = fb->pitch; ++ info->fix.smem_start = dev->mode_config.fb_base ++ + (unsigned long) gdrm->vram->start; ++ info->fix.smem_len = size; ++ ++ info->flags = FBINFO_DEFAULT; ++ ++ offs = gobj->block->start; ++ info->screen_base = ioremap(gdrm->vram->start + offs + GLAMO_OFFSET_FB, ++ GLAMO_FRAMEBUFFER_ALLOCATION); ++ if (!info->screen_base) { ++ printk(KERN_ERR "[glamo-drm] Couldn't map framebuffer!\n"); ++ ret = -ENOSPC; ++ goto out_unref; ++ } ++ info->screen_size = size; ++ ++ info->pseudo_palette = fb->pseudo_palette; ++ info->var.xres_virtual = fb->width; ++ info->var.yres_virtual = fb->height; ++ info->var.bits_per_pixel = fb->bits_per_pixel; ++ info->var.xoffset = 0; ++ info->var.yoffset = 0; ++ info->var.activate = FB_ACTIVATE_NOW; ++ info->var.height = -1; ++ info->var.width = -1; ++ info->var.xres = fb_width; ++ info->var.yres = fb_height; ++ ++ info->fix.mmio_start = 0; ++ info->fix.mmio_len = 0; ++ ++ info->pixmap.size = 64*1024; ++ info->pixmap.buf_align = 8; ++ info->pixmap.access_align = 32; ++ info->pixmap.flags = FB_PIXMAP_SYSTEM; ++ info->pixmap.scan_align = 1; ++ ++ switch (fb->depth) { ++ case 16: ++ switch ( colour_mode ) { ++ case GLAMO_FB_RGB565: ++ info->var.red.offset = 11; ++ info->var.green.offset = 5; ++ info->var.blue.offset = 0; ++ info->var.red.length = 5; ++ info->var.green.length = 6; ++ info->var.blue.length = 5; ++ info->var.transp.length = 0; ++ break; ++ case GLAMO_FB_ARGB1555: ++ info->var.transp.offset = 15; ++ info->var.red.offset = 10; ++ info->var.green.offset = 5; ++ info->var.blue.offset = 0; ++ info->var.transp.length = 1; ++ info->var.red.length = 5; ++ info->var.green.length = 5; ++ info->var.blue.length = 5; ++ break; ++ case GLAMO_FB_ARGB4444: ++ info->var.transp.offset = 12; ++ info->var.red.offset = 8; ++ info->var.green.offset = 4; ++ info->var.blue.offset = 0; ++ info->var.transp.length = 4; ++ info->var.red.length = 4; ++ info->var.green.length = 4; ++ info->var.blue.length = 4; ++ break; ++ } ++ break; ++ case 24: ++ case 32: ++ default: ++ /* The Smedia Glamo doesn't support anything but 16bit color */ ++ printk(KERN_ERR "[glamo-drm] Only 16bpp is supported.\n"); ++ return -EINVAL; ++ } ++ ++ fb->fbdev = info; ++ par->glamo_fb = glamo_fb; ++ par->dev = dev; ++ gdrm->fb = info; ++ ++ info->var.pixclock = -1; ++ ++ printk(KERN_INFO "[glamo-drm] Allocated %dx%d fb: bo %p\n", ++ glamo_fb->base.width, glamo_fb->base.height, fbo); ++ mutex_unlock(&dev->struct_mutex); ++ return 0; ++ ++out_unref: ++ drm_gem_object_unreference(fbo); ++ mutex_unlock(&dev->struct_mutex); ++out: ++ return ret; ++} ++ ++ ++void glamo_kmsfb_suspend(struct glamodrm_handle *gdrm) ++{ ++ fb_set_suspend(gdrm->fb, 1); ++} ++ ++ ++void glamo_kmsfb_resume(struct glamodrm_handle *gdrm) ++{ ++ fb_set_suspend(gdrm->fb, 0); ++} +diff --git a/drivers/mfd/glamo/glamo-kms-fb.h b/drivers/mfd/glamo/glamo-kms-fb.h +new file mode 100644 +index 0000000..1960e76 +--- /dev/null ++++ b/drivers/mfd/glamo/glamo-kms-fb.h +@@ -0,0 +1,41 @@ ++/* ++ * SMedia Glamo 336x/337x KMS framebuffer ++ * ++ * Copyright (C) 2009 Thomas White <taw@bitwiz.org.uk> ++ * ++ * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc. ++ * Author: Harald Welte <laforge@openmoko.org> ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#ifndef __GLAMO_KMS_FB_H ++#define __GLAMO_KMS_FB_H ++ ++#include <drm/drmP.h> ++#include "glamo-drm-private.h" ++ ++extern int glamofb_create(struct drm_device *dev, uint32_t fb_width, ++ uint32_t fb_height, uint32_t surface_width, ++ uint32_t surface_height, int colour_mode, ++ struct glamo_framebuffer **glamo_fb_p); ++ ++extern void glamo_kmsfb_suspend(struct glamodrm_handle *gdrm); ++extern void glamo_kmsfb_resume(struct glamodrm_handle *gdrm); ++ ++#endif /* __GLAMO_KMS_FB_H */ +diff --git a/include/drm/Kbuild b/include/drm/Kbuild +index b940fdf..48b7b55 100644 +--- a/include/drm/Kbuild ++++ b/include/drm/Kbuild +@@ -8,3 +8,4 @@ unifdef-y += radeon_drm.h + unifdef-y += sis_drm.h + unifdef-y += savage_drm.h + unifdef-y += via_drm.h ++unifdef-y += glamo_drm.h +diff --git a/include/drm/glamo_drm.h b/include/drm/glamo_drm.h +new file mode 100644 +index 0000000..4c194dc +--- /dev/null ++++ b/include/drm/glamo_drm.h +@@ -0,0 +1,153 @@ ++/* glamo_drm.h -- Public header for the Glamo driver ++ * ++ * Copyright 2009 Thomas White ++ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. ++ * Copyright 2000 VA Linux Systems, Inc., Fremont, California. ++ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. ++ * All rights reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: ++ * Thomas White <taw@bitwiz.org.uk> ++ * Kevin E. Martin <martin@valinux.com> ++ * Gareth Hughes <gareth@valinux.com> ++ * Keith Whitwell <keith@tungstengraphics.com> ++ */ ++ ++#ifndef __GLAMO_DRM_H__ ++#define __GLAMO_DRM_H__ ++ ++#include "drm.h" ++ ++#define GLAMO_GEM_DOMAIN_VRAM (0x1) ++ ++/* Glamo specific ioctls */ ++#define DRM_GLAMO_CMDBUF 0x01 ++#define DRM_GLAMO_SWAP 0x02 ++#define DRM_GLAMO_CMDBURST 0x03 ++ ++#define DRM_GLAMO_GEM_INFO 0x1c ++#define DRM_GLAMO_GEM_CREATE 0x1d ++#define DRM_GLAMO_GEM_MMAP 0x1e ++#define DRM_GLAMO_GEM_PIN 0x1f ++#define DRM_GLAMO_GEM_UNPIN 0x20 ++#define DRM_GLAMO_GEM_PREAD 0x21 ++#define DRM_GLAMO_GEM_PWRITE 0x22 ++#define DRM_GLAMO_GEM_WAIT_RENDERING 0x24 ++ ++#define DRM_IOCTL_GLAMO_CMDBUF DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_CMDBUF, drm_glamo_cmd_buffer_t) ++#define DRM_IOCTL_GLAMO_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_GLAMO_SWAP) ++#define DRM_IOCTL_GLAMO_CMDBURST DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_CMDBURST, drm_glamo_cmd_burst_t) ++ ++#define DRM_IOCTL_GLAMO_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_INFO, struct drm_glamo_gem_info) ++#define DRM_IOCTL_GLAMO_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_CREATE, struct drm_glamo_gem_create) ++#define DRM_IOCTL_GLAMO_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_MMAP, struct drm_glamo_gem_mmap) ++#define DRM_IOCTL_GLAMO_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PIN, struct drm_glamo_gem_pin) ++#define DRM_IOCTL_GLAMO_GEM_UNPIN DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_UNPIN, struct drm_glamo_gem_unpin) ++#define DRM_IOCTL_GLAMO_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PREAD, struct drm_glamo_gem_pread) ++#define DRM_IOCTL_GLAMO_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_GLAMO_GEM_PWRITE, struct drm_glamo_gem_pwrite) ++#define DRM_IOCTL_GLAMO_GEM_WAIT_RENDERING DRM_IOW(DRM_COMMAND_BASE + DRM_GLAMO_GEM_WAIT_RENDERING, struct drm_glamo_gem_wait_rendering) ++ ++ ++/* Simple command submission - a list of 16-bit address-data pairs */ ++typedef struct drm_glamo_cmd_buffer { ++ unsigned int bufsz; /* Size of buffer, in bytes */ ++ char __user *buf; /* Buffer of stuff to go onto the ring buffer */ ++ unsigned int *obj_pos; /* Offsets (in bytes) at which to put objs */ ++ uint32_t *objs; /* List of buffer object (handles) to use */ ++ unsigned int nobjs; /* Number of objects referenced */ ++ int nbox; ++ struct drm_clip_rect __user *boxes; ++} drm_glamo_cmd_buffer_t; ++ ++ ++/* Burst command submission - base address and data: ++ * - Data can be 32-bit (more easily) ++ * - Easier for the kernel to validate */ ++typedef struct drm_glamo_cmd_burst { ++ uint16_t base; /* Base address (command) */ ++ int bufsz; /* Size of data, in bytes */ ++ uint16_t *data; /* Pointer to data */ ++ unsigned int *obj_pos; /* Offsets (in bytes) at which to put objs */ ++ uint32_t *objs; /* List of buffer object (handles) to use */ ++ unsigned int nobjs; /* Number of objects referenced */ ++} drm_glamo_cmd_burst_t; ++ ++struct drm_glamo_gem_info { ++ uint64_t vram_start; ++ uint64_t vram_size; ++}; ++ ++struct drm_glamo_gem_create { ++ uint64_t size; ++ uint64_t alignment; ++ uint32_t handle; ++ uint32_t initial_domain; // to allow VRAM to be created ++ uint32_t no_backing_store; ++}; ++ ++struct drm_glamo_gem_mmap { ++ uint32_t handle; /* Handle goes in... */ ++ uint64_t offset; /* ...offset comes out */ ++}; ++ ++struct drm_glamo_gem_wait_rendering { ++ uint32_t handle; ++ int have_handle; ++}; ++ ++struct drm_glamo_gem_pin { ++ uint32_t handle; ++ uint32_t pin_domain; ++ uint64_t alignment; ++ uint64_t offset; ++}; ++ ++struct drm_glamo_gem_unpin { ++ uint32_t handle; ++ uint32_t pad; ++}; ++ ++struct drm_glamo_gem_pread { ++ /** Handle for the object being read. */ ++ uint32_t handle; ++ uint32_t pad; ++ /** Offset into the object to read from */ ++ uint64_t offset; ++ /** Length of data to read */ ++ uint64_t size; ++ /** Pointer to write the data into. */ ++ uint64_t data_ptr; /* void *, but pointers are not 32/64 compatible */ ++}; ++ ++struct drm_glamo_gem_pwrite { ++ /** Handle for the object being written to. */ ++ uint32_t handle; ++ uint32_t pad; ++ /** Offset into the object to write to */ ++ uint64_t offset; ++ /** Length of data to write */ ++ uint64_t size; ++ /** Pointer to read the data from. */ ++ uint64_t data_ptr; /* void *, but pointers are not 32/64 compatible */ ++}; ++ ++#endif +-- +1.6.5.3 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0003-Work-on-Glamo-core-for-DRM.patch b/recipes/linux/linux-openmoko-2.6.31/0003-Work-on-Glamo-core-for-DRM.patch new file mode 100644 index 0000000000..76223ed136 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0003-Work-on-Glamo-core-for-DRM.patch @@ -0,0 +1,252 @@ +From 50c9919c9bc7d3e1db72dcbdd62d73efad409720 Mon Sep 17 00:00:00 2001 +From: Thomas White <taw@bitwiz.org.uk> +Date: Tue, 17 Nov 2009 23:45:29 +0100 +Subject: [PATCH 3/4] Work on Glamo-core for DRM + +This adds modifications to the core of the Glamo driver to expose functionality +to support DRM and KMS. + +Signed-off-by: Thomas White <taw@bitwiz.org.uk> +--- + drivers/mfd/glamo/glamo-core.c | 85 +++++++++++++++++++++++++++++++++++++--- + drivers/mfd/glamo/glamo-core.h | 45 ++++++++++++++++----- + drivers/mfd/glamo/glamo-regs.h | 24 +++++++++++ + include/linux/mfd/glamo.h | 7 +-- + 4 files changed, 140 insertions(+), 21 deletions(-) + +diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c +index e0e3940..32aeff1 100644 +--- a/drivers/mfd/glamo/glamo-core.c ++++ b/drivers/mfd/glamo/glamo-core.c +@@ -221,10 +221,31 @@ static struct resource glamo_fb_resources[] = { + .flags = IORESOURCE_MEM, + }, { + .name = "glamo-fb-mem", +- .start = GLAMO_OFFSET_FB, +- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1, ++ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_FB, ++ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1, + .flags = IORESOURCE_MEM, +- }, ++ }, { ++ .name = "glamo-cmdq-regs", ++ .start = GLAMO_REGOFS_CMDQUEUE, ++ .end = GLAMO_REGOFS_RISC - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .name = "glamo-command-queue", ++ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ, ++ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ + ++ GLAMO_CMDQ_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .name = "glamo-2d-regs", ++ .start = GLAMO_REGOFS_2D, ++ .end = GLAMO_REGOFS_3D- 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .name = "glamo-2d-irq", ++ .start = GLAMO_IRQ_2D, ++ .end = GLAMO_IRQ_2D, ++ .flags = IORESOURCE_IRQ, ++ } + }; + + static struct resource glamo_mmc_resources[] = { +@@ -235,9 +256,9 @@ static struct resource glamo_mmc_resources[] = { + .flags = IORESOURCE_MEM + }, { + .name = "glamo-mmc-mem", +- .start = GLAMO_OFFSET_FB + GLAMO_FB_SIZE, +- .end = GLAMO_OFFSET_FB + GLAMO_FB_SIZE + +- GLAMO_MMC_BUFFER_SIZE - 1, ++ .start = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC, ++ .end = GLAMO_MEM_BASE + GLAMO_OFFSET_MMC ++ + GLAMO_MMC_BUFFER_SIZE - 1, + .flags = IORESOURCE_MEM + }, { + .start = GLAMO_IRQ_MMC, +@@ -354,6 +375,24 @@ static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc) + sysfs + */ + ++void glamo_clear_irq(struct glamo_core *glamo, unsigned int irq) ++{ ++ /* set interrupt source */ ++ __reg_write(glamo, GLAMO_REG_IRQ_CLEAR, irq); ++} ++ ++ ++void glamo_enable_irq(struct glamo_core *glamo, unsigned int irq) ++{ ++ u_int16_t tmp; ++ ++ /* set bit in enable register */ ++ tmp = __reg_read(glamo, GLAMO_REG_IRQ_ENABLE); ++ tmp |= irq; ++ __reg_write(glamo, GLAMO_REG_IRQ_ENABLE, tmp); ++} ++ ++ + static ssize_t regs_write(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) + { +@@ -579,6 +618,40 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine) + } + EXPORT_SYMBOL_GPL(glamo_engine_disable); + ++ ++static const u_int16_t engine_clock_regs[__NUM_GLAMO_ENGINES] = { ++ [GLAMO_ENGINE_LCD] = GLAMO_REG_CLOCK_LCD, ++ [GLAMO_ENGINE_MMC] = GLAMO_REG_CLOCK_MMC, ++ [GLAMO_ENGINE_ISP] = GLAMO_REG_CLOCK_ISP, ++ [GLAMO_ENGINE_JPEG] = GLAMO_REG_CLOCK_JPEG, ++ [GLAMO_ENGINE_3D] = GLAMO_REG_CLOCK_3D, ++ [GLAMO_ENGINE_2D] = GLAMO_REG_CLOCK_2D, ++ [GLAMO_ENGINE_MPEG_ENC] = GLAMO_REG_CLOCK_MPEG, ++ [GLAMO_ENGINE_MPEG_DEC] = GLAMO_REG_CLOCK_MPEG, ++}; ++ ++void glamo_engine_clkreg_set(struct glamo_core *glamo, ++ enum glamo_engine engine, ++ u_int16_t mask, u_int16_t val) ++{ ++ reg_set_bit_mask(glamo, engine_clock_regs[engine], mask, val); ++} ++EXPORT_SYMBOL_GPL(glamo_engine_clkreg_set); ++ ++u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo, ++ enum glamo_engine engine) ++{ ++ u_int16_t val; ++ ++ spin_lock(&glamo->lock); ++ val = __reg_read(glamo, engine_clock_regs[engine]); ++ spin_unlock(&glamo->lock); ++ ++ return val; ++} ++EXPORT_SYMBOL_GPL(glamo_engine_clkreg_get); ++ ++ + int __glamo_engine_suspend(struct glamo_core *glamo, enum glamo_engine engine) + { + int i; +diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h +index e5b1a35..ea6caa3 100644 +--- a/drivers/mfd/glamo/glamo-core.h ++++ b/drivers/mfd/glamo/glamo-core.h +@@ -3,18 +3,33 @@ + + #include <linux/mfd/glamo.h> + ++/* Amount of Glamo memory */ ++#define GLAMO_INTERNAL_RAM_SIZE 0x800000 ++ ++/* Arbitrarily determined amount for the hardware cursor */ ++#define GLAMO_CURSOR_SIZE (4096) ++#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) /* 64k MMC buffer */ ++#define GLAMO_CMDQ_SIZE (128 * 1024) /* 128k ring buffer */ ++/* Remaining memory will be used for 2D and 3D graphics */ ++#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE \ ++ - GLAMO_CURSOR_SIZE \ ++ - GLAMO_MMC_BUFFER_SIZE \ ++ - GLAMO_CMDQ_SIZE) ++/* A 640x480, 16bpp, double-buffered framebuffer */ ++#if (GLAMO_FB_SIZE < (640 * 480 * 4)) /* == 0x12c000 */ ++#error Not enough Glamo VRAM for framebuffer! ++#endif ++ + /* for the time being, we put the on-screen framebuffer into the lowest + * VRAM space. This should make the code easily compatible with the various +- * 2MB/4MB/8MB variants of the Smedia chips */ +-#define GLAMO_OFFSET_VRAM 0x800000 +-#define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM) +- +-/* we only allocate the minimum possible size for the framebuffer to make +- * sure we have sufficient memory for other functions of the chip */ +-/*#define GLAMO_FB_SIZE (640*480*4) *//* == 0x12c000 */ +-#define GLAMO_INTERNAL_RAM_SIZE 0x800000 +-#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) +-#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE) ++ * 2MB/4MB/8MB variants of the Smedia chips ++ * glamo-fb.c assumes FB comes first, followed by cursor, so DON'T MOVE THEM ++ * (see glamo_regs[] in glamo-fb.c for more information) */ ++#define GLAMO_MEM_BASE (0x800000) ++#define GLAMO_OFFSET_FB (0x000000) ++#define GLAMO_OFFSET_CURSOR (GLAMO_OFFSET_FB + GLAMO_FB_SIZE) ++#define GLAMO_OFFSET_MMC (GLAMO_OFFSET_CURSOR + GLAMO_CURSOR_SIZE) ++#define GLAMO_OFFSET_CMDQ (GLAMO_OFFSET_MMC + GLAMO_MMC_BUFFER_SIZE) + + enum glamo_pll { + GLAMO_PLL1, +@@ -57,4 +72,14 @@ void glamo_reg_read_batch(struct glamo_core *glamo, uint16_t reg, + uint16_t count, uint16_t *values); + void glamo_reg_write_batch(struct glamo_core *glamo, uint16_t reg, + uint16_t count, uint16_t *values); ++void glamo_engine_clkreg_set(struct glamo_core *glamo, ++ enum glamo_engine engine, ++ u_int16_t mask, u_int16_t val); ++ ++extern void glamo_clear_irq(struct glamo_core *glamo, unsigned int irq); ++extern void glamo_enable_irq(struct glamo_core *glamo, unsigned int irq); ++ ++u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo, ++ enum glamo_engine engine); ++ + #endif /* __GLAMO_CORE_H */ +diff --git a/drivers/mfd/glamo/glamo-regs.h b/drivers/mfd/glamo/glamo-regs.h +index 59848e1..8b2fd47 100644 +--- a/drivers/mfd/glamo/glamo-regs.h ++++ b/drivers/mfd/glamo/glamo-regs.h +@@ -627,4 +627,28 @@ enum glamo_core_revisions { + GLAMO_CORE_REV_A3 = 0x0003, + }; + ++enum glamo_register_cq { ++ GLAMO_REG_CMDQ_BASE_ADDRL = 0x00, ++ GLAMO_REG_CMDQ_BASE_ADDRH = 0x02, ++ GLAMO_REG_CMDQ_LEN = 0x04, ++ GLAMO_REG_CMDQ_WRITE_ADDRL = 0x06, ++ GLAMO_REG_CMDQ_WRITE_ADDRH = 0x08, ++ GLAMO_REG_CMDQ_FLIP = 0x0a, ++ GLAMO_REG_CMDQ_CONTROL = 0x0c, ++ GLAMO_REG_CMDQ_READ_ADDRL = 0x0e, ++ GLAMO_REG_CMDQ_READ_ADDRH = 0x10, ++ GLAMO_REG_CMDQ_STATUS = 0x12, ++}; ++ ++#define REG_2D(x) (GLAMO_REGOFS_2D+(x)) ++ ++enum glamo_register_2d { ++ GLAMO_REG_2D_DST_X = REG_2D(0x0a), ++ GLAMO_REG_2D_COMMAND1 = REG_2D(0x3a), ++ GLAMO_REG_2D_STATUS = REG_2D(0x42), ++ GLAMO_REG_2D_ID1 = REG_2D(0x44), ++ GLAMO_REG_2D_ID2 = REG_2D(0x46), ++ GLAMO_REG_2D_ID3 = REG_2D(0x48), ++}; ++ + #endif /* _GLAMO_REGS_H */ +diff --git a/include/linux/mfd/glamo.h b/include/linux/mfd/glamo.h +index 529d4f0..ea91a06 100644 +--- a/include/linux/mfd/glamo.h ++++ b/include/linux/mfd/glamo.h +@@ -41,12 +41,9 @@ enum glamo_engine { + GLAMO_ENGINE_RISC = 11, + GLAMO_ENGINE_MICROP1_MPEG_ENC = 12, + GLAMO_ENGINE_MICROP1_MPEG_DEC = 13, +-#if 0 +- GLAMO_ENGINE_H264_DEC = 14, +- GLAMO_ENGINE_RISC1 = 15, +- GLAMO_ENGINE_SPI = 16, +-#endif + __NUM_GLAMO_ENGINES + }; + ++#define GLAMO_ENGINE_ALL (__NUM_GLAMO_ENGINES) ++ + #endif +-- +1.6.5.3 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0004-Add-JBT6k74-hook-for-use-by-KMS.patch b/recipes/linux/linux-openmoko-2.6.31/0004-Add-JBT6k74-hook-for-use-by-KMS.patch new file mode 100644 index 0000000000..a223f5b7a9 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0004-Add-JBT6k74-hook-for-use-by-KMS.patch @@ -0,0 +1,49 @@ +From 6035b76b940c71e30824921271e8c3da8047f869 Mon Sep 17 00:00:00 2001 +From: Thomas White <taw@bitwiz.org.uk> +Date: Sat, 21 Nov 2009 21:42:16 +0100 +Subject: [PATCH 4/4] Add JBT6k74 hook for use by KMS + +Signed-off-by: Thomas White <taw@bitwiz.org.uk> +--- + drivers/video/backlight/jbt6k74.c | 18 ++++++++++++++++++ + 1 files changed, 18 insertions(+), 0 deletions(-) + +diff --git a/drivers/video/backlight/jbt6k74.c b/drivers/video/backlight/jbt6k74.c +index b1aacb7..b9d02f2 100644 +--- a/drivers/video/backlight/jbt6k74.c ++++ b/drivers/video/backlight/jbt6k74.c +@@ -688,6 +688,22 @@ static int jbt6k74_get_power(struct lcd_device *ld) + } + } + ++/* This is utterly, totally horrible. I'm REALLY sorry... */ ++struct jbt_info *jbt_global; ++void jbt6k74_action(int val) ++{ ++ if ( !jbt_global ) { ++ printk(KERN_CRIT "JBT not initialised!!!\n"); ++ return; ++ } ++ if ( val == 0 ) { ++ jbt6k74_enter_power_mode(jbt_global, JBT_POWER_MODE_SLEEP); ++ } else { ++ jbt6k74_enter_power_mode(jbt_global, JBT_POWER_MODE_NORMAL); ++ } ++} ++EXPORT_SYMBOL_GPL(jbt6k74_action); ++ + struct lcd_ops jbt6k74_lcd_ops = { + .set_power = jbt6k74_set_power, + .get_power = jbt6k74_get_power, +@@ -718,6 +734,8 @@ static int __devinit jbt_probe(struct spi_device *spi) + if (!jbt) + return -ENOMEM; + ++ jbt_global = jbt; ++ + jbt->spi = spi; + + jbt->lcd_dev = lcd_device_register("jbt6k74-lcd", &spi->dev, jbt, +-- +1.6.5.3 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0004-gta02_defconfig-Enable-UBI-support.patch b/recipes/linux/linux-openmoko-2.6.31/0004-gta02_defconfig-Enable-UBI-support.patch new file mode 100644 index 0000000000..4ab88d3672 --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0004-gta02_defconfig-Enable-UBI-support.patch @@ -0,0 +1,67 @@ +From 513b35171de9efbbc0699bff5f2e5a324d2cd8ef Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 11:22:13 +0100 +Subject: [PATCH 4/5] gta02_defconfig: Enable UBI support + +--- + arch/arm/configs/gta02_defconfig | 22 +++++++++++++++++++--- + 1 files changed, 19 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/configs/gta02_defconfig b/arch/arm/configs/gta02_defconfig +index b0a6d72..3f1b60b 100644 +--- a/arch/arm/configs/gta02_defconfig ++++ b/arch/arm/configs/gta02_defconfig +@@ -648,7 +648,15 @@ CONFIG_MTD_NAND_S3C2410=y + # + # UBI - Unsorted block images + # +-# CONFIG_MTD_UBI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_RESERVE=1 ++CONFIG_MTD_UBI_GLUEBI=y ++ ++# ++# UBI debugging options ++# ++# CONFIG_MTD_UBI_DEBUG is not set + # CONFIG_PARPORT is not set + CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set +@@ -1478,6 +1486,12 @@ CONFIG_JFFS2_ZLIB=y + # CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_XATTR is not set ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_FS_DEBUG is not set + # CONFIG_CRAMFS is not set + # CONFIG_SQUASHFS is not set + # CONFIG_VXFS_FS is not set +@@ -1670,9 +1684,9 @@ CONFIG_CRYPTO_MD5=y + # + # Compression + # +-# CONFIG_CRYPTO_DEFLATE is not set ++CONFIG_CRYPTO_DEFLATE=y + CONFIG_CRYPTO_ZLIB=y +-# CONFIG_CRYPTO_LZO is not set ++CONFIG_CRYPTO_LZO=y + + # + # Random Number Generation +@@ -1695,6 +1709,8 @@ CONFIG_CRC7=y + # CONFIG_LIBCRC32C is not set + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y + CONFIG_DECOMPRESS_GZIP=y + CONFIG_DECOMPRESS_BZIP2=y + CONFIG_DECOMPRESS_LZMA=y +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-2.6.31/0005-gta02_defconfig-Enable-UBI-debug.patch b/recipes/linux/linux-openmoko-2.6.31/0005-gta02_defconfig-Enable-UBI-debug.patch new file mode 100644 index 0000000000..19c602a15c --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31/0005-gta02_defconfig-Enable-UBI-debug.patch @@ -0,0 +1,88 @@ +From 5ae14aa9c5eea7178a8de28515b45d600ecb7a13 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 11:24:01 +0100 +Subject: [PATCH 5/5] gta02_defconfig: Enable UBI debug + +--- + arch/arm/configs/gta02_defconfig | 23 +++++++++++++++++++++-- + 1 files changed, 21 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/configs/gta02_defconfig b/arch/arm/configs/gta02_defconfig +index 3f1b60b..0f53baf 100644 +--- a/arch/arm/configs/gta02_defconfig ++++ b/arch/arm/configs/gta02_defconfig +@@ -76,6 +76,7 @@ CONFIG_ANON_INODES=y + CONFIG_UID16=y + CONFIG_SYSCTL_SYSCALL=y + CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y + # CONFIG_KALLSYMS_EXTRA_PASS is not set + CONFIG_HOTPLUG=y + CONFIG_PRINTK=y +@@ -110,6 +111,7 @@ CONFIG_HAVE_CLK=y + # + # GCOV-based kernel profiling + # ++# CONFIG_GCOV_KERNEL is not set + # CONFIG_SLOW_WORK is not set + CONFIG_HAVE_GENERIC_DMA_COHERENT=y + CONFIG_SLABINFO=y +@@ -656,7 +658,21 @@ CONFIG_MTD_UBI_GLUEBI=y + # + # UBI debugging options + # +-# CONFIG_MTD_UBI_DEBUG is not set ++CONFIG_MTD_UBI_DEBUG=y ++CONFIG_MTD_UBI_DEBUG_MSG=y ++# CONFIG_MTD_UBI_DEBUG_PARANOID is not set ++# CONFIG_MTD_UBI_DEBUG_DISABLE_BGT is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_BITFLIPS is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_WRITE_FAILURES is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_ERASE_FAILURES is not set ++ ++# ++# Additional UBI debugging messages ++# ++CONFIG_MTD_UBI_DEBUG_MSG_BLD=y ++CONFIG_MTD_UBI_DEBUG_MSG_EBA=y ++CONFIG_MTD_UBI_DEBUG_MSG_WL=y ++CONFIG_MTD_UBI_DEBUG_MSG_IO=y + # CONFIG_PARPORT is not set + CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set +@@ -1238,6 +1254,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y + # CONFIG_USB_VST is not set + CONFIG_USB_GADGET=y + # CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set + CONFIG_USB_GADGET_VBUS_DRAW=500 + CONFIG_USB_GADGET_SELECTED=y + # CONFIG_USB_GADGET_AT91 is not set +@@ -1419,6 +1436,7 @@ CONFIG_EXT3_FS=y + # CONFIG_EXT3_FS_XATTR is not set + # CONFIG_EXT4_FS is not set + CONFIG_JBD=y ++# CONFIG_JBD_DEBUG is not set + # CONFIG_REISERFS_FS is not set + # CONFIG_JFS_FS is not set + # CONFIG_FS_POSIX_ACL is not set +@@ -1577,7 +1595,7 @@ CONFIG_NLS_DEFAULT="iso8859-1" + CONFIG_FRAME_WARN=1024 + # CONFIG_MAGIC_SYSRQ is not set + # CONFIG_UNUSED_SYMBOLS is not set +-# CONFIG_DEBUG_FS is not set ++CONFIG_DEBUG_FS=y + # CONFIG_HEADERS_CHECK is not set + # CONFIG_DEBUG_KERNEL is not set + CONFIG_DEBUG_BUGVERBOSE=y +@@ -1589,6 +1607,7 @@ CONFIG_FRAME_POINTER=y + CONFIG_HAVE_FUNCTION_TRACER=y + CONFIG_TRACING_SUPPORT=y + # CONFIG_FTRACE is not set ++# CONFIG_DYNAMIC_DEBUG is not set + # CONFIG_SAMPLES is not set + CONFIG_HAVE_ARCH_KGDB=y + # CONFIG_ARM_UNWIND is not set +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-2.6.31_git.bb b/recipes/linux/linux-openmoko-2.6.31_git.bb new file mode 100644 index 0000000000..346cdece1e --- /dev/null +++ b/recipes/linux/linux-openmoko-2.6.31_git.bb @@ -0,0 +1,35 @@ +require linux.inc +require linux-openmoko.inc + +DESCRIPTION_${PN} = "Linux ${KERNEL_VERSION} kernel for the Openmoko Neo GSM Smartphones" + +KERNEL_RELEASE = "2.6.31" +KERNEL_VERSION = "${KERNEL_RELEASE}" + +OEV = "oe1" +PV = "${KERNEL_RELEASE}-${OEV}+gitr${SRCREV}" +PR = "r4" + +SRC_URI = "\ + git://git.openmoko.org/git/kernel.git;protocol=git;branch=om-2.6.31 \ +# build fix + file://0001-wm8753-fix-build-with-gcc-4.4.2-which-works-ok-with-.patch;patch=1 \ +# patches from Weiss's gdrm-2.6.31 branch + file://0001-DRM-for-platform-devices.patch;patch=1 \ + file://0002-Glamo-DRM-and-KMS-driver.patch;patch=1 \ + file://0003-Work-on-Glamo-core-for-DRM.patch;patch=1 \ + file://0004-Add-JBT6k74-hook-for-use-by-KMS.patch;patch=1 \ +# enable UBI+DRM + file://0004-gta02_defconfig-Enable-UBI-support.patch;patch=1 \ + file://0005-gta02_defconfig-Enable-UBI-debug.patch;patch=1 \ + file://0001-gta02_defconfig-Enable-GLAMO_DRM.patch;patch=1 \ +" + +S = "${WORKDIR}/git" + +CONFIG_NAME_om-gta01 = "gta01_defconfig" +CONFIG_NAME_om-gta02 = "gta02_defconfig" + +do_configure_prepend() { + install -m 644 ./arch/arm/configs/${CONFIG_NAME} ${WORKDIR}/defconfig-oe +} diff --git a/recipes/linux/linux-openmoko-shr-devel/0007-Enable-UBI-UBIFS.patch b/recipes/linux/linux-openmoko-shr-devel/0007-Enable-UBI-UBIFS.patch new file mode 100644 index 0000000000..796a90ff27 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-devel/0007-Enable-UBI-UBIFS.patch @@ -0,0 +1,81 @@ +From 8f907c17c068beb94264a4a6d40314658a0c1393 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 10:58:28 +0100 +Subject: [PATCH 7/7] Enable UBI/UBIFS + +--- + arch/arm/configs/gta02_packaging_defconfig | 39 ++++++++++++++++++++++++++++++--- + 1 files changed, 35 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/configs/gta02_packaging_defconfig b/arch/arm/configs/gta02_packaging_defconfig +index e17ddc3..7506963 100644 +--- a/arch/arm/configs/gta02_packaging_defconfig ++++ b/arch/arm/configs/gta02_packaging_defconfig +@@ -806,7 +806,30 @@ CONFIG_MTD_NAND_S3C2410_HWECC=y + # + # UBI - Unsorted block images + # +-# CONFIG_MTD_UBI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_RESERVE=1 ++CONFIG_MTD_UBI_GLUEBI=y ++ ++# ++# UBI debugging options ++# ++CONFIG_MTD_UBI_DEBUG=y ++CONFIG_MTD_UBI_DEBUG_MSG=y ++# CONFIG_MTD_UBI_DEBUG_PARANOID is not set ++# CONFIG_MTD_UBI_DEBUG_DISABLE_BGT is not set ++# CONFIG_MTD_UBI_DEBUG_USERSPACE_IO is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_BITFLIPS is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_WRITE_FAILURES is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_ERASE_FAILURES is not set ++ ++# ++# Additional UBI debugging messages ++# ++CONFIG_MTD_UBI_DEBUG_MSG_BLD=y ++CONFIG_MTD_UBI_DEBUG_MSG_EBA=y ++CONFIG_MTD_UBI_DEBUG_MSG_WL=y ++CONFIG_MTD_UBI_DEBUG_MSG_IO=y + # CONFIG_PARPORT is not set + CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set +@@ -1877,6 +1900,12 @@ CONFIG_JFFS2_ZLIB=y + # CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_XATTR is not set ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_FS_DEBUG is not set + CONFIG_CRAMFS=y + CONFIG_SQUASHFS=m + # CONFIG_SQUASHFS_EMBEDDED is not set +@@ -2151,8 +2180,8 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m + # + # Compression + # +-CONFIG_CRYPTO_DEFLATE=m +-# CONFIG_CRYPTO_LZO is not set ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y + + # + # Random Number Generation +@@ -2174,6 +2203,8 @@ CONFIG_CRC32=y + CONFIG_LIBCRC32C=m + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y + CONFIG_TEXTSEARCH=y + CONFIG_TEXTSEARCH_KMP=m + CONFIG_TEXTSEARCH_BM=m +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-devel/fix-install.patch b/recipes/linux/linux-openmoko-shr-devel/fix-install.patch new file mode 100644 index 0000000000..b14ca7d740 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-devel/fix-install.patch @@ -0,0 +1,23 @@ +From: Steve Sakoman <steve@sakoman.com> +Date: Mon, 18 Aug 2008 16:07:31 +0000 (-0700) +Subject: scripts/Makefile.fwinst: add missing space when setting mode in cmd_install +X-Git-Url: http://www.sakoman.net/cgi-bin/gitweb.cgi?p=linux-omap-2.6.git;a=commitdiff_plain;h=f039944bdd491cde7327133e9976881d3133ae70 + +scripts/Makefile.fwinst: add missing space when setting mode in cmd_install + +This was causing build failures on some machines +--- + +diff --git a/scripts/Makefile.fwinst b/scripts/Makefile.fwinst +index 6bf8e87..fb20532 100644 +--- a/scripts/Makefile.fwinst ++++ b/scripts/Makefile.fwinst +@@ -37,7 +37,7 @@ + @true + + quiet_cmd_install = INSTALL $(subst $(srctree)/,,$@) +- cmd_install = $(INSTALL) -m0644 $< $@ ++ cmd_install = $(INSTALL) -m 0644 $< $@ + + $(installed-fw-dirs): + $(call cmd,mkdir) diff --git a/recipes/linux/linux-openmoko-shr-devel_git.bb b/recipes/linux/linux-openmoko-shr-devel_git.bb new file mode 100644 index 0000000000..26a995d0b8 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-devel_git.bb @@ -0,0 +1,26 @@ +require linux.inc +require linux-openmoko.inc + +DESCRIPTION_${PN} = "Linux ${KERNEL_VERSION} kernel for the Openmoko Neo GSM Smartphones" + +KERNEL_RELEASE = "2.6.29" +KERNEL_VERSION = "2.6.29-rc3" + +OMV = "oe11" +PV = "${KERNEL_RELEASE}-${OMV}+gitr${SRCREV}" +PR = "r5" + +SRC_URI = "\ + git://git.openmoko.org/git/kernel.git;protocol=git;branch=andy-tracking \ + file://fix-install.patch;patch=1 \ + file://0007-Enable-UBI-UBIFS.patch;patch=1 \ +" +S = "${WORKDIR}/git" + +CONFIG_NAME_om-gta01 = "gta01_moredrivers_defconfig" +CONFIG_NAME_om-gta02 = "gta02_packaging_defconfig" +CONFIG_NAME_om-gta03 = "gta03_defconfig" + +do_configure_prepend() { + install -m 644 ./arch/arm/configs/${CONFIG_NAME} ${WORKDIR}/defconfig-oe +} diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0001-Add-drm-to-Makefile-version.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0001-Add-drm-to-Makefile-version.patch new file mode 100644 index 0000000000..99345f7d54 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0001-Add-drm-to-Makefile-version.patch @@ -0,0 +1,25 @@ +From 153af7f8e784e03401dc103f16741397ce6ca914 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 12:50:40 +0100 +Subject: [PATCH] Add -drm to Makefile version + +--- + Makefile | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/Makefile b/Makefile +index ebf0aa4..16b189f 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + VERSION = 2 + PATCHLEVEL = 6 + SUBLEVEL = 29 +-EXTRAVERSION += -rc3 ++EXTRAVERSION += -rc3-drm + NAME = Erotic Pickled Herring + + # *DOCUMENTATION* +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0001-Fix-s3c-adc-suspend.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0001-Fix-s3c-adc-suspend.patch new file mode 100644 index 0000000000..6627e698f0 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0001-Fix-s3c-adc-suspend.patch @@ -0,0 +1,128 @@ +From e22e97d2266d100f501f1e22275595eb68dd3e6f Mon Sep 17 00:00:00 2001 +From: Vasily Khoruzhick <anarsoul@gmail.com> +Date: Thu, 1 Oct 2009 20:58:18 -0500 +Subject: [PATCH 1/7] Fix s3c-adc suspend + +Fix for a bug that shows when the s3c2410 TS driver requests +a conversion from the s3c-adc driver and the machine goes into suspend. +In this case the touchscreen stops working. + +Note: Nelson edited the original patch with a few small changes. + +Reported-by: Radek Polak <psonek2@seznam.cz> +Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> +--- + arch/arm/plat-s3c24xx/adc.c | 42 +++++++++++++++++++++++++++++++++++++----- + 1 files changed, 37 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c +index 9056bcc..4ce45c5 100644 +--- a/arch/arm/plat-s3c24xx/adc.c ++++ b/arch/arm/plat-s3c24xx/adc.c +@@ -43,6 +43,7 @@ struct s3c_adc_client { + unsigned int nr_samples; + unsigned char is_ts; + unsigned char channel; ++ unsigned selected; + + void (*select_cb)(unsigned selected); + void (*convert_cb)(unsigned val1, unsigned val2, +@@ -68,6 +69,7 @@ static struct adc_device *adc_dev; + static LIST_HEAD(adc_pending); + + #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) ++#define adc_info(_adc, msg...) dev_info(&(_adc)->pdev->dev, msg) + + #define AUTOPST (S3C2410_ADCTSC_YM_SEN | S3C2410_ADCTSC_YP_SEN | \ + S3C2410_ADCTSC_XP_SEN | S3C2410_ADCTSC_AUTO_PST | \ +@@ -91,7 +93,10 @@ static inline void s3c_adc_select(struct adc_device *adc, + { + unsigned con = readl(adc->regs + S3C2410_ADCCON); + +- client->select_cb(1); ++ if (!client->selected) { ++ client->selected = 1; ++ client->select_cb(1); ++ } + + con &= ~S3C2410_ADCCON_MUXMASK; + con &= ~S3C2410_ADCCON_STDBM; +@@ -115,12 +120,9 @@ void s3c_adc_try(struct adc_device *adc) + { + struct s3c_adc_client *next = adc->ts_pend; + +- if (!next && !list_empty(&adc_pending)) { ++ if (!next && !list_empty(&adc_pending)) + next = list_first_entry(&adc_pending, + struct s3c_adc_client, pend); +- list_del(&next->pend); +- } else +- adc->ts_pend = NULL; + + if (next) { + adc_dbg(adc, "new client is %p\n", next); +@@ -229,9 +231,16 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) + /* fire another conversion for this */ + + client->select_cb(1); ++ client->selected = 1; + s3c_adc_convert(adc); + } else { + local_irq_save(flags); ++ client->selected = 0; ++ if (!adc->cur->is_ts) ++ list_del(&adc->cur->pend); ++ else ++ adc->ts_pend = NULL; ++ + (client->select_cb)(0); + adc->cur = NULL; + +@@ -341,20 +350,43 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) + writel(con, adc->regs + S3C2410_ADCCON); + + clk_disable(adc->clk); ++ disable_irq(IRQ_ADC); ++ ++ if (!list_empty(&adc_pending) || adc->ts_pend) ++ adc_info(adc, "%s:We still have clients pending\n", __func__); + + return 0; + } + ++static struct work_struct resume_work; ++ ++static void adc_resume_work(struct work_struct *work) ++{ ++ struct adc_device *adc = platform_get_drvdata(adc_dev->pdev); ++ ++ adc_info(adc, "%s:We still have clients pending\n", __func__); ++ s3c_adc_try(adc_dev); ++} ++ + static int s3c_adc_resume(struct platform_device *pdev) + { + struct adc_device *adc = platform_get_drvdata(pdev); + ++ enable_irq(IRQ_ADC); + clk_enable(adc->clk); + + writel(adc->prescale | S3C2410_ADCCON_PRSCEN, + adc->regs + S3C2410_ADCCON); + writel(adc->delay, adc->regs + S3C2410_ADCDLY); + ++ /* Schedule task if there are clients pending. */ ++ if (!list_empty(&adc_pending) || adc_dev->ts_pend) { ++ INIT_WORK(&resume_work, adc_resume_work); ++ if (!schedule_work(&resume_work)) ++ dev_err(&pdev->dev, ++ "Failed to schedule adc_resume work!\n"); ++ } ++ + return 0; + } + +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0002-GTA01-GTA02-disable-android-drivers-in-default-confi.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0002-GTA01-GTA02-disable-android-drivers-in-default-confi.patch new file mode 100644 index 0000000000..797f2fb27b --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0002-GTA01-GTA02-disable-android-drivers-in-default-confi.patch @@ -0,0 +1,154 @@ +From 18713d582b94c7f132f306c01c43fd22a12a1fc5 Mon Sep 17 00:00:00 2001 +From: Radek Polak <psonek2@seznam.cz> +Date: Fri, 2 Oct 2009 20:54:29 +0200 +Subject: [PATCH 2/7] GTA01/GTA02: disable android drivers in default configs + +Android drivers are not needed for standard linux systems. We can save +memory by disabling them. + +Android low memory killer (CONFIG_ANDROID_LOW_MEMORY_KILLER) also +prevents using swap by killing applications before swapping can start +on non android systems. + +Reported-by: Jim Morris <morris@wolfman.com> +Signed-off-by: Radek Polak <psonek2@seznam.cz> +Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> +--- + arch/arm/configs/gta01_moredrivers_defconfig | 21 ++++++++++----------- + arch/arm/configs/gta02_moredrivers_defconfig | 19 ++++++++----------- + arch/arm/configs/gta02_packaging_defconfig | 19 ++++++++----------- + 3 files changed, 26 insertions(+), 33 deletions(-) + +diff --git a/arch/arm/configs/gta01_moredrivers_defconfig b/arch/arm/configs/gta01_moredrivers_defconfig +index 411acab..68b95e7 100644 +--- a/arch/arm/configs/gta01_moredrivers_defconfig ++++ b/arch/arm/configs/gta01_moredrivers_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Tue Feb 24 02:13:21 2009 ++# Fri Oct 2 16:49:49 2009 + # + CONFIG_ARM=y + CONFIG_SYS_SUPPORTS_APM_EMULATION=y +@@ -203,6 +203,7 @@ CONFIG_S3C_GPIO_SPACE=0 + CONFIG_S3C_GPIO_TRACK=y + CONFIG_S3C_DMA=y + CONFIG_S3C_PWM=y ++CONFIG_S3C_DEV_USB_HOST=y + + # + # S3C2400 Machines +@@ -1159,6 +1160,7 @@ CONFIG_WATCHDOG=y + # + # CONFIG_SOFT_WATCHDOG is not set + CONFIG_S3C2410_WATCHDOG=m ++CONFIG_PCF50606_WATCHDOG=y + + # + # USB-based Watchdog Cards +@@ -1686,17 +1688,14 @@ CONFIG_STAGING=y + # + # Android + # +-CONFIG_ANDROID=y +-CONFIG_ANDROID_BINDER_IPC=y +-CONFIG_ANDROID_LOGGER=y +-CONFIG_ANDROID_RAM_CONSOLE=y +-CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +-# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +-# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +-CONFIG_ANDROID_TIMED_GPIO=y +-CONFIG_ANDROID_LOW_MEMORY_KILLER=y ++# CONFIG_ANDROID is not set ++# CONFIG_ANDROID_BINDER_IPC is not set ++# CONFIG_ANDROID_LOGGER is not set ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set + # CONFIG_ANDROID_WAKELOCK is not set +-CONFIG_ANDROID_PARANOID_NETWORK=y ++# CONFIG_ANDROID_PARANOID_NETWORK is not set + + # + # File systems +diff --git a/arch/arm/configs/gta02_moredrivers_defconfig b/arch/arm/configs/gta02_moredrivers_defconfig +index 13b4121..e4fe9a9 100644 +--- a/arch/arm/configs/gta02_moredrivers_defconfig ++++ b/arch/arm/configs/gta02_moredrivers_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Sun Apr 19 23:22:38 2009 ++# Fri Oct 2 20:52:45 2009 + # + CONFIG_ARM=y + CONFIG_HAVE_PWM=y +@@ -1782,17 +1782,14 @@ CONFIG_STAGING=y + # + # Android + # +-CONFIG_ANDROID=y +-CONFIG_ANDROID_BINDER_IPC=y +-CONFIG_ANDROID_LOGGER=y +-CONFIG_ANDROID_RAM_CONSOLE=y +-CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +-# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +-# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +-CONFIG_ANDROID_TIMED_GPIO=y +-CONFIG_ANDROID_LOW_MEMORY_KILLER=y ++# CONFIG_ANDROID is not set ++# CONFIG_ANDROID_BINDER_IPC is not set ++# CONFIG_ANDROID_LOGGER is not set ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set + # CONFIG_ANDROID_WAKELOCK is not set +-CONFIG_ANDROID_PARANOID_NETWORK=y ++# CONFIG_ANDROID_PARANOID_NETWORK is not set + + # + # File systems +diff --git a/arch/arm/configs/gta02_packaging_defconfig b/arch/arm/configs/gta02_packaging_defconfig +index 03c72d5..e2dbbef 100644 +--- a/arch/arm/configs/gta02_packaging_defconfig ++++ b/arch/arm/configs/gta02_packaging_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Sun Apr 19 22:57:25 2009 ++# Fri Oct 2 20:51:57 2009 + # + CONFIG_ARM=y + CONFIG_HAVE_PWM=y +@@ -1785,17 +1785,14 @@ CONFIG_STAGING=y + # + # Android + # +-CONFIG_ANDROID=y +-CONFIG_ANDROID_BINDER_IPC=y +-CONFIG_ANDROID_LOGGER=y +-CONFIG_ANDROID_RAM_CONSOLE=y +-CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +-# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +-# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +-CONFIG_ANDROID_TIMED_GPIO=y +-CONFIG_ANDROID_LOW_MEMORY_KILLER=y ++# CONFIG_ANDROID is not set ++# CONFIG_ANDROID_BINDER_IPC is not set ++# CONFIG_ANDROID_LOGGER is not set ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set + # CONFIG_ANDROID_WAKELOCK is not set +-CONFIG_ANDROID_PARANOID_NETWORK=y ++# CONFIG_ANDROID_PARANOID_NETWORK is not set + + # + # File systems +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0003-glamo-spi-missing-semicolon-after-MODULE_AUTHOR.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0003-glamo-spi-missing-semicolon-after-MODULE_AUTHOR.patch new file mode 100644 index 0000000000..0eed294911 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0003-glamo-spi-missing-semicolon-after-MODULE_AUTHOR.patch @@ -0,0 +1,39 @@ +From cf7ef93a6d5eff863034fade19d7a1d6bc19789a Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Wed, 4 Nov 2009 20:09:03 +0100 +Subject: [PATCH 3/7] glamo-spi: missing semicolon after MODULE_AUTHOR() + +Fix compilation error due to missing semicolon + +Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> +Signed-off-by: Paul Fertser <fercerpav@gmail.com> +--- + drivers/mfd/glamo/glamo-lcm-spi.c | 2 +- + drivers/mfd/glamo/glamo-spi-gpio.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mfd/glamo/glamo-lcm-spi.c b/drivers/mfd/glamo/glamo-lcm-spi.c +index a7129fe..446f058 100644 +--- a/drivers/mfd/glamo/glamo-lcm-spi.c ++++ b/drivers/mfd/glamo/glamo-lcm-spi.c +@@ -236,5 +236,5 @@ module_init(glamo_spi_init); + module_exit(glamo_spi_exit); + + MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver"); +-MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>") ++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); + MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/glamo/glamo-spi-gpio.c b/drivers/mfd/glamo/glamo-spi-gpio.c +index b92e48a..6ebf498 100644 +--- a/drivers/mfd/glamo/glamo-spi-gpio.c ++++ b/drivers/mfd/glamo/glamo-spi-gpio.c +@@ -274,5 +274,5 @@ module_init(glamo_spi_init); + module_exit(glamo_spi_exit); + + MODULE_DESCRIPTION("Smedia Glamo 336x/337x LCM serial command SPI Driver"); +-MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>") ++MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); + MODULE_LICENSE("GPL"); +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0004-gta02_drm_defconfig-start-from-gta02_packaging_defco.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0004-gta02_drm_defconfig-start-from-gta02_packaging_defco.patch new file mode 100644 index 0000000000..adb3ce84e3 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0004-gta02_drm_defconfig-start-from-gta02_packaging_defco.patch @@ -0,0 +1,129 @@ +From ab6c9baa5cc8ae3a922ae4baef2550d399b41550 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 10:48:28 +0100 +Subject: [PATCH 4/7] gta02_drm_defconfig: start from gta02_packaging_defconfig + +--- + arch/arm/configs/gta02_drm_defconfig | 40 +++++++++++++-------------------- + 1 files changed, 16 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/configs/gta02_drm_defconfig b/arch/arm/configs/gta02_drm_defconfig +index 5349014..e2dbbef 100644 +--- a/arch/arm/configs/gta02_drm_defconfig ++++ b/arch/arm/configs/gta02_drm_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Thu Jul 2 20:40:33 2009 ++# Fri Oct 2 20:51:57 2009 + # + CONFIG_ARM=y + CONFIG_HAVE_PWM=y +@@ -35,7 +35,7 @@ CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_LOCK_KERNEL=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +-CONFIG_LOCALVERSION="" ++CONFIG_LOCALVERSION="-mokodev" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +@@ -180,7 +180,7 @@ CONFIG_S3C24XX_PWM=y + CONFIG_S3C24XX_GPIO_EXTRA=0 + CONFIG_S3C2410_DMA=y + # CONFIG_S3C2410_DMA_DEBUG is not set +-# CONFIG_S3C24XX_ADC is not set ++CONFIG_S3C24XX_ADC=y + CONFIG_MACH_SMDK=y + CONFIG_MACH_NEO1973=y + CONFIG_PLAT_S3C=y +@@ -1084,7 +1084,6 @@ CONFIG_I2C=y + CONFIG_I2C_BOARDINFO=y + CONFIG_I2C_CHARDEV=y + CONFIG_I2C_HELPER_AUTO=y +-CONFIG_I2C_ALGOBIT=y + + # + # I2C Hardware Bus support +@@ -1181,7 +1180,7 @@ CONFIG_APM_POWER=y + CONFIG_CHARGER_PCF50633=y + CONFIG_BATTERY_BQ27000_HDQ=y + CONFIG_HDQ_GPIO_BITBANG=y +-# CONFIG_BATTERY_GTA01 is not set ++CONFIG_BATTERY_GTA01=m + CONFIG_HWMON=y + # CONFIG_HWMON_VID is not set + # CONFIG_SENSORS_AD7414 is not set +@@ -1283,14 +1282,11 @@ CONFIG_PCF50633_ADC=y + CONFIG_PCF50633_GPIO=y + # CONFIG_MFD_PCF50606 is not set + CONFIG_MFD_GLAMO=y +- +-# +-# SMedia Glamo 336x/337x engine drivers +-# +-# CONFIG_MFD_GLAMO_FB is not set ++CONFIG_MFD_GLAMO_FB=y ++CONFIG_MFD_GLAMO_FB_XGLAMO_WORKAROUND=y + CONFIG_MFD_GLAMO_SPI_GPIO=y ++CONFIG_MFD_GLAMO_SPI_FB=y + CONFIG_MFD_GLAMO_MCI=y +-CONFIG_MFD_GLAMO_DRM=y + + # + # Multimedia devices +@@ -1312,7 +1308,6 @@ CONFIG_DAB=y + # + # Graphics support + # +-CONFIG_DRM=y + # CONFIG_VGASTATE is not set + CONFIG_VIDEO_OUTPUT_CONTROL=y + CONFIG_FB=y +@@ -1790,17 +1785,14 @@ CONFIG_STAGING=y + # + # Android + # +-CONFIG_ANDROID=y +-CONFIG_ANDROID_BINDER_IPC=y +-CONFIG_ANDROID_LOGGER=y +-CONFIG_ANDROID_RAM_CONSOLE=y +-CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +-# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +-# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +-CONFIG_ANDROID_TIMED_GPIO=y +-CONFIG_ANDROID_LOW_MEMORY_KILLER=y ++# CONFIG_ANDROID is not set ++# CONFIG_ANDROID_BINDER_IPC is not set ++# CONFIG_ANDROID_LOGGER is not set ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set + # CONFIG_ANDROID_WAKELOCK is not set +-CONFIG_ANDROID_PARANOID_NETWORK=y ++# CONFIG_ANDROID_PARANOID_NETWORK is not set + + # + # File systems +@@ -1958,7 +1950,7 @@ CONFIG_NLS_CODEPAGE_850=m + # CONFIG_NLS_CODEPAGE_863 is not set + # CONFIG_NLS_CODEPAGE_864 is not set + # CONFIG_NLS_CODEPAGE_865 is not set +-# CONFIG_NLS_CODEPAGE_866 is not set ++CONFIG_NLS_CODEPAGE_866=m + # CONFIG_NLS_CODEPAGE_869 is not set + CONFIG_NLS_CODEPAGE_936=m + CONFIG_NLS_CODEPAGE_950=m +@@ -1967,7 +1959,7 @@ CONFIG_NLS_CODEPAGE_950=m + # CONFIG_NLS_CODEPAGE_874 is not set + # CONFIG_NLS_ISO8859_8 is not set + # CONFIG_NLS_CODEPAGE_1250 is not set +-# CONFIG_NLS_CODEPAGE_1251 is not set ++CONFIG_NLS_CODEPAGE_1251=m + # CONFIG_NLS_ASCII is not set + CONFIG_NLS_ISO8859_1=y + # CONFIG_NLS_ISO8859_2 is not set +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0005-Enable-DRM-and-MFD_GLAMO_DRM.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0005-Enable-DRM-and-MFD_GLAMO_DRM.patch new file mode 100644 index 0000000000..c9d56fa7ab --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0005-Enable-DRM-and-MFD_GLAMO_DRM.patch @@ -0,0 +1,51 @@ +From 8fe4cb1bee0c8af760d8911c248e0904e44fa0b3 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 10:49:43 +0100 +Subject: [PATCH 5/7] Enable DRM and MFD_GLAMO_DRM + +--- + arch/arm/configs/gta02_drm_defconfig | 12 ++++++++---- + 1 files changed, 8 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/configs/gta02_drm_defconfig b/arch/arm/configs/gta02_drm_defconfig +index e2dbbef..aac2832 100644 +--- a/arch/arm/configs/gta02_drm_defconfig ++++ b/arch/arm/configs/gta02_drm_defconfig +@@ -35,7 +35,7 @@ CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_LOCK_KERNEL=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +-CONFIG_LOCALVERSION="-mokodev" ++CONFIG_LOCALVERSION="-drm" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +@@ -1282,11 +1282,14 @@ CONFIG_PCF50633_ADC=y + CONFIG_PCF50633_GPIO=y + # CONFIG_MFD_PCF50606 is not set + CONFIG_MFD_GLAMO=y +-CONFIG_MFD_GLAMO_FB=y +-CONFIG_MFD_GLAMO_FB_XGLAMO_WORKAROUND=y ++ ++# ++# SMedia Glamo 336x/337x engine drivers ++# ++# CONFIG_MFD_GLAMO_FB is not set + CONFIG_MFD_GLAMO_SPI_GPIO=y +-CONFIG_MFD_GLAMO_SPI_FB=y + CONFIG_MFD_GLAMO_MCI=y ++CONFIG_MFD_GLAMO_DRM=y + + # + # Multimedia devices +@@ -1308,6 +1311,7 @@ CONFIG_DAB=y + # + # Graphics support + # ++CONFIG_DRM=y + # CONFIG_VGASTATE is not set + CONFIG_VIDEO_OUTPUT_CONTROL=y + CONFIG_FB=y +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0006-Enable-I2C_ALGOBIT-from-make-oldconfig.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0006-Enable-I2C_ALGOBIT-from-make-oldconfig.patch new file mode 100644 index 0000000000..79305ce317 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0006-Enable-I2C_ALGOBIT-from-make-oldconfig.patch @@ -0,0 +1,33 @@ +From 315bd3c8c368cf8097e3b0aecd21907755b617e1 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 10:54:55 +0100 +Subject: [PATCH 6/7] Enable I2C_ALGOBIT, from make oldconfig + +--- + arch/arm/configs/gta02_drm_defconfig | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/configs/gta02_drm_defconfig b/arch/arm/configs/gta02_drm_defconfig +index aac2832..e17ddc3 100644 +--- a/arch/arm/configs/gta02_drm_defconfig ++++ b/arch/arm/configs/gta02_drm_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Fri Oct 2 20:51:57 2009 ++# Sun Nov 8 10:53:31 2009 + # + CONFIG_ARM=y + CONFIG_HAVE_PWM=y +@@ -1084,6 +1084,7 @@ CONFIG_I2C=y + CONFIG_I2C_BOARDINFO=y + CONFIG_I2C_CHARDEV=y + CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_ALGOBIT=y + + # + # I2C Hardware Bus support +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/0007-Enable-UBI-UBIFS.patch b/recipes/linux/linux-openmoko-shr-drm-devel/0007-Enable-UBI-UBIFS.patch new file mode 100644 index 0000000000..f7dd7615af --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/0007-Enable-UBI-UBIFS.patch @@ -0,0 +1,90 @@ +From 8f907c17c068beb94264a4a6d40314658a0c1393 Mon Sep 17 00:00:00 2001 +From: Martin Jansa <Martin.Jansa@gmail.com> +Date: Sun, 8 Nov 2009 10:58:28 +0100 +Subject: [PATCH 7/7] Enable UBI/UBIFS + +--- + arch/arm/configs/gta02_drm_defconfig | 39 ++++++++++++++++++++++++++++++--- + 1 files changed, 35 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/configs/gta02_drm_defconfig b/arch/arm/configs/gta02_drm_defconfig +index e17ddc3..7506963 100644 +--- a/arch/arm/configs/gta02_drm_defconfig ++++ b/arch/arm/configs/gta02_drm_defconfig +@@ -1,7 +1,7 @@ + # + # Automatically generated make config: don't edit + # Linux kernel version: 2.6.29-rc3 +-# Sun Nov 8 10:53:31 2009 ++# Sun Nov 8 10:57:36 2009 + # + CONFIG_ARM=y + CONFIG_HAVE_PWM=y +@@ -806,7 +806,30 @@ CONFIG_MTD_NAND_S3C2410_HWECC=y + # + # UBI - Unsorted block images + # +-# CONFIG_MTD_UBI is not set ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MTD_UBI_BEB_RESERVE=1 ++CONFIG_MTD_UBI_GLUEBI=y ++ ++# ++# UBI debugging options ++# ++CONFIG_MTD_UBI_DEBUG=y ++CONFIG_MTD_UBI_DEBUG_MSG=y ++# CONFIG_MTD_UBI_DEBUG_PARANOID is not set ++# CONFIG_MTD_UBI_DEBUG_DISABLE_BGT is not set ++# CONFIG_MTD_UBI_DEBUG_USERSPACE_IO is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_BITFLIPS is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_WRITE_FAILURES is not set ++# CONFIG_MTD_UBI_DEBUG_EMULATE_ERASE_FAILURES is not set ++ ++# ++# Additional UBI debugging messages ++# ++CONFIG_MTD_UBI_DEBUG_MSG_BLD=y ++CONFIG_MTD_UBI_DEBUG_MSG_EBA=y ++CONFIG_MTD_UBI_DEBUG_MSG_WL=y ++CONFIG_MTD_UBI_DEBUG_MSG_IO=y + # CONFIG_PARPORT is not set + CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set +@@ -1877,6 +1900,12 @@ CONFIG_JFFS2_ZLIB=y + # CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set ++CONFIG_UBIFS_FS=y ++# CONFIG_UBIFS_FS_XATTR is not set ++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_ZLIB=y ++# CONFIG_UBIFS_FS_DEBUG is not set + CONFIG_CRAMFS=y + CONFIG_SQUASHFS=m + # CONFIG_SQUASHFS_EMBEDDED is not set +@@ -2151,8 +2180,8 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m + # + # Compression + # +-CONFIG_CRYPTO_DEFLATE=m +-# CONFIG_CRYPTO_LZO is not set ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_LZO=y + + # + # Random Number Generation +@@ -2174,6 +2203,8 @@ CONFIG_CRC32=y + CONFIG_LIBCRC32C=m + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y + CONFIG_TEXTSEARCH=y + CONFIG_TEXTSEARCH_KMP=m + CONFIG_TEXTSEARCH_BM=m +-- +1.6.5.2 + diff --git a/recipes/linux/linux-openmoko-shr-drm-devel/fix-install.patch b/recipes/linux/linux-openmoko-shr-drm-devel/fix-install.patch new file mode 100644 index 0000000000..b14ca7d740 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel/fix-install.patch @@ -0,0 +1,23 @@ +From: Steve Sakoman <steve@sakoman.com> +Date: Mon, 18 Aug 2008 16:07:31 +0000 (-0700) +Subject: scripts/Makefile.fwinst: add missing space when setting mode in cmd_install +X-Git-Url: http://www.sakoman.net/cgi-bin/gitweb.cgi?p=linux-omap-2.6.git;a=commitdiff_plain;h=f039944bdd491cde7327133e9976881d3133ae70 + +scripts/Makefile.fwinst: add missing space when setting mode in cmd_install + +This was causing build failures on some machines +--- + +diff --git a/scripts/Makefile.fwinst b/scripts/Makefile.fwinst +index 6bf8e87..fb20532 100644 +--- a/scripts/Makefile.fwinst ++++ b/scripts/Makefile.fwinst +@@ -37,7 +37,7 @@ + @true + + quiet_cmd_install = INSTALL $(subst $(srctree)/,,$@) +- cmd_install = $(INSTALL) -m0644 $< $@ ++ cmd_install = $(INSTALL) -m 0644 $< $@ + + $(installed-fw-dirs): + $(call cmd,mkdir) diff --git a/recipes/linux/linux-openmoko-shr-drm-devel_git.bb b/recipes/linux/linux-openmoko-shr-drm-devel_git.bb new file mode 100644 index 0000000000..e02cc6f135 --- /dev/null +++ b/recipes/linux/linux-openmoko-shr-drm-devel_git.bb @@ -0,0 +1,34 @@ +require linux.inc +require linux-openmoko.inc + +DESCRIPTION_${PN} = "Linux ${KERNEL_VERSION} kernel for the Openmoko Neo GSM Smartphones" + +DEFAULT_PREFERENCE = "-1" +KERNEL_RELEASE = "2.6.29" +KERNEL_VERSION = "2.6.29-rc3-drm" + +OMV = "oe15" +PV = "${KERNEL_RELEASE}-drm-${OMV}+gitr${SRCREV}" +PR = "r4" + +SRC_URI = "\ + git://git.openmoko.org/git/kernel.git;protocol=git;branch=drm-tracking \ + file://fix-install.patch;patch=1 \ + file://0001-Add-drm-to-Makefile-version.patch;patch=1 \ + file://0001-Fix-s3c-adc-suspend.patch;patch=1 \ + file://0002-GTA01-GTA02-disable-android-drivers-in-default-confi.patch;patch=1 \ + file://0003-glamo-spi-missing-semicolon-after-MODULE_AUTHOR.patch;patch=1 \ + file://0004-gta02_drm_defconfig-start-from-gta02_packaging_defco.patch;patch=1 \ + file://0005-Enable-DRM-and-MFD_GLAMO_DRM.patch;patch=1 \ + file://0006-Enable-I2C_ALGOBIT-from-make-oldconfig.patch;patch=1 \ + file://0007-Enable-UBI-UBIFS.patch;patch=1 \ +" +S = "${WORKDIR}/git" + +CONFIG_NAME_om-gta01 = "gta01_moredrivers_defconfig" +CONFIG_NAME_om-gta02 = "gta02_drm_defconfig" +CONFIG_NAME_om-gta03 = "gta03_defconfig" + +do_configure_prepend() { + install -m 644 ./arch/arm/configs/${CONFIG_NAME} ${WORKDIR}/defconfig-oe +} diff --git a/recipes/linux/linux-openmoko.inc b/recipes/linux/linux-openmoko.inc index 84a77ea586..e789e76b1a 100644 --- a/recipes/linux/linux-openmoko.inc +++ b/recipes/linux/linux-openmoko.inc @@ -33,7 +33,7 @@ module_autoload_snd-soc-neo1973-wm8753 = "snd-soc-neo1973-wm8753" # audio (GTA02) module_autoload_snd-soc-neo1973-gta02-wm8753 = "snd-soc-neo1973-gta02-wm8753" # audio (GTA03) -module_autoload_snd-soc-neo1973-gta02-wm8753 = "" +module_autoload_snd-soc-neo1973-gta03-wm8753 = "" # sd/mmc module_autoload_s3cmci = "s3cmci" diff --git a/recipes/linux/linux-sgh-i900/sgh_i900_defconfig b/recipes/linux/linux-sgh-i900/sgh_i900_defconfig new file mode 100644 index 0000000000..bca41c1090 --- /dev/null +++ b/recipes/linux/linux-sgh-i900/sgh_i900_defconfig @@ -0,0 +1,1583 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.29 +# Thu Oct 1 16:49:04 2009 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_RELAY=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_NET_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ASHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_TRACEPOINTS=y +CONFIG_MARKERS=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_W90X900 is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# + +# +# Supported PXA3xx Processor Variants +# +CONFIG_CPU_PXA300=y +CONFIG_CPU_PXA310=y +# CONFIG_CPU_PXA320 is not set +# CONFIG_CPU_PXA930 is not set +# CONFIG_CPU_PXA935 is not set +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_MACH_INTELMOTE2 is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_MACH_MP900C is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_VIPER is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_TRIZEPS_PXA is not set +# CONFIG_MACH_H5000 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +CONFIG_MACH_SGH_I780=y +CONFIG_MACH_SGH_I900=y +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_CM_X300 is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_MIOA701 is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set +CONFIG_PXA3xx=y +CONFIG_PXA_SSP=y +# CONFIG_PXA_PWM is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSC3=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_IO_36=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_XSC3L2=y +CONFIG_IWMMXT=y +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_MIN_TICKS=10 +CONFIG_CPU_FREQ_SAMPLING_LATENCY_MULTIPLIER=1000 +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HAS_WAKELOCK=y +CONFIG_HAS_EARLYSUSPEND=y +CONFIG_WAKELOCK=y +CONFIG_WAKELOCK_STAT=y +CONFIG_USER_WAKELOCK=y +CONFIG_EARLYSUSPEND=y +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set +# CONFIG_CONSOLE_EARLYSUSPEND is not set +CONFIG_FB_EARLYSUSPEND=y +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_COMPAT_NET_DEV_OPS=y +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_ANDROID_PARANOID_NETWORK is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_AF_RXRPC=m +# CONFIG_AF_RXRPC_DEBUG is not set +CONFIG_RXKAD=m +CONFIG_PHONET=m +CONFIG_WIRELESS=y +CONFIG_CFG80211=y +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_NL80211=y +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=y +CONFIG_LIB80211_DEBUG=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +CONFIG_MAC80211_MESH=y +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +# CONFIG_EXTRA_FIRMWARE is not set +# CONFIG_EXTRA_FIRMWARE_DIR is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_PARTITIONS is not set +# CONFIG_MTD_TESTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_CHAR is not set +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=2 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +CONFIG_LIBERTAS=m +# CONFIG_LIBERTAS_USB is not set +# CONFIG_LIBERTAS_SDIO is not set +CONFIG_LIBERTAS_SPI=m +# CONFIG_LIBERTAS_DEBUG is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_P54_COMMON is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_HOSTAP is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=240 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=400 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_KEYRESET is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_PXA27x=y +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_WM97XX=y +# CONFIG_TOUCHSCREEN_WM9705 is not set +# CONFIG_TOUCHSCREEN_WM9712 is not set +CONFIG_TOUCHSCREEN_WM9713=y +# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set +CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE=y +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_GPIO is not set +# CONFIG_INPUT_KEYCHORD is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=m +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVMEM=y +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_SGH_MODEM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_DEVPTS_MULTIPLE_INSTANCES=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_DCC_TTY is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_GPIO=y +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_PCA963X is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PDA_POWER=y +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_FAKE_BATTERY is not set +# CONFIG_BATTERY_WM97XX is not set +# CONFIG_BATTERY_BQ27x00 is not set +CONFIG_BATTERY_SGH=y +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +CONFIG_HTC_PASIC3=y +# CONFIG_UCB1400_CORE is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +CONFIG_FB_PXA_OVERLAY=y +CONFIG_FB_PXA_SMARTPANEL=y +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_W100 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +CONFIG_LCD_PLATFORM=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +# CONFIG_BACKLIGHT_PWM is not set + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=m + +# +# Display hardware drivers +# + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_SEQUENCER=y +# CONFIG_SND_SEQ_DUMMY is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_SEQUENCER_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_AC97_CODEC=y +# CONFIG_SND_DRIVERS is not set +CONFIG_SND_ARM=y +CONFIG_SND_PXA2XX_PCM=m +CONFIG_SND_PXA2XX_LIB=y +CONFIG_SND_PXA2XX_LIB_AC97=y +CONFIG_SND_PXA2XX_AC97=m +# CONFIG_SND_SPI is not set +# CONFIG_SND_USB is not set +CONFIG_SND_SOC=y +CONFIG_SND_SOC_AC97_BUS=y +CONFIG_SND_PXA2XX_SOC=y +CONFIG_SND_PXA2XX_SOC_AC97=y +CONFIG_SND_SOC_SGH=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM9713=y +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set +# CONFIG_HID_PID is not set + +# +# Special HID drivers +# +CONFIG_HID_COMPAT=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=m +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set + +# +# Enable Host or Gadget support to see Inventra options +# +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# + +# +# see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +CONFIG_USB_GPIO_VBUS=m +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y +# CONFIG_SDIO_FORCE_OPCOND_1_8V is not set +# CONFIG_SDIO_WORKAROUND_MARVELL_CIS_B1_BUG is not set +# CONFIG_MMC_EMBEDDED_SDIO is not set +# CONFIG_MMC_PARANOID_SD_INIT is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_PXA=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_PCA955X is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +# CONFIG_LEDS_TRIGGER_SLEEP is not set +# CONFIG_SWITCH is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +CONFIG_RTC_INTF_ALARM=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_SA1100 is not set +CONFIG_RTC_DRV_PXA=y +# CONFIG_DMADEVICES is not set +# CONFIG_REGULATOR is not set +# CONFIG_UIO is not set +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_MEILHAUS is not set +# CONFIG_USB_IP_COMMON is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_USB_ATMEL is not set +# CONFIG_AGNX is not set +# CONFIG_OTUS is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_INPUT_MIMIO is not set +# CONFIG_TRANZPORT is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_ANDROID_BINDER_IPC is not set +# CONFIG_ANDROID_LOGGER is not set +# CONFIG_ANDROID_RAM_CONSOLE is not set +# CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE is not set +# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set +# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +# CONFIG_ANDROID_TIMED_OUTPUT is not set +# CONFIG_ANDROID_TIMED_GPIO is not set +# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=y +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_YAFFS_FS=y +CONFIG_YAFFS_YAFFS1=y +# CONFIG_YAFFS_9BYTE_TAGS is not set +# CONFIG_YAFFS_DOES_ECC is not set +CONFIG_YAFFS_YAFFS2=y +CONFIG_YAFFS_AUTO_YAFFS2=y +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_NOP_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_RING_BUFFER=y +CONFIG_TRACING=y + +# +# Tracers +# +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +CONFIG_CONTEXT_SWITCH_TRACER=y +# CONFIG_BOOT_TRACER is not set +# CONFIG_TRACE_BRANCH_PROFILING is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_KEYS_DEBUG_PROC_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +CONFIG_CRYPTO_FCRYPT=m +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=m +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/recipes/linux/linux-sgh-i900/wm97xx-ts-fix.patch b/recipes/linux/linux-sgh-i900/wm97xx-ts-fix.patch new file mode 100644 index 0000000000..1a36c337c5 --- /dev/null +++ b/recipes/linux/linux-sgh-i900/wm97xx-ts-fix.patch @@ -0,0 +1,130 @@ +diff -ru git/drivers/input/touchscreen/wm97xx-core.c and/wm97xx-core.c +--- git/drivers/input/touchscreen/wm97xx-core.c 2009-11-14 20:38:03.000000000 +0200 ++++ git/drivers/input/touchscreen/wm97xx-core.c 2009-11-16 13:21:13.949140354 +0200 +@@ -70,13 +70,11 @@ + * Documentation/input/input-programming.txt for more details. + */ + +- +-static int abs_x[3] = {350, 3900, 5}; ++static int abs_x[3] = {350, 3900, 5}; + module_param_array(abs_x, int, NULL, 0); + MODULE_PARM_DESC(abs_x, "Touchscreen absolute X min, max, fuzz"); + +- +-static int abs_y[3] = {320, 3950, 5}; // Zylonite: 320, 3950 ++static int abs_y[3] = {320, 3750, 40}; + module_param_array(abs_y, int, NULL, 0); + MODULE_PARM_DESC(abs_y, "Touchscreen absolute Y min, max, fuzz"); + +@@ -411,7 +409,6 @@ + wm->pen_is_down = 0; + dev_dbg(wm->dev, "pen up\n"); + input_report_abs(wm->input_dev, ABS_PRESSURE, 0); +- input_report_key(wm->input_dev, BTN_TOUCH, 0); + input_sync(wm->input_dev); + } else if (!(rc & RC_AGAIN)) { + /* We need high frequency updates only while +@@ -429,22 +426,13 @@ + } + + } else if (rc & RC_VALID) { +- int absy, absx; + dev_dbg(wm->dev, + "pen down: x=%x:%d, y=%x:%d, pressure=%x:%d\n", + data.x >> 12, data.x & 0xfff, data.y >> 12, + data.y & 0xfff, data.p >> 12, data.p & 0xfff); +- absx = data.x & 0xfff; +- if (machine_is_sgh_i780()) +- absx = (wm->input_dev->absmax[ABS_X] - absx) + wm->input_dev->absmin[ABS_X]; +- input_report_abs(wm->input_dev, ABS_X, absx); +- //invert y coordinate +- absy = data.y & 0xfff; +- if (machine_is_sgh_i900()) +- absy = (wm->input_dev->absmax[ABS_Y] - absy) + wm->input_dev->absmin[ABS_Y]; +- input_report_abs(wm->input_dev, ABS_Y, absy); ++ input_report_abs(wm->input_dev, ABS_X, data.x & 0xfff); ++ input_report_abs(wm->input_dev, ABS_Y, data.y & 0xfff); + input_report_abs(wm->input_dev, ABS_PRESSURE, data.p & 0xfff); +- input_report_key(wm->input_dev, BTN_TOUCH, 1); + input_sync(wm->input_dev); + wm->pen_is_down = 1; + wm->ts_reader_interval = wm->ts_reader_min_interval; +@@ -641,23 +629,12 @@ + wm->input_dev->open = wm97xx_ts_input_open; + wm->input_dev->close = wm97xx_ts_input_close; + set_bit(EV_ABS, wm->input_dev->evbit); +- set_bit(EV_KEY, wm->input_dev->evbit); + set_bit(ABS_X, wm->input_dev->absbit); + set_bit(ABS_Y, wm->input_dev->absbit); + set_bit(ABS_PRESSURE, wm->input_dev->absbit); +- set_bit(BTN_TOUCH, wm->input_dev->keybit); +- +- if(machine_is_sgh_i780()){ +- input_set_abs_params(wm->input_dev, ABS_X, 350, 3900, 5, 0); +- } else if(machine_is_sgh_i900()){ +- input_set_abs_params(wm->input_dev, ABS_X, 0, 39181660, 5, 0); +- } else input_set_abs_params(wm->input_dev, ABS_X, abs_x[0], abs_x[1], ++ input_set_abs_params(wm->input_dev, ABS_X, abs_x[0], abs_x[1], + abs_x[2], 0); +- if(machine_is_sgh_i780()){ +- input_set_abs_params(wm->input_dev, ABS_Y, 290, 3900, 5, 0); +- } else if(machine_is_sgh_i900()){ +- input_set_abs_params(wm->input_dev, ABS_Y, 0, 65412060, 5, 0); +- } else input_set_abs_params(wm->input_dev, ABS_Y, abs_y[0], abs_y[1], ++ input_set_abs_params(wm->input_dev, ABS_Y, abs_y[0], abs_y[1], + abs_y[2], 0); + input_set_abs_params(wm->input_dev, ABS_PRESSURE, abs_p[0], abs_p[1], + abs_p[2], 0); +diff -ru git/drivers/input/touchscreen/zylonite-wm97xx.c and/zylonite-wm97xx.c +--- git/drivers/input/touchscreen/zylonite-wm97xx.c 2009-11-14 20:38:03.000000000 +0200 ++++ git/drivers/input/touchscreen/zylonite-wm97xx.c 2009-11-16 13:17:21.292645713 +0200 +@@ -76,9 +76,6 @@ + module_param(ac97_touch_slot, int, 0); + MODULE_PARM_DESC(ac97_touch_slot, "Touch screen data slot AC97 number"); + +-static int calibration[7] = {11877, 137, -4688902, 231, -17973, 69206765, 163940}; //omnia calibration parameters +- +- + /* flush AC97 slot 5 FIFO machines */ + static void wm97xx_acc_pen_up(struct wm97xx *wm) + { +@@ -101,7 +98,6 @@ + { + u16 x, y, p = 0x100 | WM97XX_ADCSEL_PRES; + int reads = 0; +- int absx, absy; + static u16 last, tries; + static int skip_one; + +@@ -149,27 +145,9 @@ + + /* coordinate is good */ + tries = 0; +- if(machine_is_sgh_i900()){ +- x &= 0xfff; +- y &= 0xfff; +- absx = (calibration[0] * x + calibration[1] * y + +- calibration[2]);// / calibration[6]; +- absy = (calibration[3] * x + calibration[4] * y + +- calibration[5]);// / calibration[6]; +- if(absx<0) absx = 0; +- if(absy<0) absy = 0; +- } else { +- absx = x & 0xfff; +- if (machine_is_sgh_i780()) +- absx = (wm->input_dev->absmax[ABS_X] - absx) + wm->input_dev->absmin[ABS_X]; +- +- absy = y & 0xfff; +- } +- +- input_report_abs(wm->input_dev, ABS_X, absx); +- input_report_abs(wm->input_dev, ABS_Y, absy); +- p &= 0xfff; +- input_report_abs(wm->input_dev, ABS_PRESSURE, p); ++ input_report_abs(wm->input_dev, ABS_X, x & 0xfff); ++ input_report_abs(wm->input_dev, ABS_Y, y & 0xfff); ++ input_report_abs(wm->input_dev, ABS_PRESSURE, p & 0xfff); + input_report_key(wm->input_dev, BTN_TOUCH, (p != 0)); + input_sync(wm->input_dev); + reads++; diff --git a/recipes/linux/linux-sgh-i900_2.6.29.bb b/recipes/linux/linux-sgh-i900_2.6.29.bb new file mode 100644 index 0000000000..5bd2f4f0f3 --- /dev/null +++ b/recipes/linux/linux-sgh-i900_2.6.29.bb @@ -0,0 +1,21 @@ +DESCRIPTION = "Linux 2.6.29 kernel for the Samsung Omnia SGH-i900." +SECTION = "kernel" +LICENSE = "GPL" + +RDEPENDS += "marvell-gspi-fw" + +COMPATIBLE_MACHINE = "sgh-i900" + +SRC_URI = "git://andromnia.git.sourceforge.net/gitroot/andromnia/andromnia;protocol=git;branch=master \ + file://wm97xx-ts-fix.patch;patch=1 \ + file://sgh_i900_defconfig" + +S = "${WORKDIR}/git" + +inherit kernel + +FILES_kernel-image = "/boot/${KERNEL_IMAGETYPE}*" + +do_configure_prepend() { + install -m 0644 ${WORKDIR}/sgh_i900_defconfig ${S}/.config +} diff --git a/recipes/linux/linux.inc b/recipes/linux/linux.inc index 044d4130c5..0cce833694 100644 --- a/recipes/linux/linux.inc +++ b/recipes/linux/linux.inc @@ -169,7 +169,7 @@ do_devicetree_image() { fi } -addtask devicetree_image after do_deploy before do_package +addtask devicetree_image after do_install before do_package do_deploy pkg_postinst_kernel-devicetree () { cd /${KERNEL_IMAGEDEST}; update-alternatives --install /${KERNEL_IMAGEDEST}/devicetree devicetree devicetree-${KERNEL_VERSION} ${KERNEL_PRIORITY} || true diff --git a/recipes/linux/linux_2.6.31.bb b/recipes/linux/linux_2.6.31.bb index 845909c76c..839e808451 100644 --- a/recipes/linux/linux_2.6.31.bb +++ b/recipes/linux/linux_2.6.31.bb @@ -1,6 +1,6 @@ require linux.inc -PR = "r5" +PR = "r6" S = "${WORKDIR}/linux-${PV}" @@ -12,11 +12,22 @@ DEFAULT_PREFERENCE_db1200 = "1" DEFAULT_PREFERENCE_qemumips = "1" DEFAULT_PREFERENCE_qemux86 = "1" DEFAULT_PREFERENCE_iei-nanogx-466 = "1" +DEFAULT_PREFERENCE_ben-nanonote = "1" + SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \ ${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/patch-${PV}.5.bz2;patch=1 \ file://defconfig" +SRC_URI += "file://0001-Squashfs-move-zlib-decompression-wrapper-code-into.patch;patch=1 \ + file://0002-Squashfs-Factor-out-remaining-zlib-dependencies-int.patch;patch=1 \ + file://0003-Squashfs-add-a-decompressor-framework.patch;patch=1 \ + file://0004-Squashfs-add-decompressor-entries-for-lzma-and-lzo.patch;patch=1 \ + file://0005-Squashfs-add-an-extra-parameter-to-the-decompressor.patch;patch=1 \ + file://0006-Squashfs-add-LZMA-compression.patch;patch=1 \ + file://0007-Squashfs-Make-unlzma-available-to-non-initramfs-ini.patch;patch=1 \ + " + SRC_URI_append_db1200 ="\ http://maxim.org.za/AT91RM9200/2.6/2.6.31-at91.patch.gz;patch=1 \ " @@ -57,6 +68,29 @@ SRC_URI_append_ep93xx = " \ file://edb9301-fix-machine-id.patch;patch=1 \ " +SRC_URI_append_ben-nanonote = " \ + file://files.patch;patch=1 \ + file://001-core.patch;patch=1 \ + file://050-nand.patch;patch=1 \ + file://051-fb.patch;patch=1 \ + file://052-rtc.patch;patch=1 \ + file://053-adc.patch;patch=1 \ + file://100-battery.patch;patch=1 \ + file://101-mmc.patch;patch=1 \ + file://102-video.patch;patch=1 \ + file://103-lcm.patch;patch=1 \ + file://103-serial.patch;patch=1 \ + file://104-usb.patch;patch=1 \ + file://105-sound.patch;patch=1 \ + file://220-add-2gb-nand-support.patch;patch=1 \ + file://300-jffs2-summery-vmalloc.patch;patch=1 \ + file://400-spi-gpio-3wire.patch;patch=1 \ + file://410-soc-32bit-regs.patch;patch=1 \ + file://500-modifier-keys.patch;patch=1 \ + file://900-add-openwrt-logo.patch;patch=1 \ + file://fix_mips_vmlinux.lds.patch;patch=1 \ + " + do_devicetree_image_append_boc01() { dtc -I dts -O dtb ${KERNEL_DEVICETREE_FLAGS} -o devicetree.v1 ${KERNEL_DEVICETREE}.v1 install -m 0644 devicetree.v1 ${D}/boot/devicetree-${KERNEL_VERSION}.v1 diff --git a/recipes/llvm/llvm2.6/BX_to_BLX.patch b/recipes/llvm/llvm2.6/BX_to_BLX.patch new file mode 100644 index 0000000000..7cf36766af --- /dev/null +++ b/recipes/llvm/llvm2.6/BX_to_BLX.patch @@ -0,0 +1,13 @@ +Index: llvm/lib/Target/ARM/ARMInstrInfo.td +=================================================================== +--- llvm.orig/lib/Target/ARM/ARMInstrInfo.td 2009-10-06 12:35:26.000000000 +0000 ++++ llvm/lib/Target/ARM/ARMInstrInfo.td 2009-10-06 12:36:03.000000000 +0000 +@@ -645,7 +645,7 @@ + IIC_Br, "mov lr, pc\n\tbx $func", + [(ARMcall_nolink GPR:$func)]>, + Requires<[IsARM, IsNotDarwin]> { +- let Inst{7-4} = 0b0001; ++ let Inst{7-4} = 0b0011; + let Inst{19-8} = 0b111111111111; + let Inst{27-20} = 0b00010010; + } diff --git a/recipes/llvm/llvm2.6_2.6.bb b/recipes/llvm/llvm2.6_2.6.bb index 40dabb4fba..909bb95b00 100644 --- a/recipes/llvm/llvm2.6_2.6.bb +++ b/recipes/llvm/llvm2.6_2.6.bb @@ -1,12 +1,13 @@ require llvm.inc -PR = "r0" +PR = "r1" DEPENDS = "llvm-common llvm2.6-native" SRC_URI += "\ file://fix-build.patch;patch=1 \ file://llvm-debugonly-zeroormore.patch;patch=1;pnum=0 \ + file://BX_to_BLX.patch;patch=1 \ " LLVM_RELEASE = "2.6" diff --git a/recipes/llvm/llvm2.7-native_2.6+svnr20090916.bb b/recipes/llvm/llvm2.7-native_2.6+svnr20091007.bb index a0cf7c5fb2..ada81c625d 100644 --- a/recipes/llvm/llvm2.7-native_2.6+svnr20090916.bb +++ b/recipes/llvm/llvm2.7-native_2.6+svnr20091007.bb @@ -1,6 +1,6 @@ require llvm-native.inc -SRCREV = "82130" +SRCREV = "83459" PV = "2.6+svnr${SRCPV}" diff --git a/recipes/llvm/llvm2.7/BX_to_BLX.patch b/recipes/llvm/llvm2.7/BX_to_BLX.patch new file mode 100644 index 0000000000..7cf36766af --- /dev/null +++ b/recipes/llvm/llvm2.7/BX_to_BLX.patch @@ -0,0 +1,13 @@ +Index: llvm/lib/Target/ARM/ARMInstrInfo.td +=================================================================== +--- llvm.orig/lib/Target/ARM/ARMInstrInfo.td 2009-10-06 12:35:26.000000000 +0000 ++++ llvm/lib/Target/ARM/ARMInstrInfo.td 2009-10-06 12:36:03.000000000 +0000 +@@ -645,7 +645,7 @@ + IIC_Br, "mov lr, pc\n\tbx $func", + [(ARMcall_nolink GPR:$func)]>, + Requires<[IsARM, IsNotDarwin]> { +- let Inst{7-4} = 0b0001; ++ let Inst{7-4} = 0b0011; + let Inst{19-8} = 0b111111111111; + let Inst{27-20} = 0b00010010; + } diff --git a/recipes/llvm/llvm2.7_2.6+svnr20090916.bb b/recipes/llvm/llvm2.7_2.6+svnr20091007.bb index 4c4aac3968..142e15ea4f 100644 --- a/recipes/llvm/llvm2.7_2.6+svnr20090916.bb +++ b/recipes/llvm/llvm2.7_2.6+svnr20091007.bb @@ -1,6 +1,6 @@ require llvm.inc -SRCREV = "82130" +SRCREV = "83459" PV = "2.6+svnr${SRCPV}" @@ -11,7 +11,8 @@ DEPENDS = "llvm-common llvm2.7-native" SRC_URI = "\ svn://llvm.org/svn/llvm-project/llvm/;proto=http;module=trunk \ file://llvm-debugonly-zeroormore.patch;patch=1 \ -" + file://BX_to_BLX.patch;patch=1 \ + " EXTRA_OECMAKE += "\ -DLLVM_TARGET_ARCH:STRING=${LLVM_ARCH} \ diff --git a/recipes/ltrace/files/ltrace-compile.patch b/recipes/ltrace/files/ltrace-compile.patch index 8323a5c501..4784deb6df 100644 --- a/recipes/ltrace/files/ltrace-compile.patch +++ b/recipes/ltrace/files/ltrace-compile.patch @@ -54,7 +54,7 @@ Index: ltrace-0.5.3/configure CFLAGS='-g -O2' LIBS='-lelf -lsupc++ -liberty ' -INSTALL='/usr/bin/install -c' -+INSTALL='$/usr/bin/install -c' ++INSTALL='install -c' iquote='-iquote ' iquoteend='' diff --git a/recipes/ltrace/ltrace_0.5.3.bb b/recipes/ltrace/ltrace_0.5.3.bb index 9296510f7d..4130c29f68 100644 --- a/recipes/ltrace/ltrace_0.5.3.bb +++ b/recipes/ltrace/ltrace_0.5.3.bb @@ -1,7 +1,7 @@ DESCRIPTION = "ltrace shows runtime library call information for dynamically linked executables." HOMEPAGE = "http://ltrace.alioth.debian.org" SECTION = "devel" -DEPENDS = "coreutils-native libelf" +DEPENDS = "libelf" LICENSE = "GPLv2" SRC_URI = "\ @@ -15,12 +15,6 @@ SRC_URI = "\ " inherit autotools -PARALLEL_MAKE = "" -EXTRA_OEMAKE = "INSTALL_FILE='$(INSTALL) -p -m 0644' \ - INSTALL_PROGRAM='$(INSTALL) -p -m 0755' \ - INSTALL_SCRIPT='$(INSTALL) -p -m 0755' \ - INSTALL_DIR='$(INSTALL) -p -d -m 0755' " - export TARGET_CFLAGS = "${SELECTED_OPTIMIZATION} -isystem ${STAGING_INCDIR}" TARGET_CC_ARCH += "${LDFLAGS}" @@ -71,5 +65,5 @@ do_install() { sparc*) LTRACE_ARCH=sparc ;; x86_64*) LTRACE_ARCH=x86_64 ;; esac - oe_runmake install ${EXTRA_OEMAKE} ARCH=${LTRACE_ARCH} INSTALL=${STAGING_BINDIR_NATIVE}/install.coreutils-native DESTDIR=${D} + oe_runmake install ${EXTRA_OEMAKE} ARCH=${LTRACE_ARCH} DESTDIR=${D} } diff --git a/recipes/lzma/lzma.inc b/recipes/lzma/lzma.inc index fc40c9313b..4d31a44cd0 100644 --- a/recipes/lzma/lzma.inc +++ b/recipes/lzma/lzma.inc @@ -2,7 +2,7 @@ DESCRIPTION = "LZMA is a general compression method. LZMA provides high compress HOMEPAGE = "http://www.7-zip.org/" LICENSE = "LGPL" DEPENDS = "zlib" -INC_PR = "r1" +INC_PR = "r3" SRC_URI = "http://downloads.sourceforge.net/sevenzip/lzma${@bb.data.getVar('PV',d,1).replace('.','')}.tar.bz2 \ file://001-large_files.patch;patch=1 \ @@ -17,8 +17,13 @@ EXTRA_OEMAKE = "-f makefile.gcc" CFLAGS += "-c -I${S}" do_unpack_append() { - # It has few files with wrong encoding - os.system("find ${S} -type f -print0 | xargs -0 dos2unix") + # Replace MS-DOS line-endings with Unix style line-endings + os.system("find ${S} -type f -print0 | xargs -0 sed 's/\r$//' -i") +} + +do_patch_append() { + # Hack to ensure we use our environment values + os.system("find ${S} -type f -name makefile.gcc -print0 | xargs -0 sed 's/^CXX =/CXX ?=/;s/^CXX_C =/CXX_C ?=/;s/CXX_C/CC/' -i") } do_compile() { diff --git a/recipes/mokomaze/files/fsoraw.patch b/recipes/mokomaze/files/fsoraw.patch new file mode 100644 index 0000000000..e59f0cf6a7 --- /dev/null +++ b/recipes/mokomaze/files/fsoraw.patch @@ -0,0 +1,11 @@ +--- mokomaze-0.5.5+git8/data/mokomaze.desktop 2009-08-22 12:14:31.000000000 +0200 ++++ mokomaze-0.5.5+git8/data/mokomaze.desktop 2009-08-22 12:50:30.000000000 +0200 +@@ -4,7 +4,7 @@ + Encoding=UTF-8 + Version=0.5 + Type=Application +-Exec=mokomaze ++Exec=fsoraw -r Display mokomaze + Terminal=false + Categories=Game; + X-MB-SingleInstance=true diff --git a/recipes/mokomaze/mokomaze_0.5.5.bb b/recipes/mokomaze/mokomaze_0.5.5.bb new file mode 100644 index 0000000000..6fbe415d2e --- /dev/null +++ b/recipes/mokomaze/mokomaze_0.5.5.bb @@ -0,0 +1,25 @@ +DESCRIPTION="Classic game where you control a steel ball by tilting a wooden labyrinth" +HOMEPAGE="http://mokomaze.projects.openmoko.org/" +SECTION="x11/games" +PRIORITY="optional" +LICENSE="GPLv3" +DEPENDS="libsdl-ttf libsdl-image ode" +RDEPENDS="ttf-liberation-mono libpng" + +RDEPENDS_shr += "fsoraw" + +PR="r1" +PV="0.5.5+git8" + + +SRC_URI="http://mokomaze.projects.openmoko.org/files/${PN}-${PV}.tar.gz" + +SRC_URI_append_shr = " file://fsoraw.patch;patch=1" + +inherit autotools + +EXTRA_OECONF="FONTDIR=${datadir}/fonts/truetype --enable-rgb-swap" + +# needed for ode +LDFLAGS += "-lstdc++" + diff --git a/recipes/mplayer/mplayer-0.0+1.0rc2/ivtv-fix.patch b/recipes/mplayer/mplayer-0.0+1.0rc2/ivtv-fix.patch new file mode 100644 index 0000000000..25635bc5c6 --- /dev/null +++ b/recipes/mplayer/mplayer-0.0+1.0rc2/ivtv-fix.patch @@ -0,0 +1,26 @@ +--- MPlayer-1.0rc2/configure~ 2009-10-17 00:08:35.000000000 +0200 ++++ MPlayer-1.0rc2/configure 2009-10-17 00:08:35.000000000 +0200 +@@ -4965,7 +4965,7 @@ + echores "$_dxr3" + + +-echocheck "IVTV TV-Out" ++echocheck "IVTV TV-Out (pre linux-2.6.24)" + if test "$_ivtv" = auto ; then + cat > $TMPC << EOF + #include <stdlib.h> +@@ -4973,7 +4973,13 @@ + #include <linux/types.h> + #include <linux/videodev2.h> + #include <linux/ivtv.h> +-int main(void) { return 0; } ++#include <sys/ioctl.h> ++int main(void) { ++struct ivtv_cfg_stop_decode sd; ++struct ivtv_cfg_start_decode sd1; ++ioctl (0, IVTV_IOC_START_DECODE, &sd1); ++ioctl (0, IVTV_IOC_STOP_DECODE, &sd); ++return 0; } + EOF + _ivtv=no + cc_check && _ivtv=yes diff --git a/recipes/mplayer/mplayer-common.bb b/recipes/mplayer/mplayer-common.bb index cf1ced294f..3f3d5d2430 100644 --- a/recipes/mplayer/mplayer-common.bb +++ b/recipes/mplayer/mplayer-common.bb @@ -11,7 +11,7 @@ HOMEPAGE = "http://www.hentges.net/misc/openzaurus/index.shtml" ###################################################################################### PV = "0.0.1" -PR = "r0" +PR = "r1" ###################################################################################### diff --git a/recipes/mplayer/mplayer-common/om-gta02/mplayer.conf b/recipes/mplayer/mplayer-common/om-gta02/mplayer.conf new file mode 100644 index 0000000000..873e86afdd --- /dev/null +++ b/recipes/mplayer/mplayer-common/om-gta02/mplayer.conf @@ -0,0 +1,5 @@ +ao=alsa +ac=tremor,mad, +vo=glamo +hardframedrop=true +framedrop=true diff --git a/recipes/mplayer/mplayer_0.0+1.0rc2.bb b/recipes/mplayer/mplayer_0.0+1.0rc2.bb index 481acce475..9a16dada8c 100644 --- a/recipes/mplayer/mplayer_0.0+1.0rc2.bb +++ b/recipes/mplayer/mplayer_0.0+1.0rc2.bb @@ -28,7 +28,8 @@ SRC_URI = "http://www1.mplayerhq.hu/MPlayer/releases/MPlayer-1.0rc2.tar.bz2 \ file://imageon-video_out.patch;patch=1 \ file://pxa_configure.patch;patch=1 \ file://pxa-video_out.patch;patch=1 \ - file://motion-comp-pld.patch;patch=1 " + file://motion-comp-pld.patch;patch=1 \ + file://ivtv-fix.patch;patch=1 " # This is required for the collie machine only as all stacks in that # machine seem to be set to executable by the toolchain. If someone @@ -45,7 +46,7 @@ ARM_INSTRUCTION_SET = "ARM" RCONFLICTS_${PN} = "mplayer-atty" RREPLACES_${PN} = "mplayer-atty" -PR = "r12" +PR = "r13" PARALLEL_MAKE = "" diff --git a/recipes/mplayer/mplayer_git.bb b/recipes/mplayer/mplayer_git.bb new file mode 100644 index 0000000000..aa01cc7c20 --- /dev/null +++ b/recipes/mplayer/mplayer_git.bb @@ -0,0 +1,229 @@ +DESCRIPTION = "Open Source multimedia player." +SECTION = "multimedia" +PRIORITY = "optional" +HOMEPAGE = "http://www.mplayerhq.hu/" +DEPENDS = "live555 libdvdread libtheora virtual/libsdl ffmpeg xsp zlib libpng jpeg liba52 freetype fontconfig alsa-lib lzo ncurses lame libxv virtual/libx11 virtual/kernel \ + ${@base_conditional('ENTERPRISE_DISTRO', '1', '', 'libmad liba52 lame', d)}" + +RDEPENDS = "mplayer-common" +LICENSE = "GPL" +SRC_URI = "git://repo.or.cz/mplayer.git;protocol=git;branch=master" +SRC_URI_om-gta02 = "git://repo.or.cz/mplayer/glamo.git;protocol=git;branch=master \ + file://makefile-nostrip-svn.patch;patch=1 \ + " + +SRC_URI_append = " \ + file://pld-onlyarm5-svn.patch;patch=1 \ + file://makefile-nostrip-svn.patch;patch=1 \ + " + +SRC_URI_append_armv7a = " \ + file://omapfb.patch;patch=1 \ + file://vo_omapfb.c \ + file://yuv.S \ + " + +# This is required for the collie machine only as all stacks in that +# machine seem to be set to executable by the toolchain. If someone +# discovers this is more general than please make this more general +# ie. for all armv4 machines. +SRC_URI_append_collie = "file://disable-executable-stack-test.patch;patch=1" + +SRCREV_om-gta02 = "5519d0dfd3f9504f24aa9fe154f831bb718cbfc3" +SRCREV = "e5bcd70bc5b0557635ae51c7093f0e887493d4ba" + +PACKAGE_ARCH_collie = "collie" +PACKAGE_ARCH_c7x0 = "c7x0" +PACKAGE_ARCH_hx4700 = "hx4700" + +ARM_INSTRUCTION_SET = "ARM" + +RCONFLICTS_${PN} = "mplayer-atty" +RREPLACES_${PN} = "mplayer-atty" + +PV = "0.0+1.0rc2+gitr${SRCREV}" +PR = "r15" +DEFAULT_PREFERENCE = "-1" +DEFAULT_PREFERENCE_om-gta02 = "1" + +PARALLEL_MAKE = "" + +S = "${WORKDIR}/git" + +PACKAGES =+ "mencoder" + +FILES_${PN} = "${bindir}/mplayer ${libdir} /usr/etc/mplayer/" +FILES_mencoder = "${bindir}/mencoder" +CONFFILES_${PN} += "/usr/etc/mplayer/input.conf \ + /usr/etc/mplayer/example.conf \ + /usr/etc/mplayer/codecs.conf \ + " + +inherit autotools pkgconfig + +# We want a kernel header for armv7a, but we don't want to make mplayer machine specific for that +STAGING_KERNEL_DIR = "${STAGING_DIR}/${MACHINE_ARCH}${TARGET_VENDOR}-${TARGET_OS}/kernel" + +EXTRA_OECONF = " \ + --prefix=/usr \ + --mandir=${mandir} \ + --target=${SIMPLE_TARGET_SYS} \ + \ + --enable-mencoder \ + --disable-gui \ + --enable-largefiles \ + --disable-linux-devfs \ + --disable-lirc \ + --disable-lircc \ + --disable-joystick \ + --disable-vm \ + --disable-xf86keysym \ + --enable-tv \ + --enable-tv-v4l1 \ + --enable-tv-v4l2 \ + --disable-tv-bsdbt848 \ + --enable-rtc \ + --enable-network \ + --disable-smb \ + --enable-live \ + --disable-dvdnav \ + --enable-dvdread \ + --disable-dvdread-internal \ + --enable-libdvdcss-internal \ + --disable-cdparanoia \ + --enable-freetype \ + --enable-menu \ + --enable-sortsub \ + --disable-fribidi \ + --disable-enca \ + --disable-ftp \ + --disable-vstream \ + \ + --disable-gif \ + --enable-png \ + --enable-jpeg \ + --disable-libcdio \ + --disable-liblzo \ + --disable-qtx \ + --disable-xanim \ + --disable-real \ + --disable-xvid \ + --disable-x264 \ + \ + --enable-tremor-low \ + \ + --disable-speex \ + --enable-theora \ + --disable-faac \ + --disable-ladspa \ + --disable-libdv \ + --enable-mad \ + --disable-toolame \ + --disable-twolame \ + --disable-xmms \ + --disable-mp3lib \ + --enable-libmpeg2 \ + --disable-musepack \ + \ + --disable-gl \ + --disable-vesa \ + --disable-svga \ + --enable-sdl \ + --disable-aa \ + --disable-caca \ + --disable-ggi \ + --disable-ggiwmh \ + --disable-directx \ + --disable-dxr2 \ + --disable-dxr3 \ + --disable-dvb \ + --disable-dvbhead \ + --disable-mga \ + --disable-xmga \ + --enable-xv \ + --disable-xvmc \ + --disable-vm \ + --disable-xinerama \ + --enable-x11 \ + --enable-fbdev \ + --disable-mlib \ + --disable-3dfx \ + --disable-tdfxfb \ + --disable-s3fb \ + --disable-directfb \ + --disable-zr \ + --disable-bl \ + --disable-tdfxvid \ + --disable-tga \ + --disable-pnm \ + --disable-md5sum \ + \ + --enable-alsa \ + --enable-ossaudio \ + --disable-arts \ + --disable-esd \ + --disable-pulse \ + --disable-jack \ + --disable-openal \ + --disable-nas \ + --disable-sgiaudio \ + --disable-sunaudio \ + --disable-win32waveout \ + --enable-select \ + \ + --extra-libs=' -lBasicUsageEnvironment -lUsageEnvironment -lgroupsock -lliveMedia -lstdc++' \ +" + +EXTRA_OECONF_append_armv6 = " --enable-armv6" +EXTRA_OECONF_append_armv7a = " --enable-armv6 --enable-neon" + +EXTRA_OECONF_append_om-gta02 = " --enable-glamo" + +#build with support for the iwmmxt instruction and pxa270fb overlay support (pxa270 and up) +#not every iwmmxt machine has the lcd connected to pxafb, but building the module doesn't hurt +MY_ARCH := "${PACKAGE_ARCH}" +PACKAGE_ARCH = "${@base_contains('MACHINE_FEATURES', 'iwmmxt', 'iwmmxt', '${MY_ARCH}',d)}" + +MY_TARGET_CC_ARCH := "${TARGET_CC_ARCH}" +TARGET_CC_ARCH = "${@base_contains('MACHINE_FEATURES', 'iwmmxt', '-march=iwmmxt -mtune=iwmmxt', '${MY_TARGET_CC_ARCH}',d)}" + +EXTRA_OECONF_append = " ${@base_contains('MACHINE_FEATURES', 'iwmmxt', ' --enable-iwmmxt', '',d)} " +EXTRA_OECONF_append = " ${@base_contains('MACHINE_FEATURES', 'x86', '--enable-runtime-cpudetection', '',d)} " + +FULL_OPTIMIZATION = "-fexpensive-optimizations -fomit-frame-pointer -frename-registers -O4 -ffast-math" +FULL_OPTIMIZATION_armv7a = "-fexpensive-optimizations -ftree-vectorize -fomit-frame-pointer -O4 -ffast-math" +BUILD_OPTIMIZATION = "${FULL_OPTIMIZATION}" + +do_configure_prepend_armv7a() { + cp ${WORKDIR}/yuv.S ${S}/libvo + cp ${WORKDIR}/vo_omapfb.c ${S}/libvo + cp ${STAGING_KERNEL_DIR}/arch/arm/plat-omap/include/mach/omapfb.h ${S}/libvo/omapfb.h || true + cp ${STAGING_KERNEL_DIR}/include/asm-arm/arch-omap/omapfb.h ${S}/libvo/omapfb.h || true + cp ${STAGING_KERNEL_DIR}/include/linux/omapfb.h ${S}/libvo/omapfb.h || true + sed -e 's/__user//g' -i ${S}/libvo/omapfb.h || true +} + +CFLAGS_append = " -I${S}/libdvdread4 " + +do_configure() { + sed -i 's|/usr/include|${STAGING_INCDIR}|g' ${S}/configure + sed -i 's|/usr/lib|${STAGING_LIBDIR}|g' ${S}/configure + sed -i 's|/usr/\S*include[\w/]*||g' ${S}/configure + sed -i 's|/usr/\S*lib[\w/]*||g' ${S}/configure + sed -i 's|HOST_CC|BUILD_CC|' ${S}/Makefile + + export SIMPLE_TARGET_SYS="$(echo ${TARGET_SYS} | sed s:${TARGET_VENDOR}::g)" + ./configure ${EXTRA_OECONF} + +} + +do_compile () { + oe_runmake +} + +do_install_append() { + install -d ${D}/usr/etc/mplayer + install ${S}/etc/input.conf ${D}/usr/etc/mplayer/ + install ${S}/etc/example.conf ${D}/usr/etc/mplayer/ + install ${S}/etc/codecs.conf ${D}/usr/etc/mplayer/ +} diff --git a/recipes/mplayer/mplayer_svn.bb b/recipes/mplayer/mplayer_svn.bb index 8a34dd2f94..93e7523c3e 100644 --- a/recipes/mplayer/mplayer_svn.bb +++ b/recipes/mplayer/mplayer_svn.bb @@ -13,7 +13,7 @@ SRC_URI = "svn://svn.mplayerhq.hu/mplayer;module=trunk \ file://mplayer-lavc-arm.patch;patch=1 \ " -SRCREV = "29789" +SRCREV = "29934" SRC_URI_append_armv7a = " \ file://omapfb.patch;patch=1 \ file://vo_omapfb.c \ @@ -167,6 +167,7 @@ EXTRA_OECONF = " \ --enable-select \ \ --extra-libs=' -lBasicUsageEnvironment -lUsageEnvironment -lgroupsock -lliveMedia -lstdc++' \ + --enable-protocol='file_protocol pipe_protocol http_protocol rtmp_protocol tcp_protocol udp_protocol' \ " EXTRA_OECONF_append_arm = " --disable-decoder=vorbis_decoder \ diff --git a/recipes/netbase/netbase/shr/init b/recipes/netbase/netbase/shr/init new file mode 100644 index 0000000000..32810dc913 --- /dev/null +++ b/recipes/netbase/netbase/shr/init @@ -0,0 +1,46 @@ +#!/bin/sh +# +# manage network interfaces and configure some networking options + +PATH=/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin + +if ! [ -x /sbin/ifup ]; then + exit 0 +fi + +case "$1" in + start) + echo -n "Configuring network interfaces... " + ifup -a + echo "done." + ;; + stop) + if sed -n 's/^[^ ]* \([^ ]*\) \([^ ]*\) .*$/\1 \2/p' /proc/mounts | + grep -q "^/ nfs$"; then + echo "NOT deconfiguring network interfaces: / is an NFS mount" + elif sed -n 's/^[^ ]* \([^ ]*\) \([^ ]*\) .*$/\1 \2/p' /proc/mounts | + grep -q "^/ smbfs$"; then + echo "NOT deconfiguring network interfaces: / is an SMB mount" + elif sed -n 's/^[^ ]* \([^ ]*\) \([^ ]*\) .*$/\2/p' /proc/mounts | + grep -qE '^(nfs|smbfs|ncp|coda)$'; then + echo "NOT deconfiguring network interfaces: network shares still mounted." + else + echo -n "Deconfiguring network interfaces... " + ifdown -a + echo "done." + fi + ;; + force-reload|restart) + echo -n "Reconfiguring network interfaces... " + ifdown -a + ifup -a + echo "done." + ;; + *) + echo "Usage: /etc/init.d/networking {start|stop|restart|force-reload}" + exit 1 + ;; +esac + +exit 0 + diff --git a/recipes/netbase/netbase/shr/options b/recipes/netbase/netbase/shr/options new file mode 100644 index 0000000000..1cbffcb365 --- /dev/null +++ b/recipes/netbase/netbase/shr/options @@ -0,0 +1 @@ +# DEPRECATED by /etc/sysctl.conf diff --git a/recipes/nmap/nmap_3.81.bb b/recipes/nmap/nmap_3.81.bb index 7aa5928191..95c14be568 100644 --- a/recipes/nmap/nmap_3.81.bb +++ b/recipes/nmap/nmap_3.81.bb @@ -19,6 +19,8 @@ EXTRA_OECONF = "--with-pcap=linux \ --without-openssl" EXTRA_OEMAKE = "STRIPPROG=${STRIP}" +PARALLEL_MAKE = "" + CXXFLAGS_append = " -fpermissive" # Ugly hack follows -- their configure.ac doesnt match their configure .. # doesnt include a check for the length type in recvfrom, so we hack it here diff --git a/recipes/notifier/notifier_0.2.bb b/recipes/notifier/notifier_0.2.bb new file mode 100644 index 0000000000..2cd999f878 --- /dev/null +++ b/recipes/notifier/notifier_0.2.bb @@ -0,0 +1,21 @@ +DESCRIPTION = "A notifier for new calls and messages" +HOMEPAGE = "http://www.telefoninux.org" +AUTHOR = "Pietro Montorfano" +LICENSE = "GPLv3" +RDEPENDS = "python-elementary python python-edbus" +SECTION = "x11/application" +PR = "r2" + +SRC_URI = "http://monto.homelinux.org/notifier \ +http://monto.homelinux.org/89notifier" + +S = "${WORKDIR}" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${S}/notifier ${D}${bindir}/ + install -d ${D}${sysconfdir}/X11/Xsession.d + install -m 0755 ${S}/89notifier ${D}${sysconfdir}/X11/Xsession.d/ +} + + diff --git a/recipes/nvidia-drivers/nvidia-display-190.42/nvidia-oe-conftest.patch b/recipes/nvidia-drivers/nvidia-display-190.42/nvidia-oe-conftest.patch new file mode 100644 index 0000000000..95cf98036c --- /dev/null +++ b/recipes/nvidia-drivers/nvidia-display-190.42/nvidia-oe-conftest.patch @@ -0,0 +1,27 @@ +Index: nv/Makefile.kbuild +=================================================================== +--- nv.orig/Makefile.kbuild 2009-10-21 06:04:11.000000000 +0200 ++++ nv/Makefile.kbuild 2009-11-22 00:55:06.000000000 +0100 +@@ -284,19 +284,16 @@ + # sufficient privileges. Rebuild the module dependency file. + # + +-module-install: suser-sanity-check module ++module-install: module + @mkdir -p $(MODULE_ROOT)/video; \ +- install -m 0664 -o root -g root $(MODULE_OBJECT) $(MODULE_ROOT)/video; \ +- PATH="$(PATH):/bin:/sbin" depmod -ae; ++ install -m 0664 $(MODULE_OBJECT) $(MODULE_ROOT)/video; + + # + # This target builds, then installs, then creates device nodes and inserts + # the module, if successful. + # + +-package-install: module-install rmmod-sanity-check +- PATH="$(PATH):/bin:/sbin" modprobe $(MODULE_NAME) && \ +- echo "$(MODULE_OBJECT) installed successfully."; ++package-install: module-install + + # + # Build an object file suitable for further processing by the installer and diff --git a/recipes/nvidia-drivers/nvidia-display_190.42.bb b/recipes/nvidia-drivers/nvidia-display_190.42.bb new file mode 100644 index 0000000000..0ef15e881b --- /dev/null +++ b/recipes/nvidia-drivers/nvidia-display_190.42.bb @@ -0,0 +1,46 @@ +# nvidia-display .bb build file +# Copyright (C) 2005-2006, Advanced Micro Devices, Inc. All Rights Reserved +# Released under the MIT license (see /COPYING) + +require nvidia-drivers.inc + +DEFAULT_PREFERENCE = "-1" + +PKG_BASENAME="NVIDIA-Linux-${NVIDIA_ARCH}-${PV}-${NVIDIA_PKGRUN}" + +SRC_URI="http://download.nvidia.com/XFree86/Linux-${NVIDIA_ARCH}/${PV}/${PKG_BASENAME}.run \ + file://nvidia-oe-conftest.patch;patch=1" + +S="${WORKDIR}/${PKG_BASENAME}/usr/src/nv" + +EXTRA_OEMAKE=" KERNEL_SOURCES=${STAGING_KERNEL_DIR} KERNEL_MODLIB=${STAGING_KERNEL_DIR} KERNEL_UNAME=${KERNEL_VERSION} PATCHLEVEL=${KERNEL_PATCHLEVEL} MODULE_ROOT=${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers IGNORE_CC_MISMATCH=1" + +FILES_${PN} += " /usr/lib /usr/bin /usr/share" +FILES_${PN}-dev += " /usr/lib/xorg/modules/extensions/libglx.so" + +INSANE_SKIP_${PN} = True + +do_configure() { + rm -f ${S}/makefile + if [ "${KERNEL_PATCHLEVEL}" != "4" ] ; then + ln -sf Makefile.kbuild ${S}/Makefile + else + ln -sf Makefile.nvidia ${S}/Makefile + fi +} + +do_install() { + unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS + oe_runmake DEPMOD=echo INSTALL_MOD_PATH="${D}" CC="${KERNEL_CC}" LD="${KERNEL_LD}" install + + install -d ${D}/usr + for dir in bin include lib share ; do + cp -pPR ${WORKDIR}/${PKG_BASENAME}/usr/$dir ${D}/usr/ + done + + #X11R7.0 style... + install -d ${D}/usr/lib/xorg/ + cp ${WORKDIR}/${PKG_BASENAME}/usr/X11R6/lib/lib* ${D}/usr/lib/ + cp -pPR ${WORKDIR}/${PKG_BASENAME}/usr/X11R6/lib/modules ${D}/usr/lib/xorg/ + ln -s libglx.so.1.0.8756 ${D}/usr/lib/xorg/modules/extensions/libglx.so +} diff --git a/recipes/nvidia-drivers/nvidia-drivers.inc b/recipes/nvidia-drivers/nvidia-drivers.inc index fbb28cb01d..32f16a43b9 100644 --- a/recipes/nvidia-drivers/nvidia-drivers.inc +++ b/recipes/nvidia-drivers/nvidia-drivers.inc @@ -42,6 +42,8 @@ EXTRA_OEMAKE=" KERNEL_SOURCES=${STAGING_KERNEL_DIR} KERNEL_MODLIB=${STAGING_KERN PKG_BASENAME="NVIDIA-Linux-${NVIDIA_ARCH}-${PV}-${NVIDIA_PKGRUN}" +FILES_${PN}-doc += " /usr/share/doc/*" + nvidia_do_unpack() { sh ${PKG_BASENAME}.run -x } diff --git a/recipes/omgps/omgps_svn.bb b/recipes/omgps/omgps_svn.bb new file mode 100644 index 0000000000..e68a9a4a3d --- /dev/null +++ b/recipes/omgps/omgps_svn.bb @@ -0,0 +1,12 @@ +DESCRIPTION = "GPS application for openmoko freerunner" +HOMEPAGE = "http://omgps.googlecode.com" +SECTION = "openmoko/applications" +LICENSE = "GPLv2" +DEPENDS = "gtk+ python-pygobject dbus-glib" +#PACKAGES = "${PN}-dbg ${PN}" +PV = "0.1+svnr${SRCPV}" +PR = "r0" +S = "${WORKDIR}/${PN}" +SRC_URI = "svn://omgps.googlecode.com/svn/trunk;module=omgps;proto=http" + +inherit autotools diff --git a/recipes/omnewrotate/files/correct-sysfs-bl-path.patch b/recipes/omnewrotate/files/correct-sysfs-bl-path.patch new file mode 100644 index 0000000000..6d381649a8 --- /dev/null +++ b/recipes/omnewrotate/files/correct-sysfs-bl-path.patch @@ -0,0 +1,53 @@ +diff -uri omnewrotate.org/src/omnewrotate.c omnewrotate/src/omnewrotate.c +--- omnewrotate.org/src/omnewrotate.c 2009-05-03 20:23:56.000000000 +0200 ++++ omnewrotate/src/omnewrotate.c 2009-05-07 17:46:07.000000000 +0200 +@@ -95,8 +95,8 @@ + #define LONG_TIME 0 + + #define EVENT_PATH "/dev/input/event3" +-#define GET_BRIGHTNESS_PATH "/sys/class/backlight/pcf50633-bl/actual_brightness" +-#define SET_BRIGHTNESS_PATH "/sys/class/backlight/pcf50633-bl/brightness" ++#define GET_BRIGHTNESS_PATH "/sys/class/backlight/gta02-bl/actual_brightness" ++#define SET_BRIGHTNESS_PATH "/sys/class/backlight/gta02-bl/brightness" + + #define NUM_THREADS 1 + +@@ -197,8 +197,8 @@ + #endif + + if (change_brightness && !use_dbus) { +- set_brightness_file = open(SET_BRIGHTNESS_PATH, O_RDWR); +- get_brightness_file = open(GET_BRIGHTNESS_PATH, O_RDWR); ++ set_brightness_file = open(SET_BRIGHTNESS_PATH, O_WRONLY); ++ get_brightness_file = open(GET_BRIGHTNESS_PATH, O_RDONLY); + + if (set_brightness_file < 0 || get_brightness_file < 0) + { +@@ -273,7 +273,7 @@ + rootWindow = RootWindow(display, screen); + XRRRotations(display, screen, &r); + +- char current_brightness[3] = "63\n"; ++ char current_brightness[4] = "255\n"; + char brightness_off[2] = "0\n"; + + +@@ -317,7 +317,7 @@ + else + { + lseek(get_brightness_file, 0, SEEK_SET); +- read(get_brightness_file, ¤t_brightness, 2); ++ read(get_brightness_file, ¤t_brightness, 3); + lseek(set_brightness_file, 0, SEEK_SET); + write(set_brightness_file, &brightness_off, 2); + } +@@ -333,7 +333,7 @@ + if(debug) printf("Recovering screen brightness for nifty effect\n"); + usleep(500000); + lseek(set_brightness_file, 0, SEEK_SET); +- write(set_brightness_file, ¤t_brightness, 3); ++ write(set_brightness_file, ¤t_brightness, 4); + } + + } +Nur in omnewrotate.org/src: .omnewrotate.c.swp. diff --git a/recipes/omnewrotate/omnewrotate_0.5.4.bb b/recipes/omnewrotate/omnewrotate_0.5.4.bb new file mode 100644 index 0000000000..c712efaba0 --- /dev/null +++ b/recipes/omnewrotate/omnewrotate_0.5.4.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "OpenMoko New Rotate is a screen rotation program" +HOMEPAGE = "http://code.google.com/p/omnewrotate/" +AUTHOR = "Rui Seabra" +LICENSE = "GPLv3" +SECTION = "console/network" +DEPENDS = "libframeworkd-glib xrandr" +PV = "0.5.4" +PR = "r4" + +SRC_URI = "svn://omnewrotate.googlecode.com/svn/trunk;module=.;proto=http;rev=HEAD \ +file://correct-sysfs-bl-path.patch;patch=1 \ +" +S = "${WORKDIR}" + +inherit autotools diff --git a/recipes/omoney/omoney_svn.bb b/recipes/omoney/omoney_svn.bb new file mode 100644 index 0000000000..f566c92ada --- /dev/null +++ b/recipes/omoney/omoney_svn.bb @@ -0,0 +1,28 @@ +DESCRIPTION = "OMoney is a bookkeeping application for Openmoko" +HOMEPAGE = "http://omoney.googlecode.com" +AUTHOR = "Bumbl" +LICENSE = "GPLv2" +SECTION = "openmoko/money" +PV = "milestone1+svnr${SRCPV}" +PR = "r0" +SRC_URI = "svn://omoney.googlecode.com/svn/trunk;module=.;proto=http;rev=29" +S = "${WORKDIR}" + +inherit distutils + +RDEPENDS_${PN} = "\ + python \ + python-datetime \ + python-evas \ + python-edje \ + python-ecore \ + python-etk \ + python-sqlite3 \ + python-textutils" + +FILES_${PN} = "\ + /usr/bin/omoney \ + /usr/share/omoney/omgui.edj \ + /usr/share/pixmaps/omoney.png \ + /usr/share/applications/omoney.desktop" + diff --git a/recipes/omview/omview_svn.bb b/recipes/omview/omview_svn.bb new file mode 100644 index 0000000000..8ce0a78160 --- /dev/null +++ b/recipes/omview/omview_svn.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "OMView" +SECTION = "x11/graphics" +PKG_TAGS_${PN} = "group::communication" +DEPENDS += " evas ewl epsilon" +RDEPENDS += " epsilon-thumbd" +PV = "0.0.1+svnr${SRCPV}" +PR = "r2" + +inherit autotools + +SRC_URI += "svn://svn.projects.openmoko.org/svnroot;proto=svn;module=omview" + +S = "${WORKDIR}/${PN}" + diff --git a/recipes/openmoko-3rdparty/advancedcaching_git.bb b/recipes/openmoko-3rdparty/advancedcaching_git.bb new file mode 100644 index 0000000000..d9379333f8 --- /dev/null +++ b/recipes/openmoko-3rdparty/advancedcaching_git.bb @@ -0,0 +1,22 @@ +DESCRIPTION = "Advanced Geocaching Tool for Linux - Towards paperless geocaching!" +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "GPL" +HOMEPAGE = "http://www.opkg.org/package_268.html" +RDEPENDS = "python-pygtk python-html python-image python-netclient python-misc python-sqlite3 python-mime python-json" +PV = "0.1.2+gitr${SRCREV}" + +SRC_URI = "git://github.com/webhamster/advancedcaching.git;protocol=git;branch=master" + +inherit setuptools + +S = "${WORKDIR}/git/files" + +do_install_append() { + mkdir -p "${D}/${datadir}/pixmaps" + install -m 0644 "${S}/advancedcaching.png" "${D}/${datadir}/pixmaps" + mkdir -p "${D}/${datadir}/applications" + install -m 0644 "${S}/advancedcaching.desktop" "${D}/${datadir}/applications" +} + +FILES_${PN} += "/usr/share/applications/* /usr/share/pixmaps/*" diff --git a/recipes/openmoko-3rdparty/om-neon_svn.bb b/recipes/openmoko-3rdparty/om-neon_svn.bb new file mode 100644 index 0000000000..5ecaf14123 --- /dev/null +++ b/recipes/openmoko-3rdparty/om-neon_svn.bb @@ -0,0 +1,30 @@ +DESCRIPTION = "Simple image viewer" +HOMEPAGE = "http://neon.projects.openmoko.org/" +LICENSE = "GPLv3" +AUTHOR = "Valéry Febvre <vfebvre@easter-eggs.com>" +SECTION = "x11/applications" +PRIORITY = "optional" +DEPENDS = "edje-native python-native" + +SRCREV = ${AUTOREV} +PV = "1.0.0+svnr${SRCPV}" +PR = "r2" + +S = "${WORKDIR}/trunk" + +# Pure Python plus Edje interface +PACKAGE_ARCH = "all" + +SRC_URI = "svn://svn.projects.openmoko.org/svnroot/neon;module=trunk" + +inherit distutils + +FILES_${PN} += "${datadir}/neon ${datadir}/applications/neon.desktop ${datadir}/pixmaps" + +RDEPENDS += "python-textutils python-evas python-ecore python-edje" + +do_compile_prepend() { + sed -i "s/\/opt\/bin\/edje_cc -v/${@"${STAGING_BINDIR_NATIVE}".replace('/', '\/')}\/edje_cc/g" ${S}/build_edje.py + sed -i "s/#THEMES_DIR = '\/usr\/share\/neon\/themes'/THEMES_DIR = '\/usr\/share\/neon\/themes'/g" ${S}/neon/neon.py + sed -i "s/THEMES_DIR = '..\/data\/themes'/#THEMES_DIR = '..\/data\/themes'/g" ${S}/neon/neon.py +} diff --git a/recipes/openmoko-3rdparty/pisi_0.4.7.bb b/recipes/openmoko-3rdparty/pisi_0.4.7.bb new file mode 100644 index 0000000000..b3425d2c2e --- /dev/null +++ b/recipes/openmoko-3rdparty/pisi_0.4.7.bb @@ -0,0 +1,33 @@ +DESCRIPTION = "PISI is synchronizing information" +AUTHOR = "Michael Pilgermann" +PRIORITY = "optional" +LICENSE = "GPL" +HOMEPAGE = "http://projects.openmoko.org/projects/pisi/" +SRCNAME = "pisi" +DEPENDS = "python-native python" +RDEPENDS = "python-vobject python python-pygtk python-pygobject python-pycairo\ + python-gdata python-webdav python-ldap python-epydoc python-core\ + python-dateutil python-sqlite3 python-netserver python-netclient\ + python-misc" + +PACKAGE_ARCH = "all" + +PR = "r0" + +SRC_URI = "http://projects.openmoko.org/frs/download.php/907/pisi-src-${PV}.tar.gz" + +FILES_${PN} += "/opt/pisi \ + ${datadir}/pixmaps \ + ${datadir}/applications \ + /home" +CONFFILES_${PN} += "/home/root/.${PN}/conf.default" + +do_compile() { + ${STAGING_BINDIR_NATIVE}/python ${S}/setup.py build ${D} +} + +do_install() { + ${STAGING_BINDIR_NATIVE}/python ${S}/setup.py install ${D} + rm -rf ${D}/opt/pisi/build/ + rm -rf ${D}/opt/pisi/patches/ +} diff --git a/recipes/openmoko-projects/openmoko-agpsui/fix-configure-for-new-autotools.patch b/recipes/openmoko-projects/openmoko-agpsui/fix-configure-for-new-autotools.patch new file mode 100644 index 0000000000..b190cf6096 --- /dev/null +++ b/recipes/openmoko-projects/openmoko-agpsui/fix-configure-for-new-autotools.patch @@ -0,0 +1,11 @@ +diff -uri openmoko-agpsui/trunk/configure.ac openmoko-agpsui-fixed/trunk/configure.ac +--- openmoko-agpsui/trunk/configure.ac 2009-05-30 12:24:11.000000000 +0200 ++++ openmoko-agpsui-fixed/trunk/configure.ac 2009-05-30 12:26:32.000000000 +0200 +@@ -7,6 +7,7 @@ + + AC_ISC_POSIX + AC_PROG_CC ++AC_PROG_CXX + AC_STDC_HEADERS + AC_PROG_LIBTOOL + diff --git a/recipes/openmoko-projects/openmoko-agpsui_svn.bb b/recipes/openmoko-projects/openmoko-agpsui_svn.bb index 8cf3830912..b341d1b544 100644 --- a/recipes/openmoko-projects/openmoko-agpsui_svn.bb +++ b/recipes/openmoko-projects/openmoko-agpsui_svn.bb @@ -4,9 +4,10 @@ SECTION = "openmoko/apps" LICENSE = "GPL" DEPENDS = "gtk+" PV = "0.1+svnr${SRCPV}" -PR = "r0" +PR = "r1" -SRC_URI = "svn://svn.projects.openmoko.org/svnroot/openmoko-agpsui;module=trunk;proto=https" +SRC_URI = "svn://svn.projects.openmoko.org/svnroot/openmoko-agpsui;module=trunk;proto=http \ +file://fix-configure-for-new-autotools.patch;patch=1;pnum=2" S = "${WORKDIR}/trunk" diff --git a/recipes/openmoko-projects/paroli_git.bb b/recipes/openmoko-projects/paroli_git.bb index e485996f4b..4b4c9add4a 100644 --- a/recipes/openmoko-projects/paroli_git.bb +++ b/recipes/openmoko-projects/paroli_git.bb @@ -1,20 +1,179 @@ DESCRIPTION = "Paroli" SECTION = "x11" LICENSE = "GPL" -PV = "0.2+gitr${SRCREV}" +PV = "0.2.1+gitr${SRCREV}" +PE = "1" PR = "r0" -SRC_URI = "git://git.paroli-project.org/paroli.git;protocol=http" +SRC_URI = "git://git.paroli-project.org/paroli.git;protocol=http;branch=shr" S = "${WORKDIR}/git" inherit distutils +PACKAGES += "${PN}-autostart ${PN}-theme ${PN}-sounds ${PN}-calculator" + RDEPENDS = "\ python-datetime \ python-subprocess \ python-textutils \ python-dbus \ python-pygobject \ + python-elementary \ + dbus-x11 \ + task-fso-compliance \ + elementary \ + elementary-themes \ + edbus-ehal \ " -FILES_${PN} += "${sysconfdir}/dbus-1 ${sysconfdir}/paroli ${datadir}" +E_CONFIG_DIR="/usr/share/enlightenment/data" + +RULES_YAML = rules.yaml +RULES_YAML_om-gta01 = gta01_rules.yaml + +do_configure_append() { + # fix absolute etc reference + sed -i "s|/etc/|../../etc/|" ${S}/setup.py + sed -i "s|prefix,|'../../usr/',|" ${S}/setup.py + sed -i "s|core/|/usr/lib/python2.6/site-packages/|" ${S}/scripts/paroli + sed -i "s|services|/usr/share/paroli/services|" ${S}/scripts/paroli.fso.cfg + sed -i "s|applications|/usr/share/paroli/applications|" ${S}/scripts/paroli.fso.cfg +} + +do_install_append() { +# install ${D}${sysconfdir}/paroli/paroli.fso.cfg ${D}${sysconfdir}/paroli/paroli.cfg + + # install paroli theme + install -d ${D}${E_CONFIG_DIR}/themes + install ${S}/data/e-config/paroli.edj ${D}${E_CONFIG_DIR}/themes/ + install ${S}/data/e-config/serenity.edj ${D}${E_CONFIG_DIR}/themes/ + install -d ${D}${E_CONFIG_DIR}/config/paroli + install ${S}/data/e-config/paroli/* ${D}${E_CONFIG_DIR}/config/paroli/ + install -d ${D}${E_CONFIG_DIR}/config/paroli-serenity + install ${S}/data/e-config/paroli-serenity/* ${D}${E_CONFIG_DIR}/config/paroli-serenity/ + + install -d ${D}${datadir}/elementary/themes + install ${S}/data/paroli.edj ${D}${datadir}/elementary/themes + + install -d ${D}${datadir}/icons + install ${S}/data/paroli.png ${D}${datadir}/icons + + install -d ${D}${datadir}/applications + install ${S}/data/paroli.desktop ${D}${datadir}/applications + + # install autostart + install -d ${D}${E_CONFIG_DIR}/applications/all + cp ${D}/usr/share/applications/paroli.desktop ${D}${E_CONFIG_DIR}/applications/all + install -d ${D}${E_CONFIG_DIR}/applications/startup + echo "${E_CONFIG_DIR}/applications/all/paroli.desktop" >> ${D}${E_CONFIG_DIR}/applications/startup/.order + +# install -d ${D}${sysconfdir}/freesmartphone/oevents +# install ${S}/data/${RULES_YAML} ${D}${sysconfdir}/freesmartphone/oevents/paroli_rules.yaml +# install ${S}/data/frameworkd.conf ${D}${sysconfdir}/paroli_frameworkd.conf + + install -d ${D}${sysconfdir}/freesmartphone/opreferences/conf/phone + install ${S}/data/default.yaml ${D}${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml + + install -d ${D}${datadir}/dbus-1/system-services/ + install ${S}/data/dbus/org.tichy.launcher.service ${D}${datadir}/dbus-1/system-services/ + + install -d ${D}${datadir}/sounds + install ${S}/data/sounds/* ${D}${datadir}/sounds + +} + +pkg_postinst_${PN}-autostart() { +#!/bin/sh +# do this off or on line +if [ "x$D" != "x" ]; then + ROOTFS=${IMAGE_ROOTFS} +else + ROOTFS="" +fi + +# post installation script +if [ -x $ROOTFS${sysconfdir}/X11/Xsession.d/80zhone ]; then + echo "*******************************************" + echo "Deactivating zhone autostart" + echo "*******************************************" + chmod -x $ROOTFS${sysconfdir}/X11/Xsession.d/80zhone || true +fi +exit 0 +} + +#pkg_postinst_${PN}-sounds() { +#!/bin/sh +# do this off or on line +#if [ "x$D" != "x" ]; then +# ROOTFS=${IMAGE_ROOTFS} +#else +# ROOTFS="" +#fi +# post installation script +#if [ ! -e /$ROOTFS${sysconfdir}/freesmartphone/opreferences/conf/phone/old_default.yaml ] ; then +# echo "Backing up ${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml" +# mv $ROOTFS${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml $ROOTFS${sysconfdir}/freesmartphone/opreferences/conf/phone/old_default.yaml +#fi +#cp $ROOTFS${sysconfdir}/freesmartphone/opreferences/conf/phone/paroli_default.yaml $ROOTFS${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml +#exit 0 +#} + +pkg_postinst_${PN}-theme() { +#!/bin/sh +# do this off or on line +if [ "x$D" != "x" ]; then + ROOTFS=${IMAGE_ROOTFS} +else + ROOTFS="" +fi +# post installation script +echo 'E_PROFILE="-profile paroli"' > $ROOTFS${sysconfdir}/enlightenment/default_profile +exit 0 +} + +FILES_${PN} = " \ + ${sysconfdir}/dbus-1 \ + ${sysconfdir}/paroli \ + ${sysconfdir}/freesmartphone/oevents \ + ${prefix}/lib \ + ${prefix}/bin \ + ${datadir}/paroli/applications/common-for-edje \ + ${datadir}/paroli/applications/inout \ + ${datadir}/paroli/applications/telephony \ + ${datadir}/paroli/applications/messages \ + ${datadir}/paroli/applications/launcher \ + ${datadir}/paroli/applications/people \ + ${datadir}/paroli/applications/settings \ + ${datadir}/applications \ + ${datadir}/elementary \ + ${datadir}/paroli/services \ + ${datadir}/paroli/data \ + ${datadir}/pixmaps \ + ${datadir}/icons \ + ${datadir}/dbus-1/system-services/ \ + " + +FILES_${PN}-theme = " \ + ${E_CONFIG_DIR}/themes \ + ${E_CONFIG_DIR}/config \ + " + +FILES_${PN}-autostart = "${E_CONFIG_DIR}/applications" + +FILES_${PN}-sounds = " \ + ${datadir}/sounds/ \ + ${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml \ + " + +FILES_${PN}-calculator = " \ + ${datadir}/paroli/applications/calculator \ + " + +CONFFILES_${PN} += " \ + ${sysconfdir}/paroli/paroli.fallback.cfg \ + ${sysconfdir}/paroli/paroli.pyneo.cfg \ + ${sysconfdir}/paroli/paroli.fso.cfg \ + " +CONFFILES_${PN}-sounds += " \ + ${sysconfdir}/freesmartphone/opreferences/conf/phone/default.yaml \ + " diff --git a/recipes/openmoko2/libmokoui2/configure.patch b/recipes/openmoko2/libmokoui2/configure.patch new file mode 100644 index 0000000000..174c598fe1 --- /dev/null +++ b/recipes/openmoko2/libmokoui2/configure.patch @@ -0,0 +1,10 @@ +--- libmokoui.old/configure.ac 2009-06-10 12:42:32.000000000 +0200 ++++ libmokoui2/configure.ac 2009-06-10 12:42:43.000000000 +0200 +@@ -28,7 +28,6 @@ + + if test $enable_python != no ; then + AM_PATH_PYTHON(2.3.5) +- PKG_CHECK_MODULES(GNOME_PYTHON, gnome-python-2.0 >= 2.10.00) + AC_SUBST(PYGDK_CFLAGS) + AC_SUBST(PYGDK_LIBS) + diff --git a/recipes/openmoko2/libmokoui2/makefile.am.patch b/recipes/openmoko2/libmokoui2/makefile.am.patch new file mode 100644 index 0000000000..79f0a48361 --- /dev/null +++ b/recipes/openmoko2/libmokoui2/makefile.am.patch @@ -0,0 +1,19 @@ +--- libmokoui.old/bindings/python/Makefile.am 2009-06-10 12:42:32.000000000 +0200 ++++ libmokoui2/bindings/python/Makefile.am 2009-06-10 12:51:45.000000000 +0200 +@@ -1,13 +1,12 @@ +- +-PY_DEFS=`pkg-config --variable=defsdir pygtk-2.0` +-PYTHON_INCLUDES=-I/usr/include/python${PYTHON_VERSION} ++PY_DEFS=${PKG_CONFIG_SYSROOT_DIR}`pkg-config --variable=defsdir pygtk-2.0` ++PYTHON_INCLUDES=-I${PKG_CONFIG_SYSROOT_DIR}/usr/include/python${PYTHON_VERSION} + + CLEANFILES = \ + mokoui.defs \ + mokoui.c + + mokoui.defs: ../../libmokoui/moko-finger-scroll.h +- python /usr/share/pygtk/2.0/codegen/h2def.py ../../libmokoui/moko-finger-scroll.h > mokoui.defs ++ python ${PKG_CONFIG_SYSROOT_DIR}`pkg-config --variable=codegendir pygtk-2.0`/h2def.py ../../libmokoui/moko-finger-scroll.h > mokoui.defs + + mokoui.c: mokoui.defs mokoui.override + pygtk-codegen-2.0 --prefix mokoui \ diff --git a/recipes/openmoko2/libmokoui2_svn.bb b/recipes/openmoko2/libmokoui2_svn.bb index 58f4b56f27..176f775c8b 100644 --- a/recipes/openmoko2/libmokoui2_svn.bb +++ b/recipes/openmoko2/libmokoui2_svn.bb @@ -1,12 +1,19 @@ SECTION = "openmoko/libs" -DEPENDS = "gtk+" +DEPENDS = "gtk+ python-pygtk" + PV = "0.1.0+svnr${SRCPV}" -PR = "r2" +PR = "r5" inherit openmoko2 +SRC_URI += "\ + file://configure.patch;patch=1 \ + file://makefile.am.patch;patch=1 \ + " LICENSE = "LGPL" +EXTRA_OECONF += " --enable-python" + do_configure_prepend() { touch gtk-doc.make } @@ -14,4 +21,6 @@ do_configure_prepend() { do_stage() { autotools_stage_all } - +FILES_${PN} += "${libdir}/python2.6/site-packages/mokoui.*" +FILES_${PN}-dbg += "${libdir}/python2.6/site-packages/.debug/" +FILES_${PN}-dev += "/usr/share/vala/vapi/" diff --git a/recipes/openmoko2/openmoko-alsa-scenarios.bb b/recipes/openmoko2/openmoko-alsa-scenarios.bb index 3cfaa6a8ec..39a9fcfec0 100644 --- a/recipes/openmoko2/openmoko-alsa-scenarios.bb +++ b/recipes/openmoko2/openmoko-alsa-scenarios.bb @@ -1,7 +1,9 @@ DESCRIPTION = "Package for the different scenarios used by Openmoko" SECTION = "openmoko/base" PV = "1.0+svnr${SRCPV}" -PR = "r1" +PR = "r2" + +PROVIDES = "virtual/alsa-scenarios" COMPATIBLE_MACHINE = "(om-gta01|om-gta02)" diff --git a/recipes/openmoocow/openmoocow/openmoocow.desktop b/recipes/openmoocow/openmoocow/openmoocow.desktop new file mode 100644 index 0000000000..e819c48ba4 --- /dev/null +++ b/recipes/openmoocow/openmoocow/openmoocow.desktop @@ -0,0 +1,10 @@ +[Desktop Entry] +Name=MooCow +Comment=Moobox simulator +Type=Application +Exec=openmoocow +Terminal=false +Categories=Games; +Icon=openmoocow/icon.png +X-MB-SingleInstance=true + diff --git a/recipes/openmoocow/openmoocow_git.bb b/recipes/openmoocow/openmoocow_git.bb new file mode 100644 index 0000000000..ab53313a3f --- /dev/null +++ b/recipes/openmoocow/openmoocow_git.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "OpenMooCow makes your phone (nearly) become a cow!" +HOMEPAGE = "http://www.srcf.ucam.org/~taw27/openmoko/openmoocow/" +AUTHOR = "Thomas White" +LICENSE = "GPLv3" +SECTION = "applications/games" +PV = "0.0.3+gitr${SRCREV}" +PR = "r1" + +SRC_URI = "git://git.bitwiz.org.uk/openmoocow.git;protocol=git;branch=master" +S = "${WORKDIR}/git" +inherit autotools + + diff --git a/recipes/opensync/libsyncml_0.5.4.bb b/recipes/opensync/libsyncml_0.5.4.bb new file mode 100644 index 0000000000..cf5c5b9135 --- /dev/null +++ b/recipes/opensync/libsyncml_0.5.4.bb @@ -0,0 +1,30 @@ +DESCRIPTION = "Libsyncml is an implementation of the SyncML protocol." +HOMEPAGE = "https://libsyncml.opensync.org/" +SECTION = "libs" +PRIORITY = "optional" +LICENSE = "LGPL" + +DEPENDS = "libxml2 glib-2.0" +RRECOMMENDS = "wbxml2 openobex libsoup" + +PR = "r0" + +SRC_URI = "${SOURCEFORGE_MIRROR}/libsyncml/libsyncml-${PV}.tar.gz \ + " + +inherit cmake pkgconfig + +EXTRA_OECMAKE += " . -B${WORKDIR}/build " + +PACKAGES += "${PN}-tools" + +FILES_${PN}-tools = "${bindir}" +FILES_${PN} = "${libdir}/*.so.*" + +do_build_prepend() { + cd ${WORKDIR}/build +} + +do_install_prepend() { + cd ${WORKDIR}/build +}
\ No newline at end of file diff --git a/recipes/opensync/wbxml2_0.10.7.bb b/recipes/opensync/wbxml2_0.10.7.bb new file mode 100644 index 0000000000..77d819a423 --- /dev/null +++ b/recipes/opensync/wbxml2_0.10.7.bb @@ -0,0 +1,29 @@ +DESCRIPTION = "WBXML parsing and encoding library." +HOMEPAGE = "http://libwbxml.opensync.org/" +SECTION = "libs" +PRIORITY = "optional" +LICENSE = "LGPL" + +PR = "r0" + +SRC_URI = "${SOURCEFORGE_MIRROR}/libwbxml/libwbxml-${PV}.tar.gz \ + " + +S = "${WORKDIR}/libwbxml-${PV}" + +inherit cmake pkgconfig + +EXTRA_OECMAKE += " . -B${WORKDIR}/build " + +PACKAGES += "${PN}-tools" + +FILES_${PN}-tools = "${bindir}" +FILES_${PN} = "${libdir}/*.so.*" + +do_build_prepend() { + cd ${WORKDIR}/build +} + +do_install_prepend() { + cd ${WORKDIR}/build +} diff --git a/recipes/opie-networksettings/files/wireless.patch b/recipes/opie-networksettings/files/wireless.patch index 5d8d42af58..001a310ed4 100644 --- a/recipes/opie-networksettings/files/wireless.patch +++ b/recipes/opie-networksettings/files/wireless.patch @@ -1,13 +1,11 @@ -diff --git a/wlan/wextensions.h b/wlan/wextensions.h -index a89e33a..356aada 100644 ---- a/wlan/wextensions.h -+++ b/wlan/wextensions.h -@@ -4,6 +4,8 @@ +--- a/wlan/wextensions.h 2009-11-22 00:29:50.000000000 +0100 ++++ b/wlan/wextensions.h 2009-11-07 00:53:29.000000000 +0100 +@@ -3,7 +3,7 @@ + #include <qstring.h> +-#include <net/if.h> ++//#include <net/if.h> #include <netinet/ip.h> -+#include <linux/if.h> -+#include <linux/types.h> + #include <linux/types.h> #include <linux/wireless.h> - - class WExtensions { diff --git a/recipes/opie-networksettings/opie-networksettings.inc b/recipes/opie-networksettings/opie-networksettings.inc index e84f9da144..8bda9f0b59 100644 --- a/recipes/opie-networksettings/opie-networksettings.inc +++ b/recipes/opie-networksettings/opie-networksettings.inc @@ -5,6 +5,8 @@ LICENSE = "GPL" PROVIDES = "opie-networksettings-pppplugin opie-networksettings-wlanplugin" APPNAME = "networksettings" +SRC_URI_append = " file://wireless.patch;patch=1" + S = "${WORKDIR}/${APPNAME}" inherit opie diff --git a/recipes/opkg/opkg-nogpg-nocurl_svn.bb b/recipes/opkg/opkg-nogpg-nocurl_svn.bb index 5e1caa90d9..cd8751ae87 100644 --- a/recipes/opkg/opkg-nogpg-nocurl_svn.bb +++ b/recipes/opkg/opkg-nogpg-nocurl_svn.bb @@ -1,24 +1,13 @@ -require opkg_svn.bb +require opkg-nogpg_svn.bb DEPENDS = "" PROVIDES += "opkg" -SRC_URI += " \ - file://opkg_wget.patch;patch=1;maxrev=180 \ - file://reduce-nogpg-noise.patch;patch=1;maxrev=180 \ - file://opkg_wget_nogpg_01_use_vfork_gunzip.patch;patch=1 \ - file://opkg_wget_nogpg_02_use_vfork_system.patch;patch=1 \ - file://opkg_wget_nogpg_03_fix_tmpdirs.patch;patch=1 \ - file://opkg_wget_nogpg_04_default_tmpdir.patch;patch=1 \ - " PR = "${INC_PR}" SRCREV = "${SRCREV_pn-opkg}" -EXTRA_OECONF += "--disable-gpg --enable-static --disable-shared" - -# NOTE: Use this one after svn rev 180 (should be a different recipe) -#EXTRA_OECONF += "--disable-gpg --disable-curl --enable-static --disable-shared" +EXTRA_OECONF += " --disable-curl --enable-static --disable-shared" # The nogpg version isn't getting much love and has an unused variable which trips up -Werror do_configure_prepend() { diff --git a/recipes/opkg/opkg-nogpg_svn.bb b/recipes/opkg/opkg-nogpg_svn.bb index a0f9614a37..9ddc589b49 100644 --- a/recipes/opkg/opkg-nogpg_svn.bb +++ b/recipes/opkg/opkg-nogpg_svn.bb @@ -3,11 +3,18 @@ require opkg_svn.bb DEPENDS = "curl" PROVIDES += "opkg" -PR = "${INC_PR}" +PR = "${INC_PR}.1" SRCREV = "${SRCREV_pn-opkg}" -EXTRA_OECONF += "--disable-gpg" +EXTRA_OECONF += " --disable-gpg \ + --disable-openssl \ + --disable-ssl-curl \ + --enable-gpg=no \ + --enable-ssl-curl=no \ + --enable-openssl=no" + +LDFLAGS_append = " -Wl,--as-needed" # The nogpg version isn't getting much love and has an unused variable which trips up -Werror do_configure_prepend() { diff --git a/recipes/opkg/opkg.inc b/recipes/opkg/opkg.inc index d744e72223..2e7baee496 100644 --- a/recipes/opkg/opkg.inc +++ b/recipes/opkg/opkg.inc @@ -10,8 +10,8 @@ FILESPATHPKG =. "opkg:" SRC_URI = "svn://opkg.googlecode.com/svn;module=trunk;proto=http \ file://opkg_unarchive.patch;patch=1;maxrev=201 \ - file://opkg-intercept-cleanup.patch;patch=1 \ - file://isatty.patch;patch=1" + file://opkg-intercept-cleanup.patch;patch=1;maxrev=241 \ +" SRC_URI += "file://configure" diff --git a/recipes/orrery/orrery/Makefile.am.patch b/recipes/orrery/orrery/Makefile.am.patch new file mode 100644 index 0000000000..23e7798139 --- /dev/null +++ b/recipes/orrery/orrery/Makefile.am.patch @@ -0,0 +1,67 @@ +Nur in files: aclocal.m4. +Nur in files.fixed: autogen.sh. +Nur in files: autom4te.cache. +Nur in files: configure. +diff -uri files/configure.in files.fixed/configure.in +--- files/configure.in 2008-08-17 05:32:06.000000000 +0200 ++++ files.fixed/configure.in 2009-02-18 16:01:30.102497178 +0100 +@@ -2,4 +2,13 @@ + AM_INIT_AUTOMAKE(orrery,1.1) + AC_PROG_CC + AC_PROG_INSTALL ++ ++PKG_CHECK_MODULES(GTK, gtk+-x11-2.0 gthread-2.0) ++PKG_CHECK_MODULES(X11, x11 xext xau xcursor xfixes xdmcp xrender) ++ ++AC_SUBST(GTK_CFLAGS) ++AC_SUBST(GTK_LIBS) ++AC_SUBST(X11_CFLAGS) ++AC_SUBST(X11_LIBS) ++ + AC_OUTPUT(Makefile) +Nur in files: depcomp. +Nur in files: install-sh. +diff -uri files/Makefile.am files.fixed/Makefile.am +--- files/Makefile.am 2008-09-03 08:54:55.000000000 +0200 ++++ files.fixed/Makefile.am 2009-02-18 16:14:19.574262603 +0100 +@@ -1,36 +1,4 @@ +-CFLAGS = -g -O3 -Wall +-CC = $(OM)/build/tmp/cross/arm-angstrom-linux-gnueabi/bin/gcc +-INCLUDES = -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/include/gtk-2.0/ \ +- -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/include/cairo/ \ +- -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/include/glib-2.0/ \ +- -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/include/pango-1.0/ \ +- -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/gtk-2.0/include \ +- -I$(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/include/atk-1.0/ +-LDADD = $(OM)/build/tmp/rootfs/usr/lib/libgobject-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libpangocairo-1.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libpango-1.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libcairo.so.2 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgmodule-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libglib-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libfontconfig.so.1 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXext.so.6 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXrender.so.1 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libpopt.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgthread-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libX11.so.6 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXcursor.so.1 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXfixes.so.3 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgdk_pixbuf-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libpangoft2-1.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libz.so.1 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libpng12.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libfreetype.so.6 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libexpat.so.1 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXau.so.6 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libXdmcp.so.6 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgtk-x11-2.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libatk-1.0.so.0 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgcrypt.so.11.2.2 \ +- $(OM)/build/tmp/staging/arm-angstrom-linux-gnueabi/lib/libgpg-error.so.0.3.0 + bin_PROGRAMS = orrery + orrery_SOURCES = planetInfo.c orrery.c ++orrery_CFLAGS = -g -O3 -Wall @GTK_CFLAGS@ @X11_CFLAGS@ ++orrery_LDADD = @GTK_LIBS@ @X11_LIBS@ -lpopt -lz -lexpat -lgcrypt -lgpg-error +Nur in files: Makefile.in. +Nur in files: missing. diff --git a/recipes/orrery/orrery/datadir.patch b/recipes/orrery/orrery/datadir.patch new file mode 100644 index 0000000000..7a3c204ad9 --- /dev/null +++ b/recipes/orrery/orrery/datadir.patch @@ -0,0 +1,12 @@ +diff -uri files/orrery.c files.datadir/orrery.c +--- files/orrery.c 2009-01-07 11:28:32.000000000 +0100 ++++ files.datadir/orrery.c 2009-02-18 19:08:44.887262837 +0100 +@@ -70,7 +70,7 @@ + + #define FULL_CIRCLE (23040) /* Full circle in calls to draw_arc */ + +-#define DATA_DIR "/media/card/orrery" ++#define DATA_DIR "/usr/share/orrery" + #define N_PLANETS (9) + #define N_SOLAR_SYSTEM_OBJECTS (10) + diff --git a/recipes/orrery/orrery_2.4.bb b/recipes/orrery/orrery_2.4.bb new file mode 100644 index 0000000000..dc5622946e --- /dev/null +++ b/recipes/orrery/orrery_2.4.bb @@ -0,0 +1,26 @@ +DESCRIPTION = "orrery" +SECTION = "x11/scientific" +PV = "2.4" + +inherit autotools + +SRC_URI = "http://projects.openmoko.org/frs/download.php/581/orrery_2.4_clean.tar.gz \ + file://datadir.patch;patch=1 \ + file://Makefile.am.patch;patch=1" +S = "${WORKDIR}/files" + +do_install_append() { + install -d ${D}${datadir}/applications + install -m 0644 ${S}/orrery.desktop ${D}${datadir}/applications + install -d ${D}${datadir}/orrery + cp -a ${S}/data/* ${D}${datadir}/orrery + rm ${D}${datadir}/orrery/icons/orrery.png + install -d ${D}${datadir}/icons + install ${S}/data/icons/orrery.png ${D}${datadir}/icons +} + +FILES_${PN} += "\ + ${datadir}/applications/orrery.desktop \ + ${datadir}/orrery \ + ${datadir}/icons" + diff --git a/recipes/pam/libpam-1.1.0/pam-nodocs.patch b/recipes/pam/libpam-1.1.0/pam-nodocs.patch new file mode 100644 index 0000000000..895f0e182a --- /dev/null +++ b/recipes/pam/libpam-1.1.0/pam-nodocs.patch @@ -0,0 +1,35 @@ +--- /tmp/Makefile.am 2008-09-05 15:16:21.000000000 +0200 ++++ Linux-PAM-1.0.2/Makefile.am 2008-09-05 15:16:56.153198000 +0200 +@@ -5,9 +5,9 @@ + AUTOMAKE_OPTIONS = 1.9 gnu dist-bzip2 check-news + + if STATIC_MODULES +-SUBDIRS = modules libpam libpamc libpam_misc tests po conf doc examples xtests ++SUBDIRS = modules libpam libpamc libpam_misc tests po conf examples xtests + else +-SUBDIRS = libpam tests libpamc libpam_misc modules po conf doc examples xtests ++SUBDIRS = libpam tests libpamc libpam_misc modules po conf examples xtests + endif + + CLEANFILES = *~ +@@ -28,19 +28,7 @@ + + ACLOCAL_AMFLAGS = -I m4 + +-release: dist releasedocs +- +-release-docs: releasedocs +- +-releasedocs: +- rm -rf Linux-PAM-$(VERSION) +- mkdir -p Linux-PAM-$(VERSION)/doc +- make -C doc releasedocs +- tar zfc Linux-PAM-$(VERSION)-docs.tar.gz \ +- Linux-PAM-$(VERSION)/doc +- tar jfc Linux-PAM-$(VERSION)-docs.tar.bz2 \ +- Linux-PAM-$(VERSION)/doc +- rm -rf Linux-PAM-$(VERSION) ++release: dist + + xtests: + make -C xtests xtests diff --git a/recipes/pam/libpam-base-files.bb b/recipes/pam/libpam-base-files.bb new file mode 100644 index 0000000000..0fa11d8051 --- /dev/null +++ b/recipes/pam/libpam-base-files.bb @@ -0,0 +1,18 @@ +DESCRIPTION = "Linux-PAM authentication library for Linux. Base configuration files" + +SECTION = "libs" +PRIORITY = "optional" +LICENSE = "GPLv2" +DEPENDS = "" +RDEPENDS = "libpam" + +PR = "r1" + +SRC_URI = " \ + file://pam.d/* \ +" + +do_install() { + install -d ${D}${sysconfdir}/pam.d/ + install -m 0644 ${WORKDIR}/pam.d/* ${D}${sysconfdir}/pam.d/ +} diff --git a/recipes/pam/libpam-base-files/pam.d/atd b/recipes/pam/libpam-base-files/pam.d/atd new file mode 100644 index 0000000000..17ffb134d3 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/atd @@ -0,0 +1,10 @@ +# +# The PAM configuration file for the at daemon +# + +auth required pam_env.so +auth include common-auth +account include common-account +password include common-password +session required pam_limits.so +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/common-account b/recipes/pam/libpam-base-files/pam.d/common-account new file mode 100644 index 0000000000..316b17337b --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/common-account @@ -0,0 +1,25 @@ +# +# /etc/pam.d/common-account - authorization settings common to all services +# +# This file is included from other service-specific PAM config files, +# and should contain a list of the authorization modules that define +# the central access policy for use on the system. The default is to +# only deny service to users whose accounts are expired in /etc/shadow. +# +# As of pam 1.0.1-6, this file is managed by pam-auth-update by default. +# To take advantage of this, it is recommended that you configure any +# local modules either before or after the default block, and use +# pam-auth-update to manage selection of other modules. See +# pam-auth-update(8) for details. +# + +# here are the per-package modules (the "Primary" block) +account [success=1 new_authtok_reqd=done default=ignore] pam_unix.so +# here's the fallback if no module succeeds +account requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +account required pam_permit.so +# and here are more per-package modules (the "Additional" block) +# end of pam-auth-update config diff --git a/recipes/pam/libpam-base-files/pam.d/common-auth b/recipes/pam/libpam-base-files/pam.d/common-auth new file mode 100644 index 0000000000..460b69f198 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/common-auth @@ -0,0 +1,18 @@ +# +# /etc/pam.d/common-auth - authentication settings common to all services +# +# This file is included from other service-specific PAM config files, +# and should contain a list of the authentication modules that define +# the central authentication scheme for use on the system +# (e.g., /etc/shadow, LDAP, Kerberos, etc.). The default is to use the +# traditional Unix authentication mechanisms. + +# here are the per-package modules (the "Primary" block) +auth [success=1 default=ignore] pam_unix.so nullok_secure +# here's the fallback if no module succeeds +auth requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +auth required pam_permit.so +# and here are more per-package modules (the "Additional" block) diff --git a/recipes/pam/libpam-base-files/pam.d/common-password b/recipes/pam/libpam-base-files/pam.d/common-password new file mode 100644 index 0000000000..bc98f199b9 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/common-password @@ -0,0 +1,27 @@ +# +# /etc/pam.d/common-password - password-related modules common to all services +# +# This file is included from other service-specific PAM config files, +# and should contain a list of modules that define the services to be +# used to change user passwords. The default is pam_unix. + +# Explanation of pam_unix options: +# +# The "sha512" option enables salted SHA512 passwords. Without this option, +# the default is Unix crypt. Prior releases used the option "md5". +# +# The "obscure" option replaces the old `OBSCURE_CHECKS_ENAB' option in +# login.defs. +# +# See the pam_unix manpage for other options. + +# here are the per-package modules (the "Primary" block) +password [success=1 default=ignore] pam_unix.so obscure sha512 +# here's the fallback if no module succeeds +password requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +password required pam_permit.so +# and here are more per-package modules (the "Additional" block) +password optional pam_gnome_keyring.so diff --git a/recipes/pam/libpam-base-files/pam.d/common-session b/recipes/pam/libpam-base-files/pam.d/common-session new file mode 100644 index 0000000000..2123967d15 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/common-session @@ -0,0 +1,20 @@ +# +# /etc/pam.d/common-session - session-related modules common to all services +# +# This file is included from other service-specific PAM config files, +# and should contain a list of modules that define tasks to be performed +# at the start and end of sessions of *any* kind (both interactive and +# non-interactive). +# + +# here are the per-package modules (the "Primary" block) +session [default=1] pam_permit.so +# here's the fallback if no module succeeds +session requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +session required pam_permit.so +# and here are more per-package modules (the "Additional" block) +session required pam_unix.so +session optional pam_ck_connector.so nox11 diff --git a/recipes/pam/libpam-base-files/pam.d/common-session-noninteractive b/recipes/pam/libpam-base-files/pam.d/common-session-noninteractive new file mode 100644 index 0000000000..b110bb2b49 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/common-session-noninteractive @@ -0,0 +1,19 @@ +# +# /etc/pam.d/common-session-noninteractive - session-related modules +# common to all non-interactive services +# +# This file is included from other service-specific PAM config files, +# and should contain a list of modules that define tasks to be performed +# at the start and end of all non-interactive sessions. +# + +# here are the per-package modules (the "Primary" block) +session [default=1] pam_permit.so +# here's the fallback if no module succeeds +session requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +session required pam_permit.so +# and here are more per-package modules (the "Additional" block) +session required pam_unix.so diff --git a/recipes/pam/libpam-base-files/pam.d/cron b/recipes/pam/libpam-base-files/pam.d/cron new file mode 100644 index 0000000000..743c0ed31f --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/cron @@ -0,0 +1,11 @@ +# +# The PAM configuration file for the cron daemon +# + +auth include common-auth +session required pam_env.so +account include common-account +session include common-session-noninteractive +# Sets up user limits, please define limits for cron tasks +# through /etc/security/limits.conf +session required pam_limits.so diff --git a/recipes/pam/libpam-base-files/pam.d/cups b/recipes/pam/libpam-base-files/pam.d/cups new file mode 100644 index 0000000000..8e7f973a2c --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/cups @@ -0,0 +1,3 @@ +auth include common-auth +account include common-account +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/cvs b/recipes/pam/libpam-base-files/pam.d/cvs new file mode 100644 index 0000000000..9627c4f7bf --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/cvs @@ -0,0 +1,12 @@ +# +# /etc/pam.d/cvs - specify the PAM behaviour of CVS +# + +# We fall back to the system default in /etc/pam.d/common-* + +auth include common-auth +account include common-account + +# We don't use password or session modules at all +# password include common-password +# session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/libcupsys2 b/recipes/pam/libpam-base-files/pam.d/libcupsys2 new file mode 100644 index 0000000000..8e7f973a2c --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/libcupsys2 @@ -0,0 +1,3 @@ +auth include common-auth +account include common-account +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/other b/recipes/pam/libpam-base-files/pam.d/other new file mode 100644 index 0000000000..6e40cd0c02 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/other @@ -0,0 +1,27 @@ +# +# /etc/pam.d/other - specify the PAM fallback behaviour +# +# Note that this file is used for any unspecified service; for example +#if /etc/pam.d/cron specifies no session modules but cron calls +#pam_open_session, the session module out of /etc/pam.d/other is +#used. + +#If you really want nothing to happen then use pam_permit.so or +#pam_deny.so as appropriate. + +# We use pam_warn.so to generate syslog notes that the 'other' +#fallback rules are being used (as a hint to suggest you should setup +#specific PAM rules for the service and aid to debugging). We then +#fall back to the system default in /etc/pam.d/common-* + +auth required pam_warn.so +auth include common-auth + +account required pam_warn.so +account include common-account + +password required pam_warn.so +password include common-password + +session required pam_warn.so +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/polkit b/recipes/pam/libpam-base-files/pam.d/polkit new file mode 100644 index 0000000000..836b53d61a --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/polkit @@ -0,0 +1,6 @@ +#%PAM-1.0 + +auth include common-auth +account include common-account +password include common-password +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/polkit-1 b/recipes/pam/libpam-base-files/pam.d/polkit-1 new file mode 100644 index 0000000000..836b53d61a --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/polkit-1 @@ -0,0 +1,6 @@ +#%PAM-1.0 + +auth include common-auth +account include common-account +password include common-password +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/ppp b/recipes/pam/libpam-base-files/pam.d/ppp new file mode 100644 index 0000000000..aed08fd1b2 --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/ppp @@ -0,0 +1,8 @@ +#%PAM-1.0 +# Information for the PPPD process with the 'login' option. + +auth required pam_nologin.so +auth include common-auth +account include common-account +session include common-session + diff --git a/recipes/pam/libpam-base-files/pam.d/sesman b/recipes/pam/libpam-base-files/pam.d/sesman new file mode 100644 index 0000000000..836b53d61a --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/sesman @@ -0,0 +1,6 @@ +#%PAM-1.0 + +auth include common-auth +account include common-account +password include common-password +session include common-session diff --git a/recipes/pam/libpam-base-files/pam.d/sshd b/recipes/pam/libpam-base-files/pam.d/sshd new file mode 100644 index 0000000000..c0028ff3cb --- /dev/null +++ b/recipes/pam/libpam-base-files/pam.d/sshd @@ -0,0 +1,33 @@ +# PAM configuration for the Secure Shell service + +# Read environment variables from /etc/environment and +# /etc/security/pam_env.conf. +auth required pam_env.so # [1] + +# Standard Un*x authentication. +auth include common-auth + +# Disallow non-root logins when /etc/nologin exists. +account required pam_nologin.so + +# Uncomment and edit /etc/security/access.conf if you need to set complex +# access limits that are hard to express in sshd_config. +# account required pam_access.so + +# Standard Un*x authorization. +account include common-accountt + +# Standard Un*x session setup and teardown. +session include common-session + +# Print the message of the day upon successful login. +session optional pam_motd.so # [1] + +# Print the status of the user's mailbox upon successful login. +session optional pam_mail.so standard noenv # [1] + +# Set up user limits from /etc/security/limits.conf. +session required pam_limits.so + +# Standard Un*x password updating. +password include common-password diff --git a/recipes/pam/libpam_1.0.2.bb b/recipes/pam/libpam_1.0.2.bb index 0151a4691d..1ab7fa95f9 100644 --- a/recipes/pam/libpam_1.0.2.bb +++ b/recipes/pam/libpam_1.0.2.bb @@ -12,7 +12,10 @@ LICENSE = "GPLv2" DEPENDS = "flex flex-native" -PR = "r4" +# PAM is not a lot of use without configuration files and the plugins +RRECOMMENDS_${PN} = "libpam-meta libpam-base-files" + +PR = "r5" # The project is actually called Linux-PAM but that gives # a bad OE package name because of the upper case characters @@ -23,7 +26,8 @@ S = "${WORKDIR}/${p}" SRC_URI = "${KERNELORG_MIRROR}/pub/linux/libs/pam/library/${p}.tar.bz2 \ file://pam-nodocs.patch;patch=1 " -SRC_URI_append_libc-uclibc = "file://pam-disable-nis-on-uclibc.patch;patch=1" +SRC_URI_append_linux-uclibc = " file://pam-disable-nis-on-uclibc.patch;patch=1" +SRC_URI_append_linux-uclibceabi = " file://pam-disable-nis-on-uclibc.patch;patch=1" inherit autotools @@ -32,6 +36,9 @@ LEAD_SONAME = "libpam.so.*" # maintain the pam default layout EXTRA_OECONF += " --includedir=${includedir}/security" +EXTRA_OECONF_linux-uclibc += "--disable-nls" +EXTRA_OECONF_linux-uclibceabi += "--disable-nls" + PACKAGES_DYNAMIC += " libpam-meta pam-plugin-*" python populate_packages_prepend () { @@ -62,7 +69,6 @@ python populate_packages_prepend () { bb.data.setVar('PACKAGES', ' '.join(packages), d) } - do_stage() { autotools_stage_all } diff --git a/recipes/pam/libpam_1.1.0.bb b/recipes/pam/libpam_1.1.0.bb new file mode 100644 index 0000000000..32dc9e15cb --- /dev/null +++ b/recipes/pam/libpam_1.1.0.bb @@ -0,0 +1,70 @@ +DESCRIPTION = "\ +PAM authentication library for Linux. \ +Linux-PAM (Pluggable Authentication Modules for Linux) is a \ +library that enables the local system administrator to choose \ +how individual applications authenticate users. For an \ +overview of the Linux-PAM library see the Linux-PAM System \ +Administrators' Guide." +HOMEPAGE = "http://kernel.org/pub/linux/libs/pam" +SECTION = "libs" +PRIORITY = "optional" +LICENSE = "GPLv2" + +DEFAULT_PREFERENCE_libc-uclibc = "-1" + +DEPENDS = "flex flex-native" + +# PAM is not a lot of use without configuration files and the plugins +RRECOMMENDS_${PN} = "libpam-meta libpam-base-files" + +PR = "r0" + +# The project is actually called Linux-PAM but that gives +# a bad OE package name because of the upper case characters +pn = "Linux-PAM" +p = "${pn}-${PV}" +S = "${WORKDIR}/${p}" + +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/libs/pam/library/${p}.tar.bz2 \ + file://pam-nodocs.patch;patch=1 " + +inherit autotools + +LEAD_SONAME = "libpam.so.*" + +# maintain the pam default layout +EXTRA_OECONF += " --includedir=${includedir}/security" + +PACKAGES_DYNAMIC += " libpam-meta pam-plugin-*" + +python populate_packages_prepend () { + import os.path + + pam_libdir = bb.data.expand('${libdir}/security', d) + pam_libdirdebug = bb.data.expand('${libdir}/security/.debug', d) + pam_filterdir = bb.data.expand('${libdir}/security/pam_filter', d) + do_split_packages(d, pam_libdir, '^pam(.*)\.so$', 'pam-plugin%s', 'PAM plugin for %s', extra_depends='') + do_split_packages(d, pam_libdir, '^pam(.*)\.la$', 'pam-plugin%s-dev', 'PAM plugin for %s dev', extra_depends='') + if os.path.exists(pam_libdirdebug): + do_split_packages(d, pam_libdirdebug, '^pam(.*)\.so$', 'pam-plugin%s-dbg', 'PAM plugin for %s debugging symbols', extra_depends='') + do_split_packages(d, pam_filterdir, '^(.*)$', 'pam-filter-%s', 'PAM filter for %s', extra_depends='') + + pn = bb.data.getVar('PN', d, 1) + metapkg = pn + '-meta' + bb.data.setVar('ALLOW_EMPTY_' + metapkg, "1", d) + bb.data.setVar('FILES_' + metapkg, "", d) + blacklist = [ pn + '-locale', pn + '-dev', pn + '-dbg', pn + '-doc' ] + metapkg_rdepends = [] + packages = bb.data.getVar('PACKAGES', d, 1).split() + for pkg in packages[1:]: + if not pkg in blacklist and not pkg in metapkg_rdepends and not pkg.endswith('-dev') and not pkg.count('locale') and pkg.count('plugin'): + metapkg_rdepends.append(pkg) + bb.data.setVar('RDEPENDS_' + metapkg, ' '.join(metapkg_rdepends), d) + bb.data.setVar('DESCRIPTION_' + metapkg, pn + ' meta package', d) + packages.append(metapkg) + bb.data.setVar('PACKAGES', ' '.join(packages), d) +} + +do_stage() { + autotools_stage_all +} diff --git a/recipes/perl/libxml-parser-perl-native_2.34.bb b/recipes/perl/libxml-parser-perl-native_2.34.bb index 64758ad5f2..6ba56b3b89 100644 --- a/recipes/perl/libxml-parser-perl-native_2.34.bb +++ b/recipes/perl/libxml-parser-perl-native_2.34.bb @@ -4,3 +4,4 @@ require libxml-parser-perl_${PV}.bb inherit native +DEPENDS = "expat-native perl-native"
\ No newline at end of file diff --git a/recipes/perl/libxml-parser-perl-native_2.36.bb b/recipes/perl/libxml-parser-perl-native_2.36.bb index 64758ad5f2..6ba56b3b89 100644 --- a/recipes/perl/libxml-parser-perl-native_2.36.bb +++ b/recipes/perl/libxml-parser-perl-native_2.36.bb @@ -4,3 +4,4 @@ require libxml-parser-perl_${PV}.bb inherit native +DEPENDS = "expat-native perl-native"
\ No newline at end of file diff --git a/recipes/perl/libxml-parser-perl_2.36.bb b/recipes/perl/libxml-parser-perl_2.36.bb index c96489b2de..179365c180 100644 --- a/recipes/perl/libxml-parser-perl_2.36.bb +++ b/recipes/perl/libxml-parser-perl_2.36.bb @@ -11,7 +11,7 @@ EXTRA_CPANFLAGS = "EXPATLIBPATH=${STAGING_LIBDIR} EXPATINCPATH=${STAGING_INCDIR} inherit cpan do_compile() { - export LIBC="$(find ${STAGING_DIR}/lib -name 'libc-*.so')" + export LIBC="$(find ${STAGING_DIR_TARGET}/lib -name 'libc-*.so')" cpan_do_compile } diff --git a/recipes/pidgin/msn-pecan_git.bb b/recipes/pidgin/msn-pecan_git.bb new file mode 100644 index 0000000000..dba7fd77dc --- /dev/null +++ b/recipes/pidgin/msn-pecan_git.bb @@ -0,0 +1,23 @@ +DESCRIPTION="Alternative MSN protocol plug-in for pidgin" +HOMEPAGE="http://code.google.com/p/msn-pecan/" +SECTION = "x11/network" +LICENSE="GPL-2" +RDEPENDS="pidgin" +DEPENDS="pidgin" +PV="0.0.1+gitr${SRCREV}" +PR="r0" + +inherit pkgconfig + +SRC_URI="git://github.com/felipec/msn-pecan.git;protocol=http" +S="${WORKDIR}/git" + +do_compile() { + oe_runmake "DESTDIR=${D}" +} +do_install() { + oe_runmake "DESTDIR=${D}" install +} + +FILES_${PN} = "${libdir}/purple-2/*.so" +FILES_${PN}-dbg = "${libdir}/purple-2/.debug/" diff --git a/recipes/pointercal/files/sgh-i900/pointercal b/recipes/pointercal/files/sgh-i900/pointercal new file mode 100644 index 0000000000..fd7286f16c --- /dev/null +++ b/recipes/pointercal/files/sgh-i900/pointercal @@ -0,0 +1 @@ +4387 -6 -1193784 18 -6721 26749798 65536 diff --git a/recipes/policykit/policykit_0.9.bb b/recipes/policykit/policykit_0.9.bb index 2a31701fc3..b13bff6f49 100644 --- a/recipes/policykit/policykit_0.9.bb +++ b/recipes/policykit/policykit_0.9.bb @@ -1,7 +1,7 @@ HOMEPAGE = "http://www.packagekit.org/" -DEPENDS = "libpam expat dbus-glib" +DEPENDS = "libpam expat dbus-glib intltool-native" -PR = "r5" +PR = "r6" SRC_URI = "http://hal.freedesktop.org/releases/PolicyKit-${PV}.tar.gz \ file://PolicyKit.conf \ diff --git a/recipes/powervr-drivers/libgles-omap3-3.01.00.02/rc.pvr b/recipes/powervr-drivers/libgles-omap3-3.01.00.02/rc.pvr new file mode 100755 index 0000000000..1b3c274593 --- /dev/null +++ b/recipes/powervr-drivers/libgles-omap3-3.01.00.02/rc.pvr @@ -0,0 +1,58 @@ +#!/bin/sh + +CPUTYPE="$(cputype)" + +if [ "$1" = "" ]; then + echo PVR-INIT: Please use start, stop, or restart. + exit 1 +fi + +if [ "$1" = "stop" -o "$1" = "restart" ]; then + echo Stopping PVR + #rmmod bc_example + rmmod omaplfb 2>/dev/null + rmmod pvrsrvkm 2>/dev/null +fi + +if [ "$1" = "stop" ]; then + exit 0 +fi + +if [ $CPUTYPE = "OMAP3530" ]; then + echo Starting PVR + insmod $(busybox find /lib/modules/$(uname -r) -name "pvrsrvkm.ko") + #modprobe bc_example + modprobe omaplfb + + pvr_maj=`grep "pvrsrvkm$" /proc/devices | cut -b1,2,3` + + if [ -e /dev/pvrsrvkm ] ; then + rm -f /dev/pvrsrvkm + fi + + mknod /dev/pvrsrvkm c $pvr_maj 0 + chmod 666 /dev/pvrsrvkm + + touch /etc/powervr-esrev + + SAVED_ESREVISION="$(cat /etc/powervr-esrev)" + ES_REVISION="$(cat /proc/cpuinfo | grep "CPU revision" | awk -F: '{print $2}')" + + if [ "${ES_REVISION}" != "${SAVED_ESREVISION}" ] ; then + echo -n "Starting SGX fixup for" + if [ "${ES_REVISION}" = " 3" ] ; then + echo " ES3.x" + cp -a /usr/lib/ES3.0/* /usr/lib + cp -a /usr/bin/ES3.0/* /usr/bin + else + echo "ES 2.x" + cp -a /usr/lib/ES2.0/* /usr/lib + cp -a /usr/bin/ES2.0/* /usr/bin + fi + echo "${ES_REVISION}" > /etc/powervr-esrev + fi + /usr/bin/pvrsrvinit +else + echo No SGX hardware, not starting PVR +fi + diff --git a/recipes/powervr-drivers/libgles-omap3.inc b/recipes/powervr-drivers/libgles-omap3.inc index 79dcf59dd0..208da9e052 100644 --- a/recipes/powervr-drivers/libgles-omap3.inc +++ b/recipes/powervr-drivers/libgles-omap3.inc @@ -89,10 +89,7 @@ do_install () { install -m 0755 ${WORKDIR}/cputype ${D}${bindir}/ cp -pP ${BINLOCATION}/*_test ${D}${bindir}/ - cp -pP ${BINLOCATION}/gl2info ${D}${bindir}/ - cp -pP ${BINLOCATION}/gles1test1 ${D}${bindir}/ - cp -pP ${BINLOCATION}/gles1_texture_stream ${D}${bindir}/ - cp -pP ${BINLOCATION}/gles2test1 ${D}${bindir}/ + cp -pP ${BINLOCATION}/gl* ${D}${bindir}/ cp -pP ${BINLOCATION}/p[dv]* ${D}${bindir}/ cp -pP ${BINLOCATION}/xgles1test1 ${D}${bindir}/ diff --git a/recipes/powervr-drivers/libgles-omap3_3.01.00.02.bb b/recipes/powervr-drivers/libgles-omap3_3.01.00.02.bb new file mode 100644 index 0000000000..7d5af472cf --- /dev/null +++ b/recipes/powervr-drivers/libgles-omap3_3.01.00.02.bb @@ -0,0 +1,30 @@ +BINLOCATION = "${S}/gfx_rel_es3.x" + +require libgles-omap3.inc + +DEFAULT_PREFERENCE = "-1" +# download required binary distribution from: +# http://software-dl.ti.com/dsps/forms/export.html?prod_no=/OMAP35x_Graphics_SDK_setuplinux_3_01_00_02.bin + +SGXPV = "3_01_00_02" +IMGPV = "1.4.14.2514" +BINFILE := "OMAP35x_Graphics_SDK_setuplinux_${SGXPV}.bin" + +# The ES2.x and ES3.x CPUs have different SGX hardware, so we need to install 2 sets of userspace +do_install_append() { + install -d ${D}${libdir}/ES3.0 + install -d ${D}${libdir}/ES2.0 + install -d ${D}${bindir}/ES3.0 + install -d ${D}${bindir}/ES2.0 + + cp ${S}/gfx_rel_es2.x/lib* ${D}${libdir}/ES2.0/ + cp ${S}/gfx_rel_es2.x//p[dv]* ${D}${bindir}/ES2.0/ + + cp ${D}${libdir}/lib*${IMGPV} ${D}${libdir}/ES3.0/ + cp ${D}${bindir}/p[dv]* ${D}${bindir}/ES3.0 +} + +# Quality control is really poor on these SDKs, so hack around the latest madness: +FILES_${PN} += "${libdir}/*.so " +FILES_${PN}-dev = "${includedir}" + diff --git a/recipes/powervr-drivers/omap3-sgx-modules_1.4.14.2514.bb b/recipes/powervr-drivers/omap3-sgx-modules_1.4.14.2514.bb new file mode 100644 index 0000000000..9da9a478f8 --- /dev/null +++ b/recipes/powervr-drivers/omap3-sgx-modules_1.4.14.2514.bb @@ -0,0 +1,33 @@ +DESCRIPTION = "Kernel drivers for the PowerVR SGX chipset found in the omap3 SoCs" +LICENSE = "GPLv2" + +DEFAULT_PREFERENCE = "-1" + +require ../ti/ti-dspbios.inc + +# download required binary distribution from: +# http://software-dl.ti.com/dsps/forms/export.html?prod_no=/OMAP35x_Graphics_SDK_setuplinux_3_01_00_02.bin + +SGXPV = "3_01_00_02" +IMGPV = "1.4.14.2514" +BINFILE := "OMAP35x_Graphics_SDK_setuplinux_${SGXPV}.bin" + +SRC_URI = "file://OMAP35x_Graphics_SDK_setuplinux_${SGXPV}.bin" + +S = "${WORKDIR}/OMAP35x_Graphics_SDK_${SGXPV}/GFX_Linux_KM" + +inherit module + +PVRBUILD = "release" + +INHIBIT_PACKAGE_STRIP = "1" + +MAKE_TARGETS = " BUILD=${PVRBUILD}" + +do_install() { + mkdir -p ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/gpu/pvr + cp ${S}/pvrsrvkm.ko \ + ${S}/services4/3rdparty/dc_omap3430_linux/omaplfb.ko \ + ${S}/services4/3rdparty/bufferclass_ti/bufferclass_ti.ko \ + ${D}/lib/modules/${KERNEL_VERSION}/kernel/drivers/gpu/pvr +} diff --git a/recipes/pyphonelog/pyphonelog_git.bb b/recipes/pyphonelog/pyphonelog_git.bb new file mode 100644 index 0000000000..e106653c45 --- /dev/null +++ b/recipes/pyphonelog/pyphonelog_git.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "PyPhonelog is a phonelog gui that connects to the shr daemon/a custom daemon" +HOMEPAGE = "http://wiki.openmoko.org/wiki/PyPhonelog" +SECTION = "x11/applications" +LICENSE = "GPLv2" +SRCNAME = "pyphonelog" +RDEPENDS += "python python-pygtk python-sqlite3 python-phoneutils" + +inherit distutils + +S = "${WORKDIR}/git" +PV = "0.17.0+gitr${SRCREV}" +PR = "r0" +SRC_URI = "git://shr.bearstech.com/repo/pyphonelog.git;protocol=http" +FILES_${PN} += "${datadir}/applications/phonelog.desktop \ + ${datadir}/phonelog/ \ + ${datadir}/pixmaps/phonelog.png" diff --git a/recipes/pythm/pythm/mplayer-escape-filenames.patch b/recipes/pythm/pythm/mplayer-escape-filenames.patch new file mode 100644 index 0000000000..329f4ef7f4 --- /dev/null +++ b/recipes/pythm/pythm/mplayer-escape-filenames.patch @@ -0,0 +1,19 @@ +diff -ur pythm-org/pythm/mplayer/mplayerbackend.py pythm/pythm/mplayer/mplayerbackend.py +--- pythm-org/pythm/mplayer/mplayerbackend.py 2008-11-22 14:18:13.227163500 +0100 ++++ pythm/pythm/mplayer/mplayerbackend.py 2009-01-15 23:54:50.582429054 +0100 +@@ -96,7 +96,7 @@ + entry = self.current[1] + self.emit(Signals.SONG_CHANGED,entry) + self.songend = time.time() +- fn = entry.id ++ fn = re.escape(entry.id) + array = self.mplayer.innercmd("loadfile '" + fn + "'\n","======",True) + #array = self.mplayer.arraycmd("loadfile","======",fn) + self.fill_entry(array, entry) +@@ -404,4 +404,4 @@ + self.browse() + + +- +\ Kein Zeilenumbruch am Dateiende. ++ diff --git a/recipes/pythm/pythm/pythm.conf b/recipes/pythm/pythm/pythm.conf new file mode 100644 index 0000000000..2fbe3c4997 --- /dev/null +++ b/recipes/pythm/pythm/pythm.conf @@ -0,0 +1,32 @@ +# global pythm settings +# place this file in ~/.pythm/, name it pythm.conf + +[pythm] +# backends to show in backend list +backends=mpd,mplayer +# the default backend to use, can be either +# mpd or mplayer, or omitted +backend=mplayer + +# mpd specific settings +[mpd] +# mpd host +host=localhost +# mpd port +port=6600 +# mpd password, comment out for no password +#password=verysecret + +# mplayer settings +[mplayer] +# renice val for mplayer process +renice=-15 + +# directory containing music (the start folder for the browser) +musicdir=~ +# allowed file endings in browse mode, comma separated +endings=ogg,mp3 +# filters to exclude in file browser. applied to files and directories +# using regular expressions. use filtersN for more entries +# default is to ignore all elements that start with a ".". +filters0=\..* diff --git a/recipes/pythm/pythm/pythm.desktop b/recipes/pythm/pythm/pythm.desktop new file mode 100644 index 0000000000..89f74d50bb --- /dev/null +++ b/recipes/pythm/pythm/pythm.desktop @@ -0,0 +1,12 @@ +[Desktop Entry] +Version=0.5 +Type=Application +Encoding=UTF-8 +Name=pythm +Comment=pyGTK+ Frontend for MPD and mplayer +TryExec=pythm-bin +Exec=pythm-bin +Icon=bass.png +Categories=Application;AudioVideo;Audio;Player; +Categories=Office; +Terminal=false diff --git a/recipes/pythm/pythm_svn.bb b/recipes/pythm/pythm_svn.bb new file mode 100644 index 0000000000..fdffb21621 --- /dev/null +++ b/recipes/pythm/pythm_svn.bb @@ -0,0 +1,36 @@ +DESCRIPTION = "Pythm is a media player gui designed to work with mplayer or mpd as "slave" players.\ +use mplayer to hear music on the road or mpd control if your are at home." +HOMEPAGE = "http://projects.openmoko.org/projects/pythm/" +SECTION = "application/multimedia" +LICENSE = "GPLv2" +SRCNAME = "pythm" +PV = "0.5.1+svnr${SRCPV}" +PR = "r3" +SRC_URI = "svn://svn.projects.openmoko.org/svnroot/;module=pythm \ + file://mplayer-escape-filenames.patch;patch=0 \ + file://pythm.desktop \ + file://pythm.conf" +S = "${WORKDIR}/pythm" + +inherit setuptools + +RDEPENDS_${PN} = "\ + python-pygtk \ + mplayer \ +" +DISTUTILS_INSTALL_ARGS = "--root=${D} \ + --prefix=${prefix} \ + --install-data=${datadir}" + +do_install_append() { + install -d ${D}${sysconfdir} + install -d ${D}/${datadir}/applications + install -m 0644 ../pythm.conf ${D}${sysconfdir} + install -m 0644 ../pythm.desktop ${D}/${datadir}/applications +} + + +FILES_${PN} += "\ + ${sysconfdir}/pythm.conf \ + ${datadir}/applications/pythm.desktop" + diff --git a/recipes/python/pydes_1.3.1.bb b/recipes/python/pydes_1.3.1.bb new file mode 100644 index 0000000000..b266538b42 --- /dev/null +++ b/recipes/python/pydes_1.3.1.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "Python DES implementation" +SECTION = "console/network" +PRIORITY = "optional" +LICENSE = "GPL" +RDEPENDS = "python" + +PR = "r1" +ARCH_pydes = "all" + +SRC_URI = "http://twhiteman.netfirms.com/pyDES/pyDes-1.3.1.tar.gz" + +inherit distutils + +S = ${WORKDIR}/pyDes-1.3.1 + + + diff --git a/recipes/python/pyring_1.1.10.bb b/recipes/python/pyring_1.1.10.bb new file mode 100644 index 0000000000..211801debf --- /dev/null +++ b/recipes/python/pyring_1.1.10.bb @@ -0,0 +1,21 @@ +DESCRIPTION = "Python keyring" +SECTION = "console/network" +PRIORITY = "optional" +LICENSE = "GPL" +RDEPENDS = "python python-pygtk python-xml python-netclient python-numeric pydes" + +ARCH_pyring = "all" + +SRC_URI = "http://handheldshell.com/software/pyring_${PV}.tgz " + +inherit distutils + +S = ${WORKDIR}/pyring-${PV} + +do_configure_prepend() { + cp ${S}/setup_freerunner.py ${S}/setup.py + exit 0 +} + +FILES_${PN} += "${datadir}" + diff --git a/recipes/python/python-blipapi_0.02.04.bb b/recipes/python/python-blipapi_0.02.04.bb new file mode 100644 index 0000000000..bc8ad58800 --- /dev/null +++ b/recipes/python/python-blipapi_0.02.04.bb @@ -0,0 +1,12 @@ +DESCRIPTION = "Library to communicate with blip.pl API" +AUTHOR = "Marcin Sztolcman <marcin@urzenia.net>" +HOMEPAGE = "http://blipapi.googlecode.com/" +DEPENDS = "python-setuptools" +LICENSE = "GPL" +RDEPENDS += "python-json" +PR = "r0" +inherit setuptools + +SRC_URI = "http://blipapi.googlecode.com/files/BlipApiPY-0.02.04.tar.bz2" +S = "${WORKDIR}/blipapi" + diff --git a/recipes/python/python-dateutil_1.4.1.bb b/recipes/python/python-dateutil_1.4.1.bb new file mode 100644 index 0000000000..204c48d190 --- /dev/null +++ b/recipes/python/python-dateutil_1.4.1.bb @@ -0,0 +1,20 @@ +DESCRIPTION = "Extensions to the standard Python date/time support" +HOMEPAGE = "http://labix.org/python-dateutil" +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "PSF" +SRCNAME = "${PN}" +PR = "r1" + +SRC_URI = "http://labix.org/download/python-dateutil/${SRCNAME}-${PV}.tar.gz" +S = "${WORKDIR}/${SRCNAME}-${PV}" + +inherit setuptools + +PACKAGES =+ "${PN}-zoneinfo" +FILES_${PN}-zoneinfo = "${libdir}/${PYTHON_DIR}/site-packages/dateutil/zoneinfo" + +RDEPENDS_${PN} = "\ + python-core \ + python-datetime \ +" diff --git a/recipes/python/python-dbus_0.83.0.bb b/recipes/python/python-dbus_0.83.0.bb index 02b73e64bf..5d6f2491c7 100644 --- a/recipes/python/python-dbus_0.83.0.bb +++ b/recipes/python/python-dbus_0.83.0.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Python bindings for DBus, a socket-based message bus system for i SECTION = "devel/python" HOMEPAGE = "http://www.freedesktop.org/Software/dbus" LICENSE = "MIT" -DEPENDS = "expat dbus dbus-glib virtual/libintl python-pyrex-native" +DEPENDS = "expat dbus dbus-glib virtual/libintl python-pyrex-native python-epydoc-native" PR = "ml2" SRC_URI = "http://dbus.freedesktop.org/releases/dbus-python/dbus-python-${PV}.tar.gz" diff --git a/recipes/python/python-epsilon_svn.bb b/recipes/python/python-epsilon_svn.bb index 97b06609c1..9f535e5fd7 100644 --- a/recipes/python/python-epsilon_svn.bb +++ b/recipes/python/python-epsilon_svn.bb @@ -2,3 +2,4 @@ require python-efl.inc DEPENDS += "epsilon python-ecore" RDEPENDS += "python-ecore" +SRC_URI = "svn://svn.enlightenment.org/svn/e/trunk/OLD/BINDINGS/python;module=${PN};proto=http" diff --git a/recipes/python/python-epydoc-native_3.0.1.bb b/recipes/python/python-epydoc-native_3.0.1.bb new file mode 100644 index 0000000000..7f64f64e64 --- /dev/null +++ b/recipes/python/python-epydoc-native_3.0.1.bb @@ -0,0 +1,8 @@ +require python-epydoc_${PV}.bb +DEPENDS = "python-native" +inherit native + +do_stage() { + distutils_stage_all +} + diff --git a/recipes/python/python-epydoc_3.0.1.bb b/recipes/python/python-epydoc_3.0.1.bb new file mode 100644 index 0000000000..36d22ad5a0 --- /dev/null +++ b/recipes/python/python-epydoc_3.0.1.bb @@ -0,0 +1,12 @@ +DESCRIPTION = "Epydoc is a tool for generating API documentation for Python modules, based on their docstrings" +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "MIT" +HOMEPAGE = "http://epydoc.sourceforge.net/" +SRCNAME = "epydoc" +DEPENDS = "python" + +SRC_URI = "http://downloads.sourceforge.net/project/${SRCNAME}/${SRCNAME}/${PV}/${SRCNAME}-${PV}.tar.gz" +S = "${WORKDIR}/${SRCNAME}-${PV}" + +inherit distutils diff --git a/recipes/python/python-ldap/setup.cfg.patch b/recipes/python/python-ldap/setup.cfg.patch new file mode 100644 index 0000000000..a703d342e9 --- /dev/null +++ b/recipes/python/python-ldap/setup.cfg.patch @@ -0,0 +1,14 @@ +--- python-ldap-2.3.9/setup.cfg.orig 2009-08-13 11:07:23.000000000 +0200 ++++ python-ldap-2.3.9/setup.cfg 2009-08-13 11:07:37.000000000 +0200 +@@ -1,9 +1,9 @@ + [_ldap] + extra_objects = + extra_compile_args = +-libs = ldap_r lber sasl2 ssl crypto ++libs = ldap_r lber ssl crypto + library_dirs = /opt/openldap-RE24/lib +-include_dirs = /opt/openldap-RE24/include /usr/include/sasl ++include_dirs = /opt/openldap-RE24/include + + [egg_info] + tag_build = diff --git a/recipes/python/python-ldap_2.3.9.bb b/recipes/python/python-ldap_2.3.9.bb new file mode 100644 index 0000000000..8a605e49e4 --- /dev/null +++ b/recipes/python/python-ldap_2.3.9.bb @@ -0,0 +1,11 @@ +DESCRIPTION = "LDAP client API for Python, C wrapper module around OpenLDAP 2.x with an object-oriented API" +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "Python-style" +HOMEPAGE = "http://www.python-ldap.org/" +DEPENDS = "python openldap" + +SRC_URI = "http://pypi.python.org/packages/source/p/${PN}/${PN}-${PV}.tar.gz \ + file://setup.cfg.patch;patch=1" + +inherit setuptools diff --git a/recipes/python/python-phoneutils_git.bb b/recipes/python/python-phoneutils_git.bb index 1e962d36ad..c1e1dbe16e 100644 --- a/recipes/python/python-phoneutils_git.bb +++ b/recipes/python/python-phoneutils_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "Python Bindings for libphone-utils" SECTION = "devel/python" DEPENDS = "libphone-utils" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r1" SRC_URI = "git://git.shr-project.org/repo/libphone-utils.git;protocol=http;branch=master" diff --git a/recipes/python/python-pybluez_0.16.bb b/recipes/python/python-pybluez_0.16.bb new file mode 100644 index 0000000000..44554d6ff1 --- /dev/null +++ b/recipes/python/python-pybluez_0.16.bb @@ -0,0 +1,10 @@ +DESCRIPTION = "Python bindings for the Linux Bluetooth stack" +SECTION = "devel/python" +DEPENDS = "bluez-libs" +LICENSE = "GPL" +PR = "ml0" + +SRC_URI = "http://pybluez.googlecode.com/files/PyBluez-${PV}.tar.gz" +S = "${WORKDIR}/PyBluez-${PV}" + +inherit distutils diff --git a/recipes/python/python-pygtk_2.10.4.bb b/recipes/python/python-pygtk_2.10.4.bb index 3f0e593c98..bdfebafc7a 100644 --- a/recipes/python/python-pygtk_2.10.4.bb +++ b/recipes/python/python-pygtk_2.10.4.bb @@ -6,7 +6,7 @@ RDEPENDS = "python-shell python-pycairo python-pygobject" PROVIDES = "python-pygtk2" SRCNAME = "pygtk" LICENSE = "LGPL" -PR = "ml10" +PR = "ml11" MAJ_VER = "${@bb.data.getVar('PV',d,1).split('.')[0]}.${@bb.data.getVar('PV',d,1).split('.')[1]}" SRC_URI = "ftp://ftp.gnome.org/pub/gnome/sources/pygtk/${MAJ_VER}/${SRCNAME}-${PV}.tar.bz2 \ @@ -52,7 +52,7 @@ FILES_${PN}-dev += "\ do_stage() { autotools_stage_includes - sed -i s:/usr/share:${STAGING_DATADIR}: codegen/pygtk-codegen-2.0 + sed -i s:${prefix}/share:${STAGING_DATADIR}: codegen/pygtk-codegen-2.0 install -m 0755 codegen/pygtk-codegen-2.0 ${STAGING_BINDIR_NATIVE}/ # until we have a newer pygobject version, we resue pygtk's codegen ln -sf ./pygtk-codegen-2.0 ${STAGING_BINDIR_NATIVE}/pygobject-codegen-2.0 diff --git a/recipes/python/python-vobject_0.8.1c.bb b/recipes/python/python-vobject_0.8.1c.bb new file mode 100644 index 0000000000..87ff6b7fdd --- /dev/null +++ b/recipes/python/python-vobject_0.8.1c.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "Python package for parsing and generating vCard and vCalendar files" +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "Apache License V2.0" +HOMEPAGE = "http://vobject.skyhouseconsulting.com/" +SRCNAME = "vobject" +RDEPENDS = "python python-dateutil" +PR = "r1" + +SRC_URI = "http://vobject.skyhouseconsulting.com/${SRCNAME}-${PV}.tar.gz" +S = "${WORKDIR}/${SRCNAME}-${PV}" + +inherit setuptools diff --git a/recipes/python/python-webdav_0.1.2.bb b/recipes/python/python-webdav_0.1.2.bb new file mode 100644 index 0000000000..efc74f9183 --- /dev/null +++ b/recipes/python/python-webdav_0.1.2.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "This project aims to provide an object-oriented Python WebDAV client-side library\ + based on Python`s standard httplib and Greg Stein`s davlib.\ + The client shall fully support RFCs 4918 (basic specification),\ + 3744 (access control), and 3253 (versioning)." +SECTION = "devel/python" +PRIORITY = "optional" +LICENSE = "Apache License V2.0" +HOMEPAGE = "http://sourceforge.net/projects/pythonwebdavlib/" +SRCNAME = "Python_WebDAV_Library" +DEPENDS = "python" + +SRC_URI = "${SOURCEFORGE_MIRROR}/pythonwebdavlib/Python%20WebDAV%20Library%20-%20${PV}/${SRCNAME}-${PV}.zip" +S = "${WORKDIR}/${SRCNAME}-${PV}" + +inherit distutils diff --git a/recipes/python/python-wifi_0.3.1.bb b/recipes/python/python-wifi_0.3.1.bb new file mode 100644 index 0000000000..7461a6941e --- /dev/null +++ b/recipes/python/python-wifi_0.3.1.bb @@ -0,0 +1,18 @@ +DESCRIPTION = "Fusil is a Python library used to write fuzzing programs." +HOMEPAGE = "http://fusil.hachoir.org/" +SECTION = "devel/python" +LICENSE = "GPLv2" +SRCNAME = "python-wifi" + +SRC_URI = "http://pypi.python.org/packages/source/p/${SRCNAME}/${SRCNAME}-${PV}.tar.gz" +S = "${WORKDIR}/${SRCNAME}-${PV}" + +inherit setuptools + +RDEPENDS_${PN} = "\ + python-ctypes \ + python-datetime \ +" + + + diff --git a/recipes/python/python_2.6.2.bb b/recipes/python/python_2.6.2.bb index 941f039af7..c367ce87c5 100644 --- a/recipes/python/python_2.6.2.bb +++ b/recipes/python/python_2.6.2.bb @@ -33,6 +33,10 @@ inherit autotools TARGET_CC_ARCH_append_armv6 = " -D__SOFTFP__" TARGET_CC_ARCH_append_armv7a = " -D__SOFTFP__" +do_configure_prepend() { + autoreconf -Wcross --verbose --install --force --exclude=autopoint Modules/_ctypes/libffi || oenote "_ctypes failed to autoreconf" +} + # # Copy config.h and an appropriate Makefile for distutils.sysconfig, # which laters uses the information out of these to compile extensions diff --git a/recipes/qwo/qwo_0.5.bb b/recipes/qwo/qwo_0.5.bb new file mode 100644 index 0000000000..4db4d58182 --- /dev/null +++ b/recipes/qwo/qwo_0.5.bb @@ -0,0 +1,12 @@ +DESCRIPTION = "qwo virtual keyboard" +AUTHOR = "Charles Clement" +HOMEPAGE = "http://www.nongnu.org/qwo/" +SECTION = "x11" +PRIORITY = "optional" +LICENSE = "GPLv2" +DEPENDS = "libxtst libxext virtual/imlib2 libconfig" +RDEPENDS += "imlib2-loaders" + +SRC_URI = "http://download.savannah.nongnu.org/releases/qwo/qwo-${PV}.tar.gz " + +inherit autotools diff --git a/recipes/samsung-soc-utils/sjf2410-linux-native_svn.bb b/recipes/samsung-soc-utils/sjf2410-linux-native_svn.bb index ab271223f8..f6584109c6 100644 --- a/recipes/samsung-soc-utils/sjf2410-linux-native_svn.bb +++ b/recipes/samsung-soc-utils/sjf2410-linux-native_svn.bb @@ -5,7 +5,7 @@ LICENSE = "GPL" PV = "0.1+svnr${SRCPV}" PR = "r0" -SRC_URI = "svn://svn.openmoko.org/trunk/src/host/;module=sjf2410-linux;proto=https" +SRC_URI = "svn://svn.openmoko.org/trunk/src/host/;module=sjf2410-linux;proto=http" S = "${WORKDIR}/sjf2410-linux" inherit native diff --git a/recipes/sane/sane-backends-1.0.20/Makefile.in.patch b/recipes/sane/sane-backends-1.0.20/Makefile.in.patch new file mode 100644 index 0000000000..a545d0413b --- /dev/null +++ b/recipes/sane/sane-backends-1.0.20/Makefile.in.patch @@ -0,0 +1,13 @@ +Index: sane-backends-1.0.20/Makefile.in +=================================================================== +--- sane-backends-1.0.20.orig/Makefile.in 2009-04-30 15:41:20.000000000 +0200 ++++ sane-backends-1.0.20/Makefile.in 2009-11-23 19:19:38.000000000 +0100 +@@ -244,7 +244,7 @@ + top_build_prefix = @top_build_prefix@ + top_builddir = @top_builddir@ + top_srcdir = @top_srcdir@ +-SUBDIRS = include lib sanei backend frontend tools doc po ++SUBDIRS = include lib sanei backend frontend tools po + DIST_SUBDIRS = include lib sanei backend frontend tools doc po japi testsuite + dist_doc_DATA = AUTHORS ChangeLog COPYING LICENSE NEWS PROBLEMS PROJECTS \ + README README.aix README.beos README.darwin README.djpeg README.freebsd \ diff --git a/recipes/sane/sane-backends-1.0.20/byteorder.m4 b/recipes/sane/sane-backends-1.0.20/byteorder.m4 new file mode 100644 index 0000000000..693f939b7d --- /dev/null +++ b/recipes/sane/sane-backends-1.0.20/byteorder.m4 @@ -0,0 +1,354 @@ +dnl AC_NEED_BYTEORDER_H ( HEADER-TO-GENERATE ) +dnl Copyright 2001-2002 by Dan Fandrich <dan@coneharvesters.com> +dnl This file may be copied and used freely without restrictions. No warranty +dnl is expressed or implied. +dnl +dnl Create a header file that guarantees that byte swapping macros of the +dnl ntohl variety as well as the extended types included in OpenBSD and +dnl NetBSD such as le32toh are defined. If possible, the standard ntohl +dnl are overloaded as they are optimized for the given platform, but when +dnl this is not possible (e.g. on a big-endian machine) they are defined +dnl in this file. + +dnl Look for a symbol in a header file +dnl AC_HAVE_SYMBOL ( IDENTIFIER, HEADER-FILE, ACTION-IF-FOUND, ACTION-IF-NOT-FOUND ) +AC_DEFUN([AC_HAVE_SYMBOL], +[ +AC_MSG_CHECKING(for $1 in $2) +AC_EGREP_CPP([symbol is present|\<$1\>],[ +#include <$2> +#ifdef $1 + symbol is present +#endif + ], +[AC_MSG_RESULT(yes) +$3 +], +[AC_MSG_RESULT(no) +$4 +])]) + + +dnl Create a header file that defines extended byte swapping macros +AC_DEFUN([AC_NEED_BYTEORDER_H], +[ +changequote(, )dnl +ac_dir=`echo $1|sed 's%/[^/][^/]*$%%'` +changequote([, ])dnl +if test "$ac_dir" != "$1" && test "$ac_dir" != .; then + # The file is in a subdirectory. + test ! -d "$ac_dir" && mkdir "$ac_dir" +fi + +# We're only interested in the target CPU, but it's not always set +effective_target="$target" +if test "x$effective_target" = xNONE -o "x$effective_target" = x ; then + effective_target="$host" +fi +AC_SUBST(effective_target) + +cat > "$1" << EOF +/* This file is generated automatically by configure */ +/* It is valid only for the system type ${effective_target} */ + +#ifndef __BYTEORDER_H +#define __BYTEORDER_H + +EOF + +dnl First, do an endian check +AC_C_BIGENDIAN + +dnl Look for NetBSD-style extended byte swapping macros +AC_HAVE_SYMBOL(le32toh,machine/endian.h, + [HAVE_LE32TOH=1 + cat >> "$1" << EOF +/* extended byte swapping macros are already available */ +#include <machine/endian.h> + +EOF], + +[ + +dnl Look for standard byte swapping macros +AC_HAVE_SYMBOL(ntohl,arpa/inet.h, + [cat >> "$1" << EOF +/* ntohl and relatives live here */ +#include <arpa/inet.h> + +EOF], + + [AC_HAVE_SYMBOL(ntohl,netinet/in.h, + [cat >> "$1" << EOF +/* ntohl and relatives live here */ +#include <netinet/in.h> + +EOF],true)]) +]) + +dnl Look for generic byte swapping macros + +dnl OpenBSD +AC_HAVE_SYMBOL(swap32,machine/endian.h, + [cat >> "$1" << EOF +/* swap32 and swap16 are defined in machine/endian.h */ + +EOF], + + [ +dnl Linux GLIBC + AC_HAVE_SYMBOL(bswap_32,byteswap.h, + [cat >> "$1" << EOF +/* Define generic byte swapping functions */ +#include <byteswap.h> +#define swap16(x) bswap_16(x) +#define swap32(x) bswap_32(x) +#define swap64(x) bswap_64(x) + +EOF], + + [ +dnl NetBSD + AC_HAVE_SYMBOL(bswap32,machine/endian.h, + dnl We're already including machine/endian.h if this test succeeds + [cat >> "$1" << EOF +/* Define generic byte swapping functions */ +EOF + if test "$HAVE_LE32TOH" != "1"; then + echo '#include <machine/endian.h>'>> "$1" + fi +cat >> "$1" << EOF +#define swap16(x) bswap16(x) +#define swap32(x) bswap32(x) +#define swap64(x) bswap64(x) + +EOF], + + [ +dnl FreeBSD + AC_HAVE_SYMBOL(__byte_swap_long,sys/types.h, + [cat >> "$1" << EOF +/* Define generic byte swapping functions */ +#include <sys/types.h> +#define swap16(x) __byte_swap_word(x) +#define swap32(x) __byte_swap_long(x) +/* No optimized 64 bit byte swapping macro is available */ +#define swap64(x) ((uint64_t)(((uint64_t)(x) << 56) & 0xff00000000000000ULL | \\ + ((uint64_t)(x) << 40) & 0x00ff000000000000ULL | \\ + ((uint64_t)(x) << 24) & 0x0000ff0000000000ULL | \\ + ((uint64_t)(x) << 8) & 0x000000ff00000000ULL | \\ + ((x) >> 8) & 0x00000000ff000000ULL | \\ + ((x) >> 24) & 0x0000000000ff0000ULL | \\ + ((x) >> 40) & 0x000000000000ff00ULL | \\ + ((x) >> 56) & 0x00000000000000ffULL)) + +EOF], + + [ +dnl OS X + AC_HAVE_SYMBOL(NXSwapLong,machine/byte_order.h, + [cat >> "$1" << EOF +/* Define generic byte swapping functions */ +#include <machine/byte_order.h> +#define swap16(x) NXSwapShort(x) +#define swap32(x) NXSwapLong(x) +#define swap64(x) NXSwapLongLong(x) + +EOF], + [ + if test $ac_cv_c_bigendian = yes; then + cat >> "$1" << EOF +/* No other byte swapping functions are available on this big-endian system */ +#define swap16(x) ((uint16_t)(((x) << 8) | ((uint16_t)(x) >> 8))) +#define swap32(x) ((uint32_t)(((uint32_t)(x) << 24) & 0xff000000UL | \\ + ((uint32_t)(x) << 8) & 0x00ff0000UL | \\ + ((x) >> 8) & 0x0000ff00UL | \\ + ((x) >> 24) & 0x000000ffUL)) +#define swap64(x) ((uint64_t)(((uint64_t)(x) << 56) & 0xff00000000000000ULL | \\ + ((uint64_t)(x) << 40) & 0x00ff000000000000ULL | \\ + ((uint64_t)(x) << 24) & 0x0000ff0000000000ULL | \\ + ((uint64_t)(x) << 8) & 0x000000ff00000000ULL | \\ + ((x) >> 8) & 0x00000000ff000000ULL | \\ + ((x) >> 24) & 0x0000000000ff0000ULL | \\ + ((x) >> 40) & 0x000000000000ff00ULL | \\ + ((x) >> 56) & 0x00000000000000ffULL)) + +EOF + else + cat >> "$1" << EOF +/* Use these as generic byteswapping macros on this little endian system */ +#define swap16(x) ntohs(x) +#define swap32(x) ntohl(x) +/* No optimized 64 bit byte swapping macro is available */ +#define swap64(x) ((uint64_t)(((uint64_t)(x) << 56) & 0xff00000000000000ULL | \\ + ((uint64_t)(x) << 40) & 0x00ff000000000000ULL | \\ + ((uint64_t)(x) << 24) & 0x0000ff0000000000ULL | \\ + ((uint64_t)(x) << 8) & 0x000000ff00000000ULL | \\ + ((x) >> 8) & 0x00000000ff000000ULL | \\ + ((x) >> 24) & 0x0000000000ff0000ULL | \\ + ((x) >> 40) & 0x000000000000ff00ULL | \\ + ((x) >> 56) & 0x00000000000000ffULL)) + +EOF + fi +]) + ]) + ]) + ]) +]) + + +[ +if test "$HAVE_LE32TOH" != "1"; then + cat >> "$1" << EOF +/* The byte swapping macros have the form: */ +/* EENN[a]toh or htoEENN[a] where EE is be (big endian) or */ +/* le (little-endian), NN is 16 or 32 (number of bits) and a, */ +/* if present, indicates that the endian side is a pointer to an */ +/* array of uint8_t bytes instead of an integer of the specified length. */ +/* h refers to the host's ordering method. */ + +/* So, to convert a 32-bit integer stored in a buffer in little-endian */ +/* format into a uint32_t usable on this machine, you could use: */ +/* uint32_t value = le32atoh(&buf[3]); */ +/* To put that value back into the buffer, you could use: */ +/* htole32a(&buf[3], value); */ + +/* Define aliases for the standard byte swapping macros */ +/* Arguments to these macros must be properly aligned on natural word */ +/* boundaries in order to work properly on all architectures */ +#define htobe16(x) htons(x) +#define htobe32(x) htonl(x) +#define be16toh(x) ntohs(x) +#define be32toh(x) ntohl(x) + +#define HTOBE16(x) (x) = htobe16(x) +#define HTOBE32(x) (x) = htobe32(x) +#define BE32TOH(x) (x) = be32toh(x) +#define BE16TOH(x) (x) = be16toh(x) + +EOF + + if test $ac_cv_c_bigendian = yes; then + cat >> "$1" << EOF +/* Define our own extended byte swapping macros for big-endian machines */ +#define htole16(x) swap16(x) +#define htole32(x) swap32(x) +#define le16toh(x) swap16(x) +#define le32toh(x) swap32(x) + +#define htobe64(x) (x) +#define be64toh(x) (x) + +#define HTOLE16(x) (x) = htole16(x) +#define HTOLE32(x) (x) = htole32(x) +#define LE16TOH(x) (x) = le16toh(x) +#define LE32TOH(x) (x) = le32toh(x) + +#define HTOBE64(x) (void) (x) +#define BE64TOH(x) (void) (x) + +EOF + else + cat >> "$1" << EOF +/* On little endian machines, these macros are null */ +#define htole16(x) (x) +#define htole32(x) (x) +#define htole64(x) (x) +#define le16toh(x) (x) +#define le32toh(x) (x) +#define le64toh(x) (x) + +#define HTOLE16(x) (void) (x) +#define HTOLE32(x) (void) (x) +#define HTOLE64(x) (void) (x) +#define LE16TOH(x) (void) (x) +#define LE32TOH(x) (void) (x) +#define LE64TOH(x) (void) (x) + +/* These don't have standard aliases */ +#define htobe64(x) swap64(x) +#define be64toh(x) swap64(x) + +#define HTOBE64(x) (x) = htobe64(x) +#define BE64TOH(x) (x) = be64toh(x) + +EOF + fi +fi + +cat >> "$1" << EOF +/* Define the C99 standard length-specific integer types */ +#include <_stdint.h> + +EOF + +case "${effective_target}" in + i[3456]86-*) + cat >> "$1" << EOF +/* Here are some macros to create integers from a byte array */ +/* These are used to get and put integers from/into a uint8_t array */ +/* with a specific endianness. This is the most portable way to generate */ +/* and read messages to a network or serial device. Each member of a */ +/* packet structure must be handled separately. */ + +/* The i386 and compatibles can handle unaligned memory access, */ +/* so use the optimized macros above to do this job */ +#define be16atoh(x) be16toh(*(uint16_t*)(x)) +#define be32atoh(x) be32toh(*(uint32_t*)(x)) +#define be64atoh(x) be64toh(*(uint64_t*)(x)) +#define le16atoh(x) le16toh(*(uint16_t*)(x)) +#define le32atoh(x) le32toh(*(uint32_t*)(x)) +#define le64atoh(x) le64toh(*(uint64_t*)(x)) + +#define htobe16a(a,x) *(uint16_t*)(a) = htobe16(x) +#define htobe32a(a,x) *(uint32_t*)(a) = htobe32(x) +#define htobe64a(a,x) *(uint64_t*)(a) = htobe64(x) +#define htole16a(a,x) *(uint16_t*)(a) = htole16(x) +#define htole32a(a,x) *(uint32_t*)(a) = htole32(x) +#define htole64a(a,x) *(uint64_t*)(a) = htole64(x) + +EOF + ;; + + *) + cat >> "$1" << EOF +/* Here are some macros to create integers from a byte array */ +/* These are used to get and put integers from/into a uint8_t array */ +/* with a specific endianness. This is the most portable way to generate */ +/* and read messages to a network or serial device. Each member of a */ +/* packet structure must be handled separately. */ + +/* Non-optimized but portable macros */ +#define be16atoh(x) ((uint16_t)(((x)[0]<<8)|(x)[1])) +#define be32atoh(x) ((uint32_t)(((x)[0]<<24)|((x)[1]<<16)|((x)[2]<<8)|(x)[3])) +#define be64atoh(x) ((uint64_t)(((x)[0]<<56)|((x)[1]<<48)|((x)[2]<<40)| \\ + ((x)[3]<<32)|((x)[4]<<24)|((x)[5]<<16)|((x)[6]<<8)|(x)[7])) +#define le16atoh(x) ((uint16_t)(((x)[1]<<8)|(x)[0])) +#define le32atoh(x) ((uint32_t)(((x)[3]<<24)|((x)[2]<<16)|((x)[1]<<8)|(x)[0])) +#define le64atoh(x) ((uint64_t)(((x)[7]<<56)|((x)[6]<<48)|((x)[5]<<40)| \\ + ((x)[4]<<32)|((x)[3]<<24)|((x)[2]<<16)|((x)[1]<<8)|(x)[0])) + +#define htobe16a(a,x) (a)[0]=(uint8_t)((x)>>8), (a)[1]=(uint8_t)(x) +#define htobe32a(a,x) (a)[0]=(uint8_t)((x)>>24), (a)[1]=(uint8_t)((x)>>16), \\ + (a)[2]=(uint8_t)((x)>>8), (a)[3]=(uint8_t)(x) +#define htobe64a(a,x) (a)[0]=(uint8_t)((x)>>56), (a)[1]=(uint8_t)((x)>>48), \\ + (a)[2]=(uint8_t)((x)>>40), (a)[3]=(uint8_t)((x)>>32), \\ + (a)[4]=(uint8_t)((x)>>24), (a)[5]=(uint8_t)((x)>>16), \\ + (a)[6]=(uint8_t)((x)>>8), (a)[7]=(uint8_t)(x) +#define htole16a(a,x) (a)[1]=(uint8_t)((x)>>8), (a)[0]=(uint8_t)(x) +#define htole32a(a,x) (a)[3]=(uint8_t)((x)>>24), (a)[2]=(uint8_t)((x)>>16), \\ + (a)[1]=(uint8_t)((x)>>8), (a)[0]=(uint8_t)(x) +#define htole64a(a,x) (a)[7]=(uint8_t)((x)>>56), (a)[6]=(uint8_t)((x)>>48), \\ + (a)[5]=(uint8_t)((x)>>40), (a)[4]=(uint8_t)((x)>>32), \\ + (a)[3]=(uint8_t)((x)>>24), (a)[2]=(uint8_t)((x)>>16), \\ + (a)[1]=(uint8_t)((x)>>8), (a)[0]=(uint8_t)(x) + +EOF + ;; +esac +] + +cat >> "$1" << EOF +#endif /*__BYTEORDER_H*/ +EOF]) diff --git a/recipes/sane/sane-backends-1.0.20/saned.xinetd b/recipes/sane/sane-backends-1.0.20/saned.xinetd new file mode 100644 index 0000000000..f4e890fdbe --- /dev/null +++ b/recipes/sane/sane-backends-1.0.20/saned.xinetd @@ -0,0 +1,10 @@ +service sane-port +{ + socket_type = stream + server = /usr/sbin/saned + protocol = tcp + user = nobody + group = nogroup + wait = no + disable = no +} diff --git a/recipes/sane/sane-backends-1.0.20/stdint.m4 b/recipes/sane/sane-backends-1.0.20/stdint.m4 new file mode 100644 index 0000000000..f95b28c773 --- /dev/null +++ b/recipes/sane/sane-backends-1.0.20/stdint.m4 @@ -0,0 +1,734 @@ +dnl AC_NEED_STDINT_H ( HEADER-TO-GENERATE ) +dnl Copyright 2001-2002 by Dan Fandrich <dan@coneharvesters.com> +dnl This file may be copied and used freely without restrictions. No warranty +dnl is expressed or implied. +dnl +dnl Look for a header file that defines size-specific integer types like the +dnl ones recommended to be in stdint.h in the C99 standard (e.g. uint32_t). +dnl This is a dumbed-down version of the macro of the same name in the file +dnl ac_need_stdint_h.m4 which is part of the ac-archive, available at +dnl <URL:http://ac-archive.sourceforge.net/> (also, another macro +dnl AC_CREATE_STDINT_H by the same author). This version is not as smart, +dnl but works on older autoconf versions and has a different license. + +dnl AX_CHECK_DEFINED_TYPE ( TYPE, FILE, ACTION-IF-FOUND, ACTION-IF-NOT-FOUND ) +dnl This is similar to _AC_CHECK_TYPE_NEW (a.k.a. new syntax version of +dnl AC_CHECK_TYPE) in autoconf 2.50 but works on older versions +AC_DEFUN([AX_CHECK_DEFINED_TYPE], +[AC_MSG_CHECKING([for $1 in $2]) +AC_EGREP_CPP(changequote(<<,>>)dnl +<<(^|[^a-zA-Z_0-9])$1[^a-zA-Z_0-9]>>dnl +changequote([,]), [#include <$2>], +ac_cv_type_$1=yes, ac_cv_type_$1=no)dnl +AC_MSG_RESULT($ac_cv_type_$1) +if test $ac_cv_type_$1 = yes; then + $3 +else + $4 +fi +]) + +dnl Look for a header file that defines size-specific integer types +AC_DEFUN([AX_NEED_STDINT_H], +[ +changequote(, )dnl +ac_dir=`echo "$1"|sed 's%/[^/][^/]*$%%'` +changequote([, ])dnl +if test "$ac_dir" != "$1" && test "$ac_dir" != .; then + # The file is in a subdirectory. + test ! -d "$ac_dir" && mkdir "$ac_dir" +fi + +AX_CHECK_DEFINED_TYPE(uint8_t, +stdint.h, +[ +cat > "$1" <<EOF +/* This file is generated automatically by configure */ +#include <stdint.h> +EOF], +[AX_CHECK_DEFINED_TYPE(uint8_t, +inttypes.h, +[cat > "$1" <<EOF +/* This file is generated automatically by configure */ +#include <inttypes.h> +EOF], +[AX_CHECK_DEFINED_TYPE(uint8_t, +sys/types.h, +[cat > "$1" <<EOF +/* This file is generated automatically by configure */ +#include <sys/types.h> +EOF], +[AX_CHECK_DEFINED_TYPE(u_int8_t, +sys/types.h, +[cat > "$1" <<EOF +/* This file is generated automatically by configure */ +#ifndef __STDINT_H +#define __STDINT_H +#include <sys/types.h> +typedef u_int8_t uint8_t; +typedef u_int16_t uint16_t; +typedef u_int32_t uint32_t; +EOF + +AX_CHECK_DEFINED_TYPE(u_int64_t, +sys/types.h, +[cat >> "$1" <<EOF +typedef u_int64_t uint64_t; +#endif /*!__STDINT_H*/ +EOF], +[cat >> "$1" <<EOF +/* 64-bit types are not available on this system */ +/* typedef u_int64_t uint64_t; */ +#endif /*!__STDINT_H*/ +EOF]) + +], +[AC_MSG_WARN([I can't find size-specific integer definitions on this system]) +if test -e "$1" ; then + rm -f "$1" +fi +])])])])dnl +]) + +AC_DEFUN([AX_CHECK_DATA_MODEL],[ + AC_CHECK_SIZEOF(char) + AC_CHECK_SIZEOF(short) + AC_CHECK_SIZEOF(int) + AC_CHECK_SIZEOF(long) + AC_CHECK_SIZEOF(void*) + ac_cv_char_data_model="" + ac_cv_char_data_model="$ac_cv_char_data_model$ac_cv_sizeof_char" + ac_cv_char_data_model="$ac_cv_char_data_model$ac_cv_sizeof_short" + ac_cv_char_data_model="$ac_cv_char_data_model$ac_cv_sizeof_int" + ac_cv_long_data_model="" + ac_cv_long_data_model="$ac_cv_long_data_model$ac_cv_sizeof_int" + ac_cv_long_data_model="$ac_cv_long_data_model$ac_cv_sizeof_long" + ac_cv_long_data_model="$ac_cv_long_data_model$ac_cv_sizeof_voidp" + AC_MSG_CHECKING([data model]) + case "$ac_cv_char_data_model/$ac_cv_long_data_model" in + 122/242) ac_cv_data_model="IP16" ; n="standard 16bit machine" ;; + 122/244) ac_cv_data_model="LP32" ; n="standard 32bit machine" ;; + 122/*) ac_cv_data_model="i16" ; n="unusual int16 model" ;; + 124/444) ac_cv_data_model="ILP32" ; n="standard 32bit unixish" ;; + 124/488) ac_cv_data_model="LP64" ; n="standard 64bit unixish" ;; + 124/448) ac_cv_data_model="LLP64" ; n="unusual 64bit unixish" ;; + 124/*) ac_cv_data_model="i32" ; n="unusual int32 model" ;; + 128/888) ac_cv_data_model="ILP64" ; n="unusual 64bit numeric" ;; + 128/*) ac_cv_data_model="i64" ; n="unusual int64 model" ;; + 222/*2) ac_cv_data_model="DSP16" ; n="strict 16bit dsptype" ;; + 333/*3) ac_cv_data_model="DSP24" ; n="strict 24bit dsptype" ;; + 444/*4) ac_cv_data_model="DSP32" ; n="strict 32bit dsptype" ;; + 666/*6) ac_cv_data_model="DSP48" ; n="strict 48bit dsptype" ;; + 888/*8) ac_cv_data_model="DSP64" ; n="strict 64bit dsptype" ;; + 222/*|333/*|444/*|666/*|888/*) : + ac_cv_data_model="iDSP" ; n="unusual dsptype" ;; + *) ac_cv_data_model="none" ; n="very unusual model" ;; + esac + AC_MSG_RESULT([$ac_cv_data_model ($ac_cv_long_data_model, $n)]) +]) + +dnl AX_CHECK_HEADER_STDINT_X([HEADERLIST][,ACTION-IF]) +AC_DEFUN([AX_CHECK_HEADER_STDINT_X],[ +AC_CACHE_CHECK([for stdint uintptr_t], [ac_cv_header_stdint_x],[ + ac_cv_header_stdint_x="" # the 1997 typedefs (inttypes.h) + AC_MSG_RESULT([(..)]) + for i in m4_ifval([$1],[$1],[stdint.h inttypes.h sys/inttypes.h]) ; do + unset ac_cv_type_uintptr_t + unset ac_cv_type_uint64_t + AC_CHECK_TYPE(uintptr_t,[ac_cv_header_stdint_x=$i],continue,[#include <$i>]) + AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) + m4_ifvaln([$1],[$1]) break + done + AC_MSG_CHECKING([for stdint uintptr_t]) + ]) +]) + +AC_DEFUN([AX_CHECK_HEADER_STDINT_O],[ +AC_CACHE_CHECK([for stdint uint32_t], [ac_cv_header_stdint_o],[ + ac_cv_header_stdint_o="" # the 1995 typedefs (sys/inttypes.h) + AC_MSG_RESULT([(..)]) + for i in m4_ifval([$1],[$1],[inttypes.h sys/inttypes.h stdint.h]) ; do + unset ac_cv_type_uint32_t + unset ac_cv_type_uint64_t + AC_CHECK_TYPE(uint32_t,[ac_cv_header_stdint_o=$i],continue,[#include <$i>]) + AC_CHECK_TYPE(uint64_t,[and64="/uint64_t"],[and64=""],[#include<$i>]) + m4_ifvaln([$1],[$1]) break + break; + done + AC_MSG_CHECKING([for stdint uint32_t]) + ]) +]) + +AC_DEFUN([AX_CHECK_HEADER_STDINT_U],[ +AC_CACHE_CHECK([for stdint u_int32_t], [ac_cv_header_stdint_u],[ + ac_cv_header_stdint_u="" # the BSD typedefs (sys/types.h) + AC_MSG_RESULT([(..)]) + for i in m4_ifval([$1],[$1],[sys/types.h inttypes.h sys/inttypes.h]) ; do + unset ac_cv_type_u_int32_t + unset ac_cv_type_u_int64_t + AC_CHECK_TYPE(u_int32_t,[ac_cv_header_stdint_u=$i],continue,[#include <$i>]) + AC_CHECK_TYPE(u_int64_t,[and64="/u_int64_t"],[and64=""],[#include<$i>]) + m4_ifvaln([$1],[$1]) break + break; + done + AC_MSG_CHECKING([for stdint u_int32_t]) + ]) +]) + +AC_DEFUN([AX_CREATE_STDINT_H], +[# ------ AX CREATE STDINT H ------------------------------------- +AC_MSG_CHECKING([for stdint types]) +ac_stdint_h=`echo ifelse($1, , _stdint.h, $1)` +# try to shortcircuit - if the default include path of the compiler +# can find a "stdint.h" header then we assume that all compilers can. +AC_CACHE_VAL([ac_cv_header_stdint_t],[ +old_CXXFLAGS="$CXXFLAGS" ; CXXFLAGS="" +old_CPPFLAGS="$CPPFLAGS" ; CPPFLAGS="" +old_CFLAGS="$CFLAGS" ; CFLAGS="" +AC_TRY_COMPILE([#include <stdint.h>],[int_least32_t v = 0;], +[ac_cv_stdint_result="(assuming C99 compatible system)" + ac_cv_header_stdint_t="stdint.h"; ], +[ac_cv_header_stdint_t=""]) +CXXFLAGS="$old_CXXFLAGS" +CPPFLAGS="$old_CPPFLAGS" +CFLAGS="$old_CFLAGS" ]) + +v="... $ac_cv_header_stdint_h" +if test "$ac_stdint_h" = "stdint.h" ; then + AC_MSG_RESULT([(are you sure you want them in ./stdint.h?)]) +elif test "$ac_stdint_h" = "inttypes.h" ; then + AC_MSG_RESULT([(are you sure you want them in ./inttypes.h?)]) +elif test "_$ac_cv_header_stdint_t" = "_" ; then + AC_MSG_RESULT([(putting them into $ac_stdint_h)$v]) +else + ac_cv_header_stdint="$ac_cv_header_stdint_t" + AC_MSG_RESULT([$ac_cv_header_stdint (shortcircuit)]) +fi + +if test "_$ac_cv_header_stdint_t" = "_" ; then # can not shortcircuit.. + +dnl .....intro message done, now do a few system checks..... +dnl btw, all old CHECK_TYPE macros do automatically "DEFINE" a type, +dnl therefore we use the autoconf implementation detail CHECK_TYPE_NEW +dnl instead that is triggered with 3 or more arguments (see types.m4) + +inttype_headers=`echo $2 | sed -e 's/,/ /g'` + +ac_cv_stdint_result="(no helpful system typedefs seen)" +AX_CHECK_HEADER_STDINT_X(dnl + stdint.h inttypes.h sys/inttypes.h $inttype_headers, + ac_cv_stdint_result="(seen uintptr_t$and64 in $i)") + +if test "_$ac_cv_header_stdint_x" = "_" ; then +AX_CHECK_HEADER_STDINT_O(dnl, + inttypes.h sys/inttypes.h stdint.h $inttype_headers, + ac_cv_stdint_result="(seen uint32_t$and64 in $i)") +fi + +if test "_$ac_cv_header_stdint_x" = "_" ; then +if test "_$ac_cv_header_stdint_o" = "_" ; then +AX_CHECK_HEADER_STDINT_U(dnl, + sys/types.h inttypes.h sys/inttypes.h $inttype_headers, + ac_cv_stdint_result="(seen u_int32_t$and64 in $i)") +fi fi + +dnl if there was no good C99 header file, do some typedef checks... +if test "_$ac_cv_header_stdint_x" = "_" ; then + AC_MSG_CHECKING([for stdint datatype model]) + AC_MSG_RESULT([(..)]) + AX_CHECK_DATA_MODEL +fi + +if test "_$ac_cv_header_stdint_x" != "_" ; then + ac_cv_header_stdint="$ac_cv_header_stdint_x" +elif test "_$ac_cv_header_stdint_o" != "_" ; then + ac_cv_header_stdint="$ac_cv_header_stdint_o" +elif test "_$ac_cv_header_stdint_u" != "_" ; then + ac_cv_header_stdint="$ac_cv_header_stdint_u" +else + ac_cv_header_stdint="stddef.h" +fi + +AC_MSG_CHECKING([for extra inttypes in chosen header]) +AC_MSG_RESULT([($ac_cv_header_stdint)]) +dnl see if int_least and int_fast types are present in _this_ header. +unset ac_cv_type_int_least32_t +unset ac_cv_type_int_fast32_t +AC_CHECK_TYPE(int_least32_t,,,[#include <$ac_cv_header_stdint>]) +AC_CHECK_TYPE(int_fast32_t,,,[#include<$ac_cv_header_stdint>]) +AC_CHECK_TYPE(intmax_t,,,[#include <$ac_cv_header_stdint>]) + +fi # shortcircut to system "stdint.h" +# ------------------ PREPARE VARIABLES ------------------------------ +if test "$GCC" = "yes" ; then +ac_cv_stdint_message="using gnu compiler "`$CC --version | head -1` +else +ac_cv_stdint_message="using $CC" +fi + +AC_MSG_RESULT([make use of $ac_cv_header_stdint in $ac_stdint_h dnl +$ac_cv_stdint_result]) + +dnl ----------------------------------------------------------------- +# ----------------- DONE inttypes.h checks START header ------------- +AC_CONFIG_COMMANDS([$ac_stdint_h],[ +AC_MSG_NOTICE(creating $ac_stdint_h : $_ac_stdint_h) +ac_stdint=$tmp/_stdint.h + +echo "#ifndef" $_ac_stdint_h >$ac_stdint +echo "#define" $_ac_stdint_h "1" >>$ac_stdint +echo "#ifndef" _GENERATED_STDINT_H >>$ac_stdint +echo "#define" _GENERATED_STDINT_H '"'$PACKAGE $VERSION'"' >>$ac_stdint +echo "/* generated $ac_cv_stdint_message */" >>$ac_stdint +if test "_$ac_cv_header_stdint_t" != "_" ; then +echo "#define _STDINT_HAVE_STDINT_H" "1" >>$ac_stdint +echo "#include <stdint.h>" >>$ac_stdint +echo "#endif" >>$ac_stdint +echo "#endif" >>$ac_stdint +else + +cat >>$ac_stdint <<STDINT_EOF + +/* ................... shortcircuit part ........................... */ + +#if defined HAVE_STDINT_H || defined _STDINT_HAVE_STDINT_H +#include <stdint.h> +#else +#include <stddef.h> + +/* .................... configured part ............................ */ + +STDINT_EOF + +echo "/* whether we have a C99 compatible stdint header file */" >>$ac_stdint +if test "_$ac_cv_header_stdint_x" != "_" ; then + ac_header="$ac_cv_header_stdint_x" + echo "#define _STDINT_HEADER_INTPTR" '"'"$ac_header"'"' >>$ac_stdint +else + echo "/* #undef _STDINT_HEADER_INTPTR */" >>$ac_stdint +fi + +echo "/* whether we have a C96 compatible inttypes header file */" >>$ac_stdint +if test "_$ac_cv_header_stdint_o" != "_" ; then + ac_header="$ac_cv_header_stdint_o" + echo "#define _STDINT_HEADER_UINT32" '"'"$ac_header"'"' >>$ac_stdint +else + echo "/* #undef _STDINT_HEADER_UINT32 */" >>$ac_stdint +fi + +echo "/* whether we have a BSD compatible inet types header */" >>$ac_stdint +if test "_$ac_cv_header_stdint_u" != "_" ; then + ac_header="$ac_cv_header_stdint_u" + echo "#define _STDINT_HEADER_U_INT32" '"'"$ac_header"'"' >>$ac_stdint +else + echo "/* #undef _STDINT_HEADER_U_INT32 */" >>$ac_stdint +fi + +echo "" >>$ac_stdint + +if test "_$ac_header" != "_" ; then if test "$ac_header" != "stddef.h" ; then + echo "#include <$ac_header>" >>$ac_stdint + echo "" >>$ac_stdint +fi fi + +echo "/* which 64bit typedef has been found */" >>$ac_stdint +if test "$ac_cv_type_uint64_t" = "yes" ; then +echo "#define _STDINT_HAVE_UINT64_T" "1" >>$ac_stdint +else +echo "/* #undef _STDINT_HAVE_UINT64_T */" >>$ac_stdint +fi +if test "$ac_cv_type_u_int64_t" = "yes" ; then +echo "#define _STDINT_HAVE_U_INT64_T" "1" >>$ac_stdint +else +echo "/* #undef _STDINT_HAVE_U_INT64_T */" >>$ac_stdint +fi +echo "" >>$ac_stdint + +echo "/* which type model has been detected */" >>$ac_stdint +if test "_$ac_cv_char_data_model" != "_" ; then +echo "#define _STDINT_CHAR_MODEL" "$ac_cv_char_data_model" >>$ac_stdint +echo "#define _STDINT_LONG_MODEL" "$ac_cv_long_data_model" >>$ac_stdint +else +echo "/* #undef _STDINT_CHAR_MODEL // skipped */" >>$ac_stdint +echo "/* #undef _STDINT_LONG_MODEL // skipped */" >>$ac_stdint +fi +echo "" >>$ac_stdint + +echo "/* whether int_least types were detected */" >>$ac_stdint +if test "$ac_cv_type_int_least32_t" = "yes"; then +echo "#define _STDINT_HAVE_INT_LEAST32_T" "1" >>$ac_stdint +else +echo "/* #undef _STDINT_HAVE_INT_LEAST32_T */" >>$ac_stdint +fi +echo "/* whether int_fast types were detected */" >>$ac_stdint +if test "$ac_cv_type_int_fast32_t" = "yes"; then +echo "#define _STDINT_HAVE_INT_FAST32_T" "1" >>$ac_stdint +else +echo "/* #undef _STDINT_HAVE_INT_FAST32_T */" >>$ac_stdint +fi +echo "/* whether intmax_t type was detected */" >>$ac_stdint +if test "$ac_cv_type_intmax_t" = "yes"; then +echo "#define _STDINT_HAVE_INTMAX_T" "1" >>$ac_stdint +else +echo "/* #undef _STDINT_HAVE_INTMAX_T */" >>$ac_stdint +fi +echo "" >>$ac_stdint + + cat >>$ac_stdint <<STDINT_EOF +/* .................... detections part ............................ */ + +/* whether we need to define bitspecific types from compiler base types */ +#ifndef _STDINT_HEADER_INTPTR +#ifndef _STDINT_HEADER_UINT32 +#ifndef _STDINT_HEADER_U_INT32 +#define _STDINT_NEED_INT_MODEL_T +#else +#define _STDINT_HAVE_U_INT_TYPES +#endif +#endif +#endif + +#ifdef _STDINT_HAVE_U_INT_TYPES +#undef _STDINT_NEED_INT_MODEL_T +#endif + +#ifdef _STDINT_CHAR_MODEL +#if _STDINT_CHAR_MODEL+0 == 122 || _STDINT_CHAR_MODEL+0 == 124 +#ifndef _STDINT_BYTE_MODEL +#define _STDINT_BYTE_MODEL 12 +#endif +#endif +#endif + +#ifndef _STDINT_HAVE_INT_LEAST32_T +#define _STDINT_NEED_INT_LEAST_T +#endif + +#ifndef _STDINT_HAVE_INT_FAST32_T +#define _STDINT_NEED_INT_FAST_T +#endif + +#ifndef _STDINT_HEADER_INTPTR +#define _STDINT_NEED_INTPTR_T +#ifndef _STDINT_HAVE_INTMAX_T +#define _STDINT_NEED_INTMAX_T +#endif +#endif + + +/* .................... definition part ............................ */ + +/* some system headers have good uint64_t */ +#ifndef _HAVE_UINT64_T +#if defined _STDINT_HAVE_UINT64_T || defined HAVE_UINT64_T +#define _HAVE_UINT64_T +#elif defined _STDINT_HAVE_U_INT64_T || defined HAVE_U_INT64_T +#define _HAVE_UINT64_T +typedef u_int64_t uint64_t; +#endif +#endif + +#ifndef _HAVE_UINT64_T +/* .. here are some common heuristics using compiler runtime specifics */ +#if defined __STDC_VERSION__ && defined __STDC_VERSION__ >= 199901L +#define _HAVE_UINT64_T +#define _HAVE_LONGLONG_UINT64_T +typedef long long int64_t; +typedef unsigned long long uint64_t; + +#elif !defined __STRICT_ANSI__ +#if defined _MSC_VER || defined __WATCOMC__ || defined __BORLANDC__ +#define _HAVE_UINT64_T +typedef __int64 int64_t; +typedef unsigned __int64 uint64_t; + +#elif defined __GNUC__ || defined __MWERKS__ || defined __ELF__ +/* note: all ELF-systems seem to have loff-support which needs 64-bit */ +#if !defined _NO_LONGLONG +#define _HAVE_UINT64_T +#define _HAVE_LONGLONG_UINT64_T +typedef long long int64_t; +typedef unsigned long long uint64_t; +#endif + +#elif defined __alpha || (defined __mips && defined _ABIN32) +#if !defined _NO_LONGLONG +typedef long int64_t; +typedef unsigned long uint64_t; +#endif + /* compiler/cpu type to define int64_t */ +#endif +#endif +#endif + +#if defined _STDINT_HAVE_U_INT_TYPES +/* int8_t int16_t int32_t defined by inet code, redeclare the u_intXX types */ +typedef u_int8_t uint8_t; +typedef u_int16_t uint16_t; +typedef u_int32_t uint32_t; + +/* glibc compatibility */ +#ifndef __int8_t_defined +#define __int8_t_defined +#endif +#endif + +#ifdef _STDINT_NEED_INT_MODEL_T +/* we must guess all the basic types. Apart from byte-adressable system, */ +/* there a few 32-bit-only dsp-systems that we guard with BYTE_MODEL 8-} */ +/* (btw, those nibble-addressable systems are way off, or so we assume) */ + +dnl /* have a look at "64bit and data size neutrality" at */ +dnl /* http://unix.org/version2/whatsnew/login_64bit.html */ +dnl /* (the shorthand "ILP" types always have a "P" part) */ + +#if defined _STDINT_BYTE_MODEL +#if _STDINT_LONG_MODEL+0 == 242 +/* 2:4:2 = IP16 = a normal 16-bit system */ +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned long uint32_t; +#ifndef __int8_t_defined +#define __int8_t_defined +typedef char int8_t; +typedef short int16_t; +typedef long int32_t; +#endif +#elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL == 444 +/* 2:4:4 = LP32 = a 32-bit system derived from a 16-bit */ +/* 4:4:4 = ILP32 = a normal 32-bit system */ +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +#ifndef __int8_t_defined +#define __int8_t_defined +typedef char int8_t; +typedef short int16_t; +typedef int int32_t; +#endif +#elif _STDINT_LONG_MODEL+0 == 484 || _STDINT_LONG_MODEL+0 == 488 +/* 4:8:4 = IP32 = a 32-bit system prepared for 64-bit */ +/* 4:8:8 = LP64 = a normal 64-bit system */ +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +#ifndef __int8_t_defined +#define __int8_t_defined +typedef char int8_t; +typedef short int16_t; +typedef int int32_t; +#endif +/* this system has a "long" of 64bit */ +#ifndef _HAVE_UINT64_T +#define _HAVE_UINT64_T +typedef unsigned long uint64_t; +typedef long int64_t; +#endif +#elif _STDINT_LONG_MODEL+0 == 448 +/* LLP64 a 64-bit system derived from a 32-bit system */ +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +#ifndef __int8_t_defined +#define __int8_t_defined +typedef char int8_t; +typedef short int16_t; +typedef int int32_t; +#endif +/* assuming the system has a "long long" */ +#ifndef _HAVE_UINT64_T +#define _HAVE_UINT64_T +#define _HAVE_LONGLONG_UINT64_T +typedef unsigned long long uint64_t; +typedef long long int64_t; +#endif +#else +#define _STDINT_NO_INT32_T +#endif +#else +#define _STDINT_NO_INT8_T +#define _STDINT_NO_INT32_T +#endif +#endif + +/* + * quote from SunOS-5.8 sys/inttypes.h: + * Use at your own risk. As of February 1996, the committee is squarely + * behind the fixed sized types; the "least" and "fast" types are still being + * discussed. The probability that the "fast" types may be removed before + * the standard is finalized is high enough that they are not currently + * implemented. + */ + +#if defined _STDINT_NEED_INT_LEAST_T +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; +typedef int32_t int_least32_t; +#ifdef _HAVE_UINT64_T +typedef int64_t int_least64_t; +#endif + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; +typedef uint32_t uint_least32_t; +#ifdef _HAVE_UINT64_T +typedef uint64_t uint_least64_t; +#endif + /* least types */ +#endif + +#if defined _STDINT_NEED_INT_FAST_T +typedef int8_t int_fast8_t; +typedef int int_fast16_t; +typedef int32_t int_fast32_t; +#ifdef _HAVE_UINT64_T +typedef int64_t int_fast64_t; +#endif + +typedef uint8_t uint_fast8_t; +typedef unsigned uint_fast16_t; +typedef uint32_t uint_fast32_t; +#ifdef _HAVE_UINT64_T +typedef uint64_t uint_fast64_t; +#endif + /* fast types */ +#endif + +#ifdef _STDINT_NEED_INTMAX_T +#ifdef _HAVE_UINT64_T +typedef int64_t intmax_t; +typedef uint64_t uintmax_t; +#else +typedef long intmax_t; +typedef unsigned long uintmax_t; +#endif +#endif + +#ifdef _STDINT_NEED_INTPTR_T +#ifndef __intptr_t_defined +#define __intptr_t_defined +/* we encourage using "long" to store pointer values, never use "int" ! */ +#if _STDINT_LONG_MODEL+0 == 242 || _STDINT_LONG_MODEL+0 == 484 +typedef unsinged int uintptr_t; +typedef int intptr_t; +#elif _STDINT_LONG_MODEL+0 == 244 || _STDINT_LONG_MODEL+0 == 444 +typedef unsigned long uintptr_t; +typedef long intptr_t; +#elif _STDINT_LONG_MODEL+0 == 448 && defined _HAVE_UINT64_T +typedef uint64_t uintptr_t; +typedef int64_t intptr_t; +#else /* matches typical system types ILP32 and LP64 - but not IP16 or LLP64 */ +typedef unsigned long uintptr_t; +typedef long intptr_t; +#endif +#endif +#endif + +/* The ISO C99 standard specifies that in C++ implementations these + should only be defined if explicitly requested. */ +#if !defined __cplusplus || defined __STDC_CONSTANT_MACROS +#ifndef UINT32_C + +/* Signed. */ +# define INT8_C(c) c +# define INT16_C(c) c +# define INT32_C(c) c +# ifdef _HAVE_LONGLONG_UINT64_T +# define INT64_C(c) c ## L +# else +# define INT64_C(c) c ## LL +# endif + +/* Unsigned. */ +# define UINT8_C(c) c ## U +# define UINT16_C(c) c ## U +# define UINT32_C(c) c ## U +# ifdef _HAVE_LONGLONG_UINT64_T +# define UINT64_C(c) c ## UL +# else +# define UINT64_C(c) c ## ULL +# endif + +/* Maximal type. */ +# ifdef _HAVE_LONGLONG_UINT64_T +# define INTMAX_C(c) c ## L +# define UINTMAX_C(c) c ## UL +# else +# define INTMAX_C(c) c ## LL +# define UINTMAX_C(c) c ## ULL +# endif + + /* literalnumbers */ +#endif +#endif + +/* These limits are merily those of a two complement byte-oriented system */ + +/* Minimum of signed integral types. */ +# define INT8_MIN (-128) +# define INT16_MIN (-32767-1) +# define INT32_MIN (-2147483647-1) +# define INT64_MIN (-__INT64_C(9223372036854775807)-1) +/* Maximum of signed integral types. */ +# define INT8_MAX (127) +# define INT16_MAX (32767) +# define INT32_MAX (2147483647) +# define INT64_MAX (__INT64_C(9223372036854775807)) + +/* Maximum of unsigned integral types. */ +# define UINT8_MAX (255) +# define UINT16_MAX (65535) +# define UINT32_MAX (4294967295U) +# define UINT64_MAX (__UINT64_C(18446744073709551615)) + +/* Minimum of signed integral types having a minimum size. */ +# define INT_LEAST8_MIN INT8_MIN +# define INT_LEAST16_MIN INT16_MIN +# define INT_LEAST32_MIN INT32_MIN +# define INT_LEAST64_MIN INT64_MIN +/* Maximum of signed integral types having a minimum size. */ +# define INT_LEAST8_MAX INT8_MAX +# define INT_LEAST16_MAX INT16_MAX +# define INT_LEAST32_MAX INT32_MAX +# define INT_LEAST64_MAX INT64_MAX + +/* Maximum of unsigned integral types having a minimum size. */ +# define UINT_LEAST8_MAX UINT8_MAX +# define UINT_LEAST16_MAX UINT16_MAX +# define UINT_LEAST32_MAX UINT32_MAX +# define UINT_LEAST64_MAX UINT64_MAX + + /* shortcircuit*/ +#endif + /* once */ +#endif +#endif +STDINT_EOF +fi + if cmp -s $ac_stdint_h $ac_stdint 2>/dev/null; then + AC_MSG_NOTICE([$ac_stdint_h is unchanged]) + else + ac_dir=`AS_DIRNAME(["$ac_stdint_h"])` + AS_MKDIR_P(["$ac_dir"]) + rm -f $ac_stdint_h + mv $ac_stdint $ac_stdint_h + fi +],[# variables for create stdint.h replacement +PACKAGE="$PACKAGE" +VERSION="$VERSION" +ac_stdint_h="$ac_stdint_h" +_ac_stdint_h=AS_TR_CPP(_$PACKAGE-$ac_stdint_h) +ac_cv_stdint_message="$ac_cv_stdint_message" +ac_cv_header_stdint_t="$ac_cv_header_stdint_t" +ac_cv_header_stdint_x="$ac_cv_header_stdint_x" +ac_cv_header_stdint_o="$ac_cv_header_stdint_o" +ac_cv_header_stdint_u="$ac_cv_header_stdint_u" +ac_cv_type_uint64_t="$ac_cv_type_uint64_t" +ac_cv_type_u_int64_t="$ac_cv_type_u_int64_t" +ac_cv_char_data_model="$ac_cv_char_data_model" +ac_cv_long_data_model="$ac_cv_long_data_model" +ac_cv_type_int_least32_t="$ac_cv_type_int_least32_t" +ac_cv_type_int_fast32_t="$ac_cv_type_int_fast32_t" +ac_cv_type_intmax_t="$ac_cv_type_intmax_t" +]) +]) diff --git a/recipes/sane/sane-backends_1.0.19.bb b/recipes/sane/sane-backends_1.0.19.bb index 935541f25a..caf7f2f075 100644 --- a/recipes/sane/sane-backends_1.0.19.bb +++ b/recipes/sane/sane-backends_1.0.19.bb @@ -44,7 +44,7 @@ FILES_sane-utils = "${bindir}/*" FILES_${PN}-dbg += "${libdir}/sane/.debug" -CONFFILES_libsane = "${sysconfdir}/sane.d/abaton.conf ${sysconfdir}/sane.d/agfafocus.conf ${sysconfdir}/sane.d/apple.conf ${sysconfdir}/sane.d/artec.conf ${sysconfdir}/sane.d/avision.conf ${sysconfdir}/sane.d/bh.conf ${sysconfdir}/sane.d/canon.conf ${sysconfdir}/sane.d/canon630u.conf ${sysconfdir}/sane.d/coolscan.conf ${sysconfdir}/sane.d/coolscan2.conf ${sysconfdir}/sane.d/dc25.conf ${sysconfdir}/sane.d/dmc.conf ${sysconfdir}/sane.d/epson.conf ${sysconfdir}/sane.d/fujitsu.conf ${sysconfdir}/sane.d/gt68xx.conf ${sysconfdir}/sane.d/hp.conf ${sysconfdir}/sane.d/leo.conf ${sysconfdir}/sane.d/matsushita.conf ${sysconfdir}/sane.d/microtek.conf ${sysconfdir}/sane.d/microtek2.conf ${sysconfdir}/sane.d/mustek.conf ${sysconfdir}/sane.d/mustek_usb.conf ${sysconfdir}/sane.d/nec.conf ${sysconfdir}/sane.d/pie.conf ${sysconfdir}/sane.d/plustek.conf ${sysconfdir}/sane.d/plustek_pp.conf ${sysconfdir}/sane.d/ricoh.conf ${sysconfdir}/sane.d/s9036.conf ${sysconfdir}/sane.d/sceptre.conf ${sysconfdir}/sane.d/sharp.conf ${sysconfdir}/sane.d/sp15c.conf ${sysconfdir}/sane.d/st400.conf ${sysconfdir}/sane.d/tamarack.conf ${sysconfdir}/sane.d/test.conf ${sysconfdir}/sane.d/teco1.conf ${sysconfdir}/sane.d/teco2.conf ${sysconfdir}/sane.d/teco3.conf ${sysconfdir}/sane.d/umax.conf ${sysconfdir}/sane.d/umax_pp.conf ${sysconfdir}/sane.d/umax1220u.conf ${sysconfdir}/sane.d/artec_eplus48u.conf ${sysconfdir}/sane.d/ma1509.conf ${sysconfdir}/sane.d/ibm.conf ${sysconfdir}/sane.d/hp5400.conf ${sysconfdir}/sane.d/u12.conf ${sysconfdir}/sane.d/snapscan.conf ${sysconfdir}/sane.d/dc210.conf ${sysconfdir}/sane.d/dc240.conf ${sysconfdir}/sane.d/gphoto2.conf ${sysconfdir}/sane.d/qcam.conf ${sysconfdir}/sane.d/v4l.conf ${sysconfdir}/sane.d/net.conf ${sysconfdir}/sane.d/dll.conf ${sysconfdir}/sane.d/saned.conf" +CONFFILES_libsane = "${sysconfdir}/sane.d/abaton.conf ${sysconfdir}/sane.d/agfafocus.conf ${sysconfdir}/sane.d/apple.conf ${sysconfdir}/sane.d/artec.conf ${sysconfdir}/sane.d/avision.conf ${sysconfdir}/sane.d/bh.conf ${sysconfdir}/sane.d/canon.conf ${sysconfdir}/sane.d/canon630u.conf ${sysconfdir}/sane.d/coolscan.conf ${sysconfdir}/sane.d/coolscan2.conf ${sysconfdir}/sane.d/dc25.conf ${sysconfdir}/sane.d/dmc.conf ${sysconfdir}/sane.d/epson.conf ${sysconfdir}/sane.d/fujitsu.conf ${sysconfdir}/sane.d/gt68xx.conf ${sysconfdir}/sane.d/hp.conf ${sysconfdir}/sane.d/leo.conf ${sysconfdir}/sane.d/matsushita.conf ${sysconfdir}/sane.d/microtek.conf ${sysconfdir}/sane.d/microtek2.conf ${sysconfdir}/sane.d/mustek.conf ${sysconfdir}/sane.d/mustek_usb.conf ${sysconfdir}/sane.d/nec.conf ${sysconfdir}/sane.d/pie.conf ${sysconfdir}/sane.d/plustek.conf ${sysconfdir}/sane.d/plustek_pp.conf ${sysconfdir}/sane.d/ricoh.conf ${sysconfdir}/sane.d/s9036.conf ${sysconfdir}/sane.d/sceptre.conf ${sysconfdir}/sane.d/sharp.conf ${sysconfdir}/sane.d/sp15c.conf ${sysconfdir}/sane.d/st400.conf ${sysconfdir}/sane.d/tamarack.conf ${sysconfdir}/sane.d/test.conf ${sysconfdir}/sane.d/teco1.conf ${sysconfdir}/sane.d/teco2.conf ${sysconfdir}/sane.d/teco3.conf ${sysconfdir}/sane.d/umax.conf ${sysconfdir}/sane.d/umax_pp.conf ${sysconfdir}/sane.d/umax1220u.conf ${sysconfdir}/sane.d/artec_eplus48u.conf ${sysconfdir}/sane.d/ma1509.conf ${sysconfdir}/sane.d/ibm.conf ${sysconfdir}/sane.d/hp5400.conf ${sysconfdir}/sane.d/u12.conf ${sysconfdir}/sane.d/snapscan.conf ${sysconfdir}/sane.d/dc210.conf ${sysconfdir}/sane.d/dc240.conf ${sysconfdir}/sane.d/gphoto2.conf ${sysconfdir}/sane.d/v4l.conf ${sysconfdir}/sane.d/net.conf ${sysconfdir}/sane.d/dll.conf ${sysconfdir}/sane.d/saned.conf" do_stage() { autotools_stage_all diff --git a/recipes/sane/sane-backends_1.0.20.bb b/recipes/sane/sane-backends_1.0.20.bb new file mode 100644 index 0000000000..5035ad471e --- /dev/null +++ b/recipes/sane/sane-backends_1.0.20.bb @@ -0,0 +1,53 @@ +DESCRIPTION = "Scanner drivers for SANE" +DEPENDS = "hal gphoto2 jpeg virtual/libusb0" +LICENSE = "LGPL" + +SRC_URI = "http://alioth.debian.org/frs/download.php/3026/sane-backends-${PV}.tar.gz \ + file://Makefile.in.patch;patch=1 \ + file://saned.xinetd \ + file://byteorder.m4 \ + file://stdint.m4 \ + " + +inherit autotools pkgconfig binconfig + +EXTRA_OECONF = "--disable-translations" + +do_configure_prepend() { + mkdir -p ${S}/m4 + cp ${STAGING_DATADIR}/aclocal/libtool.m4 ${S}/m4/ + cp ${WORKDIR}/*.m4 ${S}/m4/ +} + +PARALLEL_MAKE = "" +do_compile_prepend() { + ln -sf ${S}/${TARGET_PREFIX}libtool ${S}/libtool +} + +do_install_append() { + install -d "${D}/${sysconfdir}/xinetd.d" + install -m 755 "${S}/tools/.libs/sane-find-scanner" "${D}/${bindir}" + install -m 644 "${WORKDIR}/saned.xinetd" "${D}/${sysconfdir}/xinetd.d/saned" +} + +PACKAGES =+ "libsane libsane-dev saned sane-utils" + +FILES_libsane = "${libdir}/sane/*.so.* ${libdir}/lib*.so.* /etc" +RRECOMMENDS_libsane = "saned sane-utils" +FILES_libsane-dev += "${libdir}/sane/*" + +RRECOMMENDS_saned = "xinetd" +FILES_saned = "${sbindir}/saned" + +FILES_sane-utils = "${bindir}/*" +FILES_${PN}-dbg += "${libdir}/sane/.debug" + + +CONFFILES_libsane = "${sysconfdir}/sane.d/abaton.conf ${sysconfdir}/sane.d/agfafocus.conf ${sysconfdir}/sane.d/apple.conf ${sysconfdir}/sane.d/artec.conf ${sysconfdir}/sane.d/avision.conf ${sysconfdir}/sane.d/bh.conf ${sysconfdir}/sane.d/canon.conf ${sysconfdir}/sane.d/canon630u.conf ${sysconfdir}/sane.d/coolscan.conf ${sysconfdir}/sane.d/coolscan2.conf ${sysconfdir}/sane.d/dc25.conf ${sysconfdir}/sane.d/dmc.conf ${sysconfdir}/sane.d/epson.conf ${sysconfdir}/sane.d/fujitsu.conf ${sysconfdir}/sane.d/gt68xx.conf ${sysconfdir}/sane.d/hp.conf ${sysconfdir}/sane.d/leo.conf ${sysconfdir}/sane.d/matsushita.conf ${sysconfdir}/sane.d/microtek.conf ${sysconfdir}/sane.d/microtek2.conf ${sysconfdir}/sane.d/mustek.conf ${sysconfdir}/sane.d/mustek_usb.conf ${sysconfdir}/sane.d/nec.conf ${sysconfdir}/sane.d/pie.conf ${sysconfdir}/sane.d/plustek.conf ${sysconfdir}/sane.d/plustek_pp.conf ${sysconfdir}/sane.d/ricoh.conf ${sysconfdir}/sane.d/s9036.conf ${sysconfdir}/sane.d/sceptre.conf ${sysconfdir}/sane.d/sharp.conf ${sysconfdir}/sane.d/sp15c.conf ${sysconfdir}/sane.d/st400.conf ${sysconfdir}/sane.d/tamarack.conf ${sysconfdir}/sane.d/test.conf ${sysconfdir}/sane.d/teco1.conf ${sysconfdir}/sane.d/teco2.conf ${sysconfdir}/sane.d/teco3.conf ${sysconfdir}/sane.d/umax.conf ${sysconfdir}/sane.d/umax_pp.conf ${sysconfdir}/sane.d/umax1220u.conf ${sysconfdir}/sane.d/artec_eplus48u.conf ${sysconfdir}/sane.d/ma1509.conf ${sysconfdir}/sane.d/ibm.conf ${sysconfdir}/sane.d/hp5400.conf ${sysconfdir}/sane.d/u12.conf ${sysconfdir}/sane.d/snapscan.conf ${sysconfdir}/sane.d/dc210.conf ${sysconfdir}/sane.d/dc240.conf ${sysconfdir}/sane.d/gphoto2.conf ${sysconfdir}/sane.d/net.conf ${sysconfdir}/sane.d/dll.conf ${sysconfdir}/sane.d/saned.conf" + +do_stage() { + autotools_stage_all +} + + + diff --git a/recipes/shadow/files/login_defs_pam.sed b/recipes/shadow/files/login_defs_pam.sed new file mode 100644 index 0000000000..655f115870 --- /dev/null +++ b/recipes/shadow/files/login_defs_pam.sed @@ -0,0 +1,25 @@ +/^FAILLOG_ENAB/b comment +/^LASTLOG_ENAB/b comment +/^MAIL_CHECK_ENAB/b comment +/^OBSCURE_CHECKS_ENAB/b comment +/^PORTTIME_CHECKS_ENAB/b comment +/^QUOTAS_ENAB/b comment +/^MOTD_FILE/b comment +/^FTMP_FILE/b comment +/^NOLOGINS_FILE/b comment +/^ENV_HZ/b comment +/^PASS_MIN_LEN/b comment +/^SU_WHEEL_ONLY/b comment +/^CRACKLIB_DICTPATH/b comment +/^PASS_CHANGE_TRIES/b comment +/^PASS_ALWAYS_WARN/b comment +/^CHFN_AUTH/b comment +/^ENVIRON_FILE/b comment + +b exit + +: comment + s:^:#: + +: exit + diff --git a/recipes/shadow/files/pam.d/chfn b/recipes/shadow/files/pam.d/chfn new file mode 100644 index 0000000000..baf7698bba --- /dev/null +++ b/recipes/shadow/files/pam.d/chfn @@ -0,0 +1,14 @@ +# +# The PAM configuration file for the Shadow `chfn' service +# + +# This allows root to change user infomation without being +# prompted for a password +auth sufficient pam_rootok.so + +# The standard Unix authentication modules, used with +# NIS (man nsswitch) as well as normal /etc/passwd and +# /etc/shadow entries. +auth include common-auth +account include common-account +session include common-session diff --git a/recipes/shadow/files/pam.d/chpasswd b/recipes/shadow/files/pam.d/chpasswd new file mode 100644 index 0000000000..9e3efa68ba --- /dev/null +++ b/recipes/shadow/files/pam.d/chpasswd @@ -0,0 +1,4 @@ +# The PAM configuration file for the Shadow 'chpasswd' service +# + +password include common-password diff --git a/recipes/shadow/files/pam.d/chsh b/recipes/shadow/files/pam.d/chsh new file mode 100644 index 0000000000..8fb169f64e --- /dev/null +++ b/recipes/shadow/files/pam.d/chsh @@ -0,0 +1,19 @@ +# +# The PAM configuration file for the Shadow `chsh' service +# + +# This will not allow a user to change their shell unless +# their current one is listed in /etc/shells. This keeps +# accounts with special shells from changing them. +auth required pam_shells.so + +# This allows root to change user shell without being +# prompted for a password +auth sufficient pam_rootok.so + +# The standard Unix authentication modules, used with +# NIS (man nsswitch) as well as normal /etc/passwd and +# /etc/shadow entries. +auth include common-auth +account include common-account +session include common-session diff --git a/recipes/shadow/files/pam.d/login b/recipes/shadow/files/pam.d/login new file mode 100644 index 0000000000..2186d3eee9 --- /dev/null +++ b/recipes/shadow/files/pam.d/login @@ -0,0 +1,91 @@ +# +# The PAM configuration file for the Shadow `login' service +# + +# Enforce a minimal delay in case of failure (in microseconds). +# (Replaces the `FAIL_DELAY' setting from login.defs) +# Note that other modules may require another minimal delay. (for example, +# to disable any delay, you should add the nodelay option to pam_unix) +auth optional pam_faildelay.so delay=3000000 + +# Outputs an issue file prior to each login prompt (Replaces the +# ISSUE_FILE option from login.defs). Uncomment for use +# auth required pam_issue.so issue=/etc/issue + +# Disallows root logins except on tty's listed in /etc/securetty +# (Replaces the `CONSOLE' setting from login.defs) +# Note that it is included as a "requisite" module. No password prompts will +# be displayed if this module fails to avoid having the root password +# transmitted on unsecure ttys. +# You can change it to a "required" module if you think it permits to +# guess valid user names of your system (invalid user names are considered +# as possibly being root). +auth requisite pam_securetty.so + +# Disallows other than root logins when /etc/nologin exists +# (Replaces the `NOLOGINS_FILE' option from login.defs) +auth requisite pam_nologin.so + +# SELinux needs to be the first session rule. This ensures that any +# lingering context has been cleared. Without out this it is possible +# that a module could execute code in the wrong domain. +# When the module is present, "required" would be sufficient (When SELinux +# is disabled, this returns success.) +session [success=ok ignore=ignore module_unknown=ignore default=bad] pam_selinux.so close + +# This module parses environment configuration file(s) +# and also allows you to use an extended config +# file /etc/security/pam_env.conf. +# +# parsing /etc/environment needs "readenv=1" +session required pam_env.so readenv=1 +# locale variables are also kept into /etc/default/locale in etch +# reading this file *in addition to /etc/environment* does not hurt +session required pam_env.so readenv=1 envfile=/etc/default/locale + +# Standard Un*x authentication. +@include common-auth + +# This allows certain extra groups to be granted to a user +# based on things like time of day, tty, service, and user. +# Please edit /etc/security/group.conf to fit your needs +# (Replaces the `CONSOLE_GROUPS' option in login.defs) +auth optional pam_group.so + +# Uncomment and edit /etc/security/time.conf if you need to set +# time restrainst on logins. +# (Replaces the `PORTTIME_CHECKS_ENAB' option from login.defs +# as well as /etc/porttime) +# account requisite pam_time.so + +# Uncomment and edit /etc/security/access.conf if you need to +# set access limits. +# (Replaces /etc/login.access file) +# account required pam_access.so + +# Sets up user limits according to /etc/security/limits.conf +# (Replaces the use of /etc/limits in old login) +session required pam_limits.so + +# Prints the last login info upon succesful login +# (Replaces the `LASTLOG_ENAB' option from login.defs) +session optional pam_lastlog.so + +# Prints the motd upon succesful login +# (Replaces the `MOTD_FILE' option in login.defs) +session optional pam_motd.so + +# Prints the status of the user's mailbox upon succesful login +# (Replaces the `MAIL_CHECK_ENAB' option from login.defs). +# +# This also defines the MAIL environment variable +# However, userdel also needs MAIL_DIR and MAIL_FILE variables +# in /etc/login.defs to make sure that removing a user +# also removes the user's mail spool file. +# See comments in /etc/login.defs +session optional pam_mail.so standard + +# Standard Un*x account and session +account include common-account +password include common-password +session include common-session diff --git a/recipes/shadow/files/pam.d/newusers b/recipes/shadow/files/pam.d/newusers new file mode 100644 index 0000000000..4aa3dde48b --- /dev/null +++ b/recipes/shadow/files/pam.d/newusers @@ -0,0 +1,4 @@ +# The PAM configuration file for the Shadow 'newusers' service +# + +password include common-password diff --git a/recipes/shadow/files/pam.d/passwd b/recipes/shadow/files/pam.d/passwd new file mode 100644 index 0000000000..f534992435 --- /dev/null +++ b/recipes/shadow/files/pam.d/passwd @@ -0,0 +1,5 @@ +# +# The PAM configuration file for the Shadow `passwd' service +# + +password include common-password diff --git a/recipes/shadow/files/pam.d/su b/recipes/shadow/files/pam.d/su new file mode 100644 index 0000000000..8e35137f37 --- /dev/null +++ b/recipes/shadow/files/pam.d/su @@ -0,0 +1,60 @@ +# +# The PAM configuration file for the Shadow `su' service +# + +# This allows root to su without passwords (normal operation) +auth sufficient pam_rootok.so + +# Uncomment this to force users to be a member of group root +# before they can use `su'. You can also add "group=foo" +# to the end of this line if you want to use a group other +# than the default "root" (but this may have side effect of +# denying "root" user, unless she's a member of "foo" or explicitly +# permitted earlier by e.g. "sufficient pam_rootok.so"). +# (Replaces the `SU_WHEEL_ONLY' option from login.defs) +# auth required pam_wheel.so + +# Uncomment this if you want wheel members to be able to +# su without a password. +# auth sufficient pam_wheel.so trust + +# Uncomment this if you want members of a specific group to not +# be allowed to use su at all. +# auth required pam_wheel.so deny group=nosu + +# Uncomment and edit /etc/security/time.conf if you need to set +# time restrainst on su usage. +# (Replaces the `PORTTIME_CHECKS_ENAB' option from login.defs +# as well as /etc/porttime) +# account requisite pam_time.so + +# This module parses environment configuration file(s) +# and also allows you to use an extended config +# file /etc/security/pam_env.conf. +# +# parsing /etc/environment needs "readenv=1" +session required pam_env.so readenv=1 +# locale variables are also kept into /etc/default/locale in etch +# reading this file *in addition to /etc/environment* does not hurt +session required pam_env.so readenv=1 envfile=/etc/default/locale + +# Defines the MAIL environment variable +# However, userdel also needs MAIL_DIR and MAIL_FILE variables +# in /etc/login.defs to make sure that removing a user +# also removes the user's mail spool file. +# See comments in /etc/login.defs +# +# "nopen" stands to avoid reporting new mail when su'ing to another user +session optional pam_mail.so nopen + +# Sets up user limits, please uncomment and read /etc/security/limits.conf +# to enable this functionality. +# (Replaces the use of /etc/limits in old login) +# session required pam_limits.so + +# The standard Unix authentication modules, used with +# NIS (man nsswitch) as well as normal /etc/passwd and +# /etc/shadow entries. +auth include common-auth +account include common-account +session include common-session diff --git a/recipes/shadow/shadow_4.1.4.2.bb b/recipes/shadow/shadow_4.1.4.2.bb new file mode 100644 index 0000000000..04887a01d1 --- /dev/null +++ b/recipes/shadow/shadow_4.1.4.2.bb @@ -0,0 +1,52 @@ +DESCRIPTION = "login/password and account utilities" +LICENSE = "GPL" + +DEPEND = "libpam" +RDEPEND = "${DEPEND}" + +PR = "r5" + +EXTRA_OECONF += " --enable-shared --enable-static --with-libpam --without-libcrack" + +inherit autotools + +HOMEPAGE = "http://pkg-shadow.alioth.debian.org/" +SRC_URI = "ftp://pkg-shadow.alioth.debian.org/pub/pkg-shadow/shadow-${PV}.tar.bz2 \ + file://login_defs_pam.sed \ +" + +# Additional Policy files for PAM +SRC_URI_append = " \ + file://pam.d/chfn \ + file://pam.d/chpasswd \ + file://pam.d/chsh \ + file://pam.d/login \ + file://pam.d/newusers \ + file://pam.d/passwd \ + file://pam.d/su \ +" + +S = "${WORKDIR}/shadow-${PV}" + +CFLAGS_append = " -I../include" + +do_install_append() { + # Ensure that the image has as /var/spool/mail dir so shadow can put mailboxes there if the user + # reconfigures Shadow to default (see sed below). + install -d ${D}${localstatedir}/spool/mail/ + + install -d ${D}${sysconfdir}/pam.d/ + install -m 0644 ${WORKDIR}/pam.d/* ${D}${sysconfdir}/pam.d/ + + # Remove defaults that are not used when supporting PAM + sed -i -f ${WORKDIR}/login_defs_pam.sed ${D}${sysconfdir}/login.defs + + # Enable CREATE_HOME by default. + sed -i 's/#CREATE_HOME/CREATE_HOME/g' ${D}${sysconfdir}/login.defs + + # As we are on an embedded system ensure the users mailbox is in ~/ not + # /var/spool/mail by default as who knows where or how big /var is. + # The system MDA will set this later anyway. + sed -i 's/MAIL_DIR/#MAIL_DIR/g' ${D}${sysconfdir}/login.defs + sed -i 's/#MAIL_FILE/MAIL_FILE/g' ${D}${sysconfdir}/login.defs +} diff --git a/recipes/shr/alsa-scenarii-shr_git.bb b/recipes/shr/alsa-scenarii-shr_git.bb index 97b84984b6..dff37cc083 100644 --- a/recipes/shr/alsa-scenarii-shr_git.bb +++ b/recipes/shr/alsa-scenarii-shr_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "Package for the different scenarios used by Openmoko" SECTION = "openmoko/base" -PV = "1.0+gitr${SRCPV}" +PV = "1.0+gitr${SRCREV}" PR = "r2" COMPATIBLE_MACHINE = "(om-gta01|om-gta02|om-3d7k)" diff --git a/recipes/shr/e-wm-config-illume-shr_git.bb b/recipes/shr/e-wm-config-illume-shr_git.bb index 36154cef8e..28474d4915 100644 --- a/recipes/shr/e-wm-config-illume-shr_git.bb +++ b/recipes/shr/e-wm-config-illume-shr_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "illume SHR config" SECTION = "e/utils" DEPENDS = "eet" LICENSE = "MIT BSD" -PV = "1.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "1.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r6" inherit e diff --git a/recipes/shr/e-wm-menu-shr_git.bb b/recipes/shr/e-wm-menu-shr_git.bb index 1deef919fd..b8b267b504 100644 --- a/recipes/shr/e-wm-menu-shr_git.bb +++ b/recipes/shr/e-wm-menu-shr_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "illume SHR applications.menu config" SECTION = "e/utils" LICENSE = "MIT BSD" -PV = "1.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "1.1-${EFL_SRCREV}+gitr${SRCREV}" RPROVIDES_${PN} = "e-wm-menu" RCONFLICTS_${PN} = "e-wm-menu" diff --git a/recipes/shr/e-wm-sysactions-shr_git.bb b/recipes/shr/e-wm-sysactions-shr_git.bb index 07508c9fbb..6c46ed8558 100644 --- a/recipes/shr/e-wm-sysactions-shr_git.bb +++ b/recipes/shr/e-wm-sysactions-shr_git.bb @@ -1,8 +1,8 @@ DESCRIPTION = "illume SHR sysactions config" SECTION = "e/utils" LICENSE = "MIT BSD" -PV = "1.1-${EFL_SRCREV}+gitr${SRCPV}" -PR = "r3" +PV = "1.1-${EFL_SRCREV}+gitr${SRCREV}" +PR = "r4" RPROVIDES_${PN} = "e-wm-sysactions" RCONFLICTS_${PN} = "e-wm-sysactions" @@ -18,4 +18,5 @@ do_install() { install -d ${D}${sysconfdir}/enlightenment/ install -m 0755 ${S}/sysactions.conf ${D}${sysconfdir}/enlightenment/sysactions.conf install -m 0755 ${S}/suspend.sh ${D}${sysconfdir}/enlightenment/suspend.sh + install -m 0755 ${S}/lock.sh ${D}${sysconfdir}/enlightenment/lock.sh } diff --git a/recipes/shr/e-wm-theme-illume-gry_git.bb b/recipes/shr/e-wm-theme-illume-gry_git.bb index e993cb6e37..35da5231f0 100644 --- a/recipes/shr/e-wm-theme-illume-gry_git.bb +++ b/recipes/shr/e-wm-theme-illume-gry_git.bb @@ -6,7 +6,7 @@ DEPENDS = "edje-native" RRECOMMENDS = "elementary-theme-gry" LICENCE = "unknown" -PV = "0.3-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.3-${EFL_SRCREV}+gitr${SRCREV}" PR = "r1" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/e-wm-theme-illume-neo_git.bb b/recipes/shr/e-wm-theme-illume-neo_git.bb index 10a5016758..ed6adf71c0 100644 --- a/recipes/shr/e-wm-theme-illume-neo_git.bb +++ b/recipes/shr/e-wm-theme-illume-neo_git.bb @@ -7,7 +7,7 @@ RDEPENDS = "e-wm" RRECOMMENDS = "elementary-theme-neo gtk-theme-neo libframeworkd-phonegui-efl-theme-neo etk-theme-neo gpe-theme-neo icon-theme-neo" LICENCE = "unknown" -PV = "0.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r1" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/e-wm-theme-illume-niebiee_git.bb b/recipes/shr/e-wm-theme-illume-niebiee_git.bb index 76aaf6d23b..9dfee0b293 100644 --- a/recipes/shr/e-wm-theme-illume-niebiee_git.bb +++ b/recipes/shr/e-wm-theme-illume-niebiee_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Extremely blue Illume theme - Niebiee" SECTION = "e/utils" DEPENDS = "edje-native" LICENSE = "MIT BSD" -PV = "0.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/e-wm-theme-illume-shr_git.bb b/recipes/shr/e-wm-theme-illume-shr_git.bb index af126dc92e..2c63be670b 100644 --- a/recipes/shr/e-wm-theme-illume-shr_git.bb +++ b/recipes/shr/e-wm-theme-illume-shr_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "illume SHR theme" SECTION = "e/utils" DEPENDS = "edje-native" LICENSE = "MIT BSD" -PV = "1.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "1.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r6" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/e-wm-theme-illume-sixteen_git.bb b/recipes/shr/e-wm-theme-illume-sixteen_git.bb index f164f0fc24..da8895d97f 100644 --- a/recipes/shr/e-wm-theme-illume-sixteen_git.bb +++ b/recipes/shr/e-wm-theme-illume-sixteen_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "illume SHR theme" SECTION = "e/utils" DEPENDS = "edje-native" LICENSE = "MIT BSD" -PV = "0.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/elementary-theme-gry_git.bb b/recipes/shr/elementary-theme-gry_git.bb index 2b1dfaab3c..655f377cab 100644 --- a/recipes/shr/elementary-theme-gry_git.bb +++ b/recipes/shr/elementary-theme-gry_git.bb @@ -6,7 +6,7 @@ DEPENDS = "edje-native" RRECOMMENDS = "e-wm-theme-illume-gry" LICENSE = "unknown" -PV = "0.8-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.8-${EFL_SRCREV}+gitr${SRCREV}" PR = "r1" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master \ diff --git a/recipes/shr/elementary-theme-neo_git.bb b/recipes/shr/elementary-theme-neo_git.bb index 4701c220c6..2c1f2f7831 100644 --- a/recipes/shr/elementary-theme-neo_git.bb +++ b/recipes/shr/elementary-theme-neo_git.bb @@ -6,7 +6,7 @@ DEPENDS = "edje-native" RRECOMMENDS = "e-wm-theme-illume-neo gtk-theme-neo libframeworkd-phonegui-efl-theme-neo etk-theme-neo gpe-theme-neo icon-theme-neo" LICENSE = "unknown" -PV = "0.2.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.2.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r3" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master \ diff --git a/recipes/shr/elementary-theme-niebiee_git.bb b/recipes/shr/elementary-theme-niebiee_git.bb index 1736ad9a7a..0c99635fc2 100644 --- a/recipes/shr/elementary-theme-niebiee_git.bb +++ b/recipes/shr/elementary-theme-niebiee_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Extremely blue elementary theme - Niebiee" SECTION = "e/utils" DEPENDS = "edje-native" LICENSE = "MIT BSD" -PV = "0.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/elementary-theme-sixteen_git.bb b/recipes/shr/elementary-theme-sixteen_git.bb index 4eb43af767..d1045e6498 100644 --- a/recipes/shr/elementary-theme-sixteen_git.bb +++ b/recipes/shr/elementary-theme-sixteen_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "elementary SHR theme" SECTION = "e/utils" DEPENDS = "edje-native" LICENSE = "MIT BSD" -PV = "0.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r2" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/etk-theme-neo_git.bb b/recipes/shr/etk-theme-neo_git.bb index 2c68bd29da..2279af0e04 100644 --- a/recipes/shr/etk-theme-neo_git.bb +++ b/recipes/shr/etk-theme-neo_git.bb @@ -4,7 +4,7 @@ AUTHOR = "Jesus McCloud <bernd.pruenster@gmail.com" RRECOMMENDS = "elementary-theme-neo e-wm-theme-illume-neo gtk-theme-neo libframeworkd-phonegui-efl-theme-neo gpe-theme-neo icon-theme-neo" LICENSE = "unknown" -PV = "0.2-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.2-${EFL_SRCREV}+gitr${SRCREV}" PR = "r2" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/etk-theme-shr_git.bb b/recipes/shr/etk-theme-shr_git.bb index 3a324e9728..e05fa56ee4 100644 --- a/recipes/shr/etk-theme-shr_git.bb +++ b/recipes/shr/etk-theme-shr_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "etk SHR theme" LICENSE = "MIT BSD" -PV = "1.1.1-${EFL_SRCREV}+gitr${SRCPV}" +PV = "1.1.1-${EFL_SRCREV}+gitr${SRCREV}" PR = "r2" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/frameworkd-config-shr_git.bb b/recipes/shr/frameworkd-config-shr_git.bb index c1d15b18c3..3be7ceb9ac 100644 --- a/recipes/shr/frameworkd-config-shr_git.bb +++ b/recipes/shr/frameworkd-config-shr_git.bb @@ -5,7 +5,7 @@ SECTION = "console/network" DEPENDS = "python-cython-native python-pyrex-native" LICENSE = "GPL" SRCREV_FORMAT = "FSO_REV-SHR_REV" -PV = "0.9.5.9+gitr${SRCPV}" +PV = "0.9.5.9+gitr${SRCREV}" PR = "r7" SRC_URI = "${FREESMARTPHONE_GIT}/framework.git;protocol=git;branch=master;name=FSO_REV \ diff --git a/recipes/shr/gtk-theme-neo_git.bb b/recipes/shr/gtk-theme-neo_git.bb index 66caabf1cc..6415b6a6ec 100644 --- a/recipes/shr/gtk-theme-neo_git.bb +++ b/recipes/shr/gtk-theme-neo_git.bb @@ -5,7 +5,7 @@ RDEPENDS += "icon-theme-neo" RRECOMMENDS = "elementary-theme-neo e-wm-theme-illume-neo libframeworkd-phonegui-efl-theme-neo etk-theme-neo gpe-theme-neo icon-theme-neo" LICENSE = "unknown" -PV = "0.2-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.2-${EFL_SRCREV}+gitr${SRCREV}" PR = "r3" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/icon-theme-neo_git.bb b/recipes/shr/icon-theme-neo_git.bb index 438ac238c9..1b6c8ae7e2 100644 --- a/recipes/shr/icon-theme-neo_git.bb +++ b/recipes/shr/icon-theme-neo_git.bb @@ -6,7 +6,7 @@ RDEPENDS = "e-wm" RRECOMMENDS = "elementary-theme-neo e-wm-theme-illume-neo gtk-theme-neo libframeworkd-phonegui-efl-theme-neo etk-theme-neo gpe-theme-neo" LICENSE = "unknown" -PV = "0.2-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.2-${EFL_SRCREV}+gitr${SRCREV}" PR = "r1" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/libframeworkd-phonegui-efl-theme-neo_git.bb b/recipes/shr/libframeworkd-phonegui-efl-theme-neo_git.bb index 7f7f6b4fe1..27dc47bac3 100644 --- a/recipes/shr/libframeworkd-phonegui-efl-theme-neo_git.bb +++ b/recipes/shr/libframeworkd-phonegui-efl-theme-neo_git.bb @@ -5,7 +5,7 @@ RDEPENDS = "libframeworkd-phonegui-efl" RRECOMMENDS = "elementary-theme-neo e-wm-theme-illume-neo gtk-theme-neo etk-theme-neo gpe-theme-neo icon-theme-neo" LICENSE = "unknown" -PV = "0.2-${EFL_SRCREV}+gitr${SRCPV}" +PV = "0.2-${EFL_SRCREV}+gitr${SRCREV}" PR = "r2" require libframeworkd-phonegui-efl-theme.inc diff --git a/recipes/shr/libframeworkd-phonegui-efl2_git.bb b/recipes/shr/libframeworkd-phonegui-efl2_git.bb index cb1feade68..207658f807 100644 --- a/recipes/shr/libframeworkd-phonegui-efl2_git.bb +++ b/recipes/shr/libframeworkd-phonegui-efl2_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "frameworkd EFL phonegui 2" SECTION = "e/apps" DEPENDS += " dbus-glib libframeworkd-glib libframeworkd-phonegui etk evas ecore edje edje-native elementary" -PV = "0.0.1+gitr${SRCPV}" +PV = "0.0.1+gitr${SRCREV}" PR = "r1" SRC_URI = "git://shr.bearstech.com/repo/libframeworkd-phonegui-efl2.git;protocol=http;branch=master" diff --git a/recipes/shr/libframeworkd-phonegui-efl_git.bb b/recipes/shr/libframeworkd-phonegui-efl_git.bb index c4181cf345..b24e152364 100644 --- a/recipes/shr/libframeworkd-phonegui-efl_git.bb +++ b/recipes/shr/libframeworkd-phonegui-efl_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "e/apps" DEPENDS += " dbus-glib libframeworkd-glib libframeworkd-phonegui etk evas ecore edje edje-native elementary" -PV = "0.0.3+gitr${SRCPV}" +PV = "0.0.3+gitr${SRCREV}" PR = "r35" require libframeworkd-phonegui-efl-theme.inc diff --git a/recipes/shr/libframeworkd-phonegui_git.bb b/recipes/shr/libframeworkd-phonegui_git.bb index aa1f107555..50b546512a 100644 --- a/recipes/shr/libframeworkd-phonegui_git.bb +++ b/recipes/shr/libframeworkd-phonegui_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Frameworkd phonegui library" HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "libs" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r10" DEPENDS="glib-2.0 dbus-glib libframeworkd-glib libphone-utils" diff --git a/recipes/shr/libmodulo_git.bb b/recipes/shr/libmodulo_git.bb index 029f928d53..2e05d7218f 100644 --- a/recipes/shr/libmodulo_git.bb +++ b/recipes/shr/libmodulo_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "Modulo is a lightweight component container that supports Inversion Of Control, also commonly called Dependency Injection" SECTION = "libs" -PV = "0.0.1+gitr${SRCPV}" +PV = "0.0.1+gitr${SRCREV}" PR = "r1" inherit autotools autotools_stage pkgconfig vala diff --git a/recipes/shr/libphone-ui-shr_git.bb b/recipes/shr/libphone-ui-shr_git.bb index 240c7f2046..a4519c7f1d 100644 --- a/recipes/shr/libphone-ui-shr_git.bb +++ b/recipes/shr/libphone-ui-shr_git.bb @@ -1,8 +1,8 @@ DESCRIPTION = "SHR default module for the Phone UI daemon" SECTION = "e/apps" DEPENDS += " dbus-glib libframeworkd-glib libphone-ui etk evas ecore edje edje-native elementary" -PV = "0.0.0+gitr${SRCPV}" -PR = "r2" +PV = "0.0.0+gitr${SRCREV}" +PR = "r3" SRC_URI = "git://shr.bearstech.com/repo/libphone-ui-shr.git;protocol=http;branch=master" S = "${WORKDIR}/git" @@ -16,5 +16,5 @@ do_configure_prepend() { autopoint --force } -FILES_${PN} += "${libdir}/phoneui/modules/*" -FILES_${PN}-dbg += "${libdir}/phoneui/modules/.debug"
\ No newline at end of file +FILES_${PN} += "${libdir}/phoneui/modules/shr.so" +FILES_${PN}-dbg += "${libdir}/phoneui/modules/.debug" diff --git a/recipes/shr/libphone-ui_git.bb b/recipes/shr/libphone-ui_git.bb index 84b04c5a60..41e159b57e 100644 --- a/recipes/shr/libphone-ui_git.bb +++ b/recipes/shr/libphone-ui_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "A generic framework for phone ui" HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "libs" -PV = "0.0.0+gitr${SRCPV}" +PV = "0.0.0+gitr${SRCREV}" PR = "r0" DEPENDS="glib-2.0 dbus-glib libframeworkd-glib libphone-utils alsa-lib" diff --git a/recipes/shr/libphone-utils_git.bb b/recipes/shr/libphone-utils_git.bb index e0a2e2c110..7cf26ffec1 100644 --- a/recipes/shr/libphone-utils_git.bb +++ b/recipes/shr/libphone-utils_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "phone-utils library" SECTION = "libs" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r2" DEPENDS="glib-2.0" diff --git a/recipes/shr/ologicd_git.bb b/recipes/shr/ologicd_git.bb index 105199a582..58b82dd0ff 100644 --- a/recipes/shr/ologicd_git.bb +++ b/recipes/shr/ologicd_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "" SECTION = "libs" -PV = "0.0.1+gitr${SRCPV}" +PV = "0.0.1+gitr${SRCREV}" PR = "r0" inherit autotools diff --git a/recipes/shr/phonefsod_git.bb b/recipes/shr/phonefsod_git.bb index bc443a11a5..3a29eebc99 100644 --- a/recipes/shr/phonefsod_git.bb +++ b/recipes/shr/phonefsod_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += " dbus-glib libframeworkd-glib sqlite3 shr-specs" -PV = "0.0.0+gitr${SRCPV}" +PV = "0.0.0+gitr${SRCREV}" PR = "r2" SRC_URI = "git://git.shr-project.org/repo/phonefsod.git;protocol=http;branch=master" diff --git a/recipes/shr/phoneui-apps_git.bb b/recipes/shr/phoneui-apps_git.bb index a1916df4a0..a6e3e17aee 100644 --- a/recipes/shr/phoneui-apps_git.bb +++ b/recipes/shr/phoneui-apps_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += "dbus-glib" -PV = "0.0.0+gitr${SRCPV}" +PV = "0.0.0+gitr${SRCREV}" PR = "r0" inherit pkgconfig autotools diff --git a/recipes/shr/phoneuid_git.bb b/recipes/shr/phoneuid_git.bb index f86646275c..01b2258b3c 100644 --- a/recipes/shr/phoneuid_git.bb +++ b/recipes/shr/phoneuid_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += " dbus-glib libframeworkd-glib libphone-ui sqlite3 shr-specs" -PV = "0.0.0+gitr${SRCPV}" +PV = "0.0.0+gitr${SRCREV}" PR = "r2" SRC_URI = "git://git.shr-project.org/repo/phoneuid.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-config_git.bb b/recipes/shr/shr-config_git.bb index cc8d685a27..60ed586179 100644 --- a/recipes/shr/shr-config_git.bb +++ b/recipes/shr/shr-config_git.bb @@ -4,7 +4,7 @@ AUTHOR = "Sebastian Spaeth (see AUTHORS)" LICENSE = "GPLv2" DEPENDS = "vala-native elementary libeflvala" SECTION = "x11/application" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r4" EXTRA_OECONF="--enable-vapidir=${STAGING_DATADIR}/vala/vapi" diff --git a/recipes/shr/shr-contacts_git.bb b/recipes/shr/shr-contacts_git.bb index 6cfb87f43b..1b9a383130 100644 --- a/recipes/shr/shr-contacts_git.bb +++ b/recipes/shr/shr-contacts_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += "dbus-glib libframeworkd-glib libframeworkd-phonegui" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r6" inherit pkgconfig autotools diff --git a/recipes/shr/shr-dialer_git.bb b/recipes/shr/shr-dialer_git.bb index f4813141e4..796b96592b 100644 --- a/recipes/shr/shr-dialer_git.bb +++ b/recipes/shr/shr-dialer_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += "dbus-glib libframeworkd-glib libframeworkd-phonegui" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r9" inherit pkgconfig autotools diff --git a/recipes/shr/shr-installer_git.bb b/recipes/shr/shr-installer_git.bb index 331c0f1e6a..ca5eb59b0f 100644 --- a/recipes/shr/shr-installer_git.bb +++ b/recipes/shr/shr-installer_git.bb @@ -5,7 +5,7 @@ LICENSE ?= "GPL" RDEPENDS = "python-elementary python-dbus python-core python-edbus packagekit" SECTION = "x11/application" -PV = "0.0.1+gitr${SRCPV}" +PV = "0.0.1+gitr${SRCREV}" PR = "r0" inherit setuptools diff --git a/recipes/shr/shr-messages_git.bb b/recipes/shr/shr-messages_git.bb index b821545fac..6fc0694c29 100644 --- a/recipes/shr/shr-messages_git.bb +++ b/recipes/shr/shr-messages_git.bb @@ -3,7 +3,7 @@ HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/applications" DEPENDS += "dbus-glib libframeworkd-glib libframeworkd-phonegui" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r8" inherit pkgconfig autotools diff --git a/recipes/shr/shr-settings_git.bb b/recipes/shr/shr-settings_git.bb index 747f6d7df5..7d34a7f487 100644 --- a/recipes/shr/shr-settings_git.bb +++ b/recipes/shr/shr-settings_git.bb @@ -5,7 +5,7 @@ LICENSE ?= "GPL" RDEPENDS = "python-elementary python-dbus python-codecs python-shell python-pyrtc python python-core python-edbus dbus-x11 frameworkd python-phoneutils" SECTION = "x11/application" PE = "1" -PV = "0.1.1+gitr${SRCPV}" +PV = "0.1.1+gitr${SRCREV}" PR = "r7" inherit setuptools diff --git a/recipes/shr/shr-specs_git.bb b/recipes/shr/shr-specs_git.bb index bc29ee5e27..0276ce81ce 100644 --- a/recipes/shr/shr-specs_git.bb +++ b/recipes/shr/shr-specs_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "The SHR DBus API Specification" HOMEPAGE = "http://shr-project.org/" LICENSE = "BSD" SECTION = "devel/specifications" -PV = "0.0.0+gitr${SRCPV}" +PV = "0.0.0+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-specs.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-dontpanic_git.bb b/recipes/shr/shr-splash-theme-dontpanic_git.bb index f80df61f67..9c653acdc4 100644 --- a/recipes/shr/shr-splash-theme-dontpanic_git.bb +++ b/recipes/shr/shr-splash-theme-dontpanic_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - DON'T PANIC theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "1.2+gitr${SRCPV}" +PV = "1.2+gitr${SRCREV}" PR = "r6" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-handy_git.bb b/recipes/shr/shr-splash-theme-handy_git.bb index 3890a7f383..94e2d18878 100644 --- a/recipes/shr/shr-splash-theme-handy_git.bb +++ b/recipes/shr/shr-splash-theme-handy_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - handy theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "1.2+gitr${SRCPV}" +PV = "1.2+gitr${SRCREV}" PR = "r3" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-logo_git.bb b/recipes/shr/shr-splash-theme-logo_git.bb index 09ea014e79..77ae8d7d25 100644 --- a/recipes/shr/shr-splash-theme-logo_git.bb +++ b/recipes/shr/shr-splash-theme-logo_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - SHR logo theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "0.1+gitr${SRCPV}" +PV = "0.1+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-niebiee_git.bb b/recipes/shr/shr-splash-theme-niebiee_git.bb index e16cfa3fb4..dfc8524ceb 100644 --- a/recipes/shr/shr-splash-theme-niebiee_git.bb +++ b/recipes/shr/shr-splash-theme-niebiee_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - extremely blue Niebiee theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "1.2+gitr${SRCPV}" +PV = "1.2+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-simple_git.bb b/recipes/shr/shr-splash-theme-simple_git.bb index 97ef436e6c..f132c1d7aa 100644 --- a/recipes/shr/shr-splash-theme-simple_git.bb +++ b/recipes/shr/shr-splash-theme-simple_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - simple SHR theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "1.2+gitr${SRCPV}" +PV = "1.2+gitr${SRCREV}" PR = "r6" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash-theme-tux_git.bb b/recipes/shr/shr-splash-theme-tux_git.bb index 743dacd2b4..6f846461b3 100644 --- a/recipes/shr/shr-splash-theme-tux_git.bb +++ b/recipes/shr/shr-splash-theme-tux_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen - SHR Tux theme" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "0.1+gitr${SRCPV}" +PV = "0.1+gitr${SRCREV}" PR = "r0" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-splash_git.bb b/recipes/shr/shr-splash_git.bb index 9bf4ca12df..5053befbf8 100644 --- a/recipes/shr/shr-splash_git.bb +++ b/recipes/shr/shr-splash_git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "SHR splash screen" SECTION = "x11/data" LICENSE = "MIT BSD" -PV = "1.2+gitr${SRCPV}" +PV = "1.2+gitr${SRCREV}" PR = "r4" RRECOMMENDS_${PN} += "\ virtual/shr-splash-theme" diff --git a/recipes/shr/shr-theme-gtk-e17lookalike_git.bb b/recipes/shr/shr-theme-gtk-e17lookalike_git.bb index 04ab37dc63..9a8c8e2d49 100644 --- a/recipes/shr/shr-theme-gtk-e17lookalike_git.bb +++ b/recipes/shr/shr-theme-gtk-e17lookalike_git.bb @@ -1,6 +1,6 @@ DESCRIPTION = "A gtk theme that looks like e17" LICENSE = "MIT BSD" -PV = "0.1.1+gitr${SRCPV}" +PV = "0.1.1+gitr${SRCREV}" PR = "r5" SRC_URI = "git://git.shr-project.org/repo/shr-themes.git;protocol=http;branch=master" diff --git a/recipes/shr/shr-theme_git.bb b/recipes/shr/shr-theme_git.bb index 704072f8af..54803107a4 100644 --- a/recipes/shr/shr-theme_git.bb +++ b/recipes/shr/shr-theme_git.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Standard icon theme for the SHR distribution" HOMEPAGE = "http://shr-project.org/" LICENSE = "GPL" SECTION = "x11/data" -PV = "0.0.2+gitr${SRCPV}" +PV = "0.0.2+gitr${SRCREV}" PR = "r2" inherit autotools diff --git a/recipes/shr/shr-today_git.bb b/recipes/shr/shr-today_git.bb index 65bea25739..64393068a7 100644 --- a/recipes/shr/shr-today_git.bb +++ b/recipes/shr/shr-today_git.bb @@ -5,7 +5,7 @@ LICENSE ?= "GPL" RDEPENDS = "python-edje python-dbus python-edbus python-ecore" SECTION = "x11/applications" -PV = "0.0.1+gitr${SRCPV}" +PV = "0.0.1+gitr${SRCREV}" PR = "r2" inherit distutils diff --git a/recipes/sms-sentry/sms-sentry.bb b/recipes/sms-sentry/sms-sentry.bb new file mode 100644 index 0000000000..be6c22c831 --- /dev/null +++ b/recipes/sms-sentry/sms-sentry.bb @@ -0,0 +1,34 @@ +DESCRIPTION = "An SMS monitor to locate a Neo Freerunner" +SECTION = "console/network" +PRIORITY = "optional" +LICENSE = "GPL" +DEPENDS = "python" + +PR = "r1" + +SRC_URI = "http://www.handheldshell.com/software/fso/sms-sentry_1.01.tgz" + +inherit autotools update-rc.d + +INITSCRIPT_NAME = "sms-sentry.sh" +INITSCRIPT_PARAMS = "defaults 35" + +S = ${WORKDIR}/sms-sentry_1.01 + +do_install() { + install -d ${D}/${sysconfdir}/init.d + install -d ${D}/${sysconfdir}/default + install -d ${D}/usr/bin + install -m 0755 ${S}/sms-sentry.sh ${D}/${sysconfdir}/init.d/ + install -m 0755 ${S}/sms-sentry ${D}/usr/bin/ + install -m 0644 ${S}/sms-sentry.default ${D}/${sysconfdir}/default/sms-sentry.default +} + +do_configure() { + exit 0 +} + +do_compile() { + exit 0 +} + diff --git a/recipes/squashfs-tools/squashfs-tools-native_4.0.bb b/recipes/squashfs-tools/squashfs-tools-native_4.0.bb index 8fc80a64f1..cc01604460 100644 --- a/recipes/squashfs-tools/squashfs-tools-native_4.0.bb +++ b/recipes/squashfs-tools/squashfs-tools-native_4.0.bb @@ -1,13 +1,12 @@ -require squashfs-tools_${PV}.bb +require squashfs-tools_4.0.bb inherit native -DEPENDS = "zlib-native lzma-native " - -PR = "${INC_PR}.1" +DEPENDS = "zlib-native" PACKAGES = "" do_stage () { install -m 0755 mksquashfs ${STAGING_BINDIR}/ } + diff --git a/recipes/squashfs-tools/squashfs-tools.inc b/recipes/squashfs-tools/squashfs-tools.inc index d06e1e52ec..fb5a648545 100644 --- a/recipes/squashfs-tools/squashfs-tools.inc +++ b/recipes/squashfs-tools/squashfs-tools.inc @@ -2,14 +2,14 @@ DESCRIPTION = "Squashfs is a highly compressed read-only filesystem for Linux." SECTION = "base" LICENSE = "GPLv2" DEPENDS = "zlib" -INC_PR = "r1" +INC_PR = "r3" S = "${WORKDIR}/squashfs${@bb.data.getVar('PV',d,1).replace('r','-r')}/squashfs-tools" # required to share same place with -lzma specific packages FILESPATHPKG = "squashfs-tools-${PV}:squashfs-tools:files" -SRC_URI = "${SOURCEFORGE_MIRROR}/squashfs/squashfs${@bb.data.getVar('PV',d,1).replace('r','-r')}.tar.gz" +SRC_URI ?= "${SOURCEFORGE_MIRROR}/squashfs/squashfs${@bb.data.getVar('PV',d,1).replace('r','-r')}.tar.gz" prefix = "" diff --git a/recipes/squashfs-tools/squashfs-tools_4.0.bb b/recipes/squashfs-tools/squashfs-tools_4.0.bb index 17ab6dc61b..886c095883 100644 --- a/recipes/squashfs-tools/squashfs-tools_4.0.bb +++ b/recipes/squashfs-tools/squashfs-tools_4.0.bb @@ -1,14 +1,16 @@ -require squashfs-tools.inc -DEPENDS += "lzma" -PR = "${INC_PR}.1" +# This override is required since this has not yet been released +SRC_URI = "cvs://anonymous@squashfs.cvs.sourceforge.net/cvsroot/squashfs;module=squashfs;date=${SRCDATE} \ + http://downloads.sourceforge.net/sevenzip/lzma465.tar.bz2" -EXTRA_OEMAKE = "USE_LZMA=1 \ - LZMA_CFLAGS='-I${STAGING_INCDIR}/lzma -DUSE_LZMA' \ - LZMA_LIB='${STAGING_LIBDIR}/liblzma.a'" +require squashfs-tools.inc +PR = "${INC_PR}.2" -DEFAULT_PREFERENCE = "-1" -DEFAULT_PREFERENCE_angstrom = "1" +S = "${WORKDIR}/squashfs/squashfs-tools" -SRC_URI += " file://portability.patch;patch=1;pnum=2 \ - file://lzma-support.patch;patch=1;pnum=2" +EXTRA_OEMAKE += "LZMA_SUPPORT=1 LZMA_DIR=../.." +TARGET_CC_ARCH += "${LDFLAGS}" +# the COMP_DEFAULT macro should result in a string including quotes: "gzip" +COMP_DEFAULT = gzip +CFLAGS_append = ' -I. -I../../C -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE \ + -D_GNU_SOURCE -DLZMA_SUPPORT -DCOMP_DEFAULT=\\"${COMP_DEFAULT}\\" ' diff --git a/recipes/sudo/files/sudo.pamd b/recipes/sudo/files/sudo.pamd new file mode 100644 index 0000000000..c22c794c21 --- /dev/null +++ b/recipes/sudo/files/sudo.pamd @@ -0,0 +1,7 @@ +#%PAM-1.0 + +auth include common-auth +account include common-account + +session required pam_permit.so +session required pam_limits.so diff --git a/recipes/sudo/sudo-enable-wheel-group.bb b/recipes/sudo/sudo-enable-wheel-group.bb new file mode 100644 index 0000000000..b281ddb09d --- /dev/null +++ b/recipes/sudo/sudo-enable-wheel-group.bb @@ -0,0 +1,20 @@ +PR = "r0" + +RDEPENDS = "sudo" + +ALLOW_EMPTY_${PN} = "1" +PACKAGE_ARCH = "all" + +# Edit sudoers to allow the use of the wheel group and non root users to mount/shutdown etc. +# Please consider this when using. + +pkg_postinst() { +#!/bin/sh +mkdir -p $D${sysconfdir}/ +touch $D${sysconfdir}/sudoers +sed -i /# %wheel/d $D${sysconfdir}/sudoers +echo '%wheel ALL=(ALL) ALL' >> $D${sysconfdir}/sudoers +sed -i /# %users/d $D${sysconfdir}/sudoers +echo '%users ALL=/sbin/mount /cdrom,/sbin/umount /cdrom' >> $D${sysconfdir}/sudoers +echo '%users localhost=/sbin/shutdown -h now' >> $D${sysconfdir}/sudoers +} diff --git a/recipes/sudo/sudo.inc b/recipes/sudo/sudo.inc index 0dfb22ba8a..2bb0d72836 100644 --- a/recipes/sudo/sudo.inc +++ b/recipes/sudo/sudo.inc @@ -3,19 +3,30 @@ administrator to give certain users (or groups of \ users) the ability to run some (or all) commands \ as root while logging all commands and arguments." LICENSE = "sudo" -HOMEPAGE = "http://www.courtesan.com/sudo/" +HOMEPAGE = "http://www.sudo.ws/" PRIORITY = "optional" SECTION = "admin" inherit autotools -EXTRA_OECONF = "--with-editor=/bin/vi --with-env-editor" +EXTRA_OECONF += "--with-editor=/bin/vi --with-env-editor --with-all-insults " do_configure_prepend () { - rm -f acsite.m4 - if [ ! -e acinclude.m4 ]; then - cat aclocal.m4 > acinclude.m4 - fi + # Make sure the build does not get clever. + export sudo_cv_uid_t_len=10 + export sudo_cv_func_unsetenv_void=no + + # Prevent binaries from being stripped. + sed -i 's/\($(INSTALL).*\) -s \(.*[(sudo|visudo)]\)/\1 \2/g' Makefile.in + + rm -f acsite.m4 + if [ ! -e acinclude.m4 ]; then + cat aclocal.m4 > acinclude.m4 + fi +} + +do_configure() { + oe_runconf } pkg_postinst() { diff --git a/recipes/sudo/sudo_1.7.2p1.bb b/recipes/sudo/sudo_1.7.2p1.bb new file mode 100644 index 0000000000..bfa8afe650 --- /dev/null +++ b/recipes/sudo/sudo_1.7.2p1.bb @@ -0,0 +1,19 @@ +PR = "r3" + +DEPENDS = "libpam" +RDEPENDS = "libpam libpam-meta" + +SRC_URI = "http://ftp.sudo.ws/sudo/dist/sudo-${PV}.tar.gz \ + file://sudo.pamd \ +" + +EXTRA_OECONF += " --with-pam " + +require sudo.inc + +# Do in the recipe not the common inc as not all SUDO recipes want PAM support. + +do_install_append() { + install -d ${D}${sysconfdir}/pam.d/ + install -m 0644 ${WORKDIR}/sudo.pamd ${D}${sysconfdir}/pam.d/sudo +} diff --git a/recipes/tangogps/tangogps.inc b/recipes/tangogps/tangogps.inc index 677000fb45..9897461e0e 100644 --- a/recipes/tangogps/tangogps.inc +++ b/recipes/tangogps/tangogps.inc @@ -12,4 +12,4 @@ S = "${WORKDIR}/tangogps-${PV}" inherit autotools pkgconfig RRECOMMENDS = "gpsd" - +RRECOMMENDS_shr = "fso-gpsd" diff --git a/recipes/tangogps/tangogps_0.99.1.bb b/recipes/tangogps/tangogps_0.99.1.bb new file mode 100644 index 0000000000..18f6acaa1b --- /dev/null +++ b/recipes/tangogps/tangogps_0.99.1.bb @@ -0,0 +1,2 @@ +require tangogps.inc +PR = "r0" diff --git a/recipes/tasks/task-boot.bb b/recipes/tasks/task-boot.bb index 1a1b9f25c8..0ce9ee4415 100644 --- a/recipes/tasks/task-boot.bb +++ b/recipes/tasks/task-boot.bb @@ -1,5 +1,5 @@ DESCRIPTION = "Basic task to get a device booting" -PR = "r49" +PR = "r50" inherit task @@ -20,7 +20,6 @@ DEPENDS = "virtual/kernel" # minimal set of packages - needed to boot # RDEPENDS_task-boot = "\ - kernel \ base-files \ base-passwd \ busybox \ @@ -32,5 +31,6 @@ RDEPENDS_task-boot = "\ " RRECOMMENDS_task-boot = "\ + kernel \ ${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS} \ " diff --git a/recipes/tasks/task-fso-compliance.bb b/recipes/tasks/task-fso-compliance.bb index 62193ff817..e1776a8618 100644 --- a/recipes/tasks/task-fso-compliance.bb +++ b/recipes/tasks/task-fso-compliance.bb @@ -2,7 +2,7 @@ DESCRIPTION = "The freesmartphone.org framework -- install this task to make you SECTION = "fso/base" LICENSE = "MIT" PV = "1.0" -PR = "r7" +PR = "r8" inherit task @@ -11,16 +11,16 @@ RDEPENDS_${PN} = "\ frameworkd \ # fso-apmd \ fso-gpsd \ - fso-monitord \ +# fso-monitord \ connman \ connman-scripts \ - connman-plugin-bluetooth \ +# connman-plugin-bluetooth \ # connman-plugin-dhclient \ # connman-plugin-dnsproxy \ # connman-plugin-ethernet \ # connman-plugin-fake \ - connman-plugin-loopback \ - connman-plugin-pppd \ +# connman-plugin-loopback \ +# connman-plugin-pppd \ # connman-plugin-resolvconf \ connman-plugin-udhcp \ connman-plugin-wifi \ diff --git a/recipes/tasks/task-fso2-compliance.bb b/recipes/tasks/task-fso2-compliance.bb index 0ab234dc5d..063088d4e8 100644 --- a/recipes/tasks/task-fso2-compliance.bb +++ b/recipes/tasks/task-fso2-compliance.bb @@ -3,12 +3,14 @@ Install this task to make your distribution FSO 2.0-compliant." SECTION = "fso/base" LICENSE = "MIT" PV = "1.9.0" -PR = "r1" +PR = "r3" inherit task RDEPENDS_${PN} = "\ dbus-hlid \ +# TODO: remove when fso2 is finished + frameworkd \ \ libfsobasics \ libfsotransport \ @@ -16,9 +18,9 @@ RDEPENDS_${PN} = "\ libfsoresource \ \ fsodeviced \ - fsogsmd \ +# fsogsmd \ fsonetworkd \ - fsotimed \ +# fsotimed \ fsousaged \ \ fso-alsa-data \ @@ -43,9 +45,10 @@ RDEPENDS_${PN} = "\ RRECOMMENDS_${PN} = "\ fso-abyss \ wmiconfig \ - \ -# tzdata \ -# tzdata-americas \ -# tzdata-asia \ -# tzdata-europe \ + tzdata \ + tzdata-africa \ + tzdata-americas \ + tzdata-asia \ + tzdata-australia \ + tzdata-europe \ " diff --git a/recipes/tasks/task-shr-feed.bb b/recipes/tasks/task-shr-feed.bb new file mode 100644 index 0000000000..f1be6ba000 --- /dev/null +++ b/recipes/tasks/task-shr-feed.bb @@ -0,0 +1,249 @@ +DESCRIPTION = "SHR Feed" +PR = "r25" +PV = "1.0" +LICENSE = "GPL" + +inherit task + +RDEPENDS_${PN} += "\ + python-elementary \ + openmoko-agpsui \ + mc \ + mplayer \ + x11vnc \ + omview \ + openvpn \ + navit \ + pythm \ + fbreader \ + omoney \ + enotes \ + epdfview \ + pyphonelog \ + pingus \ + openmoocow \ + dosbox \ + vagalume \ + python-pygame \ + mokoko \ + exhibit \ + edje-viewer \ +# obexpush \ +# obexftp \ + mtpaint \ + telepathy-python \ + intone-video \ + ipkg-link \ + ipkg-utils \ + mysql \ + gpe-calendar \ + gpe-todo \ + gpe-scap \ + gpe-sketchbook \ + gpe-filemanager \ + gpe-gallery \ + gpe-timesheet \ + gpe-contacts \ + fltk-chess \ + remoko \ +# shr-config \ + shr-today \ + shr-theme-neo \ + shr-theme-niebiee \ + shr-theme-sixteen \ +# gry should be in image already +# shr-theme-gry \ + shr-splash \ + shr-splash-theme-simple \ + shr-splash-theme-dontpanic \ + shr-splash-theme-handy \ + openbmap-logger \ + pisi \ + ffalarms \ + libnotify \ + accelges \ + ebrainy \ + sms-sentry \ + cellhunter \ + dillo2 \ + usbmode \ + pyefl-sudoku \ + tasks \ + dates \ + omnewrotate \ + xchat \ + python-pyid3lib \ +# libframeworkd-phonegui-efl2 \ + intone \ + vim \ + vpnc \ + emacs \ + mcabber \ + gdb \ + oh-puzzles \ + links-x11 \ + e-wm-illume-dict-pl \ + callrec \ + dictator \ + midori \ + numptyphysics \ + pidgin \ + libpurple-protocol-msn \ + libpurple-protocol-icq \ + vagalume \ + ppp \ +# bluez-hcidump \ + kbdd \ + kexec-tools \ + claws-mail \ + claws-plugin-mailmbox \ +# claws-plugin-gtkhtml2-viewer \ + claws-plugin-rssyl \ + mc \ + iotop \ + xprop \ + xev \ + xwininfo \ + tcpdump \ + lsof \ + zsh \ + gzip \ + zip \ + microcom \ + minicom \ + leafpad \ + abiword \ + aspell \ + enchant \ + joe \ + nano \ + ntpclient \ + ntp \ + tor \ + vnc \ +# gpsdrive \ + wxwidgets \ + x11vnc \ + xf86-video-glamo \ +# libswt3.4-gtk-java \ + cacao \ +# jamvm \ + dbus-x11 \ +# bluez-utils-alsa \ + xournal \ +# evince \ +# asterisk \ + git \ + ruby \ + orrery \ + synergy \ + irssi \ + zhone \ + paroli \ + cu \ + net-tools \ + iproute2 \ + iputils \ + i2c-tools \ + psmisc \ + debianutils \ + tcptraceroute \ + task-proper-tools \ + wmiconfig \ + netkit-telnet \ + bind-utils \ + bubble-keyboard \ + intuition \ + gridpad \ +# essential-dialer \ + font-adobe-100dpi \ + font-adobe-75dpi \ + font-adobe-utopia-100dpi \ + font-adobe-utopia-75dpi \ +# font-adobe-utopia-type1 \ + font-arabic-misc \ + font-bh-100dpi \ + font-bh-75dpi \ + font-bh-lucidatypewriter-100dpi \ + font-bh-lucidatypewriter-75dpi \ +# font-bh-ttf \ +# font-bh-type1 \ + font-bitstream-100dpi \ + font-bitstream-75dpi \ + font-bitstream-speedo \ +# font-bitstream-type1 \ + font-cronyx-cyrillic \ + font-cursor-misc \ + font-daewoo-misc \ + font-dec-misc \ +# font-ibm-type1 \ + font-isas-misc \ + font-jis-misc \ + font-micro-misc \ + font-misc-cyrillic \ +# font-misc-ethiopic \ +# font-misc-meltho \ + font-misc-misc \ + font-mutt-misc \ + font-schumacher-misc \ + font-screen-cyrillic \ + font-sony-misc \ + font-sun-misc \ + font-winitzki-cyrillic \ +# font-xfree86-type1 \ +# msn-pecan \ + erminig \ + qwo \ + fso-apm \ + fso-abyss \ + fsousaged \ + fsodeviced \ + fsonetworkd \ + fsotimed \ + opimd-utils \ + omgps \ + shr-launcher \ + e-tasks \ + elmdentica \ + shr-installer \ + eject \ + illume-keyboard-german \ + illume-keyboard-arabic \ + illume-keyboard-browse \ + illume-keyboard-danish \ + illume-keyboard-default-alt \ + illume-keyboard-dutch \ + illume-keyboard-dvorak \ + illume-keyboard-french \ + illume-keyboard-hebrew \ + illume-keyboard-numeric-alt \ + illume-keyboard-russian-terminal \ + illume-keyboard-russian \ + python-xlib \ + xcompmgr \ + man \ + man-pages \ + aceofpenguins-launcher \ + om-neon \ + ipython \ + phoneme-advanced-foundation \ + eve \ +# python-pybluez \ + x11perf \ + pyring \ + bt-configure \ + bt-gps \ + advancedcaching \ + glamo-dri-tests \ + reiserfsprogs \ + blipomoko \ + imagemagick \ + xboard \ + sox \ + mpg123 \ + zile \ + speex \ + fltkclock \ + fltkhackdiet \ + fltkwwpointcal \ +" diff --git a/recipes/tasks/task-shr-minimal.bb b/recipes/tasks/task-shr-minimal.bb new file mode 100644 index 0000000000..c2eb32ad00 --- /dev/null +++ b/recipes/tasks/task-shr-minimal.bb @@ -0,0 +1,150 @@ +DESCRIPTION = "SHR Lite Image Feed" +PR = "r16" +PV = "2.0" +LICENSE = "GPL" + +inherit task + +def get_rdepends(bb, d): + enabled = bb.data.getVar("ENABLE_BINARY_LOCALE_GENERATION", d, 1) + + # If locale is disabled, bail out + if not enabled: + return + + locales = bb.data.getVar("GLIBC_GENERATE_LOCALES", d, 1) + if not locales or locales == "all": + locales = bb.data.getVar("IMAGE_LINGUAS", d, 1); + + libc = bb.data.getVar('LIBC', d, 1) + import re + + rdepends = "" + if not locales or locales == "all": + # if locales aren't specified, or user has written "all" + import os + ipkdir = bb.data.getVar('DEPLOY_DIR_IPK', d, 1) + + regexp1 = re.compile(libc+"-binary-localedata-.*") # search pattern + regexp2 = re.compile("_.*") # we want to remove all version info and file extension + + for root, subFolders, files in os.walk(ipkdir): + for file in files: + if regexp1.search(file): + file = regexp2.sub("", file) + rdepends = "%s %s" % (rdepends, file) + + else: + # if locales are specified + regexp1 = re.compile("\\..*") # We want to turn en_US.UTF-8 into en_US + regexp2 = re.compile("_") # We want to turn en_US into en-US + + + for locale in locales.split(" "): + locale = regexp1.sub("", locale) + locale = regexp2.sub("-", locale) + locale = str.lower(locale) + rdepends = "%s %s-binary-localedata-%s" % (rdepends, libc, locale) + return rdepends + + + + +PACKAGES += "\ + ${PN}-base \ + ${PN}-cli \ + ${PN}-fso \ + ${PN}-audio \ + ${PN}-x \ + ${PN}-apps \ + ${PN}-gtk \ +" + + + +RDEPENDS_${PN}-base = "\ + netbase \ + sysfsutils \ + modutils-initscripts \ + module-init-tools-depmod \ + rsync \ + screen \ + fbset \ + fbset-modes \ + openssh-sftp-server \ + cron \ + logrotate\ + util-linux-ng-fdisk \ + shr-splash \ +" + +RDEPENDS_${PN}-cli = "\ + screen \ + nano \ + iptables \ + mtd-utils \ + s3c24xx-gpio \ + mickeydbus \ + mickeyterm \ +" + +RDEPENDS_${PN}-fso = "\ + fsoraw \ + opimd-utils-cli \ + python-codecs \ + python-gst \ +" + + +#FIXME: libcanberra-alsa should be pulled in by fsodeviced but isn't +RDEPENDS_${PN}-audio = "\ + alsa-utils-aplay \ + alsa-utils-amixer \ + libcanberra-alsa \ +" + +RDEPENDS_${PN}-audio_append_om-gta01 = "\ + alsa-scenarii-shr \ +" + +RDEPENDS_${PN}-audio_append_om-gta02 = "\ + alsa-scenarii-shr \ +" + +RDEPENDS_${PN}-x = "\ + glibc-utils \ + glibc-charmap-utf-8 \ + shr-theme-gry \ + etk-theme-shr \ + ${@get_rdepends(bb, d)} \ + libx11-locale \ + libmokoui2 \ + xcursor-transparent-theme \ +" + +RDEPENDS_${PN}-apps = "\ + fso-abyss \ + phoneui-apps-messages \ + phoneui-apps-contacts \ + phoneui-apps-dialer \ + phonefsod \ + phoneuid \ + libphone-ui \ + libphone-ui-shr \ + ffalarms \ + shr-settings \ + shr-theme \ + shr-today \ + calc \ +" + + +RDEPENDS_${PN}-gtk = "\ + openmoko-icon-theme-standard2 \ + shr-theme-gtk-e17lookalike \ + vala-terminal \ + tangogps \ + pyphonelog \ + matchbox-keyboard-im \ +" + diff --git a/recipes/tasks/task-shr.bb b/recipes/tasks/task-shr.bb new file mode 100644 index 0000000000..25e1b170c3 --- /dev/null +++ b/recipes/tasks/task-shr.bb @@ -0,0 +1,35 @@ +DESCRIPTION = "SHR Fat Image Feed" +PR = "r3" +PV = "2.0" +LICENSE = "GPL" + +inherit task + +PACKAGES = "\ + ${PN}-gtk \ + ${PN}-apps \ + ${PN}-games \ +" + +RDEPENDS_${PN}-gtk = "\ + gpe-scap \ + pidgin \ + libpurple-protocol-msn \ + libpurple-protocol-icq \ + vagalume \ + gpe-sketchbook \ +" + +RDEPENDS_${PN}-apps += "\ + task-shr-minimal-apps \ + opimd-utils-notes \ + mokonnect \ + midori \ + intone \ +" + +RDEPENDS_${PN}-games += "\ + mokomaze \ + numptyphysics \ +" + diff --git a/recipes/tasks/task-x11-illume.bb b/recipes/tasks/task-x11-illume.bb index 8b813b4ebb..9af914f3e0 100644 --- a/recipes/tasks/task-x11-illume.bb +++ b/recipes/tasks/task-x11-illume.bb @@ -10,6 +10,7 @@ inherit task # Default illume theme ILLUME_THEME ?= "e-wm-theme-illume" +ILLUME_CONFIG ?= "e-wm-config-illume" RDEPENDS_${PN} = "\ task-x11-server \ @@ -17,6 +18,6 @@ RDEPENDS_${PN} = "\ # xserver-kdrive-splash-illume \ \ e-wm \ - e-wm-config-illume \ + ${ILLUME_CONFIG} \ ${ILLUME_THEME} \ " diff --git a/recipes/tslib/tslib/sgh-i900/tslib.sh b/recipes/tslib/tslib/sgh-i900/tslib.sh new file mode 100644 index 0000000000..040f4de3d5 --- /dev/null +++ b/recipes/tslib/tslib/sgh-i900/tslib.sh @@ -0,0 +1,5 @@ +#!/bin/sh + +TSLIB_TSDEVICE=/dev/input/event1 + +export TSLIB_TSDEVICE diff --git a/recipes/tzdata/tzdata.inc b/recipes/tzdata/tzdata.inc index 71de930761..cfc5d2f8e8 100644 --- a/recipes/tzdata/tzdata.inc +++ b/recipes/tzdata/tzdata.inc @@ -3,7 +3,7 @@ SECTION = "base" PRIORITY = "optional" DEPENDS = "tzcode-native" -INC_PR = "r4" +INC_PR = "r5" DEFAULT_TIMEZONE ?= "Europe/London" @@ -28,9 +28,9 @@ do_compile () { for zone in ${TZONES}; do \ ${STAGING_BINDIR_NATIVE}/zic -d ${WORKDIR}/build${datadir}/zoneinfo -L /dev/null \ -y ${S}/yearistype.sh ${S}/${zone} ; \ - ${STAGING_BINDIR_NATIVE}/zic -d ${WORKDIR}}/build${datadir}/zoneinfo/posix -L /dev/null \ + ${STAGING_BINDIR_NATIVE}/zic -d ${WORKDIR}/build${datadir}/zoneinfo/posix -L /dev/null \ -y ${S}/yearistype.sh ${S}/${zone} ; \ - ${STAGING_BINDIR_NATIVE}/zic -d ${WORKDIR}}/build${datadir}/zoneinfo/right -L ${S}/leapseconds \ + ${STAGING_BINDIR_NATIVE}/zic -d ${WORKDIR}/build${datadir}/zoneinfo/right -L ${S}/leapseconds \ -y ${S}/yearistype.sh ${S}/${zone} ; \ done } @@ -38,6 +38,11 @@ do_compile () { do_install () { install -d ${D}${prefix} ${D}${datadir}/zoneinfo cp -pPR ${WORKDIR}/build${prefix}/* ${D}${prefix} + # Only eglibc is removing zoneinfo files from package + if [ "${LIBC}"x == "eglibc"x ] ; then + cp -pP "${WORKDIR}/zone.tab" ${D}${datadir}/zoneinfo + cp -pP "${WORKDIR}/iso3166.tab" ${D}${datadir}/zoneinfo + fi # Install a sane default for timezones install -d ${D}${sysconfdir} @@ -168,5 +173,7 @@ FILES_${PN} += "${datadir}/zoneinfo/Pacific/Honolulu \ ${datadir}/zoneinfo/WET \ ${datadir}/zoneinfo/Zulu \ ${datadir}/zoneinfo/Etc/* \ + ${datadir}/zoneinfo/iso3166.tab \ + ${datadir}/zoneinfo/zone.tab \ ${sysconfdir}/localtime \ ${sysconfdir}/timezone " diff --git a/recipes/tzdata/tzdata_2009s.bb b/recipes/tzdata/tzdata_2009s.bb new file mode 100644 index 0000000000..17c2dd4f0c --- /dev/null +++ b/recipes/tzdata/tzdata_2009s.bb @@ -0,0 +1,3 @@ +require tzdata.inc +SRC_URI = "ftp://elsie.nci.nih.gov/pub/tzdata${PV}.tar.gz" +PR = "${INC_PR}.0" diff --git a/recipes/u-boot/u-boot-2009.03/hipox/00-hipox.patch b/recipes/u-boot/u-boot-2009.03/hipox/00-hipox.patch index 1433e90193..5b91d28da3 100644 --- a/recipes/u-boot/u-boot-2009.03/hipox/00-hipox.patch +++ b/recipes/u-boot/u-boot-2009.03/hipox/00-hipox.patch @@ -6348,7 +6348,7 @@ diff -Nurd u-boot-2009.03.orig/include/configs/hipox.h u-boot-2009.03/include/co + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG -+#define CONFIG_CMD_PING ++//#define CONFIG_CMD_PING + +/** + * Architecture @@ -6675,12 +6675,12 @@ diff -Nurd u-boot-2009.03.orig/include/configs/hipox.h u-boot-2009.03/include/co +#define MTDIDS_DEFAULT "nand0=MT29FXX" +#define MTDPARTS_DEFAULT "mtdparts=MT29FXX:" \ + "32m(boot)," \ -+ "224m(system)" ++ "480m(system)" + -+#define NUM_FLASH_MAIN_BLOCKS 63 /* For Intel 28F320B3T */ -+#define NUM_FLASH_PARAM_BLOCKS 8 /* For Intel 28F320B3T */ -+#define FLASH_MAIN_BLOCK_SIZE (64*1024) /* For Intel 28F320B3T family */ -+#define FLASH_PARAM_BLOCK_SIZE (8*1024) /* For Intel 28F320B3T family */ ++#define NUM_FLASH_MAIN_BLOCKS 31 /* For Atmel AT49BV163D */ ++#define NUM_FLASH_PARAM_BLOCKS 8 /* For Atmel AT49BV163D */ ++#define FLASH_MAIN_BLOCK_SIZE (64*1024) ++#define FLASH_PARAM_BLOCK_SIZE (8*1024) + +/* Assuming counts main blocks and parameter blocks, as the Intel/AMD detection */ +/* I'm intending to copy would seem to indicate */ diff --git a/recipes/u-boot/u-boot-2009.03/hipox/02-hipox-enable-mmu.patch b/recipes/u-boot/u-boot-2009.03/hipox/02-hipox-enable-mmu.patch index b7ddf27d27..e256c17fea 100644 --- a/recipes/u-boot/u-boot-2009.03/hipox/02-hipox-enable-mmu.patch +++ b/recipes/u-boot/u-boot-2009.03/hipox/02-hipox-enable-mmu.patch @@ -274,7 +274,7 @@ diff -Nurd u-boot-2009.03.orig/include/configs/hipox.h u-boot-2009.03/include/co @@ -34,6 +34,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG - #define CONFIG_CMD_PING + //#define CONFIG_CMD_PING +#define CONFIG_CMD_CACHE /** diff --git a/recipes/u-boot/u-boot_git.bb b/recipes/u-boot/u-boot_git.bb index e674e4d25b..ef36f42cf3 100644 --- a/recipes/u-boot/u-boot_git.bb +++ b/recipes/u-boot/u-boot_git.bb @@ -1,5 +1,5 @@ require u-boot.inc -PR ="r35" +PR ="r36" FILESPATHPKG =. "u-boot-git:" @@ -102,13 +102,15 @@ SRC_URI_dm6467t-evm = "git://arago-project.org/git/people/hemant/u-boot-dm646x.g SRCREV_dm6467t-evm = "3da7475ae13445ba89c77ea563ccdfb9df540bb7" PV_dm6467t-evm = "2009.08+gitr${SRCREV}" -SRC_URI_da830-omapl137-evm = "git://arago-project.org/git/people/sekhar/u-boot-omapl1.git;protocol=git;branch=wakeup" -SRCREV_da830-omapl137-evm = "04a03bb477ad842b84c61b29f11422089ad0088d" -PV_da830-omapl137-evm = "2009.01+gitr${SRCREV}" +# Corresponding to PSP 3.20.00.07 Release +SRC_URI_da830-omapl137-evm = "git://arago-project.org/git/people/sekhar/u-boot-omapl1.git;protocol=git;branch=master" +SRCREV_da830-omapl137-evm = "0d291f2f255e6d66a78b3dc2445362a96ae39a57" +PV_da830-omapl137-evm = "2009.08+gitr${SRCREV}" -SRC_URI_da850-omapl138-evm = "git://arago-project.org/git/people/sekhar/u-boot-omapl1.git;protocol=git;branch=wakeup" -SRCREV_da850-omapl138-evm = "04a03bb477ad842b84c61b29f11422089ad0088d" -PV_da850-omapl138-evm = "2009.01+gitr${SRCREV}" +# Corresponding to PSP 3.20.00.07 Release +SRC_URI_da850-omapl138-evm = "git://arago-project.org/git/people/sekhar/u-boot-omapl1.git;protocol=git;branch=master" +SRCREV_da850-omapl138-evm = "0d291f2f255e6d66a78b3dc2445362a96ae39a57" +PV_da850-omapl138-evm = "2009.08+gitr${SRCREV}" SRC_URI_dm355-leopard = "git://www.denx.de/git/u-boot-arm.git;protocol=git;branch=next \ file://leopardboard-support.patch;patch=1 \ diff --git a/recipes/uclibc/uclibc-0.9.30.1/installfix.patch b/recipes/uclibc/uclibc-0.9.30.1/installfix.patch new file mode 100644 index 0000000000..eab964de13 --- /dev/null +++ b/recipes/uclibc/uclibc-0.9.30.1/installfix.patch @@ -0,0 +1,33 @@ +Index: uClibc-0.9.30.1/Makefile.in +=================================================================== +--- uClibc-0.9.30.1.orig/Makefile.in 2009-11-20 22:51:12.544261346 +0100 ++++ uClibc-0.9.30.1/Makefile.in 2009-11-20 22:52:59.980922849 +0100 +@@ -369,7 +369,7 @@ + endif + + # Installs development library links. +-install_dev: install_headers all ++install_dev: install_headers install_runtime + $(INSTALL) -d $(PREFIX)$(DEVEL_PREFIX)lib + -$(INSTALL) -m 644 lib/*.[ao] $(PREFIX)$(DEVEL_PREFIX)lib/ + ifeq ($(HAVE_SHARED),y) +Index: uClibc-0.9.30.1/utils/Makefile.in +=================================================================== +--- uClibc-0.9.30.1.orig/utils/Makefile.in 2009-11-20 22:54:00.352165960 +0100 ++++ uClibc-0.9.30.1/utils/Makefile.in 2009-11-20 22:54:47.754245713 +0100 +@@ -89,12 +89,12 @@ + utils_install: utils + #$(Q)$(INSTALL) -D -m 755 $(utils_OUT)/readelf $(PREFIX)$(RUNTIME_PREFIX)usr/bin/readelf + ifeq ($(HAVE_SHARED),y) +- $(Q)$(INSTALL) -D -m 755 $(utils_OUT)/ldd $(PREFIX)$(RUNTIME_PREFIX)usr/bin/ldd ++ $(Q)$(INSTALL) -D -m 755 $(utils_OUT)/ldd $(PREFIX)$(RUNTIME_PREFIX)bin/ldd + $(Q)$(INSTALL) -D -m 755 $(utils_OUT)/ldconfig $(PREFIX)$(RUNTIME_PREFIX)sbin/ldconfig + endif + ifeq ($(UCLIBC_HAS_LOCALE),y) +- $(Q)$(INSTALL) -D -m 755 $(utils_OUT)/iconv $(PREFIX)$(RUNTIME_PREFIX)usr/bin/iconv +- $(Q)$(INSTALL) -m 755 $(utils_OUT)/locale $(PREFIX)$(RUNTIME_PREFIX)usr/bin/locale ++ $(Q)$(INSTALL) -D -m 755 $(utils_OUT)/iconv $(PREFIX)$(RUNTIME_PREFIX)bin/iconv ++ $(Q)$(INSTALL) -m 755 $(utils_OUT)/locale $(PREFIX)$(RUNTIME_PREFIX)bin/locale + endif + + objclean-y += utils_clean diff --git a/recipes/uclibc/uclibc-initial_0.9.30.1.bb b/recipes/uclibc/uclibc-initial_0.9.30.1.bb index 46c0f66697..d0491fcc67 100644 --- a/recipes/uclibc/uclibc-initial_0.9.30.1.bb +++ b/recipes/uclibc/uclibc-initial_0.9.30.1.bb @@ -5,27 +5,22 @@ DEPENDS = "linux-libc-headers ncurses-native virtual/${TARGET_PREFIX}gcc-initial PROVIDES = "virtual/${TARGET_PREFIX}libc-initial" PACKAGES = "" -do_stage() { +do_install() { # Install initial headers into the cross dir - make V=1 CC="${CC}" PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + make V=1 CC="${CC}" PREFIX=${D} DEVEL_PREFIX=${prefix}/ RUNTIME_PREFIX=/ \ install_headers - ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include + #ln -sf include ${CROSS_DIR}/${TARGET_SYS}/sys-include # This conflicts with the c++ version of this header - rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h - install -d ${UCLIBC_STAGE_PREFIX}/lib - install -m 644 lib/crt[1in].o ${UCLIBC_STAGE_PREFIX}/lib - install -m 644 lib/libc.so ${UCLIBC_STAGE_PREFIX}/lib -} - -do_install() { - : + rm -f ${D}${includedir}/bits/atomicity.h + install -d ${D}${libdir}/ + install -m 644 lib/crt[1in].o ${D}${libdir}/ + install -d ${D}${libdir}/ + install -m 644 lib/libc.so ${D}${libdir}/ } do_compile () { - make V=1 CC="${CC}" PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ + make V=1 CC="${CC}" PREFIX=${D} DEVEL_PREFIX=${prefix}/ RUNTIME_PREFIX=/ \ lib/crt1.o lib/crti.o lib/crtn.o ${CC} -nostdlib -nostartfiles -shared -x c /dev/null \ -o lib/libc.so diff --git a/recipes/uclibc/uclibc.inc b/recipes/uclibc/uclibc.inc index 88f62fa557..903aea27b9 100644 --- a/recipes/uclibc/uclibc.inc +++ b/recipes/uclibc/uclibc.inc @@ -73,7 +73,6 @@ SRC_URI = "${@['${UCLIBC_LOCALE_URI}', ''][bb.data.getVar('USE_NLS', d, 1) != 'y file://uClibc.config \ http://www.uclibc.org/downloads/uClibc-${PV}.tar.bz2 \ " -UCLIBC_STAGE_PREFIX = "${STAGING_DIR_HOST}${layout_prefix}" # do_stage barfs on a CC with whitepspace, therefore put the 'HOST_CC_ARCH' in # the CFLAGS (for when building the utils). @@ -92,6 +91,9 @@ KERNEL_HEADERS = "${STAGING_INCDIR}" # ARCH_WANTS_BIG_ENDIAN=y # ARCH_WANTS_LITTLE_ENDIAN is not set +# How to enable verbose logs: +#export VERBOSE="1" + configmangle = 's,^KERNEL_SOURCE=.*,KERNEL_SOURCE="${KERNEL_SOURCE}",g; \ s,^KERNEL_HEADERS=.*,KERNEL_HEADERS="${KERNEL_HEADERS}",g; \ s,^RUNTIME_PREFIX=.*,RUNTIME_PREFIX="/",g; \ @@ -156,69 +158,26 @@ do_configure() { yes '' | oe_runmake oldconfig } -do_stage() { - # This MUST be done first because we - # will install crt1.o in the install_dev stage and gcc needs it - - # Install into the staging dir - oe_runmake PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - install_dev install_runtime - - # We don't really need this - rm -f ${UCLIBC_STAGE_PREFIX}/include/.cvsignore - - # Fixup shared lib symlinks - ( cd ${UCLIBC_STAGE_PREFIX}/lib - for f in c crypt dl m nsl pthread resolv thread_db util; do - ln -sf lib${f}.so.? lib${f}.so - done - ) - - # This conflicts with the c++ version of this header - rm -f ${UCLIBC_STAGE_PREFIX}/include/bits/atomicity.h -} - do_install() { - # Tis MUST be done first because we - # will install crt1.o in the install_dev stage and gcc needs it) - oe_runmake STRIPTOOL=true PREFIX= DEVEL_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - RUNTIME_PREFIX=${UCLIBC_STAGE_PREFIX}/ \ - install_dev install_runtime - - oe_runmake STRIPTOOL=true PREFIX=${D} DEVEL_PREFIX=${prefix}/ RUNTIME_PREFIX=/ \ + oe_runmake PREFIX=${D} DEVEL_PREFIX=${prefix}/ RUNTIME_PREFIX=/ \ install_dev install_runtime + # Need to overwrite the version from -initial + #if [ ! -e ${D}${libdir}/libc.so ]; then + # ln -s ../../lib/libc.so.0 ${D}${libdir}/libc.so + #fi + # We don't really need this in ${includedir} rm -f ${D}${prefix}/include/.cvsignore # This conflicts with the c++ version of this header rm -f ${D}${prefix}/include/bits/atomicity.h - # ugh.. uclibc doesn't like obeying our path variables. - if [ "${includedir}" != "${prefix}/include" ]; then - install -d ${D}${includedir} - mv ${D}${prefix}/include/* ${D}${includedir}/ - rmdir ${D}${prefix}/include - fi - - if [ "${libdir}" != "${prefix}/lib" ]; then - install -d ${D}${libdir} - mv ${D}${prefix}/lib/* ${D}${libdir}/ - rmdir ${D}${prefix}/lib - fi - oe_runmake "SSP_ALL_CFLAGS=${TARGET_LINK_HASH_STYLE}" utils oe_runmake STRIPTOOL=true PREFIX=${D} DEVEL_PREFIX=${prefix}/ RUNTIME_PREFIX=/ \ install_utils # oe_runstrip needs +x on files chmod +x ${D}/${base_libdir}/* - - if [ "${bindir}" != "/usr/bin" ]; then - install -d ${D}${bindir} - mv ${D}/usr/bin/* ${D}${bindir}/ - rmdir ${D}/usr/bin - fi } diff --git a/recipes/uclibc/uclibc_0.9.30.1.bb b/recipes/uclibc/uclibc_0.9.30.1.bb index 1f8162edfc..c32b2f1d82 100644 --- a/recipes/uclibc/uclibc_0.9.30.1.bb +++ b/recipes/uclibc/uclibc_0.9.30.1.bb @@ -9,7 +9,7 @@ UCLIBC_BASE ?= "0.9.30.1" require uclibc.inc -PR = "${INC_PR}.1" +PR = "${INC_PR}.3" PROVIDES += "virtual/${TARGET_PREFIX}libc-for-gcc" @@ -22,6 +22,7 @@ SRC_URI += "file://uClibc.machine file://uClibc.distro \ file://gcc-4.4-fixlet.patch;patch=1 \ file://uclibc-c99-ldbl-math.patch;patch=1 \ file://Use-__always_inline-instead-of-__inline__.patch;patch=1 \ + file://installfix.patch;patch=1 \ " #recent versions uclibc require real kernel headers PACKAGE_ARCH = "${MACHINE_ARCH}" diff --git a/recipes/usb-gadget-mode/files/usb-gadget b/recipes/usb-gadget-mode/files/usb-gadget index 3f25edccd4..8da88ad009 100755 --- a/recipes/usb-gadget-mode/files/usb-gadget +++ b/recipes/usb-gadget-mode/files/usb-gadget @@ -23,16 +23,16 @@ go() { test -e "$CONF_FILE" && . "$CONF_FILE" case "$USB_MODE" in - networking) setup_usb g_ether "$MODULE_OPTIONS" ;; - zero) setup_usb g_zero "$MODULE_OPTIONS" ;; - midi) setup_usb g_midi "$MODULE_OPTIONS" ;; - printer) setup_usb g_printer "$MODULE_OPTIONS" ;; - gadgetfs) setup_usb gadgetfs "$MODULE_OPTIONS" ;; - composite) setup_usb g_cdc "$MODULE_OPTIONS" ;; - serial) setup_usb g_serial "$MODULE_OPTIONS" ;; - storage) setup_usb g_file_storage "$MODULE_OPTIONS" ;; + networking) setup_usb g_ether ;; + zero) setup_usb g_zero ;; + midi) setup_usb g_midi ;; + printer) setup_usb g_printer ;; + gadgetfs) setup_usb gadgetfs ;; + composite) setup_usb g_cdc ;; + serial) setup_usb g_serial ;; + storage) setup_usb g_file_storage ;; hostmode) unload_usb_gadgets - setup_usb ohci_hcd "$MODULE_OPTIONS" ;; + setup_usb ohci_hcd ;; none) unload_usb_gadgets ;; esac @@ -44,7 +44,7 @@ setup_usb() { then unload_usb_gadgets echo "Loading [$1]" - modprobe "$1" "$MODULE_OPTIONS" + modprobe "$1" $MODULE_OPTIONS else echo "Already loaded: [$1]" fi diff --git a/recipes/usb-gadget-mode/usb-gadget-mode.bb b/recipes/usb-gadget-mode/usb-gadget-mode.bb index 8abb319405..a01377aa36 100644 --- a/recipes/usb-gadget-mode/usb-gadget-mode.bb +++ b/recipes/usb-gadget-mode/usb-gadget-mode.bb @@ -9,7 +9,7 @@ DESCRIPTION = "Manage the default USB gadget mode" SECTION = "console/network" LICENSE = "GPL" PV = "0.0.2" -PR = "r4" +PR = "r5" SRC_URI = "\ file://usb-gadget.conf \ diff --git a/recipes/webkit/webkit-efl_git.bb b/recipes/webkit/webkit-efl_git.bb new file mode 100644 index 0000000000..6dca9e049c --- /dev/null +++ b/recipes/webkit/webkit-efl_git.bb @@ -0,0 +1,21 @@ +DESCRIPTION = " Webkit browser engine, EFL edition" +LICENSE = "GPL" +DEPENDS = "icu flex gst-plugins-base gstreamer jpeg libpng libxml2 pango \ + libsoup-2.4 eina ecore evas edje cairo fontconfig freetype curl \ + sqlite3 libxslt gperf-native libxt" + +PV = "1.1.11+gitr${SRCREV}" +PR = "r1" + +SRC_URI = "git://gitorious.org/webkit-efl/webkit-efl.git;protocol=git;branch=master" + +S = "${WORKDIR}/git" + +inherit autotools lib_package pkgconfig + +EXTRA_OECONF = "--disable-video --host=${TARGET_SYS} --with-port=efl --enable-web-workers=no" + +PACKAGES =+ "${PN}-webinspector" + +FILES_${PN} += "${datadir}/webkit-1.0/resources/error.html ${datadir}/webkit-1.0/theme/default.edj" +FILES_${PN}-webinspector = "${datadir}/webkit-1.0/webinspector/" diff --git a/recipes/xboard/files/no-strip.patch b/recipes/xboard/files/no-strip.patch index 5785a9a1f1..7fb8cd5dc5 100644 --- a/recipes/xboard/files/no-strip.patch +++ b/recipes/xboard/files/no-strip.patch @@ -1,15 +1,22 @@ -Index: xboard-4.2.7-r0/xboard-4.2.7/Makefile.in +Index: xboard-4.4.1-r0/xboard-4.4.1/Makefile.in =================================================================== ---- xboard-4.2.7-r0.orig/xboard-4.2.7/Makefile.in -+++ xboard-4.2.7-r0/xboard-4.2.7/Makefile.in -@@ -63,8 +63,8 @@ default: xboard zic2xpm - all: default pseudosource info FAQ html dvi ps +--- xboard-4.4.1-r0.orig/xboard-4.4.1/Makefile.in ++++ xboard-4.4.1-r0/xboard-4.4.1/Makefile.in +@@ -939,7 +939,7 @@ - install: installdirs default -- $(INSTALL_PROGRAM) -s xboard $(bindir)/xboard -- $(INSTALL_PROGRAM) -s zic2xpm $(bindir)/zic2xpm -+ $(INSTALL_PROGRAM) xboard $(bindir)/xboard -+ $(INSTALL_PROGRAM) zic2xpm $(bindir)/zic2xpm - $(INSTALL_PROGRAM) cmail $(bindir)/cmail - $(INSTALL_PROGRAM) $(srcdir)/pxboard $(bindir)/pxboard - $(INSTALL_DATA) $(srcdir)/xboard.man $(man6dir)/xboard$(man6ext) + uninstall-man: uninstall-man6 + +-.MAKE: install-am install-strip ++.MAKE: install-am + + .PHONY: CTAGS GTAGS all all-am am--refresh check check-am clean \ + clean-binPROGRAMS clean-generic ctags dist dist-all dist-bzip2 \ +@@ -951,7 +951,7 @@ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-man6 install-pdf \ +- install-pdf-am install-ps install-ps-am install-strip \ ++ install-pdf-am install-ps install-ps-am \ + installcheck installcheck-am installdirs maintainer-clean \ + maintainer-clean-aminfo maintainer-clean-generic \ + maintainer-clean-vti mostlyclean mostlyclean-aminfo \ diff --git a/recipes/xboard/xboard_4.2.7.bb b/recipes/xboard/xboard_4.4.1.bb index 1b5a4129a2..0c31b9ced3 100644 --- a/recipes/xboard/xboard_4.2.7.bb +++ b/recipes/xboard/xboard_4.4.1.bb @@ -3,11 +3,11 @@ HOMEPAGE = "http://www.tim-mann.org/xboard.html" SECTION = "games" LICENSE = "GPL" DEPENDS = "libxaw libsm libx11 libxt libxmu libxext libice" -SRC_URI = "http://ftp.gnu.org/gnu/xboard/xboard-4.2.7.tar.gz \ - file://no-strip.patch;patch=1;pnum=2" +SRC_URI = "http://ftp.gnu.org/gnu/xboard/xboard-${PV}.tar.gz \ + file://no-strip.patch;patch=1;pnum=2" inherit autotools do_configure() { - oe_runconf --exec-prefix=${D}/${prefix} --prefix=${D}/${prefix} --bindir=${D}/${bindir} --mandir=${D}/${mandir} + oe_runconf --exec-prefix=${prefix} --prefix=${D}/${prefix} --bindir=${bindir} --mandir=${D}/${mandir} } diff --git a/recipes/xorg-lib/pixman/0001-ARM-NEON-optimized-pixman_blt.patch b/recipes/xorg-lib/pixman/0001-ARM-NEON-optimized-pixman_blt.patch new file mode 100644 index 0000000000..ed2b68d782 --- /dev/null +++ b/recipes/xorg-lib/pixman/0001-ARM-NEON-optimized-pixman_blt.patch @@ -0,0 +1,104 @@ +From e94b8057370a430eb91b914ed4c0050f72e9fa37 Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Wed, 18 Nov 2009 04:26:18 +0200 +Subject: [PATCH 1/6] ARM: NEON optimized pixman_blt + +--- + pixman/pixman-arm-neon.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++ + 1 files changed, 67 insertions(+), 0 deletions(-) + +diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c +index 2ed8b4b..495fda4 100644 +--- a/pixman/pixman-arm-neon.c ++++ b/pixman/pixman-arm-neon.c +@@ -292,6 +292,43 @@ pixman_fill_neon (uint32_t *bits, + } + } + ++static pixman_bool_t ++pixman_blt_neon (uint32_t *src_bits, ++ uint32_t *dst_bits, ++ int src_stride, ++ int dst_stride, ++ int src_bpp, ++ int dst_bpp, ++ int src_x, ++ int src_y, ++ int dst_x, ++ int dst_y, ++ int width, ++ int height) ++{ ++ switch (src_bpp) ++ { ++ case 16: ++ pixman_composite_src_0565_0565_asm_neon ( ++ width, height, ++ (uint16_t *)(((char *) dst_bits) + ++ dst_y * dst_stride * 4 + dst_x * 2), dst_stride * 2, ++ (uint16_t *)(((char *) src_bits) + ++ src_y * src_stride * 4 + src_x * 2), src_stride * 2); ++ return TRUE; ++ case 32: ++ pixman_composite_src_8888_8888_asm_neon ( ++ width, height, ++ (uint32_t *)(((char *) dst_bits) + ++ dst_y * dst_stride * 4 + dst_x * 4), dst_stride, ++ (uint32_t *)(((char *) src_bits) + ++ src_y * src_stride * 4 + src_x * 4), src_stride); ++ return TRUE; ++ default: ++ return FALSE; ++ } ++} ++ + static const pixman_fast_path_t arm_neon_fast_path_array[] = + { + { PIXMAN_OP_SRC, PIXMAN_r5g6b5, PIXMAN_null, PIXMAN_r5g6b5, neon_composite_src_0565_0565 }, +@@ -361,6 +398,35 @@ arm_neon_composite (pixman_implementation_t *imp, + } + + static pixman_bool_t ++arm_neon_blt (pixman_implementation_t *imp, ++ uint32_t * src_bits, ++ uint32_t * dst_bits, ++ int src_stride, ++ int dst_stride, ++ int src_bpp, ++ int dst_bpp, ++ int src_x, ++ int src_y, ++ int dst_x, ++ int dst_y, ++ int width, ++ int height) ++{ ++ if (!pixman_blt_neon ( ++ src_bits, dst_bits, src_stride, dst_stride, src_bpp, dst_bpp, ++ src_x, src_y, dst_x, dst_y, width, height)) ++ ++ { ++ return _pixman_implementation_blt ( ++ imp->delegate, ++ src_bits, dst_bits, src_stride, dst_stride, src_bpp, dst_bpp, ++ src_x, src_y, dst_x, dst_y, width, height); ++ } ++ ++ return TRUE; ++} ++ ++static pixman_bool_t + arm_neon_fill (pixman_implementation_t *imp, + uint32_t * bits, + int stride, +@@ -385,6 +451,7 @@ _pixman_implementation_create_arm_neon (void) + pixman_implementation_t *imp = _pixman_implementation_create (general); + + imp->composite = arm_neon_composite; ++ imp->blt = arm_neon_blt; + imp->fill = arm_neon_fill; + + return imp; +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman/0002-Test-program-for-pixman_blt-function.patch b/recipes/xorg-lib/pixman/0002-Test-program-for-pixman_blt-function.patch new file mode 100644 index 0000000000..143e79dabf --- /dev/null +++ b/recipes/xorg-lib/pixman/0002-Test-program-for-pixman_blt-function.patch @@ -0,0 +1,178 @@ +From 364406e03f9651aacb1bc684de6c00a27f9df66d Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Mon, 19 Oct 2009 20:32:55 +0300 +Subject: [PATCH 2/6] Test program for pixman_blt function + +It can do some basic correctness tests and also check whether +overlapping of source and destination images is supported. +--- + test/Makefile.am | 2 + + test/overlapped-blt-test.c | 136 ++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 138 insertions(+), 0 deletions(-) + create mode 100644 test/overlapped-blt-test.c + +diff --git a/test/Makefile.am b/test/Makefile.am +index 89d32e9..40c305f 100644 +--- a/test/Makefile.am ++++ b/test/Makefile.am +@@ -9,6 +9,7 @@ TESTPROGRAMS = \ + fetch-test \ + oob-test \ + window-test \ ++ overlapped-blt-test \ + trap-crasher + + fetch_test_LDADD = $(TEST_LDADD) +@@ -17,6 +18,7 @@ composite_LDADD = $(TEST_LDADD) + trap_crasher_LDADD = $(TEST_LDADD) + oob_test_LDADD = $(TEST_LDADD) + window_test_LDADD = $(TEST_LDADD) ++overlapped_blt_test_LDADD = $(TEST_LDADD) + + blitters_test_LDADD = $(TEST_LDADD) + blitters_test_SOURCES = blitters-test.c utils.c utils.h +diff --git a/test/overlapped-blt-test.c b/test/overlapped-blt-test.c +new file mode 100644 +index 0000000..95fbc54 +--- /dev/null ++++ b/test/overlapped-blt-test.c +@@ -0,0 +1,136 @@ ++/* ++ * A small test program which can check whether pixman_blt function ++ * can support overlapping of source and destination images. ++ * Efficient blit with overlapping is useful for scrolling. ++ */ ++ ++#include <stdint.h> ++#include <stdio.h> ++#include <stdlib.h> ++#include <string.h> ++#include "pixman.h" ++ ++/* reference implementation (slow) */ ++static void ++trivial_copy8_2d ( ++ uint8_t *dst, int dst_stride, ++ uint8_t *src, int src_stride, ++ int dx, int dy, int sx, int sy, ++ int w, int h) ++{ ++ int x, y; ++ uint8_t *tmp = malloc (src_stride * (sy + h)); ++ memcpy (tmp, src, src_stride * (sy + h)); ++ for (y = 0; y < h; y++) ++ { ++ for (x = 0; x < w; x++) ++ { ++ *(dst + (dy + y) * dst_stride + dx + x) = ++ *(tmp + (sy + y) * src_stride + sx + x); ++ } ++ } ++ free (tmp); ++} ++ ++static void ++trivial_copy_2d ( ++ uint8_t *dst, int dst_stride, ++ uint8_t *src, int src_stride, ++ int dx, int dy, int sx, int sy, ++ int w, int h, int bpp) ++{ ++ trivial_copy8_2d (dst, dst_stride, src, src_stride, ++ dx * (bpp / 8), dy, sx * (bpp / 8), sy, w * (bpp / 8), h); ++} ++ ++/* now the test itself */ ++ ++#define ST_UNSUPPORTED 1 ++#define ST_NORMAL_BUG 2 ++#define ST_OVERLAPPED_BUG 4 ++ ++#define MAX_SIZE_X 64 ++#define MAX_SIZE_Y 64 ++ ++static void print_result(int bpp, int flags) ++{ ++ printf("bpp=%d, supported=%d, normal_ok=%d, overlapped_ok=%d\n", ++ bpp, ++ !(flags & ST_UNSUPPORTED), ++ !(flags & ST_NORMAL_BUG), ++ !(flags & ST_OVERLAPPED_BUG)); ++} ++ ++int main() ++{ ++ int c = 100000, r; ++ int bpp_st[33] = {0}; ++ srand(0); ++ while (c-- > 0) ++ { ++ uint8_t *src1, *src2, *src3; ++ int i; ++ int sizex = rand() % MAX_SIZE_X + 1; ++ int sizey = rand() % MAX_SIZE_Y + 1; ++ int sx = rand() % sizex; ++ int sy = rand() % sizey; ++ int dx = rand() % sizex; ++ int dy = rand() % sizey; ++ int w = rand() % sizex; ++ int h = rand() % sizex; ++ int bpp = 8 * (1 << (rand() % 3)); ++ int stride_delta = rand() % 8; ++ int bufsize; ++ if ((sizex + stride_delta) % 4) ++ stride_delta += 4 - ((sizex + stride_delta) % 4); ++ bufsize = (sizex + stride_delta) * sizey * bpp / 8; ++ src1 = malloc (bufsize); ++ src2 = malloc (bufsize); ++ src3 = malloc (bufsize); ++ for (i = 0; i < bufsize; i++) ++ src1[i] = rand(); ++ memcpy (src2, src1, bufsize); ++ memcpy (src3, src1, bufsize); ++ if (sx + w > sizex) ++ w = sizex - sx; ++ if (dx + w > sizex) ++ w = sizex - dx; ++ if (sy + h > sizey) ++ h = sizey - sy; ++ if (dy + h > sizey) ++ h = sizey - dy; ++ /* get reference result */ ++ trivial_copy_2d (src1, (sizex + stride_delta) * bpp / 8, ++ src1, (sizex + stride_delta) * bpp / 8, ++ dx, dy, sx, sy, w, h, bpp); ++ /* check nonoverlapped pixman result */ ++ r = pixman_blt ((uint32_t *)src3, (uint32_t *)src2, ++ (sizex + stride_delta) * bpp / 8 / 4, ++ (sizex + stride_delta) * bpp / 8 / 4, ++ bpp, bpp, sx, sy, dx, dy, w, h); ++ if (!r) ++ bpp_st[bpp] |= ST_UNSUPPORTED; ++ if (memcmp (src1, src2, bufsize) != 0) ++ bpp_st[bpp] |= ST_NORMAL_BUG; ++ /* check overlapped pixman result */ ++ r = pixman_blt ((uint32_t *)src3, (uint32_t *)src3, ++ (sizex + stride_delta) * bpp / 8 / 4, ++ (sizex + stride_delta) * bpp / 8 / 4, ++ bpp, bpp, sx, sy, dx, dy, w, h); ++ if (!r) ++ bpp_st[bpp] |= ST_UNSUPPORTED; ++ if (memcmp (src1, src3, bufsize) != 0) ++ bpp_st[bpp] |= ST_OVERLAPPED_BUG; ++ /* free buffers */ ++ free (src1); ++ free (src2); ++ free (src3); ++ } ++ ++ /* report results */ ++ print_result (8, bpp_st[8]); ++ print_result (16, bpp_st[16]); ++ print_result (32, bpp_st[32]); ++ ++ return 0; ++} +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman/0003-Generic-C-implementation-of-pixman_blt-with-overlapp.patch b/recipes/xorg-lib/pixman/0003-Generic-C-implementation-of-pixman_blt-with-overlapp.patch new file mode 100644 index 0000000000..25ce7ee3b8 --- /dev/null +++ b/recipes/xorg-lib/pixman/0003-Generic-C-implementation-of-pixman_blt-with-overlapp.patch @@ -0,0 +1,114 @@ +From c29c9fa826b7112156fd6150b5f1564227935c05 Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Thu, 22 Oct 2009 05:27:33 +0300 +Subject: [PATCH 3/6] Generic C implementation of pixman_blt with overlapping support + +Uses memcpy/memmove functions to copy pixels, can handle the +case when both source and destination areas are in the same +image (this is useful for scrolling). + +It is assumed that copying direction is only important when +using the same image for both source and destination (and +src_stride == dst_stride). Copying direction is undefined +for the images with different source and destination stride +which happen to be in the overlapped areas (but this is an +unrealistic case anyway). +--- + pixman/pixman-general.c | 21 ++++++++++++++++++--- + pixman/pixman-private.h | 43 +++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 61 insertions(+), 3 deletions(-) + +diff --git a/pixman/pixman-general.c b/pixman/pixman-general.c +index c96a3f9..d71a299 100644 +--- a/pixman/pixman-general.c ++++ b/pixman/pixman-general.c +@@ -300,9 +300,24 @@ general_blt (pixman_implementation_t *imp, + int width, + int height) + { +- /* We can't blit unless we have sse2 or mmx */ +- +- return FALSE; ++ uint8_t *dst_bytes = (uint8_t *)dst_bits; ++ uint8_t *src_bytes = (uint8_t *)src_bits; ++ int bpp; ++ ++ if (src_bpp != dst_bpp || src_bpp & 7) ++ return FALSE; ++ ++ bpp = src_bpp >> 3; ++ width *= bpp; ++ src_stride *= 4; ++ dst_stride *= 4; ++ pixman_blt_helper (src_bytes + src_y * src_stride + src_x * bpp, ++ dst_bytes + dst_y * dst_stride + dst_x * bpp, ++ src_stride, ++ dst_stride, ++ width, ++ height); ++ return TRUE; + } + + static pixman_bool_t +diff --git a/pixman/pixman-private.h b/pixman/pixman-private.h +index 5000f91..8c5d4fd 100644 +--- a/pixman/pixman-private.h ++++ b/pixman/pixman-private.h +@@ -10,6 +10,7 @@ + + #include "pixman.h" + #include <time.h> ++#include <string.h> + #include <assert.h> + + #include "pixman-compiler.h" +@@ -794,4 +795,46 @@ void pixman_timer_register (pixman_timer_t *timer); + + #endif /* PIXMAN_TIMERS */ + ++/* a helper function, can blit 8-bit images with src/dst overlapping support */ ++static inline void ++pixman_blt_helper (uint8_t *src_bytes, ++ uint8_t *dst_bytes, ++ int src_stride, ++ int dst_stride, ++ int width, ++ int height) ++{ ++ /* ++ * The second part of this check is not strictly needed, but it prevents ++ * unnecessary upside-down processing of areas which belong to different ++ * images. Upside-down processing can be slower with fixed-distance-ahead ++ * prefetch and perceived as having more tearing. ++ */ ++ if (src_bytes < dst_bytes + width && ++ src_bytes + src_stride * height > dst_bytes) ++ { ++ src_bytes += src_stride * height - src_stride; ++ dst_bytes += dst_stride * height - dst_stride; ++ dst_stride = -dst_stride; ++ src_stride = -src_stride; ++ /* Horizontal scrolling to the left needs memmove */ ++ if (src_bytes + width > dst_bytes) ++ { ++ while (--height >= 0) ++ { ++ memmove (dst_bytes, src_bytes, width); ++ dst_bytes += dst_stride; ++ src_bytes += src_stride; ++ } ++ return; ++ } ++ } ++ while (--height >= 0) ++ { ++ memcpy (dst_bytes, src_bytes, width); ++ dst_bytes += dst_stride; ++ src_bytes += src_stride; ++ } ++} ++ + #endif /* PIXMAN_PRIVATE_H */ +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman/0004-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch b/recipes/xorg-lib/pixman/0004-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch new file mode 100644 index 0000000000..74c7b45bc4 --- /dev/null +++ b/recipes/xorg-lib/pixman/0004-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch @@ -0,0 +1,91 @@ +From 7ca32542c957ff308a6ca7e3715e6552a65ae395 Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Thu, 22 Oct 2009 05:45:47 +0300 +Subject: [PATCH 4/6] Support of overlapping src/dst for pixman_blt_mmx + +--- + pixman/pixman-mmx.c | 55 +++++++++++++++++++++++++++++--------------------- + 1 files changed, 32 insertions(+), 23 deletions(-) + +diff --git a/pixman/pixman-mmx.c b/pixman/pixman-mmx.c +index 819e3a0..dcccadb 100644 +--- a/pixman/pixman-mmx.c ++++ b/pixman/pixman-mmx.c +@@ -3002,34 +3002,43 @@ pixman_blt_mmx (uint32_t *src_bits, + { + uint8_t * src_bytes; + uint8_t * dst_bytes; +- int byte_width; ++ int bpp; + +- if (src_bpp != dst_bpp) ++ if (src_bpp != dst_bpp || src_bpp & 7) + return FALSE; + +- if (src_bpp == 16) +- { +- src_stride = src_stride * (int) sizeof (uint32_t) / 2; +- dst_stride = dst_stride * (int) sizeof (uint32_t) / 2; +- src_bytes = (uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x)); +- dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x)); +- byte_width = 2 * width; +- src_stride *= 2; +- dst_stride *= 2; +- } +- else if (src_bpp == 32) ++ bpp = src_bpp >> 3; ++ width *= bpp; ++ src_stride *= 4; ++ dst_stride *= 4; ++ src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp; ++ dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp; ++ ++ if (src_bpp != 16 && src_bpp != 32) + { +- src_stride = src_stride * (int) sizeof (uint32_t) / 4; +- dst_stride = dst_stride * (int) sizeof (uint32_t) / 4; +- src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x)); +- dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x)); +- byte_width = 4 * width; +- src_stride *= 4; +- dst_stride *= 4; ++ pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride, ++ width, height); ++ return TRUE; + } +- else ++ ++ if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes) + { +- return FALSE; ++ src_bytes += src_stride * height - src_stride; ++ dst_bytes += dst_stride * height - dst_stride; ++ dst_stride = -dst_stride; ++ src_stride = -src_stride; ++ ++ if (src_bytes + width > dst_bytes) ++ { ++ /* TODO: reverse scanline copy using MMX */ ++ while (--height >= 0) ++ { ++ memmove (dst_bytes, src_bytes, width); ++ dst_bytes += dst_stride; ++ src_bytes += src_stride; ++ } ++ return TRUE; ++ } + } + + while (height--) +@@ -3039,7 +3048,7 @@ pixman_blt_mmx (uint32_t *src_bits, + uint8_t *d = dst_bytes; + src_bytes += src_stride; + dst_bytes += dst_stride; +- w = byte_width; ++ w = width; + + while (w >= 2 && ((unsigned long)d & 3)) + { +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman/0005-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch b/recipes/xorg-lib/pixman/0005-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch new file mode 100644 index 0000000000..3704fbf1cf --- /dev/null +++ b/recipes/xorg-lib/pixman/0005-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch @@ -0,0 +1,91 @@ +From edc80b41c6480b7c80ec5f7c835c92b2debb3774 Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Thu, 22 Oct 2009 05:45:54 +0300 +Subject: [PATCH 5/6] Support of overlapping src/dst for pixman_blt_sse2 + +--- + pixman/pixman-sse2.c | 55 +++++++++++++++++++++++++++++-------------------- + 1 files changed, 32 insertions(+), 23 deletions(-) + +diff --git a/pixman/pixman-sse2.c b/pixman/pixman-sse2.c +index 78b0ad1..b84636b 100644 +--- a/pixman/pixman-sse2.c ++++ b/pixman/pixman-sse2.c +@@ -5300,34 +5300,43 @@ pixman_blt_sse2 (uint32_t *src_bits, + { + uint8_t * src_bytes; + uint8_t * dst_bytes; +- int byte_width; ++ int bpp; + +- if (src_bpp != dst_bpp) ++ if (src_bpp != dst_bpp || src_bpp & 7) + return FALSE; + +- if (src_bpp == 16) +- { +- src_stride = src_stride * (int) sizeof (uint32_t) / 2; +- dst_stride = dst_stride * (int) sizeof (uint32_t) / 2; +- src_bytes =(uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x)); +- dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x)); +- byte_width = 2 * width; +- src_stride *= 2; +- dst_stride *= 2; +- } +- else if (src_bpp == 32) ++ bpp = src_bpp >> 3; ++ width *= bpp; ++ src_stride *= 4; ++ dst_stride *= 4; ++ src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp; ++ dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp; ++ ++ if (src_bpp != 16 && src_bpp != 32) + { +- src_stride = src_stride * (int) sizeof (uint32_t) / 4; +- dst_stride = dst_stride * (int) sizeof (uint32_t) / 4; +- src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x)); +- dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x)); +- byte_width = 4 * width; +- src_stride *= 4; +- dst_stride *= 4; ++ pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride, ++ width, height); ++ return TRUE; + } +- else ++ ++ if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes) + { +- return FALSE; ++ src_bytes += src_stride * height - src_stride; ++ dst_bytes += dst_stride * height - dst_stride; ++ dst_stride = -dst_stride; ++ src_stride = -src_stride; ++ ++ if (src_bytes + width > dst_bytes) ++ { ++ /* TODO: reverse scanline copy using SSE2 */ ++ while (--height >= 0) ++ { ++ memmove (dst_bytes, src_bytes, width); ++ dst_bytes += dst_stride; ++ src_bytes += src_stride; ++ } ++ return TRUE; ++ } + } + + cache_prefetch ((__m128i*)src_bytes); +@@ -5340,7 +5349,7 @@ pixman_blt_sse2 (uint32_t *src_bits, + uint8_t *d = dst_bytes; + src_bytes += src_stride; + dst_bytes += dst_stride; +- w = byte_width; ++ w = width; + + cache_prefetch_next ((__m128i*)s); + cache_prefetch_next ((__m128i*)d); +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman/0006-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch b/recipes/xorg-lib/pixman/0006-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch new file mode 100644 index 0000000000..af75716bb8 --- /dev/null +++ b/recipes/xorg-lib/pixman/0006-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch @@ -0,0 +1,93 @@ +From 86870ff530b5e435034bd80207e5758466d96cff Mon Sep 17 00:00:00 2001 +From: Siarhei Siamashka <siarhei.siamashka@nokia.com> +Date: Wed, 18 Nov 2009 06:08:48 +0200 +Subject: [PATCH 6/6] Support of overlapping src/dst for pixman_blt_neon + +--- + pixman/pixman-arm-neon.c | 63 ++++++++++++++++++++++++++++++++++++++------- + 1 files changed, 53 insertions(+), 10 deletions(-) + +diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c +index 495fda4..c632ff5 100644 +--- a/pixman/pixman-arm-neon.c ++++ b/pixman/pixman-arm-neon.c +@@ -306,23 +306,66 @@ pixman_blt_neon (uint32_t *src_bits, + int width, + int height) + { ++ uint8_t * src_bytes; ++ uint8_t * dst_bytes; ++ int bpp; ++ ++ if (src_bpp != dst_bpp || src_bpp & 7) ++ return FALSE; ++ ++ bpp = src_bpp >> 3; ++ width *= bpp; ++ src_stride *= 4; ++ dst_stride *= 4; ++ src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp; ++ dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp; ++ ++ if (src_bpp != 16 && src_bpp != 32) ++ { ++ pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride, ++ width, height); ++ return TRUE; ++ } ++ ++ if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes) ++ { ++ src_bytes += src_stride * height - src_stride; ++ dst_bytes += dst_stride * height - dst_stride; ++ dst_stride = -dst_stride; ++ src_stride = -src_stride; ++ ++ if (src_bytes + width > dst_bytes) ++ { ++ /* TODO: reverse scanline copy using NEON */ ++ while (--height >= 0) ++ { ++ memmove (dst_bytes, src_bytes, width); ++ dst_bytes += dst_stride; ++ src_bytes += src_stride; ++ } ++ return TRUE; ++ } ++ } ++ + switch (src_bpp) + { + case 16: + pixman_composite_src_0565_0565_asm_neon ( +- width, height, +- (uint16_t *)(((char *) dst_bits) + +- dst_y * dst_stride * 4 + dst_x * 2), dst_stride * 2, +- (uint16_t *)(((char *) src_bits) + +- src_y * src_stride * 4 + src_x * 2), src_stride * 2); ++ width >> 1, ++ height, ++ (uint16_t *) dst_bytes, ++ dst_stride >> 1, ++ (uint16_t *) src_bytes, ++ src_stride >> 1); + return TRUE; + case 32: + pixman_composite_src_8888_8888_asm_neon ( +- width, height, +- (uint32_t *)(((char *) dst_bits) + +- dst_y * dst_stride * 4 + dst_x * 4), dst_stride, +- (uint32_t *)(((char *) src_bits) + +- src_y * src_stride * 4 + src_x * 4), src_stride); ++ width >> 2, ++ height, ++ (uint32_t *) dst_bytes, ++ dst_stride >> 2, ++ (uint32_t *) src_bytes, ++ src_stride >> 2); + return TRUE; + default: + return FALSE; +-- +1.6.2.4 + diff --git a/recipes/xorg-lib/pixman_git.bb b/recipes/xorg-lib/pixman_git.bb index dd02828e37..1b5ca6388f 100644 --- a/recipes/xorg-lib/pixman_git.bb +++ b/recipes/xorg-lib/pixman_git.bb @@ -3,17 +3,24 @@ PRIORITY = "optional" DESCRIPTION = "Low-level pixel manipulation library." LICENSE = "X11" -PV = "0.17.1" +PV = "0.17.3" PR = "r4" PR_append = "+gitr${SRCREV}" -SRCREV = "abefe68ae2a422fecf315f17430c0cda5561be66" +SRCREV = "c97b1e803fc214e9880eaeff98410c8fa37f9ddc" DEFAULT_PREFERENCE = "-1" DEFAULT_PREFERENCE_angstrom = "1" +DEFAULT_PREFERENCE_shr = "1" SRC_URI = "git://anongit.freedesktop.org/pixman;protocol=git \ file://nearest-neighbour.patch;patch=1 \ + file://0001-ARM-NEON-optimized-pixman_blt.patch;patch=1 \ + file://0002-Test-program-for-pixman_blt-function.patch;patch=1 \ + file://0003-Generic-C-implementation-of-pixman_blt-with-overlapp.patch;patch=1 \ + file://0004-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch;patch=1 \ + file://0005-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch;patch=1 \ + file://0006-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch;patch=1 \ " S = "${WORKDIR}/git" diff --git a/recipes/xorg-xserver/xserver-xorg-1.6.1/hack-assume-pixman-supports-overlapped-blt.patch b/recipes/xorg-xserver/xserver-xorg-1.6.1/hack-assume-pixman-supports-overlapped-blt.patch new file mode 100644 index 0000000000..a947582f15 --- /dev/null +++ b/recipes/xorg-xserver/xserver-xorg-1.6.1/hack-assume-pixman-supports-overlapped-blt.patch @@ -0,0 +1,14 @@ +diff --git a/fb/fbcopy.c b/fb/fbcopy.c +index 07eb663..ba394b7 100644 +--- a/fb/fbcopy.c ++++ b/fb/fbcopy.c +@@ -91,8 +91,7 @@ fbCopyNtoN (DrawablePtr pSrcDrawable, + while (nbox--) + { + #ifndef FB_ACCESS_WRAPPER /* pixman_blt() doesn't support accessors yet */ +- if (pm == FB_ALLONES && alu == GXcopy && !reverse && +- !upsidedown) ++ if (pm == FB_ALLONES && alu == GXcopy) + { + if (!pixman_blt ((uint32_t *)src, (uint32_t *)dst, srcStride, dstStride, srcBpp, dstBpp, + (pbox->x1 + dx + srcXoff), diff --git a/recipes/xorg-xserver/xserver-xorg_1.6.1.bb b/recipes/xorg-xserver/xserver-xorg_1.6.1.bb index 5218fde00e..ff8e1cfa03 100644 --- a/recipes/xorg-xserver/xserver-xorg_1.6.1.bb +++ b/recipes/xorg-xserver/xserver-xorg_1.6.1.bb @@ -4,11 +4,14 @@ DESCRIPTION = "the X.Org X server" DEPENDS += "pixman libpciaccess openssl xineramaproto libxinerama" RDEPENDS += "hal" PE = "2" -PR = "${INC_PR}.0" +PR = "${INC_PR}.1" SRC_URI += "file://sysroot_fix.patch;patch=1 \ file://dolt-fix.patch;patch=1" +# This requires support in pixman, which the default one doesn't have +SRC_URI_append_angstrom = " file://hack-assume-pixman-supports-overlapped-blt.patch;patch=1" + MESA_VER = "7.2" export LDFLAGS += " -ldl " diff --git a/recipes/xournal/xournal_0.4.5.bb b/recipes/xournal/xournal_0.4.5.bb new file mode 100644 index 0000000000..747dfed826 --- /dev/null +++ b/recipes/xournal/xournal_0.4.5.bb @@ -0,0 +1,19 @@ +HOMEPAGE = "http://xournal.sf.net/" +DESCRIPTION = "Xournal is an application for notetaking, sketching, keeping a journal using a stylus." +DEPENDS = "gtk+ libgnomecanvas libgnomeprintui" +# For pdftopnm: +RDEPENDS = "poppler" +SECTION = "x11" +LICENSE = "GPL" +PR = "r0" + +SRC_URI = "http://xournal.sourceforge.net/xournal-${PV}.tar.gz \ + " + +inherit autotools pkgconfig + +# make desktop-install in Makefile is not useable for us, so just copy the .desktop file from source +do_install_append () { + install -d ${D}${datadir}/applications/ + install -m 0644 ${S}/xournal.desktop ${D}${datadir}/applications/ +} |