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authorJohn Klug <john.klug@multitech.com>2017-08-18 15:14:17 -0500
committerJohn Klug <john.klug@multitech.com>2017-08-18 15:14:17 -0500
commit3ff432faedee2ec0b93d163e4808f391d65f1ba2 (patch)
tree59df462ea8586a664a59d4cf62f1a58af6507f7e /src/mts_fpga_reg.h
parentc2da95882ea7a4218a4432ee5da8165aa61addfc (diff)
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mts-fpga-loader
Diffstat (limited to 'src/mts_fpga_reg.h')
-rw-r--r--src/mts_fpga_reg.h75
1 files changed, 75 insertions, 0 deletions
diff --git a/src/mts_fpga_reg.h b/src/mts_fpga_reg.h
new file mode 100644
index 0000000..d67a60c
--- /dev/null
+++ b/src/mts_fpga_reg.h
@@ -0,0 +1,75 @@
+/* -------------------------------------------------------------------------- */
+/* --- DEPENDANCIES --------------------------------------------------------- */
+#include <stdbool.h> /* bool type */
+#include <stdint.h> /* C99 types */
+#include <stdio.h>
+
+/* -------------------------------------------------------------------------- */
+/* --- INTERNAL SHARED TYPES ------------------------------------------------ */
+
+struct mtac_reg_s {
+ int8_t page; /*!< page containing the register (-1 for all pages) */
+ uint8_t addr; /*!< base address of the register (7 bit) */
+ uint8_t offs; /*!< position of the register LSB (between 0 to 7) */
+ bool sign; /*!< 1 indicates the register is signed (2 complem.) */
+ uint8_t leng; /*!< number of bits in the register */
+ bool rdon; /*!< 1 indicates a read-only register */
+ int32_t dflt; /*!< register default value */
+};
+
+typedef struct mts {
+ char creset[60];
+ char mtac_hw[60];
+ char spi_path[60];
+ char dev_hw[40];
+ int path;
+} mts_hw;
+
+/* -------------------------------------------------------------------------- */
+/* --- PUBLIC CONSTANTS ----------------------------------------------------- */
+
+#define MTAC_PAGE_REG 0
+#define MTAC_SOFT_RESET 1
+#define MTAC_VERSION 2
+#define SPI_DEV_PATH_AP1 "/dev/spidev32766.2"
+#define SPI_DEV_PATH_AP2 "/dev/spidev32765.2"
+#define SPI_DEV_PATH_MTCAP "/dev/spidev0.1"
+#define SPI_DEV_PATH_MTCDT "/dev/spidev0.0"
+#define MTCDT "MTAC-LORA-1.5"
+#define MTCAP "MTCAP-LORA-1.5"
+#define HW_FILE "/sys/devices/platform/mts-io/hw-version"
+#define MTCDT_DEFAULT_FILE "mtcdt-fpga-v31.hex"
+#define MTCAP_DEFAULT_FILE "mtcap-fpga-v31.hex"
+#define CRESET "/sys/devices/platform/mts-io/lora/creset"
+#define CRESET_AP1 "/sys/devices/platform/mts-io/ap1/creset"
+#define CRESET_AP2 "/sys/devices/platform/mts-io/ap2/creset"
+#define MTAC_HW_VERSION "/sys/devices/platform/mts-io/lora/hw-version"
+#define MTAC_HW_VERSION_AP1 "/sys/devices/platform/mts-io/ap1/hw-version"
+#define MTAC_HW_VERSION_AP2 "/sys/devices/platform/mts-io/ap2/hw-version"
+/* -------------------------------------------------------------------------- */
+/* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */
+
+int mtac_get_version(int path);
+
+int mtac_disconnect(void);
+
+int bus_contention(void);
+
+int mtac_reg_w(uint16_t register_id, int32_t reg_value);
+
+int mtac_reg_r(uint16_t register_id, int32_t *reg_value);
+
+int mtac_upgrade(char input_file[255], int path);
+
+int mtac_erase(mts_hw *mts);
+
+int mtac_program(mts_hw *mts, char input_file[]);
+
+int mtac_check(mts_hw *mts);
+
+int hw_check(mts_hw *mts);
+
+void print_supported_versions();
+
+int mtac_creset_write(mts_hw *mts, char num);
+/* --- EOF ------------------------------------------------------------------ */