diff options
| -rw-r--r-- | configure.ac | 2 | ||||
| -rw-r--r-- | machine/mtac_pin_defs.h | 229 | ||||
| -rw-r--r-- | machine/sam9g25_gpio.h | 6 | ||||
| -rw-r--r-- | mtac.c | 2 |
4 files changed, 235 insertions, 4 deletions
diff --git a/configure.ac b/configure.ac index 8e49919..02a6775 100644 --- a/configure.ac +++ b/configure.ac @@ -1,4 +1,4 @@ -AC_INIT([mtac], [4.0.6]) +AC_INIT([mtac], [4.1.0]) AM_INIT_AUTOMAKE AM_CONFIG_HEADER([config.h]) diff --git a/machine/mtac_pin_defs.h b/machine/mtac_pin_defs.h new file mode 100644 index 0000000..452123c --- /dev/null +++ b/machine/mtac_pin_defs.h @@ -0,0 +1,229 @@ +#ifndef __MTAC_PIN_DEFS_H +#define __MTAC_PIN_DEFS_H + + +#include <linux/mts_io.h> + +// gpio pins for Accessory Card 1 +#define AP1_RESET {\ + .name = "AP1_RESET",\ + .pin = {\ + .gpio = M_AP1_NRESET,\ + .flags = GPIOF_OUT_INIT_HIGH,\ + .label = "ap1-reset",\ + }\ +} + +#define AP1_GPIO1 { \ + .name = "AP1_GPIO1",\ + .pin = {\ + .gpio = M_AP1_GPIO1,\ + .flags = GPIOF_OUT_INIT_LOW,\ + .label = "ap1-gpio1",\ + },\ + .active_low = 1,\ +} + +#define AP1_GPIO2 { \ + .name = "AP1_GPIO2", \ + .pin = { \ + .gpio = M_AP1_GPIO2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio2", \ + } \ +} + +#define AP1_GPIO3 { \ + .name = "AP1_GPIO3", \ + .pin = { \ + .gpio = M_AP1_GPIO3, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio3", \ + } \ +} + +#define AP1_GPIO4 { \ + .name = "AP1_GPIO4", \ + .pin = { \ + .gpio = M_AP1_GPIO4, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio4", \ + }\ +} + +#define AP1_INTERRUPT1 { \ + .name = "AP1_INTERRUPT1", \ + .pin = { \ + .gpio = M_AP1_NINT1, \ + .flags = GPIOF_IN, \ + .label = "ap1-interrupt1", \ + } \ +} + +#define AP1_INTERRUPT2 { \ + .name = "AP1_INTERRUPT2", \ + .pin = { \ + .gpio = M_AP1_NINT2, \ + .flags = GPIOF_IN, \ + .label = "ap1-interrupt2", \ + } \ +} + +// gpio pins for Accessory Card 2 +#define AP2_RESET { \ + .name = "AP2_RESET", \ + .pin = { \ + .gpio = M_AP2_NRESET, \ + .flags = GPIOF_OUT_INIT_HIGH, \ + .label = "ap2-reset", \ + } \ +} + +#define AP2_GPIO1 { \ + .name = "AP2_GPIO1", \ + .pin = { \ + .gpio = M_AP2_GPIO1, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap2-gpio1", \ + }, \ + .active_low = 1, \ +} + +#define AP2_GPIO2 { \ + .name = "AP2_GPIO2", \ + .pin = { \ + .gpio = M_AP2_GPIO2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap2-gpio2", \ + } \ +} + +#define AP2_GPIO3 { \ + .name = "AP2_GPIO3", \ + .pin = { \ + .gpio = M_AP2_GPIO3, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap2-gpio3", \ + } \ +} + +#define AP2_GPIO4 { \ + .name = "AP2_GPIO4", \ + .pin = { \ + .gpio = M_AP2_GPIO4, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap2-gpio4", \ + } \ +} + +#define AP2_INTERRUPT1 { \ + .name = "AP2_INTERRUPT1", \ + .pin = { \ + .gpio = M_AP2_NINT1, \ + .flags = GPIOF_IN, \ + .label = "ap2-interrupt1", \ + } \ +} + +#define AP2_INTERRUPT2 { \ + .name = "AP2_INTERRUPT2", \ + .pin = { \ + .gpio = M_AP2_NINT2, \ + .flags = GPIOF_IN, \ + .label = "ap2-interrupt2", \ + } \ +} + +//pins for MTCDT-0.2 HW + +#define AP1_GPIO3_MTCDT0_2 { \ + .name = "AP1_GPIO3", \ + .pin = { \ + .gpio = M_AP1_GPIO3_MTCDT0_2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio3", \ + } \ +} + +#define AP1_GPIO4_MTCDT0_2 { \ + .name = "AP1_GPIO4", \ + .pin = { \ + .gpio = M_AP1_GPIO4_MTCDT0_2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio4", \ + }\ +} + +#define AP2_GPIO3_MTCDT0_2 { \ + .name = "AP2_GPIO3", \ + .pin = { \ + .gpio = M_AP2_GPIO3_MTCDT0_2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio3", \ + } \ +} + +#define AP2_GPIO4_MTCDT0_2 { \ + .name = "AP2_GPIO4", \ + .pin = { \ + .gpio = M_AP2_GPIO4_MTCDT0_2, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-gpio4", \ + }\ +} + +#define AP1_CDONE { \ + .name = "AP1_CDONE", \ + .pin = { \ + .gpio = M_AP1_GPIO1, \ + .flags = GPIOF_IN, \ + .label = "ap1-cdone", \ + },\ +} + +#define AP1_CRESET { \ + .name = "AP1_CRESET", \ + .pin = { \ + .gpio = M_AP1_GPIO2, \ + .flags = GPIOF_OUT_INIT_HIGH, \ + .label = "ap1-creset", \ + } \ +} + +#define AP2_CDONE { \ + .name = "AP2_CDONE", \ + .pin = { \ + .gpio = M_AP2_GPIO1, \ + .flags = GPIOF_IN, \ + .label = "ap2-cdone", \ + },\ +} + +#define AP2_CRESET { \ + .name = "AP2_CRESET", \ + .pin = { \ + .gpio = M_AP2_GPIO2, \ + .flags = GPIOF_OUT_INIT_HIGH, \ + .label = "ap2-creset", \ + } \ +} + +#define AP1_BOOT { \ + .name = "AP1_BOOT", \ + .pin = { \ + .gpio = M_AP1_GPIO1, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap1-boot", \ + },\ +} + +#define AP2_BOOT { \ + .name = "AP2_BOOT", \ + .pin = { \ + .gpio = M_AP2_GPIO1, \ + .flags = GPIOF_OUT_INIT_LOW, \ + .label = "ap2-boot", \ + },\ +} + +#endif diff --git a/machine/sam9g25_gpio.h b/machine/sam9g25_gpio.h index f972ad1..fe10236 100644 --- a/machine/sam9g25_gpio.h +++ b/machine/sam9g25_gpio.h @@ -10,7 +10,8 @@ #define M_AP1_GPIO2 AT91_PIN_PC7 #define M_AP1_GPIO3 AT91_PIN_PC8 #define M_AP1_GPIO4 AT91_PIN_PC9 -#define M_AP1_LBTRESET AT91_PIN_PC10 +#define M_AP1_GPIO3_MTCDT0_2 AT91_PIN_PC10 +#define M_AP1_GPIO4_MTCDT0_2 AT91_PIN_PC11 #define M_AP1_NRESET AT91_PIN_PB12 #define M_AP1_NINT1 AT91_PIN_PB14 #define M_AP1_NINT2 AT91_PIN_PB15 @@ -20,7 +21,8 @@ #define M_AP2_GPIO2 AT91_PIN_PC21 #define M_AP2_GPIO3 AT91_PIN_PC22 #define M_AP2_GPIO4 AT91_PIN_PC23 -#define M_AP2_LBTRESET AT91_PIN_PC24 +#define M_AP2_GPIO3_MTCDT0_2 AT91_PIN_PC29 +#define M_AP2_GPIO4_MTCDT0_2 AT91_PIN_PC30 #define M_AP2_NRESET AT91_PIN_PB13 #define M_AP2_NINT1 AT91_PIN_PB17 #define M_AP2_NINT2 AT91_PIN_PB18 @@ -1,4 +1,4 @@ -#define DRIVER_VERSION "v4.0.5" +#define DRIVER_VERSION "v4.1.0" #define DRIVER_AUTHOR "Multi-Tech" #define DRIVER_DESC "MTS driver to supervise MTAC slots" #define DRIVER_NAME "mtac-slots" |