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author | Patrick Murphy <patrick.muprphy@multitech.com> | 2021-05-27 15:20:31 -0500 |
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committer | Patrick Murphy <patrick.muprphy@multitech.com> | 2021-05-27 15:20:31 -0500 |
commit | b6e93d5a5b93cfd3d19f89866b96e01d7bfd959b (patch) | |
tree | 1c6d889b52cdaaddddf63c7c2d54789e7838b174 | |
parent | d9e9096d724d20e9765ccc38a17b2bc85cbc3897 (diff) | |
download | mtac-b6e93d5a5b93cfd3d19f89866b96e01d7bfd959b.tar.gz mtac-b6e93d5a5b93cfd3d19f89866b96e01d7bfd959b.tar.bz2 mtac-b6e93d5a5b93cfd3d19f89866b96e01d7bfd959b.zip |
initial support for mtac-003 mtac card
-rw-r--r-- | machine/sam9g25_gpio.h | 2 | ||||
-rw-r--r-- | mtac.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/machine/sam9g25_gpio.h b/machine/sam9g25_gpio.h index 3848576..6f6b503 100644 --- a/machine/sam9g25_gpio.h +++ b/machine/sam9g25_gpio.h @@ -10,6 +10,7 @@ #define M_AP1_GPIO2 AT91_PIN_PC7 #define M_AP1_GPIO3 AT91_PIN_PC8 #define M_AP1_GPIO4 AT91_PIN_PC9 +#define M_AP1_SX1261_NRESET AT91_PIN_PC10 #define M_AP1_NRESET AT91_PIN_PB12 #define M_AP1_NINT1 AT91_PIN_PB14 #define M_AP1_NINT2 AT91_PIN_PB15 @@ -19,6 +20,7 @@ #define M_AP2_GPIO2 AT91_PIN_PC21 #define M_AP2_GPIO3 AT91_PIN_PC22 #define M_AP2_GPIO4 AT91_PIN_PC23 +#define M_AP2_SX1261 AT91_PIN_PIN_PC24 #define M_AP2_NRESET AT91_PIN_PB13 #define M_AP2_NINT1 AT91_PIN_PB17 #define M_AP2_NINT2 AT91_PIN_PB18 @@ -30,6 +30,7 @@ #define HW_VERSION_MTAC_LORA_1_0 "MTAC-LORA-1.0" #define HW_VERSION_MTAC_LORA_1_1 "MTAC-LORA-1.1" #define HW_VERSION_MTAC_LORA_1_5 "MTAC-LORA-1.5" +#define HW_VERSION_MTAC_003_0_0 "MTAC-003-0.0" /* Code assumes CRESET/CDONE (SPI programming) cases will not * exactly match MTAC-LORA-0.0, 1.0, or 1.1. Also levels before * 1.5 must be the same length. @@ -46,6 +47,7 @@ enum { MTAC_LORA_1_0, MTAC_LORA_1_1, MTAC_LORA_1_5, + MTAC_003_0_0, MTAC_PULSE_1_0, MTAC_XDOT_0_0, MTAC_LORA_2G4_0_0, |