blob: 12f347a9a1ffb2b7ea26d0667848a2cab3acc048 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
/*
* DTS overlay for MTCPM 0.0 hardware version.
*/
/dts-v1/;
/*
* Location(s):
* Put: MTCDT3/0.0/lora/ap1-lora.dtbo
*/
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43";
fragment@0 {
target-path = "/ocp@44000000/spi@48030000";
__overlay__ {
status = "okay";
dmas = <&edma 16 0>, <&edma 17 0>;
dma-names = "tx0", "rx0";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi0_pins_default>;
pinctrl-1 = <&spi0_pins_sleep>;
ti,spi-num-cs = <4>;
ti,pindir-d0-out-d1-in;
ap1-spi@0 {
compatible = "mts,mtac";
spi-max-frequency = <0x1e8480>;
reg = <0x0>;
}; /*ap1-spi0*/
ap1-spi@1 {
compatible = "mts,mtac";
spi-max-frequency = <0x1e8480>;
reg = <0x1>;
}; /*ap1-spi1*/
ap1-spi@2 {
compatible = "mts,mtac";
spi-max-frequency = <0x1e8480>;
reg = <0x2>;
}; /*ap1-spi2*/
}; /*overlay*/
}; /*fragment@0*/
};
|
