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-rw-r--r--mtcdt/ap2-lora-0.0.dtso49
1 files changed, 49 insertions, 0 deletions
diff --git a/mtcdt/ap2-lora-0.0.dtso b/mtcdt/ap2-lora-0.0.dtso
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+++ b/mtcdt/ap2-lora-0.0.dtso
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+/*
+ * DTS overlay for MTCDT 0.0/0.1 hardware versions.
+ */
+
+/dts-v1/;
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.0/lora/ap2-lora.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h>
+
+/ {
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ model = "Multi-Tech Systems MTCDT-0.0";
+ fragment@0 {
+ target-path = "/ahb/apb/spi@f0004000";
+ __overlay__ {
+ status = "okay";
+ cs-gpios = <GPIO2_PH 15 0>, <GPIO2_PH 16 0>, <GPIO2_PH 17 0>, <GPIO2_PH 18 0>;
+ ap2-spi@0 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ ap2-spi@1 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <1000000>;
+ reg = <1>;
+ };
+ ap2-spi@2 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <2>;
+ };
+ ap2-din@3 {
+ compatible = "mts-io-ap2-din";
+ spi-max-frequency = <1000000>;
+ reg = <3>;
+ };
+ }; /*overlay*/
+ }; /*fragment@0*/
+};