diff options
| author | John Klug <john.klug@multitech.com> | 2019-04-10 14:55:33 -0500 |
|---|---|---|
| committer | John Klug <john.klug@multitech.com> | 2019-04-10 14:55:33 -0500 |
| commit | 55db4fd0bb04ccaedb10de0b249151a663b0d916 (patch) | |
| tree | 8216ff9613739698b1ccbc6cbdde05c9e40c0833 | |
| parent | 271cc2e048cc0920e7db71ce175f3f2394872128 (diff) | |
| download | meta-multitech-4.1.7.tar.gz meta-multitech-4.1.7.tar.bz2 meta-multitech-4.1.7.zip | |
| -rw-r--r-- | recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch | 50 |
1 files changed, 4 insertions, 46 deletions
diff --git a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch index 0a7600d..313bd91 100644 --- a/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch +++ b/recipes-bsp/at91bootstrap/at91bootstrap-3.5.3/at91bootstrap-3.5.3-mtr.patch @@ -32,51 +32,9 @@ Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig +# CONFIG_DISABLE_WATCHDOG is not set Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c =================================================================== ---- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-04 15:49:54.143358228 -0500 -+++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c 2019-04-04 17:31:57.691176941 -0500 -@@ -53,6 +53,31 @@ - extern void hw_init_hook(void); - #endif - -+ -+static void initialize_mt_gpio(void) -+{ -+ /* Configure DBGU pins */ -+ const struct pio_desc mt_gpio_pins[] = { -+ /* Misc. pins -- Pins PD15-PD18 belong to PERIPH -+ * B A20-A25 until bootstrap shuts them down. -+ * This code prevents these pins from being used -+ * during boot, since we do not -+ * need these pins to boot the system and we -+ * do not want resets to toggle needlessly. -+ */ -+ {"GNSS-RESET",AT91C_PIN_PD(15), 1, PIO_PULLUP, PIO_OUTPUT}, -+ {"SECURE-RESET",AT91C_PIN_PD(16), 1, PIO_PULLUP, PIO_OUTPUT}, -+ {"MTQ-RESET",AT91C_PIN_PD(17), 1, PIO_PULLUP, PIO_OUTPUT}, -+ {"USBHUB-RESET",AT91C_PIN_PD(18), 1, PIO_PULLUP, PIO_OUTPUT}, -+ {"GNSS-INT",AT91C_PIN_PD(19), 1, PIO_PULLUP, PIO_OUTPUT}, -+ {"WIFI-BT-LPMODE",AT91C_PIN_PD(20), 0, PIO_PULLUP, PIO_INPUT}, -+ {(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A}, -+ }; -+ -+ pio_configure(mt_gpio_pins); -+} -+ -+ - static void at91_dbgu_hw_init(void) - { - /* Configure DBGU pins */ -@@ -198,6 +223,9 @@ - slowclk_enable_osc32(); - #endif - -+ /* Initialize MT GPIO */ -+ initialize_mt_gpio(); -+ - /* Initialize dbgu */ - initialize_dbgu(); - -@@ -322,10 +350,8 @@ +--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-11 05:07:35.000000000 -0500 ++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-29 15:14:44.578915819 -0500 +@@ -312,10 +312,8 @@ reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA); reg |= AT91C_EBI_CS3A_SM; @@ -89,7 +47,7 @@ Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c reg &= ~AT91C_EBI_DRV; writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA); -@@ -355,9 +381,7 @@ +@@ -345,9 +343,7 @@ AT91C_BASE_SMC + SMC_CTRL3); /* Configure the PIO controller */ |