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-rw-r--r--recipes-kernel/linux/linux-3.12.70/mtcdt/linux-3.12-mtcdt-device-tree.patch468
1 files changed, 468 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-3.12.70/mtcdt/linux-3.12-mtcdt-device-tree.patch b/recipes-kernel/linux/linux-3.12.70/mtcdt/linux-3.12-mtcdt-device-tree.patch
new file mode 100644
index 0000000..bea818d
--- /dev/null
+++ b/recipes-kernel/linux/linux-3.12.70/mtcdt/linux-3.12-mtcdt-device-tree.patch
@@ -0,0 +1,468 @@
+Index: linux-3.12.27/arch/arm/boot/dts/mtcdt.dts
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-3.12.27/arch/arm/boot/dts/mtcdt.dts 2016-09-19 15:34:25.111103538 -0500
+@@ -0,0 +1,279 @@
++/*
++ * DTS file for Multi-Tech Systems MTCDT Hardware
++ */
++
++/dts-v1/;
++#include "at91sam9g25.dtsi"
++#include "at91sam9x5ek.dtsi"
++
++/ {
++ model = "Multi-Tech Systems MTCDT";
++ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
++
++ ahb {
++ apb {
++ macb0: ethernet@f802c000 {
++ phy-mode = "rmii";
++ status = "okay";
++ };
++
++ pinctrl@fffff400 {
++ nand {
++ pinctrl_nand: nand-0 {
++ atmel,pins =
++ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A Read Enable */
++ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD1 periph A Write Enable */
++ AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A Address Latch Enable */
++ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A Command Latch Enable */
++ AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
++ AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */
++ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A Data bit 0 */
++ AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A Data bit 1 */
++ AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD8 periph A Data bit 2 */
++ AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD9 periph A Data bit 3 */
++ AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD10 periph A Data bit 4 */
++ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD11 periph A Data bit 5 */
++ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD12 periph A Data bit 6 */
++ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD13 periph A Data bit 7 */
++ };
++
++ pinctrl_nand_16bits: nand_16bits-0 {
++ atmel,pins =
++ <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD14 periph A Data bit 8 */
++ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD15 periph A Data bit 9 */
++ AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD16 periph A Data bit 10 */
++ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD17 periph A Data bit 11 */
++ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD18 periph A Data bit 12 */
++ AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD19 periph A Data bit 13 */
++ AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD20 periph A Data bit 14 */
++ AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD21 periph A Data bit 15 */
++ };
++ };
++
++ mmc1 {
++ pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
++ atmel,pins =
++ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
++ AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
++ AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
++ };
++
++ pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
++ atmel,pins =
++ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
++ AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
++ AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
++ };
++ };
++ };
++
++ rtc@fffffeb0 {
++ status = "okay";
++ };
++
++ i2c0: i2c@f8010000 {
++ compatible = "i2c-gpio";
++ status = "okay";
++
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ board_temp@48 {
++ compatible = "ti,tmp102";
++ reg = <0x48>;
++ /* tempsensor_alert line running to pin PC19 on processor
++ set up an interrupt for this? */
++ };
++ };
++
++ i2c1: i2c@f8014000 {
++ compatible = "i2c-gpio";
++ status = "okay";
++
++ ap1_eeprom@50 {
++ compatible = "atmel,24c04";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++ ap2_eeprom@52 {
++ compatible = "atmel,24c04";
++ reg = <0x52>;
++ pagesize = <16>;
++ };
++ };
++
++ /* runs to Accessory Port 1 */
++ spi0: spi@f0000000 {
++ status = "okay";
++ cs-gpios = <&pioA 4 0>, <&pioA 2 0>, <&pioA 3 0>, <&pioA 5 0>;
++
++ ap1-adc@0 {
++ compatible = "mts-io-ap1-adc";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++ };
++ ap1-dout@1 {
++ compatible = "mts-io-ap1-dout";
++ spi-max-frequency = <1000000>;
++ reg = <1>;
++ };
++ ap1-spi@2 {
++ compatible = "spidev";
++ spi-max-frequency = <2000000>;
++ reg = <2>;
++ };
++ ap1-din@3 {
++ compatible = "mts-io-ap1-din";
++ spi-max-frequency = <1000000>;
++ reg = <3>;
++ };
++ };
++
++ /* runs to Accessory Port 2 */
++ spi1: spi@f0004000 {
++ status = "okay";
++
++ cs-gpios = <&pioC 15 0>, <&pioC 16 0>, <&pioC 17 0>, <&pioC 18 0>;
++
++ ap2-adc@0 {
++ compatible = "mts-io-ap2-adc";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++ };
++ ap2-dout@1 {
++ compatible = "mts-io-ap2-dout";
++ spi-max-frequency = <1000000>;
++ reg = <1>;
++ };
++ ap2-spi@2 {
++ compatible = "spidev";
++ spi-max-frequency = <2000000>;
++ reg = <2>;
++ };
++ ap2-din@3 {
++ compatible = "mts-io-ap2-din";
++ spi-max-frequency = <1000000>;
++ reg = <3>;
++ };
++ };
++ };
++
++ nand0: nand@40000000 {
++ reg = < 0x40000000 0x10000000
++ 0xffffe000 0x600 /* PMECC Registers */
++ 0xffffe600 0x200 /* PMECC Error Location Registers */
++ 0x00100000 0x100000 /* PMECC looup table in ROM code */
++ >;
++ atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
++ gpios = < &pioC 31 GPIO_ACTIVE_HIGH
++ &pioD 4 GPIO_ACTIVE_HIGH
++ 0
++ >;
++ atmel,pmecc-cap = <4>;
++ atmel,nand-has-dma;
++
++ nand@0 {
++ label = "NANDFlash";
++ reg = <0x0 0x10000000>;
++ };
++ at91bootstrap@0 {
++ label = "at91bootstrap";
++ reg = <0x0 0x40000>;
++ };
++ uboot@40000 {
++ label = "u-Boot";
++ reg = <0x40000 0x80000>;
++ };
++ ubootconfig0@c0000 {
++ label = "u-Boot Config";
++ reg = <0xc0000 0xa0000>;
++ };
++ ubootconfig1@160000 {
++ label = "u-Boot Redundant Config";
++ reg = <0x160000 0xa0000>;
++ };
++ uImage@200000 {
++ label = "uImage";
++ reg = <0x200000 0x600000>;
++ };
++ config0@800000 {
++ label = "Config";
++ reg = <0x800000 0x800000>;
++ };
++ config1@1000000 {
++ label = "OEM Config";
++ reg = <0x1000000 0x800000>;
++ };
++ rootfs@1800000 {
++ label = "Rootfs";
++ reg = <0x1800000 0xe800000>;
++ };
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ pa24 {
++ label = "led-status";
++ gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "default-on";
++ };
++ pa25 {
++ label = "led-a";
++ gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
++ };
++ pa26 {
++ label = "led-b";
++ gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
++ };
++ pa27 {
++ label = "led-c";
++ gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
++ };
++ pa28 {
++ label = "led-d";
++ gpios = <&pioA 28 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ /* GPS-PPS input on AP1 */
++ pps {
++ compatible = "pps-gpio";
++ gpios = <&pioA 29 0>;
++ capture-clear;
++ };
++
++
++ i2c@0 {
++ status = "okay";
++
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ board_temp@48 {
++ compatible = "ti,tmp102";
++ reg = <0x48>;
++ /* tempsensor_alert line running to pin PC19 on processor
++ set up an interrupt for this? */
++ };
++ };
++ i2c@1 {
++ status = "okay";
++
++ ap1_eeprom@50 {
++ compatible = "atmel,24c04";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++ ap2_eeprom@52 {
++ compatible = "atmel,24c04";
++ reg = <0x52>;
++ pagesize = <16>;
++ };
++ };
++};
+Index: linux-3.12.27/arch/arm/boot/dts/at91sam9x5cm.dtsi
+===================================================================
+--- linux-3.12.27.orig/arch/arm/boot/dts/at91sam9x5cm.dtsi 2014-08-26 07:12:26.000000000 -0500
++++ linux-3.12.27/arch/arm/boot/dts/at91sam9x5cm.dtsi 2015-01-13 13:58:20.766078428 -0600
+@@ -40,48 +40,8 @@
+ atmel,has-pmecc; /* Enable PMECC */
+ atmel,pmecc-cap = <2>;
+ atmel,pmecc-sector-size = <512>;
+- nand-on-flash-bbt;
++ /* nand-on-flash-bbt; */
+ status = "okay";
+-
+- at91bootstrap@0 {
+- label = "at91bootstrap";
+- reg = <0x0 0x40000>;
+- };
+-
+- uboot@40000 {
+- label = "u-boot";
+- reg = <0x40000 0x80000>;
+- };
+-
+- ubootenv@c0000 {
+- label = "U-Boot Env";
+- reg = <0xc0000 0x140000>;
+- };
+-
+- kernel@200000 {
+- label = "kernel";
+- reg = <0x200000 0x600000>;
+- };
+-
+- rootfs@800000 {
+- label = "rootfs";
+- reg = <0x800000 0x1f800000>;
+- };
+- };
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+-
+- pb18 {
+- label = "pb18";
+- gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+- linux,default-trigger = "heartbeat";
+- };
+-
+- pd21 {
+- label = "pd21";
+- gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+@@ -93,5 +53,4 @@
+ pinctrl-0 = <&pinctrl_1wire_cm>;
+ status = "okay";
+ };
+-
+ };
+Index: linux-3.12.27/arch/arm/boot/dts/at91sam9x5ek.dtsi
+===================================================================
+--- linux-3.12.27.orig/arch/arm/boot/dts/at91sam9x5ek.dtsi 2014-08-26 07:12:26.000000000 -0500
++++ linux-3.12.27/arch/arm/boot/dts/at91sam9x5ek.dtsi 2015-01-15 14:57:35.931862696 -0600
+@@ -24,23 +24,11 @@
+ &pinctrl_mmc0_slot0_clk_cmd_dat0
+ &pinctrl_mmc0_slot0_dat1_3>;
+ status = "okay";
++ /* external micro SD slot */
+ slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+- cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
+- };
+- };
+-
+- mmc1: mmc@f000c000 {
+- pinctrl-0 = <
+- &pinctrl_board_mmc1
+- &pinctrl_mmc1_slot0_clk_cmd_dat0
+- &pinctrl_mmc1_slot0_dat1_3>;
+- status = "okay";
+- slot@0 {
+- reg = <0>;
+- bus-width = <4>;
+- cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
++ cd-gpios = <&pioA 1 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+@@ -48,22 +36,13 @@
+ status = "okay";
+ };
+
+- usart0: serial@f801c000 {
++ uart0: serial@f8040000 {
+ status = "okay";
+ };
+
+ usb2: gadget@f803c000 {
+- atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
+- status = "okay";
+- };
+-
+- i2c0: i2c@f8010000 {
++ /* atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>; mtcdt: no vbus-gpio */
+ status = "okay";
+-
+- wm8731: wm8731@1a {
+- compatible = "wm8731";
+- reg = <0x1a>;
+- };
+ };
+
+ pinctrl@fffff400 {
+@@ -82,51 +61,24 @@
+ };
+ };
+
+- spi0: spi@f0000000 {
+- status = "okay";
+- cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+- m25p80@0 {
+- compatible = "atmel,at25df321a";
+- spi-max-frequency = <50000000>;
+- reg = <0>;
+- };
+- };
+-
+ watchdog@fffffe40 {
+ status = "okay";
+ };
+
+- ssc0: ssc@f0010000 {
+- status = "okay";
+- };
+ };
+
+ usb0: ohci@00600000 {
+ status = "okay";
+ num-ports = <3>;
+- atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
+- &pioD 19 GPIO_ACTIVE_LOW
+- &pioD 20 GPIO_ACTIVE_LOW
+- >;
++ //mtcdt: no vbus-gpio
++ //atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
++ // &pioD 19 GPIO_ACTIVE_LOW
++ // &pioD 20 GPIO_ACTIVE_LOW
++ // >;
+ };
+
+ usb1: ehci@00700000 {
+ status = "okay";
+ };
+ };
+-
+- sound {
+- compatible = "atmel,sam9x5-wm8731-audio";
+-
+- atmel,model = "wm8731 @ AT91SAM9X5EK";
+-
+- atmel,audio-routing =
+- "Headphone Jack", "RHPOUT",
+- "Headphone Jack", "LHPOUT",
+- "LLINEIN", "Line In Jack",
+- "RLINEIN", "Line In Jack";
+-
+- atmel,ssc-controller = <&ssc0>;
+- atmel,audio-codec = <&wm8731>;
+- };
+ };
+Index: linux-3.12.27/arch/arm/boot/dts/Makefile
+===================================================================
+--- linux-3.12.27.orig/arch/arm/boot/dts/Makefile 2014-08-26 07:12:26.000000000 -0500
++++ linux-3.12.27/arch/arm/boot/dts/Makefile 2015-01-13 13:58:20.766078428 -0600
+@@ -35,6 +35,7 @@
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
++dtb-$(CONFIG_ARCH_AT91) += mtcdt.dtb
+ # sama5d3
+ dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb