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-rw-r--r--recipes-kernel/linux/linux-3.12.70/mtcap/linux-3.12-mtcap-device-tree.patch251
1 files changed, 251 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-3.12.70/mtcap/linux-3.12-mtcap-device-tree.patch b/recipes-kernel/linux/linux-3.12.70/mtcap/linux-3.12-mtcap-device-tree.patch
new file mode 100644
index 0000000..f6addbc
--- /dev/null
+++ b/recipes-kernel/linux/linux-3.12.70/mtcap/linux-3.12-mtcap-device-tree.patch
@@ -0,0 +1,251 @@
+diff -Naru linux-3.12.70.orig/arch/arm/boot/dts/mtcap.dts linux-3.12.70/arch/arm/boot/dts/mtcap.dts
+--- linux-3.12.70.orig/arch/arm/boot/dts/mtcap.dts 1969-12-31 18:00:00.000000000 -0600
++++ linux-3.12.70/arch/arm/boot/dts/mtcap.dts 2017-09-07 18:36:07.841825140 -0500
+@@ -0,0 +1,235 @@
++/*
++ * DTS file for Multi-Tech Systems MTCAP Hardware
++ */
++
++/dts-v1/;
++#include "at91sam9g25.dtsi"
++
++/ {
++ model = "Multi-Tech Systems MTCAP";
++ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
++
++ chosen {
++ bootargs = "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2";
++ };
++
++ aliases {
++ spi0 = &spi0;
++ };
++
++ memory {
++ reg = <0x20000000 0x8000000>;
++ };
++
++ clocks {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++
++ main_clock: clock@0 {
++ compatible = "atmel,osc", "fixed-clock";
++ clock-frequency = <12000000>;
++ };
++ };
++
++ ahb {
++ apb {
++ macb0: ethernet@f802c000 {
++ phy-mode = "rmii";
++ status = "okay";
++ };
++
++ mmc0: mmc@f0008000 {
++ pinctrl-names = "default";
++ pinctrl-0 = <
++ /* &pinctrl_board_mmc0 */
++ &pinctrl_mmc0_slot0_clk_cmd_dat0
++ &pinctrl_mmc0_slot0_dat1_3>;
++ status = "okay";
++ slot@0 {
++ reg = <0>;
++ bus-width = <4>;
++ };
++ };
++
++ pinctrl@fffff400 {
++ mmc0 {
++ pinctrl_board_mmc0: mmc0-board {
++ atmel,pins =
++ <AT91_PIOA 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA4 gpio pin pull up and deglitch - WIFI enable */
++ };
++ };
++
++ nand {
++ pinctrl_nand: nand-0 {
++ atmel,pins =
++ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A Read Enable */
++ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD1 periph A Write Enable */
++ AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A Address Latch Enable */
++ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A Command Latch Enable */
++ AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
++ AT91_PIOC 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC31 gpio RDY/BUSY pin pull_up */
++ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A Data bit 0 */
++ AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A Data bit 1 */
++ AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD8 periph A Data bit 2 */
++ AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD9 periph A Data bit 3 */
++ AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD10 periph A Data bit 4 */
++ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD11 periph A Data bit 5 */
++ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD12 periph A Data bit 6 */
++ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD13 periph A Data bit 7 */
++ };
++
++ pinctrl_nand_16bits: nand_16bits-0 {
++ atmel,pins =
++ <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD14 periph A Data bit 8 */
++ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD15 periph A Data bit 9 */
++ AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD16 periph A Data bit 10 */
++ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD17 periph A Data bit 11 */
++ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD18 periph A Data bit 12 */
++ AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD19 periph A Data bit 13 */
++ AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD20 periph A Data bit 14 */
++ AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD21 periph A Data bit 15 */
++ };
++ };
++ };
++
++ rtc@fffffeb0 {
++ status = "okay";
++ };
++
++ i2c0: i2c@f8010000 {
++ compatible = "i2c-gpio";
++ status = "okay";
++
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ };
++
++ spi@f0000000 {
++ status = "okay";
++ cs-gpios = <&pioA 7 0>, <&pioA 1 0>, <0>, <0>;
++ lora-spi@0 {
++ compatible = "spidev";
++ spi-max-frequency = <2000000>;
++ reg = <0>;
++ };
++ lora-spi@1 {
++ compatible = "spidev";
++ spi-max-frequency = <2000000>;
++ reg = <1>;
++ };
++ };
++
++ dbgu: serial@fffff200 {
++ status = "okay";
++ };
++
++ uart0: serial@f8040000 {
++ status = "okay";
++ };
++
++ watchdog@fffffe40 {
++ status = "okay";
++ };
++ };
++
++ nand0: nand@40000000 {
++ nand-bus-width = <8>;
++ nand-ecc-mode = "hw";
++ atmel,has-pmecc; /* Enable PMECC */
++ atmel,pmecc-sector-size = <512>;
++ status = "okay";
++ reg = < 0x40000000 0x10000000
++ 0xffffe000 0x600 /* PMECC Registers */
++ 0xffffe600 0x200 /* PMECC Error Location Registers */
++ 0x00100000 0x100000 /* PMECC looup table in ROM code */
++ >;
++ atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
++ gpios = < &pioC 31 GPIO_ACTIVE_HIGH
++ &pioD 4 GPIO_ACTIVE_HIGH
++ 0
++ >;
++ atmel,pmecc-cap = <4>;
++ atmel,nand-has-dma;
++
++ nand@0 {
++ label = "NANDFlash";
++ reg = <0x0 0x10000000>;
++ };
++ at91bootstrap@0 {
++ label = "at91bootstrap";
++ reg = <0x0 0x40000>;
++ };
++ uboot@40000 {
++ label = "u-Boot";
++ reg = <0x40000 0x80000>;
++ };
++ ubootconfig0@c0000 {
++ label = "u-Boot Config";
++ reg = <0xc0000 0xa0000>;
++ };
++ ubootconfig1@160000 {
++ label = "u-Boot Redundant Config";
++ reg = <0x160000 0xa0000>;
++ };
++ uImage@200000 {
++ label = "uImage";
++ reg = <0x200000 0x600000>;
++ };
++ config0@800000 {
++ label = "Config";
++ reg = <0x800000 0x800000>;
++ };
++ config1@1000000 {
++ label = "OEM Config";
++ reg = <0x1000000 0x800000>;
++ };
++ rootfs@1800000 {
++ label = "Rootfs";
++ reg = <0x1800000 0xe800000>;
++ };
++ };
++
++ usb0: ohci@00600000 {
++ status = "okay";
++ num-ports = <3>;
++ };
++
++ usb1: ehci@00700000 {
++ status = "okay";
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pc25 {
++ label = "led-status";
++ gpios = <&pioC 25 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "default-on";
++ };
++ pc15 {
++ label = "led-lora";
++ gpios = <&pioC 15 GPIO_ACTIVE_LOW>;
++ };
++ pc16 {
++ label = "led-cd";
++ gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
++ };
++ pc20 {
++ label = "led-wifi";
++ gpios = <&pioC 20 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ i2c@0 {
++ status = "okay";
++ id_eeprom@56 {
++ compatible = "atmel,24c04";
++ reg = <0x56>;
++ pagesize = <16>;
++ };
++ };
++};
+Index: linux-3.12.27/arch/arm/boot/dts/Makefile
+===================================================================
+--- linux-3.12.27.orig/arch/arm/boot/dts/Makefile 2014-08-26 07:12:26.000000000 -0500
++++ linux-3.12.27/arch/arm/boot/dts/Makefile 2015-01-13 13:58:20.766078428 -0600
+@@ -35,6 +35,7 @@
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb
++dtb-$(CONFIG_ARCH_AT91) += mtcap.dtb
+ # sama5d3
+ dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb
+ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-31 22:46:07 +0000