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authorJohn Klug <john.klug@multitech.com>2022-05-24 15:40:44 -0500
committerJohn Klug <john.klug@multitech.com>2022-11-16 18:04:31 -0600
commit8fdce285ec71e7d6e477b968e26ce666c034e3b9 (patch)
tree81a233399151d855faa94522cd78279383b80209 /recipes-bsp
parent49f238950ed8a25ad2582a78832825c2a2b5ddab (diff)
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SD card U-Boot hack
Diffstat (limited to 'recipes-bsp')
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/configfactory.patch9
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd.patch302
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd2.patch302
-rw-r--r--recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsdold.patch114
-rw-r--r--recipes-bsp/u-boot/u-boot_2016.09.01.bb5
5 files changed, 726 insertions, 6 deletions
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/configfactory.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/configfactory.patch
index 6a32476..cfda8cb 100644
--- a/recipes-bsp/u-boot/u-boot-2016.09.01/configfactory.patch
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/configfactory.patch
@@ -1,6 +1,6 @@
diff -Naru orig/configs/at91sam9x5ek_nandflash_defconfig new/configs/at91sam9x5ek_nandflash_defconfig
--- orig/configs/at91sam9x5ek_nandflash_defconfig 2022-05-11 17:23:26.522032483 -0500
-+++ new/configs/at91sam9x5ek_nandflash_defconfig 2022-05-12 12:23:20.268431980 -0500
++++ new/configs/at91sam9x5ek_nandflash_defconfig 2022-05-23 12:37:49.630171035 -0500
@@ -1,25 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
@@ -177,6 +177,8 @@ diff -Naru orig/configs/at91sam9x5ek_nandflash_defconfig new/configs/at91sam9x5e
+# CONFIG_TARGET_AT91SAM9RLEK is not set
CONFIG_TARGET_AT91SAM9X5EK=y
-CONFIG_SPL=y
+-CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
+-CONFIG_BOOTDELAY=3
+# CONFIG_TARGET_SAMA5D2_PTC is not set
+# CONFIG_TARGET_SAMA5D2_XPLAINED is not set
+# CONFIG_TARGET_SAMA5D3_XPLAINED is not set
@@ -217,8 +219,7 @@ diff -Naru orig/configs/at91sam9x5ek_nandflash_defconfig new/configs/at91sam9x5e
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
- CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
--CONFIG_BOOTDELAY=3
++CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5"
+CONFIG_ARCH_FIXUP_FDT=y
+
+#
@@ -297,7 +298,7 @@ diff -Naru orig/configs/at91sam9x5ek_nandflash_defconfig new/configs/at91sam9x5e
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
-+CONFIG_CMD_SAVEENV=y
++# CONFIG_CMD_SAVEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+
+#
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd.patch
new file mode 100644
index 0000000..f2edd89
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd.patch
@@ -0,0 +1,302 @@
+diff -Naru orig/include/configs/at91sam9x5ek.h new/include/configs/at91sam9x5ek.h
+--- orig/include/configs/at91sam9x5ek.h 2022-05-23 11:05:42.510300376 -0500
++++ new/include/configs/at91sam9x5ek.h 2022-05-23 11:35:48.758258108 -0500
+@@ -9,9 +9,12 @@
+ #ifndef __CONFIG_H__
+ #define __CONFIG_H__
+
++#include <linux/kconfig.h>
+ #include <asm/hardware.h>
+
+-#define CONFIG_SYS_TEXT_BASE 0x26f00000
++#define USE_MTCDT
++#define MTCDT
++#define CONFIG_SYS_TEXT_BASE 0x2ef00000
+
+ /* ARM asynchronous clock */
+ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
+@@ -26,6 +29,8 @@
+ #define CONFIG_BOARD_EARLY_INIT_F
+ #define CONFIG_DISPLAY_CPUINFO
+
++#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */
++
+ /* general purpose I/O */
+ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+ #define CONFIG_AT91_GPIO
+@@ -36,6 +41,8 @@
+ #define CONFIG_USART_ID ATMEL_ID_SYS
+
+ /* LCD */
++/* MTCDT has no LCD */
++#if !defined(MTCDT)
+ #define CONFIG_LCD
+ #define LCD_BPP LCD_COLOR16
+ #define LCD_OUTPUT_BPP 24
+@@ -46,7 +53,13 @@
+ #define CONFIG_ATMEL_HLCD
+ #define CONFIG_ATMEL_LCD_RGB565
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
++#endif /* !defined(MTCDT) */
++
++/* check for keypress even if bootdelay is 0 */
++#define CONFIG_ZERO_BOOTDELAY_CHECK
+
++/*STATUS LED*/
++#define BOOT_STATUS_LED AT91_PIN_PA24
+
+ /*
+ * BOOTP options
+@@ -60,10 +73,10 @@
+ #define CONFIG_SYS_NO_FLASH
+
+ /*
+- * Command line configuration.
++ * Defined by .config (configs/at91sam9x5ek)
++ * #define CONFIG_CMD_I2C
+ */
+-#define CONFIG_CMD_NAND
+-
++#define CONFIG_SYS_I2C
+ /*
+ * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+ * NB: in this case, USB 1.1 devices won't be recognized.
+@@ -72,7 +85,7 @@
+ /* SDRAM */
+ #define CONFIG_NR_DRAM_BANKS 1
+ #define CONFIG_SYS_SDRAM_BASE 0x20000000
+-#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
++#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
+
+ #define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+@@ -94,13 +107,30 @@
+ /* our CLE is AD22 */
+ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
+-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
++/* MTCDT nand ready is PC31 */
++#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31
+
+ /* PMECC & PMERRLOC */
+ #define CONFIG_ATMEL_NAND_HWECC 1
+ #define CONFIG_ATMEL_NAND_HW_PMECC 1
+-#define CONFIG_PMECC_CAP 2
++
++/* MTCDT: 4-bit PMECC */
++#define CONFIG_PMECC_CAP 4
+ #define CONFIG_PMECC_SECTOR_SIZE 512
++/*
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ * ATMEL_PMECC_INDEX_OFFSET_512 and
++ * ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which as used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
++ */
++
+
+ #define CONFIG_CMD_NAND_TRIMFFS
+
+@@ -147,20 +177,36 @@
+ #endif
+ #endif
+
++#define CONFIG_SYS_I2C_SOFT
++#define CONFIG_SOFT_I2C
++#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
++#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
++#define CONFIG_SYS_I2C_SOFT_SPEED 50000
++#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
++/* Values from previous levels of Conduit U-Boot */
++#define CONFIG_SYS_I2C_SLAVE 0xfe
++#define I2C_RXTX_LEN 128
++
++/* I2C eeprom support */
++#define CONFIG_CMD_EEPROM
++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
++
+ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+
+ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+-#define CONFIG_SYS_MEMTEST_END 0x26e00000
++#define CONFIG_SYS_MEMTEST_END 0x2ee00000
+
+ #ifdef CONFIG_SYS_USE_NANDFLASH
+ /* bootstrap + u-boot + env + linux in nandflash */
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET 0xc0000
+-#define CONFIG_ENV_OFFSET_REDUND 0x100000
++/* #define CONFIG_ENV_OFFSET_REDUND 0x160000 */
+ #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
+-#define CONFIG_BOOTCOMMAND "nand read " \
+- "0x22000000 0x200000 0x300000; " \
+- "bootm 0x22000000"
++/* MTCDT: read from env variables for boot */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++
+ #elif defined(CONFIG_SYS_USE_SPIFLASH)
+ /* bootstrap + u-boot + env + linux in spi flash */
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+@@ -197,6 +243,9 @@
+ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ "root=/dev/mmcblk0p2 " \
+ "rw rootfstype=ext4 rootwait"
++#elif defined(USE_MTCDT)
++/* MTCDT uses jffs2 */
++#define CONFIG_BOOTARGS "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
+ #else
+ #define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+@@ -264,7 +313,7 @@
+ #define CONFIG_SYS_NAND_OOBSIZE 64
+ #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
+ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
+-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
++/* # CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not defined */
+
+ #elif CONFIG_SYS_USE_SPIFLASH
+ #define CONFIG_SPL_SPI_SUPPORT
+@@ -274,4 +323,21 @@
+
+ #endif
+
++/* MTCDT defaults */
++#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */
++#define CONFIG_ETHADDR 00:08:00:87:00:02
++#define CONFIG_IPADDR 192.168.2.1
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_SERVERIP 192.168.2.2
++#define CONFIG_HOSTNAME AT91SAM9G25
++#define CONFIG_LOADADDR 0x22000000
++
++/* MTCDT - enable watchdog */
++#define CONFIG_AT91SAM9_WATCHDOG 1
++#define CONFIG_HW_WATCHDOG 1
++#define CONFIG_AT91_HW_WDT_TIMEOUT 16
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "kernel_addr=0x200000\0" \
++ ""
++
+ #endif
+diff -raNu old/board/atmel/at91sam9x5ek/at91sam9x5ek.c new/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+--- old/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 11:09:53.668926301 -0500
++++ new/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 17:35:53.342774065 -0500
+@@ -44,7 +44,8 @@
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ /* NAND flash on D16 */
+- csa |= AT91_MATRIX_NFD0_ON_D16;
++ /* MTCDT: nand flash is set up by bootstrap, so leave it alone here */
++ /* csa |= AT91_MATRIX_NFD0_ON_D16; */
+
+ /* Configure IO drive */
+ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@
+
+ int board_init(void)
+ {
++ /* Set Status LED High */
++ at91_set_gpio_output(BOOT_STATUS_LED, 0);
++
+ /* arch number of AT91SAM9X5EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+
+@@ -267,6 +271,7 @@
+ #endif
+
+ #ifdef CONFIG_ATMEL_SPI
++ at91_spi0_hw_init(1 << 0);
+ at91_spi0_hw_init(1 << 4);
+ #endif
+
+@@ -283,12 +288,6 @@
+ return 0;
+ }
+
+-int dram_init(void)
+-{
+- gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
+- CONFIG_SYS_SDRAM_SIZE);
+- return 0;
+-}
+
+ #if defined(CONFIG_SPL_BUILD)
+ #include <spl.h>
+@@ -362,4 +361,69 @@
+ /* DDRAM2 Controller initialize */
+ ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
++
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++ char vendor_id[32];
++ char product_id[32];
++ char device_id[32];
++ char hw_version[32];
++ uint8_t mac_addr[6];
++ char imei[32];
++ uint8_t capa[32];
++ uint8_t mac_bluetooth[6];
++ uint8_t mac_wifi[6];
++ uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++ struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++ printf("EEPROM: read error\n");
++ return 0;
++ }
++
++ if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++ printf("EEPROM: uninitialized\n");
++ return 0;
++ }
++
++ printf("vendor-id: %s\n", eeprom_buffer.vendor_id);
++ printf("product-id: %s\n", eeprom_buffer.product_id);
++ printf("device-id: %s\n", eeprom_buffer.device_id);
++ printf("hw-version: %s\n", eeprom_buffer.hw_version);
++ printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++ eeprom_buffer.mac_addr[1],
++ eeprom_buffer.mac_addr[2],
++ eeprom_buffer.mac_addr[3],
++ eeprom_buffer.mac_addr[4],
++ eeprom_buffer.mac_addr[5]);
++
++ memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++ return 1;
++}
++
++int misc_init_r(void)
++{
++ uchar enetaddr[6];
++
++ /* set MAC address from EEPROM if read successful */
++ if (board_get_enetaddr(enetaddr)) {
++ eth_setenv_enetaddr("ethaddr", enetaddr);
++ }
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
++ CONFIG_SYS_SDRAM_SIZE);
++ return 0;
++}
++
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd2.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd2.patch
new file mode 100644
index 0000000..8dd5677
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsd2.patch
@@ -0,0 +1,302 @@
+diff -Naru orig/include/configs/at91sam9x5ek.h new/include/configs/at91sam9x5ek.h
+--- orig/include/configs/at91sam9x5ek.h 2022-05-23 11:05:42.510300376 -0500
++++ new/include/configs/at91sam9x5ek.h 2022-05-23 11:35:48.758258108 -0500
+@@ -9,9 +9,12 @@
+ #ifndef __CONFIG_H__
+ #define __CONFIG_H__
+
++#include <linux/kconfig.h>
+ #include <asm/hardware.h>
+
+-#define CONFIG_SYS_TEXT_BASE 0x26f00000
++#define USE_MTCDT
++#define MTCDT
++#define CONFIG_SYS_TEXT_BASE 0x2ef00000
+
+ /* ARM asynchronous clock */
+ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
+@@ -26,6 +29,8 @@
+ #define CONFIG_BOARD_EARLY_INIT_F
+ #define CONFIG_DISPLAY_CPUINFO
+
++#define CONFIG_MISC_INIT_R /* enable platform-dependent misc_init_r() */
++
+ /* general purpose I/O */
+ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
+ #define CONFIG_AT91_GPIO
+@@ -36,6 +41,8 @@
+ #define CONFIG_USART_ID ATMEL_ID_SYS
+
+ /* LCD */
++/* MTCDT has no LCD */
++#if !defined(MTCDT)
+ #define CONFIG_LCD
+ #define LCD_BPP LCD_COLOR16
+ #define LCD_OUTPUT_BPP 24
+@@ -46,7 +53,13 @@
+ #define CONFIG_ATMEL_HLCD
+ #define CONFIG_ATMEL_LCD_RGB565
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
++#endif /* !defined(MTCDT) */
++
++/* check for keypress even if bootdelay is 0 */
++#define CONFIG_ZERO_BOOTDELAY_CHECK
+
++/*STATUS LED*/
++#define BOOT_STATUS_LED AT91_PIN_PA24
+
+ /*
+ * BOOTP options
+@@ -60,10 +73,10 @@
+ #define CONFIG_SYS_NO_FLASH
+
+ /*
+- * Command line configuration.
++ * Defined by .config (configs/at91sam9x5ek)
++ * #define CONFIG_CMD_I2C
+ */
+-#define CONFIG_CMD_NAND
+-
++#define CONFIG_SYS_I2C
+ /*
+ * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
+ * NB: in this case, USB 1.1 devices won't be recognized.
+@@ -72,7 +85,7 @@
+ /* SDRAM */
+ #define CONFIG_NR_DRAM_BANKS 1
+ #define CONFIG_SYS_SDRAM_BASE 0x20000000
+-#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
++#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
+
+ #define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
+@@ -94,13 +107,30 @@
+ /* our CLE is AD22 */
+ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
+-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
++/* MTCDT nand ready is PC31 */
++#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC31
+
+ /* PMECC & PMERRLOC */
+ #define CONFIG_ATMEL_NAND_HWECC 1
+ #define CONFIG_ATMEL_NAND_HW_PMECC 1
+-#define CONFIG_PMECC_CAP 2
++
++/* MTCDT: 4-bit PMECC */
++#define CONFIG_PMECC_CAP 4
+ #define CONFIG_PMECC_SECTOR_SIZE 512
++/*
++ * CONFIG_PMECC_INDEX_TABLE_OFFSET has been replaced by:
++ * ATMEL_PMECC_INDEX_OFFSET_512 and
++ * ATMEL_PMECC_INDEX_OFFSET_1024
++ *
++ * Which as used depends on:
++ * host->pmecc_sector_size == 512
++ *
++ * 2012.10:
++ * #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
++ * 2016.03 (at91sam9x5.h):
++ * 182:#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
++ */
++
+
+ #define CONFIG_CMD_NAND_TRIMFFS
+
+@@ -147,20 +177,36 @@
+ #endif
+ #endif
+
++#define CONFIG_SYS_I2C_SOFT
++#define CONFIG_SOFT_I2C
++#define CONFIG_SOFT_I2C_GPIO_SCL AT91_PIN_PA31
++#define CONFIG_SOFT_I2C_GPIO_SDA AT91_PIN_PA30
++#define CONFIG_SYS_I2C_SOFT_SPEED 50000
++#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
++/* Values from previous levels of Conduit U-Boot */
++#define CONFIG_SYS_I2C_SLAVE 0xfe
++#define I2C_RXTX_LEN 128
++
++/* I2C eeprom support */
++#define CONFIG_CMD_EEPROM
++#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* at24c04 */
++#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
++#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
++
+ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+
+ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+-#define CONFIG_SYS_MEMTEST_END 0x26e00000
++#define CONFIG_SYS_MEMTEST_END 0x2ee00000
+
+ #ifdef CONFIG_SYS_USE_NANDFLASH
+ /* bootstrap + u-boot + env + linux in nandflash */
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET 0xc0000
+-#define CONFIG_ENV_OFFSET_REDUND 0x100000
++/* #define CONFIG_ENV_OFFSET_REDUND 0x160000 */
+ #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
+-#define CONFIG_BOOTCOMMAND "nand read " \
+- "0x22000000 0x200000 0x300000; " \
+- "bootm 0x22000000"
++/* MTCDT: read from env variables for boot */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++
+ #elif defined(CONFIG_SYS_USE_SPIFLASH)
+ /* bootstrap + u-boot + env + linux in spi flash */
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+@@ -197,6 +243,9 @@
+ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
+ "root=/dev/mmcblk0p2 " \
+ "rw rootfstype=ext4 rootwait"
++#elif defined(USE_MTCDT)
++/* MTCDT uses jffs2 */
++#define CONFIG_BOOTARGS "mem=256M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
+ #else
+ #define CONFIG_BOOTARGS \
+ "console=ttyS0,115200 earlyprintk " \
+@@ -264,7 +313,7 @@
+ #define CONFIG_SYS_NAND_OOBSIZE 64
+ #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
+ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
+-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
++# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not defined
+
+ #elif CONFIG_SYS_USE_SPIFLASH
+ #define CONFIG_SPL_SPI_SUPPORT
+@@ -274,4 +323,21 @@
+
+ #endif
+
++/* MTCDT defaults */
++#define CONFIG_ENV_OVERWRITE 1 /* Allow Overwrite of serial# & ethaddr */
++#define CONFIG_ETHADDR 00:08:00:87:00:02
++#define CONFIG_IPADDR 192.168.2.1
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_SERVERIP 192.168.2.2
++#define CONFIG_HOSTNAME AT91SAM9G25
++#define CONFIG_LOADADDR 0x22000000
++
++/* MTCDT - enable watchdog */
++#define CONFIG_AT91SAM9_WATCHDOG 1
++#define CONFIG_HW_WATCHDOG 1
++#define CONFIG_AT91_HW_WDT_TIMEOUT 16
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "kernel_addr=0x200000\0" \
++ ""
++
+ #endif
+diff -raNu old/board/atmel/at91sam9x5ek/at91sam9x5ek.c new/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+--- old/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 11:09:53.668926301 -0500
++++ new/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 17:35:53.342774065 -0500
+@@ -44,7 +44,8 @@
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ /* NAND flash on D16 */
+- csa |= AT91_MATRIX_NFD0_ON_D16;
++ /* MTCDT: nand flash is set up by bootstrap, so leave it alone here */
++ /* csa |= AT91_MATRIX_NFD0_ON_D16; */
+
+ /* Configure IO drive */
+ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@
+
+ int board_init(void)
+ {
++ /* Set Status LED High */
++ at91_set_gpio_output(BOOT_STATUS_LED, 0);
++
+ /* arch number of AT91SAM9X5EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+
+@@ -267,6 +271,7 @@
+ #endif
+
+ #ifdef CONFIG_ATMEL_SPI
++ at91_spi0_hw_init(1 << 0);
+ at91_spi0_hw_init(1 << 4);
+ #endif
+
+@@ -283,12 +288,6 @@
+ return 0;
+ }
+
+-int dram_init(void)
+-{
+- gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
+- CONFIG_SYS_SDRAM_SIZE);
+- return 0;
+-}
+
+ #if defined(CONFIG_SPL_BUILD)
+ #include <spl.h>
+@@ -362,4 +361,69 @@
+ /* DDRAM2 Controller initialize */
+ ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
++
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++ char vendor_id[32];
++ char product_id[32];
++ char device_id[32];
++ char hw_version[32];
++ uint8_t mac_addr[6];
++ char imei[32];
++ uint8_t capa[32];
++ uint8_t mac_bluetooth[6];
++ uint8_t mac_wifi[6];
++ uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++ struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++ printf("EEPROM: read error\n");
++ return 0;
++ }
++
++ if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++ printf("EEPROM: uninitialized\n");
++ return 0;
++ }
++
++ printf("vendor-id: %s\n", eeprom_buffer.vendor_id);
++ printf("product-id: %s\n", eeprom_buffer.product_id);
++ printf("device-id: %s\n", eeprom_buffer.device_id);
++ printf("hw-version: %s\n", eeprom_buffer.hw_version);
++ printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++ eeprom_buffer.mac_addr[1],
++ eeprom_buffer.mac_addr[2],
++ eeprom_buffer.mac_addr[3],
++ eeprom_buffer.mac_addr[4],
++ eeprom_buffer.mac_addr[5]);
++
++ memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++ return 1;
++}
++
++int misc_init_r(void)
++{
++ uchar enetaddr[6];
++
++ /* set MAC address from EEPROM if read successful */
++ if (board_get_enetaddr(enetaddr)) {
++ eth_setenv_enetaddr("ethaddr", enetaddr);
++ }
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
++ CONFIG_SYS_SDRAM_SIZE);
++ return 0;
++}
++
diff --git a/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsdold.patch b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsdold.patch
new file mode 100644
index 0000000..165a7d0
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-2016.09.01/mtcdtsdold.patch
@@ -0,0 +1,114 @@
+diff -raNu old/board/atmel/at91sam9x5ek/at91sam9x5ek.c new/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+--- old/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 11:09:53.668926301 -0500
++++ new/board/atmel/at91sam9x5ek/at91sam9x5ek.c 2017-05-05 17:35:53.342774065 -0500
+@@ -44,7 +44,8 @@
+ csa = readl(&matrix->ebicsa);
+ csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+ /* NAND flash on D16 */
+- csa |= AT91_MATRIX_NFD0_ON_D16;
++ /* MTCDT: nand flash is set up by bootstrap, so leave it alone here */
++ /* csa |= AT91_MATRIX_NFD0_ON_D16; */
+
+ /* Configure IO drive */
+ csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+@@ -256,6 +257,9 @@
+
+ int board_init(void)
+ {
++ /* Set Status LED High */
++ at91_set_gpio_output(BOOT_STATUS_LED, 0);
++
+ /* arch number of AT91SAM9X5EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK;
+
+@@ -267,6 +271,7 @@
+ #endif
+
+ #ifdef CONFIG_ATMEL_SPI
++ at91_spi0_hw_init(1 << 0);
+ at91_spi0_hw_init(1 << 4);
+ #endif
+
+@@ -283,12 +288,6 @@
+ return 0;
+ }
+
+-int dram_init(void)
+-{
+- gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
+- CONFIG_SYS_SDRAM_SIZE);
+- return 0;
+-}
+
+ #if defined(CONFIG_SPL_BUILD)
+ #include <spl.h>
+@@ -362,4 +361,69 @@
+ /* DDRAM2 Controller initialize */
+ ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
+ }
++
+ #endif
++
++/* on-board EEPROM */
++struct mts_id_eeprom_layout {
++ char vendor_id[32];
++ char product_id[32];
++ char device_id[32];
++ char hw_version[32];
++ uint8_t mac_addr[6];
++ char imei[32];
++ uint8_t capa[32];
++ uint8_t mac_bluetooth[6];
++ uint8_t mac_wifi[6];
++ uint8_t reserved[302];
++};
++
++int board_get_enetaddr(uchar *enetaddr)
++{
++ struct mts_id_eeprom_layout eeprom_buffer = {0};
++
++ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, &eeprom_buffer, sizeof(eeprom_buffer))) {
++ printf("EEPROM: read error\n");
++ return 0;
++ }
++
++ if (eeprom_buffer.vendor_id[0] == 0x00 || eeprom_buffer.vendor_id[0] == 0xFF) {
++ printf("EEPROM: uninitialized\n");
++ return 0;
++ }
++
++ printf("vendor-id: %s\n", eeprom_buffer.vendor_id);
++ printf("product-id: %s\n", eeprom_buffer.product_id);
++ printf("device-id: %s\n", eeprom_buffer.device_id);
++ printf("hw-version: %s\n", eeprom_buffer.hw_version);
++ printf("mac-addr: %02x:%02x:%02x:%02x:%02x:%02x\n", eeprom_buffer.mac_addr[0],
++ eeprom_buffer.mac_addr[1],
++ eeprom_buffer.mac_addr[2],
++ eeprom_buffer.mac_addr[3],
++ eeprom_buffer.mac_addr[4],
++ eeprom_buffer.mac_addr[5]);
++
++ memcpy(enetaddr, eeprom_buffer.mac_addr, 6);
++
++ return 1;
++}
++
++int misc_init_r(void)
++{
++ uchar enetaddr[6];
++
++ /* set MAC address from EEPROM if read successful */
++ if (board_get_enetaddr(enetaddr)) {
++ eth_setenv_enetaddr("ethaddr", enetaddr);
++ }
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE,
++ CONFIG_SYS_SDRAM_SIZE);
++ return 0;
++}
++
diff --git a/recipes-bsp/u-boot/u-boot_2016.09.01.bb b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
index a0a068b..3bf223e 100644
--- a/recipes-bsp/u-boot/u-boot_2016.09.01.bb
+++ b/recipes-bsp/u-boot/u-boot_2016.09.01.bb
@@ -6,20 +6,21 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-2016.09.01:"
FCONFIG_PATCH = "file://configfactory.patch"
CONFIG_PATCH = "file://config.patch"
+# file://mtpwd.path
SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 \
file://kconfig_common.patch \
${FCONFIG_PATCH} \
file://i2c.patch \
file://printeepromcrc.patch \
- file://mtpwd.patch \
file://tftpput.patch \
file://hide_uboot_version.patch \
file://fix_2_6.patch \
file://fix_net.patch \
"
+# file://mtcdt.patch
SRC_URI_append_mtcdt = " \
- file://mtcdt.patch \
+ file://mtcdtsd.patch \
file://mtcdt_flush_console_autoboot.patch"
SRC_URI_append_mtcap = " \