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| author | Mykyta Dorokhin <mykyta.dorokhin@globallogic.com> | 2020-02-19 15:40:44 +0200 |
|---|---|---|
| committer | Serhii Kostiuk <serhii.o.kostiuk@globallogic.com> | 2020-05-21 10:40:11 +0300 |
| commit | 19ca401463153a7694a320f543852412d74cbd8f (patch) | |
| tree | e3720d485786f1f2fc78c909fc2ad2f97829ab8d /recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch | |
| parent | ed016261befcdc421ae1ac5d28d21066b56f42f2 (diff) | |
| parent | 92cbb8fb30c624d3be98d6408d6ff7f03264a2c9 (diff) | |
| download | meta-mlinux-atmel-19ca401463153a7694a320f543852412d74cbd8f.tar.gz meta-mlinux-atmel-19ca401463153a7694a320f543852412d74cbd8f.tar.bz2 meta-mlinux-atmel-19ca401463153a7694a320f543852412d74cbd8f.zip | |
mpower-dev-thud: merge meta-mlinux:master (92cbb8fb Feb 11 2020) to meta-mlinux:multiarch5-thud (ed01626 Feb 3 2020)
Diffstat (limited to 'recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch')
| -rw-r--r-- | recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch b/recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch index e4a8b2b..0b53fd0 100644 --- a/recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch +++ b/recipes-connectivity/lora/lora-gateway/lora-gateway-spectral-scan-skip-fpga-reset.patch @@ -1,5 +1,5 @@ diff --git a/util_spectral_scan/src/util_spectral_scan.c b/util_spectral_scan/src/util_spectral_scan.c -index d2aecda..f070f4b 100644 +index d2aecda..cbc8377 100644 --- a/util_spectral_scan/src/util_spectral_scan.c +++ b/util_spectral_scan/src/util_spectral_scan.c @@ -30,6 +30,7 @@ Maintainer: Michael Coracin @@ -53,7 +53,27 @@ index d2aecda..f070f4b 100644 if(x != 0) { printf("ERROR: Failed to connect to FPGA\n"); return EXIT_FAILURE; -@@ -382,6 +398,10 @@ int main( int argc, char ** argv ) +@@ -324,6 +340,9 @@ int main( int argc, char ** argv ) + do { + wait_ms(10); + lgw_fpga_reg_r(LGW_FPGA_STATUS, ®_val); ++ if (shutdown_signal_recv) { ++ break; ++ } + } + while((TAKE_N_BITS_FROM((uint8_t)reg_val, 0, 5)) != 1); /* Clear has started */ + +@@ -346,6 +365,9 @@ int main( int argc, char ** argv ) + do { + wait_ms(1000); + lgw_fpga_reg_r(LGW_FPGA_STATUS, ®_val); ++ if (shutdown_signal_recv) { ++ break; ++ } + } + while((TAKE_N_BITS_FROM((uint8_t)reg_val, 5, 1)) != 1); + +@@ -382,6 +404,10 @@ int main( int argc, char ** argv ) } fprintf(log_file, "\n"); printf("\n"); @@ -63,3 +83,4 @@ index d2aecda..f070f4b 100644 + } } fclose(log_file); + |