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author | Harsh Sharma <harsh.sharma@multitech.com> | 2018-06-13 15:27:52 -0500 |
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committer | Harsh Sharma <harsh.sharma@multitech.com> | 2018-06-13 15:27:52 -0500 |
commit | dbe7ab10123eda8a4aaba5f66476da73e84a465f (patch) | |
tree | af463d01235c40a27b6926ac36c5e6e9c317ee14 /libloragw | |
parent | 04036d3f88d5fa2077cbd9f3c59c1f2811b08ae3 (diff) | |
download | lora_gateway_mtac_full-dbe7ab10123eda8a4aaba5f66476da73e84a465f.tar.gz lora_gateway_mtac_full-dbe7ab10123eda8a4aaba5f66476da73e84a465f.tar.bz2 lora_gateway_mtac_full-dbe7ab10123eda8a4aaba5f66476da73e84a465f.zip |
Revert "Compiler warning fixes"
This reverts commit 04036d3f88d5fa2077cbd9f3c59c1f2811b08ae3
Diffstat (limited to 'libloragw')
-rw-r--r-- | libloragw/inc/loragw_reg.h | 13 | ||||
-rw-r--r-- | libloragw/src/loragw_fpga.c | 5 | ||||
-rw-r--r-- | libloragw/src/loragw_reg.c | 48 | ||||
-rw-r--r-- | libloragw/src/loragw_spi.native.c | 2 |
4 files changed, 27 insertions, 41 deletions
diff --git a/libloragw/inc/loragw_reg.h b/libloragw/inc/loragw_reg.h index 8cfc053..2a944a7 100644 --- a/libloragw/inc/loragw_reg.h +++ b/libloragw/inc/loragw_reg.h @@ -393,19 +393,6 @@ this file is autogenerated from registers description /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ /** -@brief Read LoRa FPGA Version -@return FPGA version -*/ -uint8_t read_fpga_version(); - -/** -@brief Check if the LoRa FPGA Version is supported by loRa Gateway -@param version number provided to check through the validated list -@return status true/false -*/ -bool check_fpga_version(uint8_t version) - -/** @brief Connect LoRa concentrator by opening SPI link @param spi_only indicates if we only want to create the SPI connexion to the concentrator, or if we also want to reset it and configure the FPGA (if present) diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c index 832152b..90fb9b7 100644 --- a/libloragw/src/loragw_fpga.c +++ b/libloragw/src/loragw_fpga.c @@ -134,7 +134,6 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { int x; int32_t val; bool spectral_scan_support, lbt_support; - uint8_t fpga_version; /* Check input parameters */ if ((tx_notch_freq < LGW_MIN_NOTCH_FREQ) || (tx_notch_freq > LGW_MAX_NOTCH_FREQ)) { @@ -167,8 +166,8 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { return LGW_REG_ERROR; } - fpga_version = read_fpga_version(); - if (fpga_version > 28) { + + if (read_fpga_version() > 28) { /* Required for Semtech AP2 reference design and AP1.5 > v28 */ x = lgw_fpga_reg_w(LGW_FPGA_CTRL_INVERT_IQ, 1); if (x != LGW_REG_SUCCESS) { diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index 4d689da..aef9749 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -407,6 +407,30 @@ int page_switch(uint8_t target) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ +bool check_fpga_version(uint8_t version) { + int i; + + for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) { + if (FPGA_VERSION[i] == version ) { + return true; + } + } + + return false; +} + +uint8_t read_fpga_version() { + uint8_t u = 0; + uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); + if (spi_stat != LGW_SPI_SUCCESS) { + DEBUG_MSG("ERROR READING VERSION REGISTER\n"); + return LGW_REG_ERROR; + } + return u; +} + +/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ + int reg_w_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, struct lgw_reg_s r, int32_t reg_value) { int spi_stat = LGW_REG_SUCCESS; int i, size_byte; @@ -486,30 +510,6 @@ int reg_r_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target /* -------------------------------------------------------------------------- */ /* --- PUBLIC FUNCTIONS DEFINITION ------------------------------------------ */ -/* Read the FPGA version */ -uint8_t read_fpga_version() { - uint8_t u = 0; - uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); - if (spi_stat != LGW_SPI_SUCCESS) { - DEBUG_MSG("ERROR READING VERSION REGISTER\n"); - return LGW_REG_ERROR; - } - return u; -} - -/* Verify the FPGA version is supported */ -bool check_fpga_version(uint8_t version) { - int i; - - for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) { - if (FPGA_VERSION[i] == version ) { - return true; - } - } - - return false; -} - /* Concentrator connect */ int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { int spi_stat = LGW_SPI_SUCCESS; diff --git a/libloragw/src/loragw_spi.native.c b/libloragw/src/loragw_spi.native.c index 56c9d94..a146e8b 100644 --- a/libloragw/src/loragw_spi.native.c +++ b/libloragw/src/loragw_spi.native.c @@ -64,7 +64,7 @@ char* spi_dev_path = SPI_DEV_PATH; /* set SPI device */ int lgw_spi_set_path(const char *path) { if (path) { - strncpy(spi_dev_path, path, sizeof(path)-1); + spi_dev_path = path; return LGW_SPI_SUCCESS; } else { |