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author | Harsh Sharma <harsh.sharma@multitech.com> | 2019-10-29 14:40:59 -0500 |
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committer | Harsh Sharma <harsh.sharma@multitech.com> | 2019-10-29 14:40:59 -0500 |
commit | c05674a9613e5acd5e0bdee9d1298a780189a459 (patch) | |
tree | 444fe07fd8c1cdf24f59690a6f309251edbc5d95 /libloragw/src | |
parent | e17924a367e6008c669b31f4dcf82ccfee7d3877 (diff) | |
download | lora_gateway_mtac_full-c05674a9613e5acd5e0bdee9d1298a780189a459.tar.gz lora_gateway_mtac_full-c05674a9613e5acd5e0bdee9d1298a780189a459.tar.bz2 lora_gateway_mtac_full-c05674a9613e5acd5e0bdee9d1298a780189a459.zip |
Added support for attenuator for LGA modules and full cards
Diffstat (limited to 'libloragw/src')
-rw-r--r-- | libloragw/src/loragw_fpga.c | 2 | ||||
-rw-r--r-- | libloragw/src/loragw_hal.c | 29 | ||||
-rw-r--r-- | libloragw/src/loragw_reg.c | 38 |
3 files changed, 41 insertions, 28 deletions
diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c index ce1c9c6..279a3b8 100644 --- a/libloragw/src/loragw_fpga.c +++ b/libloragw/src/loragw_fpga.c @@ -176,7 +176,7 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { return LGW_REG_ERROR; } /* Set Attenuator mode to be used for the full card*/ - if (fpga_version == 32) { + if (fpga_supports_attenuator()) { lgw_fpga_reg_w(LGW_FPGA_RF_ATTN_MODE, 0); } } diff --git a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c index a891fbf..48bc3b0 100644 --- a/libloragw/src/loragw_hal.c +++ b/libloragw/src/loragw_hal.c @@ -1414,27 +1414,29 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { /* interpretation of TX power */ - if (read_fpga_version() == 32) { - for (pow_index = 0; pow_index < txgain_lut.size-1; pow_index++) { - if (txgain_lut.lut[pow_index].rf_power >= pkt_data.rf_power) { - x = lgw_set_attenuation((float)(txgain_lut.lut[pow_index].rf_power - pkt_data.rf_power)); - if (x != LGW_HAL_SUCCESS) { - DEBUG_MSG("ERROR: Failed to set attenuation value\n"); - return LGW_HAL_ERROR; - } - break; - } + if (fpga_supports_attenuator()) { + /* Power is set to max and the attenuator brings down the level to match the packet's request */ + target_mix_gain = 15; /* Mixer gain is not used for setting power*/ + lgw_reg_w(LGW_TX_GAIN, 0); /* Dig gain is not used for setting power */ + x = lgw_set_attenuation((float)(32.0 - pkt_data.rf_power)); + if (x != LGW_HAL_SUCCESS) { + DEBUG_MSG("ERROR: Failed to set attenuation value\n"); + return LGW_HAL_ERROR; } } else { + /* Power is matched from the txgain_lut */ for (pow_index = txgain_lut.size-1; pow_index > 0; pow_index--) { if (txgain_lut.lut[pow_index].rf_power <= pkt_data.rf_power) { break; } } + + /* loading TX imbalance correction */ + target_mix_gain = txgain_lut.lut[pow_index].mix_gain; + /* Set digital gain from LUT */ + lgw_reg_w(LGW_TX_GAIN, txgain_lut.lut[pow_index].dig_gain); } - /* loading TX imbalance correction */ - target_mix_gain = txgain_lut.lut[pow_index].mix_gain; if (pkt_data.rf_chain == 0) { /* use radio A calibration table */ lgw_reg_w(LGW_TX_OFFSET_I, cal_offset_a_i[target_mix_gain - 8]); lgw_reg_w(LGW_TX_OFFSET_Q, cal_offset_a_q[target_mix_gain - 8]); @@ -1443,9 +1445,6 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { lgw_reg_w(LGW_TX_OFFSET_Q, cal_offset_b_q[target_mix_gain - 8]); } - /* Set digital gain from LUT */ - lgw_reg_w(LGW_TX_GAIN, txgain_lut.lut[pow_index].dig_gain); - /* fixed metadata, useful payload and misc metadata compositing */ transfer_size = TX_METADATA_NB + pkt_data.size; /* */ payload_offset = TX_METADATA_NB; /* start the payload just after the metadata */ diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index e707838..5991384 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -48,7 +48,8 @@ Maintainer: Sylvain Miermont #define PAGE_ADDR 0x00 #define PAGE_MASK 0x03 -const uint8_t FPGA_VERSION[] = { 28, 31, 32, 33 , 34, 35, 37 }; /* several versions could be supported */ +const uint8_t FPGA_VERSIONS_SUPPORTED[] = { 28, 31, 32, 33, 34, 35, 37 }; /* several versions could be supported */ +const uint8_t FPGA_VERSIONS_SUPPORTING_ATTENUATOR[] = { 32, 34, 35, 37 }; /* defines lgw_send power interpretation */ /* auto generated register mapping for C code : 11-Jul-2013 13:20:40 @@ -488,21 +489,34 @@ int reg_r_align32(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target /* Read the FPGA version */ uint8_t read_fpga_version() { - uint8_t u = 0; - uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); - if (spi_stat != LGW_SPI_SUCCESS) { - DEBUG_MSG("ERROR READING VERSION REGISTER\n"); - return LGW_REG_ERROR; - } - return u; + uint8_t u = 0; + uint8_t spi_stat = lgw_spi_r(lgw_spi_target, LGW_SPI_MUX_MODE1, LGW_SPI_MUX_TARGET_FPGA, loregs[LGW_VERSION].addr, &u); + if (spi_stat != LGW_SPI_SUCCESS) { + DEBUG_MSG("ERROR READING VERSION REGISTER\n"); + return LGW_REG_ERROR; + } + return u; } /* Verify the FPGA version is supported */ -bool check_fpga_version(uint8_t version) { +bool fpga_version_supported() { + int i; + + for (i = 0; i < (int)(sizeof FPGA_VERSIONS_SUPPORTED); i++) { + if (FPGA_VERSIONS_SUPPORTED[i] == read_fpga_version() ) { + return true; + } + } + + return false; +} + +/* Check if the FPGA uses an attenuator for transmitting packets*/ +bool fpga_supports_attenuator() { int i; - for (i = 0; i < (int)(sizeof FPGA_VERSION); i++) { - if (FPGA_VERSION[i] == version ) { + for (i = 0; i < (int)(sizeof FPGA_VERSIONS_SUPPORTING_ATTENUATOR); i++) { + if (FPGA_VERSIONS_SUPPORTING_ATTENUATOR[i] == read_fpga_version() ) { return true; } } @@ -537,7 +551,7 @@ int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { DEBUG_MSG("ERROR READING VERSION REGISTER\n"); return LGW_REG_ERROR; } - if (check_fpga_version(u) != true) { + if (fpga_version_supported(u) != true) { /* We failed to read expected FPGA version, so let's assume there is no FPGA */ DEBUG_PRINTF("INFO: no FPGA detected or version not supported (v%u)\n", u); lgw_spi_mux_mode = LGW_SPI_MUX_MODE0; |