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author | Harsh Sharma <92harshsharma@gmail.com> | 2018-06-13 13:24:54 -0500 |
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committer | Harsh Sharma <92harshsharma@gmail.com> | 2018-06-13 13:24:54 -0500 |
commit | 7c383be1542368f2601015d9fc2a417197677677 (patch) | |
tree | bc06453f879cbadf65fd88123c506956403c5684 /libloragw/inc/loragw_spi.h | |
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Initial Commit
Diffstat (limited to 'libloragw/inc/loragw_spi.h')
-rw-r--r-- | libloragw/inc/loragw_spi.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/libloragw/inc/loragw_spi.h b/libloragw/inc/loragw_spi.h new file mode 100644 index 0000000..fef1f48 --- /dev/null +++ b/libloragw/inc/loragw_spi.h @@ -0,0 +1,105 @@ +/* + / _____) _ | | +( (____ _____ ____ _| |_ _____ ____| |__ + \____ \| ___ | (_ _) ___ |/ ___) _ \ + _____) ) ____| | | || |_| ____( (___| | | | +(______/|_____)_|_|_| \__)_____)\____)_| |_| + (C)2013 Semtech-Cycleo + +Description: + Host specific functions to address the LoRa concentrator registers through a + SPI interface. + Single-byte read/write and burst read/write. + Does not handle pagination. + Could be used with multiple SPI ports in parallel (explicit file descriptor) + +License: Revised BSD License, see LICENSE.TXT file include in the project +Maintainer: Sylvain Miermont +*/ + + +#ifndef _LORAGW_SPI_H +#define _LORAGW_SPI_H + +/* -------------------------------------------------------------------------- */ +/* --- DEPENDANCIES --------------------------------------------------------- */ + +#include <stdint.h> /* C99 types*/ + +#include "config.h" /* library configuration options (dynamically generated) */ + +/* -------------------------------------------------------------------------- */ +/* --- PUBLIC CONSTANTS ----------------------------------------------------- */ + +#define LGW_SPI_SUCCESS 0 +#define LGW_SPI_ERROR -1 +#define LGW_BURST_CHUNK 1024 + +#define LGW_SPI_MUX_MODE0 0x0 /* No FPGA */ +#define LGW_SPI_MUX_MODE1 0x1 /* FPGA, with spi mux header */ + +#define LGW_SPI_MUX_TARGET_SX1301 0x0 +#define LGW_SPI_MUX_TARGET_FPGA 0x1 +#define LGW_SPI_MUX_TARGET_EEPROM 0x2 +#define LGW_SPI_MUX_TARGET_SX127X 0x3 + +/* -------------------------------------------------------------------------- */ +/* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ + +/** +@brief LoRa concentrator SPI setup (configure I/O and peripherals) +@param spi_target_ptr pointer on a generic pointer to SPI target (implementation dependant) +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ + +int lgw_spi_open(void **spi_target_ptr); + +/** +@brief LoRa concentrator SPI close +@param spi_target generic pointer to SPI target (implementation dependant) +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ + +int lgw_spi_close(void *spi_target); + +/** +@brief LoRa concentrator SPI single-byte write +@param spi_target generic pointer to SPI target (implementation dependant) +@param address 7-bit register address +@param data data byte to write +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ +int lgw_spi_w(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t data); + +/** +@brief LoRa concentrator SPI single-byte read +@param spi_target generic pointer to SPI target (implementation dependant) +@param address 7-bit register address +@param data data byte to write +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ +int lgw_spi_r(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t *data); + +/** +@brief LoRa concentrator SPI burst (multiple-byte) write +@param spi_target generic pointer to SPI target (implementation dependant) +@param address 7-bit register address +@param data pointer to byte array that will be sent to the LoRa concentrator +@param size size of the transfer, in byte(s) +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ +int lgw_spi_wb(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t *data, uint16_t size); + +/** +@brief LoRa concentrator SPI burst (multiple-byte) read +@param spi_target generic pointer to SPI target (implementation dependant) +@param address 7-bit register address +@param data pointer to byte array that will be written from the LoRa concentrator +@param size size of the transfer, in byte(s) +@return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) +*/ +int lgw_spi_rb(void *spi_target, uint8_t spi_mux_mode, uint8_t spi_mux_target, uint8_t address, uint8_t *data, uint16_t size); + +#endif + +/* --- EOF ------------------------------------------------------------------ */ |