diff options
| -rw-r--r-- | loragw_hal/inc/loragw_hal.h | 26 | ||||
| -rw-r--r-- | loragw_hal/inc/loragw_reg.h | 444 | ||||
| -rw-r--r-- | loragw_hal/src/agc_fw.var | 374 | ||||
| -rw-r--r-- | loragw_hal/src/arb_fw.var | 132 | ||||
| -rw-r--r-- | loragw_hal/src/loragw_hal.c | 72 | ||||
| -rw-r--r-- | loragw_hal/src/loragw_reg.c | 595 | ||||
| -rw-r--r-- | loragw_hal/test/test_loragw_hal.c | 40 |
7 files changed, 885 insertions, 798 deletions
diff --git a/loragw_hal/inc/loragw_hal.h b/loragw_hal/inc/loragw_hal.h index 936d0af..feecf5c 100644 --- a/loragw_hal/inc/loragw_hal.h +++ b/loragw_hal/inc/loragw_hal.h @@ -125,6 +125,23 @@ F_register(24bit) = F_rf (Hz) / F_step(Hz) //#define GPS_DELAYED 4 //#define EVENT_DELAYED 5 +/* values available for 'select' in the status function */ +#define TX_STATUS 1 +#define RX_STATUS 2 + +/* status code for TX_STATUS */ +#define TX_STATUS_UNKNOWN 0 +#define TX_OFF 1 /* TX modem disabled, it will ignore commands */ +#define TX_EMPTY 2 /* TX modem is free, ready to receive a command */ +#define TX_DELAYED 3 /* TX modem is loaded, ready to send the packet after an event and/or delay */ +#define TX_EMITTING 4 /* TX modem is emitting */ + +/* status code for RX_STATUS */ +#define RX_STATUS_UNKNOWN 0 +#define RX_OFF 1 /* RX modem is disabled, it will ignore commands */ +#define RX_ON 2 /* RX modem is receiving */ +#define RX_SUSPENDED 3 /* RX is suspended while a TX is ongoing */ + /* -------------------------------------------------------------------------- */ /* --- PUBLIC TYPES --------------------------------------------------------- */ @@ -182,6 +199,7 @@ struct lgw_pkt_tx_s { int8_t rf_power; /*!> TX power, in dBm */ uint8_t modulation; /*!> modulation to use for the packet */ uint8_t bandwidth; /*!> modulation bandwidth (Lora only) */ + bool invert_pol; /*!> invert signal polarity, for orthogonal downlinks (Lora only) */ uint16_t f_dev; /*!> frequency deviation (FSK only) */ uint16_t datarate; /*!> TX datarate */ uint8_t coderate; /*!> error-correcting code of the packet */ @@ -238,6 +256,14 @@ int lgw_receive(uint8_t max_pkt, struct lgw_pkt_rx_s *pkt_data); */ int lgw_send(struct lgw_pkt_tx_s pkt_data); +/** +@brief Give the the status of different part of the Lora gateway +@param select is used to select what status we want to know +@param code is used to return the status code +@return LGW_HAL_ERROR id the operation failed, LGW_HAL_SUCCESS else +*/ +int lgw_status(uint8_t select, uint8_t *code); + #endif /* --- EOF ------------------------------------------------------------------ */ diff --git a/loragw_hal/inc/loragw_reg.h b/loragw_hal/inc/loragw_reg.h index 922d3df..1fc8d9b 100644 --- a/loragw_hal/inc/loragw_reg.h +++ b/loragw_hal/inc/loragw_reg.h @@ -30,10 +30,10 @@ Description: #define LGW_REG_ERROR -1 /* -auto generated register mapping for C code : 24-Jun-2013 20:29:09 +auto generated register mapping for C code : 11-Jul-2013 13:20:40 this file contains autogenerated C struct used to access the LORA register from the Primer firmware this file is autogenerated from registers description -290 registers are defined +293 registers are defined */ #define LGW_PAGE_REG 0 @@ -110,224 +110,230 @@ this file is autogenerated from registers description #define LGW_TX_TOP_RAM_BIST1_STATUS 71 #define LGW_DATA_MNGT_RAM_BIST0_STATUS 72 #define LGW_DATA_MNGT_RAM_BIST1_STATUS 73 -#define LGW_GPIO_SELECT 74 -#define LGW_GPIO_MUX 75 -#define LGW_EMERGENCY_FORCE_HOST_CTRL 76 -#define LGW_RX_INVERT_IQ 77 -#define LGW_MODEM_INVERT_IQ 78 -#define LGW_MBWSSF_MODEM_INVERT_IQ 79 -#define LGW_RX_EDGE_SELECT 80 -#define LGW_MISC_RADIO_EN 81 -#define LGW_FILTER_GAIN 82 -#define LGW_RADIO_SELECT 83 -#define LGW_IF_FREQ_0 84 -#define LGW_IF_FREQ_1 85 -#define LGW_IF_FREQ_2 86 -#define LGW_IF_FREQ_3 87 -#define LGW_IF_FREQ_4 88 -#define LGW_IF_FREQ_5 89 -#define LGW_IF_FREQ_6 90 -#define LGW_IF_FREQ_7 91 -#define LGW_IF_FREQ_8 92 -#define LGW_IF_FREQ_9 93 -#define LGW_CHANN_OVERRIDE_AGC_GAIN 94 -#define LGW_CHANN_AGC_GAIN 95 -#define LGW_CORR0_DETECT_EN 96 -#define LGW_CORR1_DETECT_EN 97 -#define LGW_CORR2_DETECT_EN 98 -#define LGW_CORR3_DETECT_EN 99 -#define LGW_CORR4_DETECT_EN 100 -#define LGW_CORR5_DETECT_EN 101 -#define LGW_CORR6_DETECT_EN 102 -#define LGW_CORR7_DETECT_EN 103 -#define LGW_CORR_SAME_PEAKS_OPTION_SF6 104 -#define LGW_CORR_SAME_PEAKS_OPTION_SF7 105 -#define LGW_CORR_SAME_PEAKS_OPTION_SF8 106 -#define LGW_CORR_SAME_PEAKS_OPTION_SF9 107 -#define LGW_CORR_SAME_PEAKS_OPTION_SF10 108 -#define LGW_CORR_SAME_PEAKS_OPTION_SF11 109 -#define LGW_CORR_SAME_PEAKS_OPTION_SF12 110 -#define LGW_CORR_SIG_NOISE_RATIO_SF6 111 -#define LGW_CORR_SIG_NOISE_RATIO_SF7 112 -#define LGW_CORR_SIG_NOISE_RATIO_SF8 113 -#define LGW_CORR_SIG_NOISE_RATIO_SF9 114 -#define LGW_CORR_SIG_NOISE_RATIO_SF10 115 -#define LGW_CORR_SIG_NOISE_RATIO_SF11 116 -#define LGW_CORR_SIG_NOISE_RATIO_SF12 117 -#define LGW_CORR_NUM_SAME_PEAK 118 -#define LGW_CORR_MAC_GAIN 119 -#define LGW_ADJUST_MODEM_START_OFFSET_RDX8 120 -#define LGW_ADJUST_MODEM_START_OFFSET_RDX4 121 -#define LGW_ADJUST_MODEM_START_OFFSET_SF12_RDX4 122 -#define LGW_DBG_CORR_SELECT_SF 123 -#define LGW_DBG_CORR_SELECT_CHANNEL 124 -#define LGW_DBG_DETECT_CPT 125 -#define LGW_DBG_SYMB_CPT 126 -#define LGW_CHIRP_INVERT_RX 127 -#define LGW_DC_NOTCH_EN 128 -#define LGW_IMPLICIT_CRC_EN 129 -#define LGW_IMPLICIT_CODING_RATE 130 -#define LGW_IMPLICIT_PAYLOAD_LENGHT 131 -#define LGW_FREQ_TO_TIME_INVERT 132 -#define LGW_FREQ_TO_TIME_DRIFT 133 -#define LGW_PAYLOAD_FINE_TIMING_GAIN 134 -#define LGW_PREAMBLE_FINE_TIMING_GAIN 135 -#define LGW_TRACKING_INTEGRAL 136 -#define LGW_FRAME_SYNCH_PEAK1_POS 137 -#define LGW_FRAME_SYNCH_PEAK2_POS 138 -#define LGW_PREAMBLE_SYMB1_NB 139 -#define LGW_FRAME_SYNCH_GAIN 140 -#define LGW_SYNCH_DETECT_TH 141 -#define LGW_LLR_SCALE 142 -#define LGW_SNR_AVG_CST 143 -#define LGW_PPM_OFFSET 144 -#define LGW_MAX_PAYLOAD_LEN 145 -#define LGW_ONLY_CRC_EN 146 -#define LGW_ZERO_PAD 147 -#define LGW_DEC_GAIN_OFFSET 148 -#define LGW_FORCE_HOST_REG_CTRL 149 -#define LGW_FORCE_HOST_RADIO_CTRL 150 -#define LGW_FORCE_HOST_FE_CTRL 151 -#define LGW_FORCE_DEC_FILTER_GAIN 152 -#define LGW_MCU_RST_0 153 -#define LGW_MCU_RST_1 154 -#define LGW_MCU_SELECT_MUX_0 155 -#define LGW_MCU_SELECT_MUX_1 156 -#define LGW_MCU_CORRUPTION_DETECTED_0 157 -#define LGW_MCU_CORRUPTION_DETECTED_1 158 -#define LGW_CHANN_SELECT_RSSI 159 -#define LGW_RSSI_BB_DEFAULT_VALUE 160 -#define LGW_RSSI_DEC_DEFAULT_VALUE 161 -#define LGW_RSSI_CHANN_DEFAULT_VALUE 162 -#define LGW_RSSI_BB_FILTER_ALPHA 163 -#define LGW_RSSI_DEC_FILTER_ALPHA 164 -#define LGW_RSSI_CHANN_FILTER_ALPHA 165 -#define LGW_IQ_MISMATCH_A_AMP_COEFF 166 -#define LGW_IQ_MISMATCH_A_PHI_COEFF 167 -#define LGW_IQ_MISMATCH_B_AMP_COEFF 168 -#define LGW_IQ_MISMATCH_B_SEL_I 169 -#define LGW_IQ_MISMATCH_B_PHI_COEFF 170 -#define LGW_TX_TRIG_IMMEDIATE 171 -#define LGW_TX_TRIG_DELAYED 172 -#define LGW_TX_TRIG_GPS 173 -#define LGW_TX_START_DELAY 174 -#define LGW_TX_FRAME_SYNCH_PEAK1_POS 175 -#define LGW_TX_FRAME_SYNCH_PEAK2_POS 176 -#define LGW_TX_PREAMBLE_SYMB1_NB 177 -#define LGW_TX_OFFSET_I 178 -#define LGW_TX_OFFSET_Q 179 -#define LGW_TX_MODE 180 -#define LGW_TX_ZERO_PAD 181 -#define LGW_TX_PPM_OFFSET 182 -#define LGW_TX_CHIRP_INVERT 183 -#define LGW_TX_CONT_CHIRP 184 -#define LGW_TX_GAIN 185 -#define LGW_TX_CHIRP_LOW_PASS 186 -#define LGW_TX_FCC_WIDEBAND 187 -#define LGW_TX_SWAP_IQ 188 -#define LGW_MBWSSF_IMPLICIT_HEADER 189 -#define LGW_MBWSSF_IMPLICIT_CRC_EN 190 -#define LGW_MBWSSF_IMPLICIT_CODING_RATE 191 -#define LGW_MBWSSF_IMPLICIT_PAYLOAD_LENGHT 192 -#define LGW_MBWSSF_AGC_FREEZE_ON_DETECT 193 -#define LGW_MBWSSF_FRAME_SYNCH_PEAK1_POS 194 -#define LGW_MBWSSF_FRAME_SYNCH_PEAK2_POS 195 -#define LGW_MBWSSF_PREAMBLE_SYMB1_NB 196 -#define LGW_MBWSSF_FRAME_SYNCH_GAIN 197 -#define LGW_MBWSSF_SYNCH_DETECT_TH 198 -#define LGW_MBWSSF_DETECT_MIN_SINGLE_PEAK 199 -#define LGW_MBWSSF_DETECT_TRIG_SAME_PEAK_NB 200 -#define LGW_MBWSSF_FREQ_TO_TIME_INVERT 201 -#define LGW_MBWSSF_FREQ_TO_TIME_DRIFT 202 -#define LGW_MBWSSF_PPM_CORRECTION 203 -#define LGW_MBWSSF_PAYLOAD_FINE_TIMING_GAIN 204 -#define LGW_MBWSSF_PREAMBLE_FINE_TIMING_GAIN 205 -#define LGW_MBWSSF_TRACKING_INTEGRAL 206 -#define LGW_MBWSSF_ZERO_PAD 207 -#define LGW_MBWSSF_MODEM_BW 208 -#define LGW_MBWSSF_RADIO_SELECT 209 -#define LGW_MBWSSF_RX_CHIRP_INVERT 210 -#define LGW_MBWSSF_LLR_SCALE 211 -#define LGW_MBWSSF_SNR_AVG_CST 212 -#define LGW_MBWSSF_PPM_OFFSET 213 -#define LGW_MBWSSF_RATE_SF 214 -#define LGW_MBWSSF_ONLY_CRC_EN 215 -#define LGW_MBWSSF_MAX_PAYLOAD_LEN 216 -#define LGW_SPI_RADIO_A__DATA 217 -#define LGW_SPI_RADIO_A__DATA_READBACK 218 -#define LGW_SPI_RADIO_A__ADDR 219 -#define LGW_SPI_RADIO_A__CS 220 -#define LGW_SPI_RADIO_B__DATA 221 -#define LGW_SPI_RADIO_B__DATA_READBACK 222 -#define LGW_SPI_RADIO_B__ADDR 223 -#define LGW_SPI_RADIO_B__CS 224 -#define LGW_RADIO_A_EN 225 -#define LGW_RADIO_B_EN 226 -#define LGW_RADIO_RST 227 -#define LGW_LNA_A_EN 228 -#define LGW_PA_A_EN 229 -#define LGW_LNA_B_EN 230 -#define LGW_PA_B_EN 231 -#define LGW_PA_A_GAIN 232 -#define LGW_PA_B_GAIN 233 -#define LGW_LNA_A_CTRL_LUT 234 -#define LGW_PA_A_CTRL_LUT 235 -#define LGW_LNA_B_CTRL_LUT 236 -#define LGW_PA_B_CTRL_LUT 237 -#define LGW_CAPTURE_SOURCE 238 -#define LGW_CAPTURE_START 239 -#define LGW_CAPTURE_FORCE_TRIGGER 240 -#define LGW_CAPTURE_WRAP 241 -#define LGW_CAPTURE_PERIOD 242 -#define LGW_LED_REG 243 -#define LGW_MODEM_STATUS 244 -#define LGW_VALID_HEADER_COUNTER_0 245 -#define LGW_VALID_HEADER_COUNTER_1 246 -#define LGW_VALID_PACKET_COUNTER_0 247 -#define LGW_VALID_PACKET_COUNTER_1 248 -#define LGW_VALID_HEADER_COUNTER_MBWSSF 249 -#define LGW_VALID_HEADER_COUNTER_FSK 250 -#define LGW_VALID_PACKET_COUNTER_MBWSSF 251 -#define LGW_VALID_PACKET_COUNTER_FSK 252 -#define LGW_CHANN_RSSI 253 -#define LGW_BB_RSSI 254 -#define LGW_DEC_RSSI 255 -#define LGW_DBG_MCU_DATA 256 -#define LGW_DBG_ARB_MCU_RAM_DATA 257 -#define LGW_DBG_AGC_MCU_RAM_DATA 258 -#define LGW_NEXT_PACKET_CNT 259 -#define LGW_ADDR_CAPTURE_COUNT 260 -#define LGW_TIMESTAMP 261 -#define LGW_DBG_CHANN0_GAIN 262 -#define LGW_DBG_CHANN1_GAIN 263 -#define LGW_DBG_CHANN2_GAIN 264 -#define LGW_DBG_CHANN3_GAIN 265 -#define LGW_DBG_CHANN4_GAIN 266 -#define LGW_DBG_CHANN5_GAIN 267 -#define LGW_DBG_CHANN6_GAIN 268 -#define LGW_DBG_CHANN7_GAIN 269 -#define LGW_DBG_DEC_FILT_GAIN 270 -#define LGW_SPI_DATA_FIFO_PTR 271 -#define LGW_PACKET_DATA_FIFO_PTR 272 -#define LGW_DBG_ARB_MCU_RAM_ADDR 273 -#define LGW_DBG_AGC_MCU_RAM_ADDR 274 -#define LGW_SPI_MASTER_CHIP_SELECT_POLARITY 275 -#define LGW_SPI_MASTER_CPOL 276 -#define LGW_SPI_MASTER_CPHA 277 -#define LGW_SIG_GEN_ANALYSER_MUX_SEL 278 -#define LGW_SIG_GEN_EN 279 -#define LGW_SIG_ANALYSER_EN 280 -#define LGW_SIG_ANALYSER_AVG_LEN 281 -#define LGW_SIG_ANALYSER_PRECISION 282 -#define LGW_SIG_ANALYSER_VALID_OUT 283 -#define LGW_SIG_GEN_FREQ 284 -#define LGW_SIG_ANALYSER_FREQ 285 -#define LGW_SIG_ANALYSER_I_OUT 286 -#define LGW_SIG_ANALYSER_Q_OUT 287 -#define LGW_GPS_EN 288 -#define LGW_GPS_POL 289 +#define LGW_GPIO_SELECT_INPUT 74 +#define LGW_GPIO_SELECT_OUTPUT 75 +#define LGW_GPIO_MODE 76 +#define LGW_GPIO_PIN_REG_IN 77 +#define LGW_GPIO_PIN_REG_OUT 78 +#define LGW_MCU_AGC_STATUS 79 +#define LGW_CHIP_ID 80 +#define LGW_EMERGENCY_FORCE_HOST_CTRL 81 +#define LGW_RX_INVERT_IQ 82 +#define LGW_MODEM_INVERT_IQ 83 +#define LGW_MBWSSF_MODEM_INVERT_IQ 84 +#define LGW_RX_EDGE_SELECT 85 +#define LGW_MISC_RADIO_EN 86 +#define LGW_FILTER_GAIN 87 +#define LGW_RADIO_SELECT 88 +#define LGW_IF_FREQ_0 89 +#define LGW_IF_FREQ_1 90 +#define LGW_IF_FREQ_2 91 +#define LGW_IF_FREQ_3 92 +#define LGW_IF_FREQ_4 93 +#define LGW_IF_FREQ_5 94 +#define LGW_IF_FREQ_6 95 +#define LGW_IF_FREQ_7 96 +#define LGW_IF_FREQ_8 97 +#define LGW_IF_FREQ_9 98 +#define LGW_CHANN_OVERRIDE_AGC_GAIN 99 +#define LGW_CHANN_AGC_GAIN 100 +#define LGW_CORR0_DETECT_EN 101 +#define LGW_CORR1_DETECT_EN 102 +#define LGW_CORR2_DETECT_EN 103 +#define LGW_CORR3_DETECT_EN 104 +#define LGW_CORR4_DETECT_EN 105 +#define LGW_CORR5_DETECT_EN 106 +#define LGW_CORR6_DETECT_EN 107 +#define LGW_CORR7_DETECT_EN 108 +#define LGW_CORR_SAME_PEAKS_OPTION_SF6 109 +#define LGW_CORR_SAME_PEAKS_OPTION_SF7 110 +#define LGW_CORR_SAME_PEAKS_OPTION_SF8 111 +#define LGW_CORR_SAME_PEAKS_OPTION_SF9 112 +#define LGW_CORR_SAME_PEAKS_OPTION_SF10 113 +#define LGW_CORR_SAME_PEAKS_OPTION_SF11 114 +#define LGW_CORR_SAME_PEAKS_OPTION_SF12 115 +#define LGW_CORR_SIG_NOISE_RATIO_SF6 116 +#define LGW_CORR_SIG_NOISE_RATIO_SF7 117 +#define LGW_CORR_SIG_NOISE_RATIO_SF8 118 +#define LGW_CORR_SIG_NOISE_RATIO_SF9 119 +#define LGW_CORR_SIG_NOISE_RATIO_SF10 120 +#define LGW_CORR_SIG_NOISE_RATIO_SF11 121 +#define LGW_CORR_SIG_NOISE_RATIO_SF12 122 +#define LGW_CORR_NUM_SAME_PEAK 123 +#define LGW_CORR_MAC_GAIN 124 +#define LGW_ADJUST_MODEM_START_OFFSET_RDX8 125 +#define LGW_ADJUST_MODEM_START_OFFSET_RDX4 126 +#define LGW_ADJUST_MODEM_START_OFFSET_SF12_RDX4 127 +#define LGW_DBG_CORR_SELECT_SF 128 +#define LGW_DBG_CORR_SELECT_CHANNEL 129 +#define LGW_DBG_DETECT_CPT 130 +#define LGW_DBG_SYMB_CPT 131 +#define LGW_CHIRP_INVERT_RX 132 +#define LGW_DC_NOTCH_EN 133 +#define LGW_IMPLICIT_CRC_EN 134 +#define LGW_IMPLICIT_CODING_RATE 135 +#define LGW_IMPLICIT_PAYLOAD_LENGHT 136 +#define LGW_FREQ_TO_TIME_INVERT 137 +#define LGW_FREQ_TO_TIME_DRIFT 138 +#define LGW_PAYLOAD_FINE_TIMING_GAIN 139 +#define LGW_PREAMBLE_FINE_TIMING_GAIN 140 +#define LGW_TRACKING_INTEGRAL 141 +#define LGW_FRAME_SYNCH_PEAK1_POS 142 +#define LGW_FRAME_SYNCH_PEAK2_POS 143 +#define LGW_PREAMBLE_SYMB1_NB 144 +#define LGW_FRAME_SYNCH_GAIN 145 +#define LGW_SYNCH_DETECT_TH 146 +#define LGW_LLR_SCALE 147 +#define LGW_SNR_AVG_CST 148 +#define LGW_PPM_OFFSET 149 +#define LGW_MAX_PAYLOAD_LEN 150 +#define LGW_ONLY_CRC_EN 151 +#define LGW_ZERO_PAD 152 +#define LGW_DEC_GAIN_OFFSET 153 +#define LGW_CHAN_GAIN_OFFSET 154 +#define LGW_FORCE_HOST_REG_CTRL 155 +#define LGW_FORCE_HOST_RADIO_CTRL 156 +#define LGW_FORCE_HOST_FE_CTRL 157 +#define LGW_FORCE_DEC_FILTER_GAIN 158 +#define LGW_MCU_RST_0 159 +#define LGW_MCU_RST_1 160 +#define LGW_MCU_SELECT_MUX_0 161 +#define LGW_MCU_SELECT_MUX_1 162 +#define LGW_MCU_CORRUPTION_DETECTED_0 163 +#define LGW_MCU_CORRUPTION_DETECTED_1 164 +#define LGW_MCU_SELECT_EDGE_0 165 +#define LGW_MCU_SELECT_EDGE_1 166 +#define LGW_CHANN_SELECT_RSSI 167 +#define LGW_RSSI_BB_DEFAULT_VALUE 168 +#define LGW_RSSI_DEC_DEFAULT_VALUE 169 +#define LGW_RSSI_CHANN_DEFAULT_VALUE 170 +#define LGW_RSSI_BB_FILTER_ALPHA 171 +#define LGW_RSSI_DEC_FILTER_ALPHA 172 +#define LGW_RSSI_CHANN_FILTER_ALPHA 173 +#define LGW_IQ_MISMATCH_A_AMP_COEFF 174 +#define LGW_IQ_MISMATCH_A_PHI_COEFF 175 +#define LGW_IQ_MISMATCH_B_AMP_COEFF 176 +#define LGW_IQ_MISMATCH_B_SEL_I 177 +#define LGW_IQ_MISMATCH_B_PHI_COEFF 178 +#define LGW_TX_TRIG_IMMEDIATE 179 +#define LGW_TX_TRIG_DELAYED 180 +#define LGW_TX_TRIG_GPS 181 +#define LGW_TX_START_DELAY 182 +#define LGW_TX_FRAME_SYNCH_PEAK1_POS 183 +#define LGW_TX_FRAME_SYNCH_PEAK2_POS 184 +#define LGW_TX_OFFSET_I 185 +#define LGW_TX_OFFSET_Q 186 +#define LGW_TX_MODE 187 +#define LGW_TX_ZERO_PAD 188 +#define LGW_TX_EDGE_SELECT 189 +#define LGW_TX_GAIN 190 +#define LGW_TX_CHIRP_LOW_PASS 191 +#define LGW_TX_FCC_WIDEBAND 192 +#define LGW_TX_SWAP_IQ 193 +#define LGW_MBWSSF_IMPLICIT_HEADER 194 +#define LGW_MBWSSF_IMPLICIT_CRC_EN 195 +#define LGW_MBWSSF_IMPLICIT_CODING_RATE 196 +#define LGW_MBWSSF_IMPLICIT_PAYLOAD_LENGHT 197 +#define LGW_MBWSSF_AGC_FREEZE_ON_DETECT 198 +#define LGW_MBWSSF_FRAME_SYNCH_PEAK1_POS 199 +#define LGW_MBWSSF_FRAME_SYNCH_PEAK2_POS 200 +#define LGW_MBWSSF_PREAMBLE_SYMB1_NB 201 +#define LGW_MBWSSF_FRAME_SYNCH_GAIN 202 +#define LGW_MBWSSF_SYNCH_DETECT_TH 203 +#define LGW_MBWSSF_DETECT_MIN_SINGLE_PEAK 204 +#define LGW_MBWSSF_DETECT_TRIG_SAME_PEAK_NB 205 +#define LGW_MBWSSF_FREQ_TO_TIME_INVERT 206 +#define LGW_MBWSSF_FREQ_TO_TIME_DRIFT 207 +#define LGW_MBWSSF_PPM_CORRECTION 208 +#define LGW_MBWSSF_PAYLOAD_FINE_TIMING_GAIN 209 +#define LGW_MBWSSF_PREAMBLE_FINE_TIMING_GAIN 210 +#define LGW_MBWSSF_TRACKING_INTEGRAL 211 +#define LGW_MBWSSF_ZERO_PAD 212 +#define LGW_MBWSSF_MODEM_BW 213 +#define LGW_MBWSSF_RADIO_SELECT 214 +#define LGW_MBWSSF_RX_CHIRP_INVERT 215 +#define LGW_MBWSSF_LLR_SCALE 216 +#define LGW_MBWSSF_SNR_AVG_CST 217 +#define LGW_MBWSSF_PPM_OFFSET 218 +#define LGW_MBWSSF_RATE_SF 219 +#define LGW_MBWSSF_ONLY_CRC_EN 220 +#define LGW_MBWSSF_MAX_PAYLOAD_LEN 221 +#define LGW_TX_STATUS 222 +#define LGW_SPI_RADIO_A__DATA 223 +#define LGW_SPI_RADIO_A__DATA_READBACK 224 +#define LGW_SPI_RADIO_A__ADDR 225 +#define LGW_SPI_RADIO_A__CS 226 +#define LGW_SPI_RADIO_B__DATA 227 +#define LGW_SPI_RADIO_B__DATA_READBACK 228 +#define LGW_SPI_RADIO_B__ADDR 229 +#define LGW_SPI_RADIO_B__CS 230 +#define LGW_RADIO_A_EN 231 +#define LGW_RADIO_B_EN 232 +#define LGW_RADIO_RST 233 +#define LGW_LNA_A_EN 234 +#define LGW_PA_A_EN 235 +#define LGW_LNA_B_EN 236 +#define LGW_PA_B_EN 237 +#define LGW_PA_GAIN 238 +#define LGW_LNA_A_CTRL_LUT 239 +#define LGW_PA_A_CTRL_LUT 240 +#define LGW_LNA_B_CTRL_LUT 241 +#define LGW_PA_B_CTRL_LUT 242 +#define LGW_CAPTURE_SOURCE 243 +#define LGW_CAPTURE_START 244 +#define LGW_CAPTURE_FORCE_TRIGGER 245 +#define LGW_CAPTURE_WRAP 246 +#define LGW_CAPTURE_PERIOD 247 +#define LGW_LED_REG 248 +#define LGW_MODEM_STATUS 249 +#define LGW_VALID_HEADER_COUNTER_0 250 +#define LGW_VALID_PACKET_COUNTER_0 251 +#define LGW_VALID_HEADER_COUNTER_MBWSSF 252 +#define LGW_VALID_HEADER_COUNTER_FSK 253 +#define LGW_VALID_PACKET_COUNTER_MBWSSF 254 +#define LGW_VALID_PACKET_COUNTER_FSK 255 +#define LGW_CHANN_RSSI 256 +#define LGW_BB_RSSI 257 +#define LGW_DEC_RSSI 258 +#define LGW_DBG_MCU_DATA 259 +#define LGW_DBG_ARB_MCU_RAM_DATA 260 +#define LGW_DBG_AGC_MCU_RAM_DATA 261 +#define LGW_NEXT_PACKET_CNT 262 +#define LGW_ADDR_CAPTURE_COUNT 263 +#define LGW_TIMESTAMP 264 +#define LGW_DBG_CHANN0_GAIN 265 +#define LGW_DBG_CHANN1_GAIN 266 +#define LGW_DBG_CHANN2_GAIN 267 +#define LGW_DBG_CHANN3_GAIN 268 +#define LGW_DBG_CHANN4_GAIN 269 +#define LGW_DBG_CHANN5_GAIN 270 +#define LGW_DBG_CHANN6_GAIN 271 +#define LGW_DBG_CHANN7_GAIN 272 +#define LGW_DBG_DEC_FILT_GAIN 273 +#define LGW_SPI_DATA_FIFO_PTR 274 +#define LGW_PACKET_DATA_FIFO_PTR 275 +#define LGW_DBG_ARB_MCU_RAM_ADDR 276 +#define LGW_DBG_AGC_MCU_RAM_ADDR 277 +#define LGW_SPI_MASTER_CHIP_SELECT_POLARITY 278 +#define LGW_SPI_MASTER_CPOL 279 +#define LGW_SPI_MASTER_CPHA 280 +#define LGW_SIG_GEN_ANALYSER_MUX_SEL 281 +#define LGW_SIG_GEN_EN 282 +#define LGW_SIG_ANALYSER_EN 283 +#define LGW_SIG_ANALYSER_AVG_LEN 284 +#define LGW_SIG_ANALYSER_PRECISION 285 +#define LGW_SIG_ANALYSER_VALID_OUT 286 +#define LGW_SIG_GEN_FREQ 287 +#define LGW_SIG_ANALYSER_FREQ 288 +#define LGW_SIG_ANALYSER_I_OUT 289 +#define LGW_SIG_ANALYSER_Q_OUT 290 +#define LGW_GPS_EN 291 +#define LGW_GPS_POL 292 +#define LGW_SW_TEST_REG1 293 +#define LGW_SW_TEST_REG2 294 +#define LGW_SW_TEST_REG3 295 -#define LGW_TOTALREGS 290 +#define LGW_TOTALREGS 296 /* -------------------------------------------------------------------------- */ /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ diff --git a/loragw_hal/src/agc_fw.var b/loragw_hal/src/agc_fw.var index a0dde65..c913e0c 100644 --- a/loragw_hal/src/agc_fw.var +++ b/loragw_hal/src/agc_fw.var @@ -12,193 +12,193 @@ Description: static uint8_t agc_firmware[MCU_AGC_FW_BYTE] = { 0x8A, 0x51, 0x11, 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