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author | Sylvain Miermont <smiermont@semtech.com> | 2014-03-28 16:58:48 +0100 |
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committer | Sylvain Miermont <smiermont@semtech.com> | 2014-03-28 16:58:48 +0100 |
commit | f991b0e35ad1bd3b999c70e68c518bae91bd36a6 (patch) | |
tree | 7e098ae53dc1401d88efa12de3bfc24ff405d88c /libloragw/inc/loragw_spi.h | |
parent | 0e2b2cfa32767e516870a4e6a2ce0b6cce827910 (diff) | |
download | lora_gateway-f991b0e35ad1bd3b999c70e68c518bae91bd36a6.tar.gz lora_gateway-f991b0e35ad1bd3b999c70e68c518bae91bd36a6.tar.bz2 lora_gateway-f991b0e35ad1bd3b999c70e68c518bae91bd36a6.zip |
v1.3.0v1.3.0
- Added TX power management.
- Added full support for SX1301 reference board.
- Changed build system with configuration for multiple chip/radio/band support.
- SX125x bandwidth set to 1MHz by default (was 800 kHz).
- Solved warnings with 64b integer printf when compiling on x86_64.
- Renamed helper programs to reduce the concentrator vs. gateway confusion.
Diffstat (limited to 'libloragw/inc/loragw_spi.h')
-rw-r--r-- | libloragw/inc/loragw_spi.h | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/libloragw/inc/loragw_spi.h b/libloragw/inc/loragw_spi.h index c03df41..ae9ba68 100644 --- a/libloragw/inc/loragw_spi.h +++ b/libloragw/inc/loragw_spi.h @@ -4,10 +4,10 @@ \____ \| ___ | (_ _) ___ |/ ___) _ \ _____) ) ____| | | || |_| ____( (___| | | | (______/|_____)_|_|_| \__)_____)\____)_| |_| - ©2013 Semtech-Cycleo + (C)2013 Semtech-Cycleo Description: - Host specific functions to address the LoRa™ gateway registers through a + Host specific functions to address the LoRa concentrator registers through a SPI interface. Single-byte read/write and burst read/write. Does not handle pagination. @@ -26,6 +26,8 @@ Maintainer: Sylvain Miermont #include <stdint.h> /* C99 types*/ +#include "config.h" /* library configuration options (dynamically generated) */ + /* -------------------------------------------------------------------------- */ /* --- PUBLIC CONSTANTS ----------------------------------------------------- */ @@ -37,7 +39,7 @@ Maintainer: Sylvain Miermont /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ /** -@brief Lora gateway SPI setup (configure I/O and peripherals) +@brief LoRa concentrator SPI setup (configure I/O and peripherals) @param spi_target_ptr pointer on a generic pointer to SPI target (implementation dependant) @return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) */ @@ -45,7 +47,7 @@ Maintainer: Sylvain Miermont int lgw_spi_open(void **spi_target_ptr); /** -@brief Lora gateway SPI close +@brief LoRa concentrator SPI close @param spi_target generic pointer to SPI target (implementation dependant) @return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) */ @@ -53,7 +55,7 @@ int lgw_spi_open(void **spi_target_ptr); int lgw_spi_close(void *spi_target); /** -@brief Lora gateway SPI single-byte write +@brief LoRa concentrator SPI single-byte write @param spi_target generic pointer to SPI target (implementation dependant) @param address 7-bit register address @param data data byte to write @@ -62,7 +64,7 @@ int lgw_spi_close(void *spi_target); int lgw_spi_w(void *spi_target, uint8_t address, uint8_t data); /** -@brief Lora gateway SPI single-byte read +@brief LoRa concentrator SPI single-byte read @param spi_target generic pointer to SPI target (implementation dependant) @param address 7-bit register address @param data data byte to write @@ -71,20 +73,20 @@ int lgw_spi_w(void *spi_target, uint8_t address, uint8_t data); int lgw_spi_r(void *spi_target, uint8_t address, uint8_t *data); /** -@brief Lora gateway SPI burst (multiple-byte) write +@brief LoRa concentrator SPI burst (multiple-byte) write @param spi_target generic pointer to SPI target (implementation dependant) @param address 7-bit register address -@param data pointer to byte array that will be sent to the Lora gateway +@param data pointer to byte array that will be sent to the LoRa concentrator @param size size of the transfer, in byte(s) @return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) */ int lgw_spi_wb(void *spi_target, uint8_t address, uint8_t *data, uint16_t size); /** -@brief Lora gateway SPI burst (multiple-byte) read +@brief LoRa concentrator SPI burst (multiple-byte) read @param spi_target generic pointer to SPI target (implementation dependant) @param address 7-bit register address -@param data pointer to byte array that will be written from the Lora gateway +@param data pointer to byte array that will be written from the LoRa concentrator @param size size of the transfer, in byte(s) @return status of register operation (LGW_SPI_SUCCESS/LGW_SPI_ERROR) */ |