summaryrefslogtreecommitdiff
path: root/multitech/recipes/u-boot/u-boot-2012.10/mtocgd/u-boot-2012.10-mtocgd.patch
blob: aba2dbaa22e5cf54978d08eef78aa038a61648de (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
Index: git/include/configs/at91sam9x5ek.h
===================================================================
--- git.orig/include/configs/at91sam9x5ek.h	2013-02-11 10:22:38.000000000 -0600
+++ git/include/configs/at91sam9x5ek.h	2013-02-11 15:17:13.480341903 -0600
@@ -54,6 +54,7 @@
 #define CONFIG_USART_ID		ATMEL_ID_SYS
 
 /* LCD */
+/* MTR has no LCD
 #define CONFIG_LCD
 #define LCD_BPP			LCD_COLOR16
 #define LCD_OUTPUT_BPP		24
@@ -65,6 +66,7 @@
 #define CONFIG_ATMEL_HLCD
 #define CONFIG_ATMEL_LCD_RGB565
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
+*/
 
 #define CONFIG_BOOTDELAY	3
 
@@ -120,12 +122,14 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
-#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
+/* MTR nand ready is PC31 */
+#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC31
 
 /* PMECC & PMERRLOC */
 #define CONFIG_ATMEL_NAND_HWECC		1
 #define CONFIG_ATMEL_NAND_HW_PMECC	1
-#define CONFIG_PMECC_CAP		2
+/* MTR: 4-bit PMECC */
+#define CONFIG_PMECC_CAP		4
 #define CONFIG_PMECC_SECTOR_SIZE	512
 #define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
 
@@ -140,9 +144,12 @@
 
 /* Ethernet */
 #define CONFIG_MACB
-#define CONFIG_RMII
+/* MTR is MII */
+#undef CONFIG_RMII
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_MACB_SEARCH_PHY
+/* enable MII command */
+#define CONFIG_CMD_MII 1
 
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
@@ -155,9 +162,8 @@
 #define CONFIG_ENV_OFFSET		0xc0000
 #define CONFIG_ENV_OFFSET_REDUND	0x100000
 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND	"nand read " \
-				"0x22000000 0x200000 0x300000; " \
-				"bootm 0x22000000"
+/* MTR: read from env variables for boot */
+#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
 #else
 #ifdef CONFIG_SYS_USE_SPIFLASH
 /* bootstrap + u-boot + env + linux in spi flash */
@@ -172,11 +178,8 @@
 #endif
 #endif
 
-#define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
-				"mtdparts=atmel_nand:" \
-				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
-				"root=/dev/mtdblock1 rw " \
-				"rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"
+/* MTR uses jffs2 */
+#define CONFIG_BOOTARGS        "mem=128M console=ttyS0,115200 root=/dev/mtdblock8 ro rootfstype=jffs2"
 
 #define CONFIG_BAUDRATE		115200
 
@@ -199,4 +202,22 @@
 #error CONFIG_USE_IRQ not supported
 #endif
 
+/* MTR defaults */
+#define CONFIG_ENV_OVERWRITE   1 /* Allow Overwrite of serial# & ethaddr */
+#define CONFIG_ETHADDR     00:08:00:87:00:02
+#define CONFIG_IPADDR      192.168.2.1
+#define CONFIG_NETMASK     255.255.255.0
+#define CONFIG_SERVERIP    192.168.2.2
+#define CONFIG_HOSTNAME    AT91SAM9G25
+#define CONFIG_LOADADDR    0x22000000
+
+/* MTR - enable watchdog */
+#define CONFIG_AT91SAM9_WATCHDOG 1
+#define CONFIG_HW_WATCHDOG 1
+
+#define CONFIG_EXTRA_ENV_SETTINGS          \
+   "kernel_addr=0x200000\0"          \
+   ""
+
+
 #endif
Index: git/board/atmel/at91sam9x5ek/at91sam9x5ek.c
===================================================================
--- git.orig/board/atmel/at91sam9x5ek/at91sam9x5ek.c	2013-02-11 15:17:48.480015992 -0600
+++ git/board/atmel/at91sam9x5ek/at91sam9x5ek.c	2013-02-11 15:18:19.468536809 -0600
@@ -61,7 +61,8 @@
 	csa = readl(&matrix->ebicsa);
 	csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
 	/* NAND flash on D16 */
-	csa |= AT91_MATRIX_NFD0_ON_D16;
+	/* MTR: nand flash is set up by bootstrap, so leave it alone here */
+	/* csa |= AT91_MATRIX_NFD0_ON_D16; */
 
 	/* Configure IO drive */
 	csa &= ~AT91_MATRIX_EBI_EBI_IOSR_NORMAL;