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authorJesse Gilles <jgilles@multitech.com>2012-09-12 17:19:02 -0500
committerJesse Gilles <jgilles@multitech.com>2012-09-18 13:36:56 -0500
commit0a64447a2a2df6861925bc310119c4f2e086815b (patch)
treea851248522bc14873ea2b4c0523a7641762c7735 /multitech/recipes/multitech
parent53948616ce6637a4bfa99f82c080cdcf419ce8fb (diff)
mts-io: add patch for mtpcie-dk support
Diffstat (limited to 'multitech/recipes/multitech')
-rw-r--r--multitech/recipes/multitech/mts-io/mts-io-pcieh5.patch219
-rw-r--r--multitech/recipes/multitech/mts-io_0.5.1.bb2
2 files changed, 221 insertions, 0 deletions
diff --git a/multitech/recipes/multitech/mts-io/mts-io-pcieh5.patch b/multitech/recipes/multitech/mts-io/mts-io-pcieh5.patch
new file mode 100644
index 0000000..a49f649
--- /dev/null
+++ b/multitech/recipes/multitech/mts-io/mts-io-pcieh5.patch
@@ -0,0 +1,219 @@
+Index: io-module/mts_io.c
+===================================================================
+--- io-module.orig/mts_io.c 2011-10-03 12:47:24.000000000 -0500
++++ io-module/mts_io.c 2012-09-12 17:06:42.476070820 -0500
+@@ -317,17 +317,19 @@
+ .output_value = 1,
+ .use_pullup = 0,
+ },
++ // MTPCIE-H5: Wifi and BT enable pins
++ // (was TXD1 and DTR1) (PB17 and PB7 are tied together)
+ {
+- .name = "TXD1",
++ .name = "WLAN_EN",
+- .pin = AT91_PIN_PB17,
++ .pin = AT91_PIN_PB7,
+- .direction = GPIO_DIR_INPUT,
++ .direction = GPIO_DIR_OUTPUT,
+ .output_value = 0,
+ .use_pullup = 0,
+ },
+ {
+- .name = "DTR1",
++ .name = "BT_EN",
+ .pin = AT91_PIN_PB18,
+- .direction = GPIO_DIR_INPUT,
++ .direction = GPIO_DIR_OUTPUT,
+ .output_value = 0,
+ .use_pullup = 0,
+ },
+@@ -338,6 +340,8 @@
+ .output_value = 1,
+ .use_pullup = 0,
+ },
++ // PCIE-H5 GPIO11 used for WLAN_IRQ
++#if 0
+ {
+ .name = "GPIO11",
+ .pin = AT91_PIN_PB19,
+@@ -345,6 +349,7 @@
+ .output_value = 1,
+ .use_pullup = 1,
+ },
++#endif
+ {
+ .name = "GPIO12",
+ .pin = AT91_PIN_PB20,
+@@ -400,6 +405,13 @@
+ mts_product_id = MTCDP_E1_DK_1_0;
+ }
+
++ // PCIE-H5 hard-coded to EOCG
++ gpio_pins = gpio_pins_mt100eocg_0_0;
++ mts_product_id = MT100EOCG_0_0;
++ DEVICE_CAPA_SET(id_eeprom.capa, CAPA_GPS);
++ DEVICE_CAPA_SET(id_eeprom.capa, CAPA_DIN);
++ DEVICE_CAPA_SET(id_eeprom.capa, CAPA_DOUT);
++
+ log_info("sizeof: %lu", (unsigned long) sizeof(struct mts_id_eeprom_layout));
+ log_info("vendor-id: %.32s", id_eeprom.vendor_id);
+ log_info("product-id: %.32s", id_eeprom.product_id);
+@@ -1976,6 +1988,100 @@
+ return count;
+ }
+
++static ssize_t mts_attr_show_bt_enabled(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ int value;
++ struct gpio_pin *pin = gpio_pin_by_name("BT_EN");
++
++ if (!pin) {
++ return -ENODEV;
++ }
++
++ mutex_lock(&mts_io_mutex);
++
++ value = at91_get_gpio_value(pin->pin);
++
++ mutex_unlock(&mts_io_mutex);
++
++ if (value < 0) {
++ return value;
++ }
++
++ return sprintf(buf, "%d\n", value);
++}
++
++static ssize_t mts_attr_store_bt_enabled(struct device *dev,
++ struct device_attribute *attr, const char *buf, size_t count)
++{
++ int value;
++ int err;
++ struct gpio_pin *pin = gpio_pin_by_name("BT_EN");
++
++ if (!pin) {
++ return -ENODEV;
++ }
++
++ if (sscanf(buf, "%i", &value) != 1) {
++ return -EINVAL;
++ }
++
++ mutex_lock(&mts_io_mutex);
++
++ err = at91_set_gpio_value(pin->pin, value);
++
++ mutex_unlock(&mts_io_mutex);
++
++ return count;
++}
++
++static ssize_t mts_attr_show_wlan_enabled(struct device *dev,
++ struct device_attribute *attr, char *buf)
++{
++ int value;
++ struct gpio_pin *pin = gpio_pin_by_name("WLAN_EN");
++
++ if (!pin) {
++ return -ENODEV;
++ }
++
++ mutex_lock(&mts_io_mutex);
++
++ value = at91_get_gpio_value(pin->pin);
++
++ mutex_unlock(&mts_io_mutex);
++
++ if (value < 0) {
++ return value;
++ }
++
++ return sprintf(buf, "%d\n", value);
++}
++
++static ssize_t mts_attr_store_wlan_enabled(struct device *dev,
++ struct device_attribute *attr, const char *buf, size_t count)
++{
++ int value;
++ int err;
++ struct gpio_pin *pin = gpio_pin_by_name("WLAN_EN");
++
++ if (!pin) {
++ return -ENODEV;
++ }
++
++ if (sscanf(buf, "%i", &value) != 1) {
++ return -EINVAL;
++ }
++
++ mutex_lock(&mts_io_mutex);
++
++ err = at91_set_gpio_value(pin->pin, value);
++
++ mutex_unlock(&mts_io_mutex);
++
++ return count;
++}
++
+
+ static struct device_attribute dev_attr_gpo1 = {
+ .attr = {
+@@ -2137,6 +2243,24 @@
+ .store = mts_attr_store_gpio12,
+ };
+
++static struct device_attribute dev_attr_bt_enabled = {
++ .attr = {
++ .name = "bt-enabled",
++ .mode = MTS_ATTR_MODE_RW,
++ },
++ .show = mts_attr_show_bt_enabled,
++ .store = mts_attr_store_bt_enabled,
++};
++
++static struct device_attribute dev_attr_wlan_enabled = {
++ .attr = {
++ .name = "wlan-enabled",
++ .mode = MTS_ATTR_MODE_RW,
++ },
++ .show = mts_attr_show_wlan_enabled,
++ .store = mts_attr_store_wlan_enabled,
++};
++
+ static struct device_attribute dev_attr_rsersrc = {
+ .attr = {
+ .name = "rsersrc",
+@@ -2164,6 +2288,8 @@
+ &dev_attr_eth0_enabled.attr,
+ &dev_attr_gpio11.attr,
+ &dev_attr_gpio12.attr,
++ &dev_attr_bt_enabled.attr,
++ &dev_attr_wlan_enabled.attr,
+
+ &dev_attr_gpo1.attr,
+ &dev_attr_gpo2.attr,
+@@ -2323,7 +2449,7 @@
+ return tmp;
+ }
+
+- spi_dout_value = 0x00;
++ spi_dout_value = 0xFF; // 0x00;
+ spi_writen(spi, &spi_dout_value, 1);
+
+ spi_dout_dev = spi;
+@@ -2521,11 +2647,14 @@
+
+ if ( mts_product_id == MT100EOCG_0_0 ) {
+ //Set open drain for GPIO11 and GPIO12 using multi drive
++ // PCIE-H5 GPIO11 used for WLAN_IRQ
++#if 0
+ pin = gpio_pin_by_name("GPIO11");
+ if (pin) {
+ log_info("Set open drain for GPIO11");
+ at91_set_multi_drive(pin->pin, true);
+ }
++#endif
+ pin = gpio_pin_by_name("GPIO12");
+ if (pin) {
+ log_info("Set open drain for GPIO12");
diff --git a/multitech/recipes/multitech/mts-io_0.5.1.bb b/multitech/recipes/multitech/mts-io_0.5.1.bb
index f903020..43ee4fe 100644
--- a/multitech/recipes/multitech/mts-io_0.5.1.bb
+++ b/multitech/recipes/multitech/mts-io_0.5.1.bb
@@ -1,3 +1,5 @@
require mts-io.inc
PR = "${INC_PR}.0"
+
+SRC_URI_append_mt100eocg-pcie-dk = " file://mts-io-pcieh5.patch"