diff options
author | Jesse Gilles <jgilles@multitech.com> | 2014-01-17 13:45:19 -0600 |
---|---|---|
committer | Jesse Gilles <jgilles@multitech.com> | 2014-01-17 13:45:19 -0600 |
commit | 382a32756eaace2dd933426f5411cff4e111b70a (patch) | |
tree | 5b3da2b007e814c89a33bdeed0ce30cf5956cfa9 /multitech/recipes/at91bootstrap | |
parent | 1e2d685cc07a2c3c8165662e7c0ebeb19cb1c16d (diff) | |
parent | f88e1a39ae0758897f6c9680d27920d915c36952 (diff) |
Merge branch 'mtocgd' into mtocgd-2.3.2
Conflicts:
multitech/recipes/images/corecdp-tftpboot.inc
multitech/recipes/linux/linux_2.6.39-at91.bb
Diffstat (limited to 'multitech/recipes/at91bootstrap')
-rw-r--r-- | multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.3-mtocgd.patch | 60 | ||||
-rw-r--r-- | multitech/recipes/at91bootstrap/at91bootstrap_3.5.3.bb | 13 |
2 files changed, 69 insertions, 4 deletions
diff --git a/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.3-mtocgd.patch b/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.3-mtocgd.patch new file mode 100644 index 0000000..313bd91 --- /dev/null +++ b/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.3-mtocgd.patch @@ -0,0 +1,60 @@ +Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig +=================================================================== +--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-04-11 05:07:35.000000000 -0500 ++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-04-29 15:13:01.390913836 -0500 +@@ -42,7 +42,8 @@ + ALLOW_PIO3=y + CONFIG_HAS_PIO3=y + CPU_HAS_PMECC=y +-CONFIG_LOAD_ONE_WIRE=y ++# MTS: don't load one wire ++# CONFIG_LOAD_ONE_WIRE is not set + # CONFIG_MMC_SUPPORT is not set + + # +@@ -81,8 +82,8 @@ + # + # PMECC Configuration + # +-CONFIG_PMECC_CORRECT_BITS_2=y +-# CONFIG_PMECC_CORRECT_BITS_4 is not set ++# CONFIG_PMECC_CORRECT_BITS_2 is not set ++CONFIG_PMECC_CORRECT_BITS_4=y + # CONFIG_PMECC_CORRECT_BITS_8 is not set + # CONFIG_PMECC_CORRECT_BITS_12 is not set + # CONFIG_PMECC_CORRECT_BITS_24 is not set +@@ -116,4 +117,5 @@ + # CONFIG_USER_HW_INIT is not set + CONFIG_THUMB=y + CONFIG_SCLK=y +-CONFIG_DISABLE_WATCHDOG=y ++# MTS: don't disable watchdog ++# CONFIG_DISABLE_WATCHDOG is not set +Index: at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c +=================================================================== +--- at91bootstrap-3.5.3.orig/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-11 05:07:35.000000000 -0500 ++++ at91bootstrap-3.5.3/board/at91sam9x5ek/at91sam9x5ek.c 2013-04-29 15:14:44.578915819 -0500 +@@ -312,10 +312,8 @@ + + reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA); + reg |= AT91C_EBI_CS3A_SM; +- if (get_cm_rev() == 'A') +- reg &= ~AT91C_EBI_NFD0_ON_D16; +- else +- reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); ++ /* MTR */ ++ reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16); + + reg &= ~AT91C_EBI_DRV; + writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA); +@@ -345,9 +343,7 @@ + AT91C_BASE_SMC + SMC_CTRL3); + + /* Configure the PIO controller */ +- if (get_cm_rev() == 'A') +- pio_configure(nand_pins_lo); +- else ++ /* MTR2 */ + pio_configure(nand_pins_hi); + + writel((1 << AT91C_ID_PIOC_D), (PMC_PCER + AT91C_BASE_PMC)); diff --git a/multitech/recipes/at91bootstrap/at91bootstrap_3.5.3.bb b/multitech/recipes/at91bootstrap/at91bootstrap_3.5.3.bb index 7a83579..a7b0643 100644 --- a/multitech/recipes/at91bootstrap/at91bootstrap_3.5.3.bb +++ b/multitech/recipes/at91bootstrap/at91bootstrap_3.5.3.bb @@ -4,11 +4,12 @@ PR = "r1" SRC_URI = "https://github.com/linux4sam/at91bootstrap/archive/v3.5.3.tar.gz \ file://at91bootstrap-3.5.2-add-install.patch \ - file://at91bootstrap-3.5.2-onetime-slow-clock-switch.patch" + file://at91bootstrap-3.5.2-onetime-slow-clock-switch.patch \ + file://at91sam9x5_4bit_pmecc_header.bin " -SRC_URI_append_mtocgd3 = " file://at91bootstrap-3.5.3-mtocgd3.patch \ - file://at91sam9x5_4bit_pmecc_header.bin \ - " +SRC_URI_append_mtocgd3 = " file://at91bootstrap-3.5.3-mtocgd3.patch " + +SRC_URI_append_mtocgd = " file://at91bootstrap-3.5.3-mtocgd.patch " SRC_URI[md5sum] = "7379726f686f5b9c8f4a2012676b79fc" SRC_URI[sha256sum] = "6c2289671f1c3cf317114b2e82955f98e860dda8c706d5c1e80c0bbebc6c5b12" @@ -20,6 +21,10 @@ do_pad_4bit_pmecc() { cat ${DEPLOY_DIR_IMAGE}/at91bootstrap.bin >> ${DEPLOY_DIR_IMAGE}/at91bootstrap_pmecc_padded.bin } +do_install_append_mtocgd() { + do_pad_4bit_pmecc +} + do_install_append_mtocgd3() { do_pad_4bit_pmecc } |