diff options
| author | Jesse Gilles <jgilles@multitech.com> | 2014-05-06 11:17:17 -0500 |
|---|---|---|
| committer | Jesse Gilles <jgilles@multitech.com> | 2014-05-06 11:17:17 -0500 |
| commit | c0d9a58b64a289ff5dc2cb39f7efe8451ca85320 (patch) | |
| tree | 4bb15bd4e7efe444f8d884353d5cdb8a66af6c6c /multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend | |
| parent | 066519ad212cf7f3a33cbbf01f6c110e10309153 (diff) | |
at91bootstrap-2.13: mtcdp: use fast SDRAM slew rate
Fixes issues with newer boards using a 6ns SDRAM part
Diffstat (limited to 'multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend')
| -rw-r--r-- | multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend b/multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend index 9ebb283..a21dfa7 100644 --- a/multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend +++ b/multitech/recipes/at91bootstrap/at91bootstrap_2.13.bbappend @@ -1,14 +1,23 @@ FILESEXTRA := "${THISDIR}" FILESPATHBASE =. "${FILESEXTRA}:" -PR .= ".corecdp5" +PR .= ".corecdp6" SRC_URI += "file://defconfig \ file://nand_ids_toshiba.patch \ - file://sdram_slow_slew_rate.patch \ file://memory_bus_1.8v.patch \ " +# fast SDRAM slew rate for mtcdp (print on boot) +SRC_URI_append_mtcdp = " file://sdram_fast_slew_print.patch" + +# slow SDRAM slew rate for mt100eocg +SRC_URI_append_mt100eocg = " file://sdram_slow_slew_rate.patch" +SRC_URI_append_mt100eocg-pcie-dk = " file://sdram_slow_slew_rate.patch" + # run memory bus at 1.8v for mt100eocg AT91BOOTSTRAP_FLAGS_append_mt100eocg = " -DCONFIG_USER_EBI_1V8" AT91BOOTSTRAP_FLAGS_append_mt100eocg-pcie-dk = " -DCONFIG_USER_EBI_1V8" + +# uncomment to enable watchdog in bootstrap +#SRC_URI += " file://at91bootstrap-2.13-enable-watchdog.patch" |