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authorJason Reiss <jreiss@multitech.com>2020-11-04 10:36:54 -0600
committerJohn Klug <john.klug@multitech.com>2020-11-10 18:17:19 -0600
commit0ead48a10e7b68ab336baa633d23dc2ae3f22cc4 (patch)
treeb8d03ef352d753cc3b0181003ba25d5896a6d33d /recipes-connectivity/lora
parentcb4bfdc3a29c668dbc592635eda34fa9a166e9d3 (diff)
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lora: update US915 v2.1 power tables
Diffstat (limited to 'recipes-connectivity/lora')
-rw-r--r--recipes-connectivity/lora/lora-packet-forwarder-geolocation/global_conf.json.MTAC_LORA_2_1_loc_single_antenna_full_duplex_64ch_US9156
1 files changed, 3 insertions, 3 deletions
diff --git a/recipes-connectivity/lora/lora-packet-forwarder-geolocation/global_conf.json.MTAC_LORA_2_1_loc_single_antenna_full_duplex_64ch_US915 b/recipes-connectivity/lora/lora-packet-forwarder-geolocation/global_conf.json.MTAC_LORA_2_1_loc_single_antenna_full_duplex_64ch_US915
index 2f57e06..055e560 100644
--- a/recipes-connectivity/lora/lora-packet-forwarder-geolocation/global_conf.json.MTAC_LORA_2_1_loc_single_antenna_full_duplex_64ch_US915
+++ b/recipes-connectivity/lora/lora-packet-forwarder-geolocation/global_conf.json.MTAC_LORA_2_1_loc_single_antenna_full_duplex_64ch_US915
@@ -22,9 +22,9 @@
"tx_freq_min": 923300000,
"tx_freq_max": 927500000,
"tx_lut":[
- { "rf_power": 9, "fpga_dig_gain": 5, "ad9361_atten": 108, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
- { "rf_power": 11, "fpga_dig_gain": 5, "ad9361_atten": 100, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
- { "rf_power": 12, "fpga_dig_gain": 5, "ad9361_atten": 96, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
+ { "rf_power": 9, "fpga_dig_gain": 5, "ad9361_atten": 111, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
+ { "rf_power": 11, "fpga_dig_gain": 5, "ad9361_atten": 104, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
+ { "rf_power": 12, "fpga_dig_gain": 5, "ad9361_atten": 101, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -17, "ad9361_tcomp_coeff_b": 477 },
{ "rf_power": 13, "fpga_dig_gain": 5, "ad9361_atten": 91, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -3, "ad9361_tcomp_coeff_b": -508 },
{ "rf_power": 14, "fpga_dig_gain": 5, "ad9361_atten": 87, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -3, "ad9361_tcomp_coeff_b": -508 },
{ "rf_power": 16, "fpga_dig_gain": 5, "ad9361_atten": 79, "ad9361_auxdac_vref": 3, "ad9361_auxdac_word": 770, "ad9361_tcomp_coeff_a": -2, "ad9361_tcomp_coeff_b": -610 },