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authorHarsh Sharma <harsh.sharma@multitech.com>2019-09-25 16:28:36 -0500
committerHarsh Sharma <harsh.sharma@multitech.com>2019-09-25 16:28:36 -0500
commit5ae0deec6af66f26e84b34366ca1663261498c63 (patch)
tree253a3a37e339e16baec68874e608fba0ae1d74ed
parente6960db410f52ccadd3d70d3411c1f512f21ff78 (diff)
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MTAC cards with fpga v28 are not allowed to run the spectral scan thread. GP-281: Eui was not casted properly in spectral scan thread
-rw-r--r--VERSION2
-rw-r--r--lora_pkt_fwd/src/lora_pkt_fwd.c21
2 files changed, 11 insertions, 12 deletions
diff --git a/VERSION b/VERSION
index c1bc546..b33ec60 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-4.0.1-mts-1
+4.0.1-mts-2
diff --git a/lora_pkt_fwd/src/lora_pkt_fwd.c b/lora_pkt_fwd/src/lora_pkt_fwd.c
index 9d2d4df..fc15302 100644
--- a/lora_pkt_fwd/src/lora_pkt_fwd.c
+++ b/lora_pkt_fwd/src/lora_pkt_fwd.c
@@ -2619,7 +2619,7 @@ void thread_down(void) {
json_value_free(root_val);
continue;
}
- if (specscan_obj != NULL) {
+ if (specscan_obj != NULL && read_fpga_version() >= 31) {
bool valid_config = true;
val = json_object_get_value(specscan_obj, "start"); /* fetch value (if possible) */
if (json_value_get_type(val) == JSONNumber) {
@@ -3306,6 +3306,12 @@ void thread_valid(void) {
/* --- THREAD 6: Spectral Scan --- */
void thread_spectralscan(void) {
+
+ if (read_fpga_version() < 31) {
+ /* FPGA v31+ is required to run this thread */
+ MSG("\nWARNING: Invalid FPGA version for spectran scan. Ending spectral scan thread\n");
+ return;
+ }
struct timeval tv;
/* Application parameters */
uint16_t i, j, k; /* loop and temporary variables */
@@ -3346,7 +3352,6 @@ void thread_spectralscan(void) {
while (!exit_sig && !quit_sig) {
wait_ms(1000);
gettimeofday(&tv, NULL);
- // Form the seconds of the day
long hms = tv.tv_sec % 86400;
int min = (hms % 3600) / 60;
pthread_mutex_lock(&mx_scan_config);
@@ -3363,7 +3368,7 @@ void thread_spectralscan(void) {
JSON_Array *interests_arr = NULL;
json_object_set_number(root_object, "bandwidth", scan_config.bandwidth);
char eui[17];
- sprintf(&eui[0], "%016lX", lgwm);
+ sprintf(&eui[0], "%016llX", lgwm);
json_object_set_string(root_object, "eui", eui);
json_object_set_value(root_object, "results", json_value_init_array());
interests_arr = json_object_get_array(root_object, "results");
@@ -3387,8 +3392,6 @@ void thread_spectralscan(void) {
freq = scan_config.start + j * scan_config.step;
struct timespec t2;
clock_gettime(CLOCK_MONOTONIC, &t2);
-
- // double scan_time = difftimespec(t2, t1);
int scan_time = (int)(1000 * difftimespec(t2, t1));
if (lbt_support == false) {
/* Set SX127x */
@@ -3407,13 +3410,9 @@ void thread_spectralscan(void) {
/* Clean histogram */
lgw_fpga_reg_w(LGW_FPGA_CTRL_CLEAR_HISTO_MEM, 1);
- uint8_t reg_stat_old = 255;
- uint8_t reg_stat_new;
/* Wait for histogram clean to start */
do {
if (histogram_clean_counter > HISTOGRAM_CLEAN_TIMEOUT) {
- reg_stat_new = reg_val;
- reg_stat_old = reg_stat_new;
if (histogram_clean_retry >= retry_limit) {
printf("\nHistogram clean retry limit reached.");
exit(EXIT_FAILURE);
@@ -3444,7 +3443,7 @@ void thread_spectralscan(void) {
lgw_fpga_reg_r(LGW_FPGA_STATUS, &reg_val);
histogram_clean_counter++;
}
- while((TAKE_N_BITS_FROM((uint8_t)reg_val, 0, 5)) != 1); /* Clear has started */
+ while((TAKE_N_BITS_FROM((uint8_t)reg_val, 0, 5)) != 1 && !exit_sig && !quit_sig); /* Clear has started */
/* Set scan frequency during clear process */
if (lbt_support == false) {
@@ -3503,7 +3502,7 @@ void thread_spectralscan(void) {
lgw_fpga_reg_r(LGW_FPGA_STATUS, &reg_val);
histogram_ready_counter++;
}
- while((TAKE_N_BITS_FROM((uint8_t)reg_val, 5, 1)) != 1);
+ while((TAKE_N_BITS_FROM((uint8_t)reg_val, 5, 1)) != 1 && !exit_sig && !quit_sig);
if (lbt_support == false) {
/* Stop FPGA state machine for spectral scan */