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2016-08-01tune-mips-24k: add QEMU_EXTRAOPTIONS for DSP and MIPS16e coresAndré Draszik1
The core emulated by default by qemu-mips(el) just crashes with illegal instruction when encountering DSP and/or MIPS16e instructions - we have to specify a CPU that supports the extra instructions. This is an issue when generating a rootfs and e.g. running some of the package postinstall scriptlets. The patch to qemu to add 24KEc as a CPU has been accepted upstream, so let's use that CPU here as well as needed. Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-07-10tune-ppce500mc.inc: pass -mcpu=e500mc for ppce500mc kernel compileZhenhua Luo1
Currently the -mcpu parameter is not passed to cross gcc when assembling kernel .S file, the implicit -mcpu option that defaults to the latest server cpu might casuse incorrect assembling. A existent case is that wait instruction of ppce500mc is incorrectly assembled to power9 version with default -mcpu setting, accordingly kernel boot calltrace happend when wait instruction is executed on ppce500mc targets. Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-06-12mips: add tunes for (some) 24K coresAndré Draszik1
- add 24kc big and little endian, which is based on mips32r2 w/o FPU - add 24kec which is 24kc + DSP - both can have the MIPS16e ASE enabled in their tunes Signed-off-by: André Draszik <adraszik@tycoint.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-06-12mips: add a tune for using MIPS16e ASE instructionsAndré Draszik1
The MIPS16e instruction set still has to be enabled by setting MIPS_INSTRUCTION_SET = 'mips16e' in e.g. distro.conf and can be disabled on a per-recipe basis as needed. This is a similar approach as is available on ARM for Thumb support. Note that contrary to the ARM Thumb support in OE, we do add a new OVERRIDE (mips16e), as there are some recipes in OE that need to be compiled slightly differently if mips16e mode is requested. Signed-off-by: André Draszik <adraszik@tycoint.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-05-14feature-arm-vfp.inc: fix overzealous ARMPKGSFX_FPU modificationAndré Draszik1
Since commit 972b4fc (feature-arm-neon.inc: restore vfpv3-d16 support) we're replacing _all_ dashes (-) in ARMPKGSFX_FPU, which is causing problems for all legitimate uses of the dash as TUNE_PKGARCH doesn't have the right value anymore: E.g. on raspberrypi2: ERROR: OE-core's config sanity checker detected a potential misconfiguration. Either fix the cause of this error or at your own risk disable the checker (see sanity.conf). Following is the list of potential problems / advisories: Error, the PACKAGE_ARCHS variable (all any noarch armv5hf-vfp armv5thf-vfp armv5ehf-vfp armv5tehf-vfp armv6hf-vfp armv6thf-vfp armv7ahf-vfp armv7at2hf-vfp armv7vehf-vfp armv7vet2hf-vfp armv7vehf-neon armv7vet2hf-neon armv7vehf-neon-vfpv4 armv7vet2hf-neon-vfpv4 cortexa7hf-vfp cortexa7hf-neon cortexa7hf-neon-vfpv4 cortexa7t2hf-vfp cortexa7t2hf-neon cortexa7t2hf-neon-vfpv4 raspberrypi3) for DEFAULTTUNE (cortexa7thf-neon-vfpv4) does not contain TUNE_PKGARCH (cortexa7hf-neonvfpv4). Fix this by being more explicit about what we're modifying. Reported-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-11feature-arm-neon.inc: restore vfpv3-d16 supportAndré Draszik2
Commit 6661718 (feature-arm-{neon,vfp}.inc: refactor and fix issues) effectively changed the gcc -mfpu= option from -mfpu=vfpv3-d16 to -mfpu=vfpv3d16, which gcc doesn't understand. Restore the original value. After doing that, we also need to adjust ARMPKGSFX_FPU which should contain the same value without dash '-' as it is used that way throughout. Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-05-06tune-mips32r2.inc: add soft-float variantsAndré Draszik1
Signed-off-by: André Draszik <adraszik@tycoint.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-05-06arch-powerpc64.inc: disable the use of qemu usermode on ppc64Alexander Kanavin1
It simply does not work at all: https://lists.yoctoproject.org/pipermail/yocto/2016-April/029698.html Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-05-06arch-armv7ve: inherit armv7a tunes fileDenys Dmytriyenko1
armv7a is a subset of armv7ve: https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html -march=armv7ve is the armv7-a architecture with virtualization extensions. By inheriting armv7a from armv7ve it's possible for e.g. Cortex-A15 machines to include tune-cortexa15.inc and have a full range of optimizations, but set DEFAULTTUNE as "armv7a" to produce binaries compatible with Cortex-A8 machines, etc. Signed-off-by: Denys Dmytriyenko <denys@ti.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-28bitbake.conf: rename 'gobject-introspection-data' machine feature to ↵Alexander Kanavin1
'qemu-usermode' The new value is more general and better reflects what having the feature really means. Introspection data, then, is built only if 'gobject-introspection-data' is in DISTRO_FEATURES and 'qemu-usermode' is in MACHINE_FEATURES. Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-24x86-base.inc: suggest the latest kernelMaxin B. John1
Use latest 4.x kernel instead of 3.x version Signed-off-by: Maxin B. John <maxin.john@intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-03-23tune-arm926ejs: Handle missing thumb suffixJens Rehsack1
When enabling tune for arm926ejs, poky optionally appends suffixes for thumb and dsp support. Since sometimes arm926ejse (ARM code) and sometime arm926ejste (thumb code) is used in PACKAGE_ARCH, allow both. Signed-off-by: Jens Rehsack <sno@netbsd.org> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-03-20qemuarm64.conf: don't clear MACHINE_FEATURESAndre McCurdy1
Accept the default MACHINE_FEATURES from qemu.inc (qemuarm64 shouldn't need to be a special case). Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-03-12machine/include/arch-x86: Make x32 ABI not supporting gobject-introspection-dataRichard Purdie1
x32 isn't supported by user mode qemu so we can't build gobject-introspection-data, so disable it in this case. (From OE-Core rev: 4ee1eb8ddd3fbe144fbaeb32e07b66e191aa7548) Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-09tune-corei7.inc: Fix PACKAGE_EXTRA_ARCHS for corei7-32Chang Rebecca Swee Fun1
Change the name to core2-32 from core2. There's no AVAILTUNES with the name core2. Make sure that we specify the correct TUNE name so PACKAGE_EXTRA_ARCHS is expanded correctly. [ YOCTO #9197 ] Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Signed-off-by: Anuj Mittal <anujx.mittal@intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-07tune-cortexa17.inc: apply changes similar to a15Trevor Woerner1
Apply the same sort of changes to the Cortex-A17 tune as were done in commit 35392025f3236f5e5393f9cf0857732da9a2e503. Signed-off-by: Trevor Woerner <twoerner@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-06feature-arm-thumb.inc: Fix thumb tune override warningNathan Rossi1
Fix the quotes in the bb.utils.contains feature check so that the call results in a boolean value instead of a string, which allows the warning check to occur. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-28tune-cortexa9.inc: add vfpv3 tunesRichard Tollerton1
Define tunnings to enable 32 register VFPv3 for cortexa9 processor cores More details: http://www.arm.com/products/processors/technologies/vector-floating-point.php Signed-off-by: Richard Tollerton <rich.tollerton@ni.com> Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-02-15qemu.inc: Add rng-tools to qemu imagesSaul Wold1
This patch adds rng-tools to MACHINE_EXTRA_RRECOMMENDS so that can be used to provide the additional entropy to prevent hangs in getrandom() for qemu images [YOCTO #8681] [YOCTO #8816] Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-11tune-corei7.inc: tell qemu to emulate a matching processorRoss Burton1
If tune-corei7 is in use then the target binaries may contain instructions that qemu-x86-64 can't execute by default, resulting in errors on rootfs construction: NOTE: Running intercept scripts: NOTE: > Executing update_font_cache intercept ... qemu: uncaught target signal 4 (Illegal instruction) - core dumped In this case the instruction is popcnt, part of SSE4.2, so tell Qemu to emulate the CPU that the tune targets (in this case, Nehalem). Also pass check=false as the Nehalem machine supports VME but user-space qemu doesn't, which produces a warning unless CPUID checking is disabled. [ YOCTO #8888 ] Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-02-02machine/include: drop tune-cortexm*.inc and tune-cortexr4.incAndre McCurdy3
The Cortex M1, M3 and R4 CPU tuning files are poorly tested (if at all). They have no obvious users either inside or outside oe-core. Until OE officially gains support for CPUs without an MMU, these tuning files are probably better maintained outside of oe-core (e.g. in a separate meta-nommu layer). Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-30gcc, qemuppc: Explicitly disable forcing SPE flagsKhem Raj2
G4 does not have SPE, so we make that explicit in the tune files and since we emulate G4 when building Qemu, we ensure it for qemuppc as well. GCC config for powerpc-linux is made to include SPE by default which is equivalent if the tripet was powerpc-linux*spe, this forces gcc to configure assembler to enable -mspe by default, when we do that then the kernel fails to compile with binutils 2.26, since newer assembler is smart to detect the tlbia instructions are not compatible with SPE and hence the kernel build breaks rightly. We configure the kernel for G4 as well where it enables tlbia instrucitons rightly so because it thinks its being configured for power4. So we keep the options but do not force -mspe down to assembler as default. Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07tune-*: use mcpu instead of mtune for ARM tunesMartin Jansa17
* since: commit cffda9a821a3b83a8529d643c567859e091c6846 Author: Martin Jansa <Martin.Jansa@gmail.com> Date: Tue Sep 11 17:05:45 2012 +0000 arch-arm: define different ARMPKGARCH when different CCARGS are used we don't need to worry about e.g. cortexa7 device upgrading binary package from armv7a feed which would be built with -mcpu=cortexa15, so we can use -mcpu instead of -mtune, because we won't share the binary feed with MACHINEs built with different tune. Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7ve: add tune include for armv7ve and use it from cortexa7 and ↵Martin Jansa4
cortexa15 * be aware that this -march value is available only in gcc-4.9 and newer: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57907 * -mcpu=cortex15 and -mcpu=cortexa7 conflict with -march=armv7a We either have to stop putting -march in default CCARGS or at least set it compatible one like this patch does. Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07cortexa{7,15,17}: add VFPv4 tunesMartin Jansa3
* it was added only to hf cortexa7 in: commit e97d152ca13556b41a236c1a4cfb11e77ff857d7 Author: Kristof Robot <krirobo@gmail.com> Date: Sun Jan 26 10:03:56 2014 +0100 Add Cortex A7 support for NEONv2 & FPv4 * add it to softfp cortexa7 and both versions for cortexa15 and cortexa17 tunes Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07feature-arm-vfp.inc: Further simplify with TUNE_CCARGS_MFLOATMartin Jansa3
* add TUNE_CCARGS_MFLOAT variable which is used to set -mfloat-abi parameter as well as ARMPKGSFX_EABI suffix in TUNE_PKGARCH and TARGET_FPU * TARGET_FPU was using ARMPKGSFX_FPU, but in most cases we use it only to distinguish between hard and soft abi, not various -mfpu variants which can appear in ARMPKGSFX_FPU Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07feature-arm-{neon,vfp}.inc: refactor and fix issuesMartin Jansa9
* respect all 4 vfp options ('vfp', 'vfpv3d16', 'vfpv3', 'vfpv4') when setting -mfloat-abi and ARMPKGSFX_EABI, without this change it wasn't possible to use call-convention hard together with vfpv4 * move 'vfpv3d16', 'vfpv3', 'vfpv4' support from feature-arm-vfp.inc to feature-arm-neon.inc the main difference is that feature-arm-vfp.inc is included in arch-armv5.inc while feature-arm-neon.inc only in armv7*.inc, so these options should be added to TUNEVALID also only for armv7* MACHINEs. * support vfpv4 with or without neon when both vfpv4 and neon are in TUNE_FEATURES we want to set only one -mfpu parameter and to neon-vfpv4 * prevent multiple appends to ARMPKGSFX_FPU, we don't want to include e.g. -vfp as well as -vfpv4 when both "vfp" and "vfpv4" are in TUNE_FEATURES * add -mfpu=vfp for tunes with "vfp" in TUNE_FEATURES - before that we were only adding -vfp to ARMPKGSFX_FPU * add TUNE_CCARGS_MFPU variable which is used to set -mfpu parameter as well as ARMPKGSFX_FPU suffix in TUNE_PKGARCH, all enabled values are appended to it based on TUNE_FEATURES and then the last one is used in the actual param and suffix * this prevents multiple -mfpu options in TUNE_CCARGS * !!! This means we need to change TUNE_PKGARCH and PACKAGE_EXTRA_ARCHS for vfpv4, vfpv3d16, vfpv3 tunes, because the -vfp* isn't prependend multiple times. If you're using one of these new DEFAULTTUNES (which were at least partially broken anyway) and depend on working binary package feed upgrade-path, then don't forget to migrate PR service database to new TUNE_PKGARCH. Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7a.inc: add vfpv4 support also to softfp and big endiand tunesMartin Jansa1
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7a.inc: Fix PACKAGE_EXTRA_ARCHS for tune-armv7atb-vfpv3, ↵Martin Jansa2
tune-armv7atb-vfpv3d16, cortexa7thf-neon-vfpv4 Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv5.inc: drop duplicate ARMPKGSFX_DSP and ↵Martin Jansa1
PACKAGE_EXTRA_ARCHS_tune-armv5tehf-vfp * both belong and already are in arch-armv5-dsp.inc Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv[456]*.inc: improve indentation like armv7aMartin Jansa4
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arm/arch-arm*, tune-cortexa*, tune-thunderx.inc, ↵Martin Jansa14
powerpac/arch-powerpc64.inc: Use normal assignment * some tunes were using weak assignment for TUNE_FEATURES, unify all tunes to use normal assignment so it behaves consistently Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7a, tune-cortexa*: improve indentationMartin Jansa7
* indent the assignments, so that it's easier to see the algoritm how these values are modified and do less errors, see fixes in next commit Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7a, tune-cortexa*: improve comment VFP -> HFMartin Jansa7
* the section bellow the comment adds only HF variants, VFP is already mixed in the softfp sections above (unlike armv5, armv6 tune files where it really was above VFP/DSP section) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07arch-armv7a: add missing space before ?=Martin Jansa1
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2016-01-07tune-cortexr4.inc: fix PACKAGE_EXTRA_ARCHSMartin Jansa1
* PACKAGE_ARCHS were missing TUNE_PKGARCH armv7rt2-vfp because thumb is enabled in TUNE_FEATURES Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-22tune-cortexr4.inc: provide an _armv7r over-ride via MACHINEOVERRIDESAndre McCurdy1
Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-22tune-cortexm3.inc: provide an _armv7m over-ride via MACHINEOVERRIDESAndre McCurdy1
Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-22feature-arm-thumb.inc: drop 'no-thumb-interwork' tuning featureAndre McCurdy1
Interworking is required for ARM EABI, so attempting to disable it via a tuning feature no longer makes sense (support for ARM OABI was deprecated in gcc 4.7). We can drop '-mthumb-interwork' from TUNE_CCARGS for the same reason. Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-22feature-arm-thumb.inc: drop legacy _thumb and _thumb-interwork over-ridesAndre McCurdy1
Bitbake over-rides for _thumb and _thumb-interwork are undocumented and are not used anywhere in oe-core or meta-oe. The logic setting up the thumb-interwork over-ride even seems to be reversed and nobody noticed, so it seems safe to assume that these over-rides are not used. Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-22feature-arm-thumb.inc: drop ARM -vs- thumb commentsAndre McCurdy1
Comments are old and specific to thumb1. Since oe-core CPU tuning files aren't really the right place to fully document ARM -vs- thumb, drop the comments instead of trying to update them. Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-12-01meta/conf/machine: use ' inside quoted valuesMartin Jansa55
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-10-12machine/qemu: Fix OpenGL/GLX support with xserver-xorg.Carlos Alberto Lopez Perez3
* The Xorg server needs to load the GLX extension in order to enable proper OpenGL support. * Before this patch, glxinfo aborted with: root@qemux86:~# glxinfo name of display: :0.0 Error: couldn't find RGB GLX visual or fbconfig * After this patch, it works as expected: root@qemux86:~# glxinfo | grep " render" direct rendering: Yes OpenGL renderer string: Software Rasterizer Signed-off-by: Carlos Alberto Lopez Perez <clopez@igalia.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-10-03ThunderX: Add initial tune fileArmin Kuster1
changed upper case "X" to lower case "x" Signed-off-by: Armin Kuster <akuster@mvista.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2015-08-30tune-octeon.inc: add BASE_LIB settingsDmitry Eremin-Solenikov1
Provide BASE_LIB settings for octeon* tunes that follow the practice of mips64/mips64-n32 tunes (lib64 for N64 ABI, lib32 for N32 ABI). (From OE-Core rev: 2b52312174e52886b0a978ece41f66b4fb455604) Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2015-08-30tune-octeon.inc: correct packaging suffixDmitry Eremin-Solenikov1
Octeon II/III binaries can contain instructions that are not compatible with MIPS64 processors. Thus Octeon II/III packages should go to separate directories. Set MIPSPKGSFX_VARIANT_tune-* to Octeon-specific values and update PACKAGE_EXTRA_ARCHS_tune-* accordingly. (From OE-Core rev: 69798449a8c1049728674dd352cf828063974cd0) Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2015-08-29qemuarm64.conf: Make the second serial console /dev/hvc0Randy Witt1
Since the qemu for aarch64 must use a virtual console for the second serial port rather than emulating actual hardware, make sure the correct device is specified so that a tty is actually started. Signed-off-by: Randy Witt <randy.e.witt@linux.intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2015-08-24qemurunner: Use two serial ports and log console with a threadRandy Witt7
qemu can freeze and stop responding if the socket buffer connected to a tcp serial connection fills up. This happens of course when the reader of the serial data doesn't actually read it. This happened in the qemurunner code, because after checking for the "login:" sentinel, data was never again read from the serial connection. This patch solves the potential freeze by adding a thread to continuously read the data from the console and log it. So it also will give a full log of the console, rather than just up to the login prompt. To simplify this patch, another serial port was also added to use for the sole purpose of watching for the sentinel as well as being the interactive serial port. This will also prevent the possibility of lots of debug data on the console preventing the sentinel value from being seen due to interleaved text. Signed-off-by: Randy Witt <randy.e.witt@linux.intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-08-19tune-octeon: add tune file for MIPS OcteonArmin Kuster1
This add MIPS Octeon tune features. Signed-off-by: Armin Kuster <akuster@mvista.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2015-07-31arch-mips.inc: don't override TRANSLATED_TARGET_ARCHDmitry Eremin-Solenikov1
Currently MIPS64 N32 is broken. There is internal disagreement between TARGET_ARCH (which doesn't contain ABIEXTENSION) and TRANSLATED_TARGET_ARCH (which contains ABIEXTENSION). ABI is already encoded into the TARGET_OS. ARM tunes in the same situation override neither the TARGET_ARCH nor the TRANSLATED_TARGET_ARCH. So let's drop this override. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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