diff options
| -rw-r--r-- | meta/recipes-devtools/binutils/binutils-2.26.inc | 1 | ||||
| -rw-r--r-- | meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch | 36 |
2 files changed, 37 insertions, 0 deletions
diff --git a/meta/recipes-devtools/binutils/binutils-2.26.inc b/meta/recipes-devtools/binutils/binutils-2.26.inc index 6d535fcaa3..6d77452f5f 100644 --- a/meta/recipes-devtools/binutils/binutils-2.26.inc +++ b/meta/recipes-devtools/binutils/binutils-2.26.inc @@ -34,6 +34,7 @@ SRC_URI = "\ file://0012-Add-support-for-Netlogic-XLP.patch \ file://0013-Fix-GOT-address-computations-in-initial-PLT-entries-.patch \ file://0014-Correct-nios2-_gp-address-computation.patch \ + file://0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch \ " S = "${WORKDIR}/git" diff --git a/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch b/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch new file mode 100644 index 0000000000..5aa5e318e9 --- /dev/null +++ b/meta/recipes-devtools/binutils/binutils/0015-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch @@ -0,0 +1,36 @@ +From 78decbeb84fb60db4e549ad3e8eb34e030e96d39 Mon Sep 17 00:00:00 2001 +From: Zhenhua Luo <zhenhua.luo@nxp.com> +Date: Sat, 11 Jun 2016 22:08:29 -0500 +Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic + +Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com> + +Upstream-Status: Pending +--- + opcodes/ppc-opc.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index e8c92f6..a9de474 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -4777,7 +4777,6 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"ldepx", X(31,29), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}}, + + {"waitasec", X(31,30), XRTRARB_MASK,POWER8, POWER9, {0}}, +-{"wait", X(31,30), XWC_MASK, POWER9, PPCNONE, {WC}}, + + {"lwepx", X(31,31), X_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RT, RA0, RB}}, + +@@ -4831,7 +4830,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}}, + {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}}, +-{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {WC}}, ++{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|PPCVLE|POWER9, PPCNONE, {WC}}, + + {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}}, + +-- +2.5.0 + |