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| author | Bruce Ashfield <bruce.ashfield@windriver.com> | 2015-05-15 14:01:00 -0400 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2015-05-22 13:34:30 +0100 |
| commit | 211b631b0d7bf4df3152f4d8d626d798d023d512 (patch) | |
| tree | 51be633dab0378fd2fabb456777363492dfb8e3e /scripts/rpm2cpio.sh | |
| parent | d6a0c0f60ea85235479d968f75d067a10ce21574 (diff) | |
| download | openembedded-core-211b631b0d7bf4df3152f4d8d626d798d023d512.tar.gz openembedded-core-211b631b0d7bf4df3152f4d8d626d798d023d512.tar.bz2 openembedded-core-211b631b0d7bf4df3152f4d8d626d798d023d512.zip | |
linux-yocto/3.19: Braswell DRM fixes
Updating the 3.19 kernel SRCREVs to integrate the following Braswell
changes:
374b5d0e09ea drm/i915: Only wait for required lanes in vlv_wait_port_ready()
fca99e8ee111 Revert "drm/i915: Hack to tie both common lanes together on chv"
00682f31b612 drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
654b1a4497c5 drm/i915: Implement chv display PHY lane stagger setup
Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
Diffstat (limited to 'scripts/rpm2cpio.sh')
0 files changed, 0 insertions, 0 deletions