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author | Jim Somerville <Jim.Somerville@windriver.com> | 2013-01-21 11:13:31 -0500 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2013-02-08 14:46:12 +0000 |
commit | d1a3f3e2a6a74ba9b7ad5554648faebaf1b73c9f (patch) | |
tree | 7136e3a402619115bacda4f94d5e8fedb5cf37a0 /meta/recipes-rt | |
parent | 194c902c28291d564cef71bdd9588afa5b72d9f5 (diff) | |
download | openembedded-core-d1a3f3e2a6a74ba9b7ad5554648faebaf1b73c9f.tar.gz openembedded-core-d1a3f3e2a6a74ba9b7ad5554648faebaf1b73c9f.tar.bz2 openembedded-core-d1a3f3e2a6a74ba9b7ad5554648faebaf1b73c9f.zip |
rt-tests: fix cyclictest reported 1 sec latencies
[ CQID: WIND00391769 ]
Huge latencies reported close to 1 second when certain options
are used in cyclictest.
Extend the original commit to remove the 1 second hardcoded
timer values from the RELTIME and ITIMER options. Use the
the actual interval instead.
Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Diffstat (limited to 'meta/recipes-rt')
-rw-r--r-- | meta/recipes-rt/rt-tests/files/cyclictest-finish-removal-of-1-second-first-loops.patch | 58 | ||||
-rw-r--r-- | meta/recipes-rt/rt-tests/rt-tests.inc | 3 |
2 files changed, 60 insertions, 1 deletions
diff --git a/meta/recipes-rt/rt-tests/files/cyclictest-finish-removal-of-1-second-first-loops.patch b/meta/recipes-rt/rt-tests/files/cyclictest-finish-removal-of-1-second-first-loops.patch new file mode 100644 index 0000000000..ea4f3cc176 --- /dev/null +++ b/meta/recipes-rt/rt-tests/files/cyclictest-finish-removal-of-1-second-first-loops.patch @@ -0,0 +1,58 @@ +From 8959451a8ec5dc83dcb2dba6701abe8bf419e12c Mon Sep 17 00:00:00 2001 +Message-Id: <8959451a8ec5dc83dcb2dba6701abe8bf419e12c.1358783585.git.Jim.Somerville@windriver.com> +From: Jim Somerville <Jim.Somerville@windriver.com> +Date: Mon, 21 Jan 2013 10:50:18 -0500 +Subject: [PATCH 1/1] cyclictest: finish removal of 1 second first loops + +Observation: +Huge latencies reported close to 1 second when certain options +are used in cyclictest. + +Problem: +[ commit da4956cbcaf7945554f30e4d3a9be09b1431b19a + use interval on first loop instead of 1 second ] +removed the 1 second first timing loop out of the main path +in cyclictest but left it in two other paths, namely the ones +triggered by these two options: +-r --relative use relative timer instead of absolute +-s --system use sys_nanosleep and sys_setitimer +This causes huge latencies of close to 1 second to be reported +by cyclictest with certain uses of those two options. + +Fix: +Extend the original commit to remove the 1 second hardcoded +timer values from the RELTIME and ITIMER options. Use the +the actual interval instead. + +Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com> +--- + src/cyclictest/cyclictest.c | 6 ++---- + 1 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/src/cyclictest/cyclictest.c b/src/cyclictest/cyclictest.c +index 11b6cea..8487409 100644 +--- a/src/cyclictest/cyclictest.c ++++ b/src/cyclictest/cyclictest.c +@@ -741,17 +741,15 @@ void *timerthread(void *param) + if (par->timermode == TIMER_ABSTIME) + tspec.it_value = next; + else { +- tspec.it_value.tv_nsec = 0; +- tspec.it_value.tv_sec = 1; ++ tspec.it_value = interval; + } + timer_settime(timer, par->timermode, &tspec, NULL); + } + + if (par->mode == MODE_SYS_ITIMER) { +- itimer.it_value.tv_sec = 1; +- itimer.it_value.tv_usec = 0; + itimer.it_interval.tv_sec = interval.tv_sec; + itimer.it_interval.tv_usec = interval.tv_nsec / 1000; ++ itimer.it_value = itimer.it_interval; + setitimer (ITIMER_REAL, &itimer, NULL); + } + +-- +1.7.4.1 + diff --git a/meta/recipes-rt/rt-tests/rt-tests.inc b/meta/recipes-rt/rt-tests/rt-tests.inc index 513ddaf068..3ae7602d7b 100644 --- a/meta/recipes-rt/rt-tests/rt-tests.inc +++ b/meta/recipes-rt/rt-tests/rt-tests.inc @@ -7,9 +7,10 @@ SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/clrkwllms/rt-tests.git file://0001-rt-tests-Allow-for-user-specified-PYLIB.patch \ file://0002-rt-tests-Break-out-install_hwlatdetect.patch \ file://added-missing-dependencies.patch \ + file://cyclictest-finish-removal-of-1-second-first-loops.patch \ " -INC_PR = "r1" +INC_PR = "r2" S = "${WORKDIR}/git" |