<feed xmlns='http://www.w3.org/2005/Atom'>
<title>openembedded-core.git/meta/site/mips-common, branch fido</title>
<subtitle>Mirror of openembedded-core</subtitle>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/'/>
<entry>
<title>site: add more alignment values for at-spi2-core</title>
<updated>2013-06-13T16:37:57+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@intel.com</email>
</author>
<published>2013-06-12T12:17:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=a6a12ef5cad0dbb2d773bdccc340f1f767c5a782'/>
<id>a6a12ef5cad0dbb2d773bdccc340f1f767c5a782</id>
<content type='text'>
x86 and x86_64 values were added in 8c46ec. The x86-64 values were missing an
entry, add MIPS and PowerPC values from myself in qemu, and ARM values from
Martin Jansa.

Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
x86 and x86_64 values were added in 8c46ec. The x86-64 values were missing an
entry, add MIPS and PowerPC values from myself in qemu, and ARM values from
Martin Jansa.

Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>site/mips-common: alignment values for guin32, guin64 and unsigned long</title>
<updated>2012-05-06T09:21:17+00:00</updated>
<author>
<name>Saul Wold</name>
<email>sgw@linux.intel.com</email>
</author>
<published>2012-05-05T20:22:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=8fa607c1430674bee1f1f80d33f8939d7f0b1100'/>
<id>8fa607c1430674bee1f1f80d33f8939d7f0b1100</id>
<content type='text'>
    These are required to build recent versions of glib-2.0

Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
    These are required to build recent versions of glib-2.0

Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Various siteinfo files: Consolidate va_copy/__va_copy/va_val_copy</title>
<updated>2011-08-04T14:04:07+00:00</updated>
<author>
<name>Tom Rini</name>
<email>tom_rini@mentor.com</email>
</author>
<published>2011-07-27T18:08:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=a54a803ed89969c2416bfa9d911fe4cf558e2391'/>
<id>a54a803ed89969c2416bfa9d911fe4cf558e2391</id>
<content type='text'>
Providing va_copy / __va_copy come down to the libc.  va_val_copy
comes down to the architecture.  Unfortunately it's assumed true
if not set, so we need to make sure to set this to false for
x86_64 where it is not true.

Signed-off-by: Tom Rini &lt;tom_rini@mentor.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Providing va_copy / __va_copy come down to the libc.  va_val_copy
comes down to the architecture.  Unfortunately it's assumed true
if not set, so we need to make sure to set this to false for
x86_64 where it is not true.

Signed-off-by: Tom Rini &lt;tom_rini@mentor.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>siteinfo: Move general realloc/malloc values to common-$libc</title>
<updated>2011-07-27T10:54:52+00:00</updated>
<author>
<name>Tom Rini</name>
<email>tom_rini@mentor.com</email>
</author>
<published>2011-07-14T19:59:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=cab512d7ee50fb55b9412c0e1a52a589de09e0a7'/>
<id>cab512d7ee50fb55b9412c0e1a52a589de09e0a7</id>
<content type='text'>
These are tests for glibc behavior which we have enabled in uclibc.
Note that if we ever disable MALLOC_GLIBC_COMPAT the uclibc tests
will need to be changed (but I believe this would also entail massive
patching to the rest of userspace so this should be unlikely).

Signed-off-by: Tom Rini &lt;tom_rini@mentor.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These are tests for glibc behavior which we have enabled in uclibc.
Note that if we ever disable MALLOC_GLIBC_COMPAT the uclibc tests
will need to be changed (but I believe this would also entail massive
patching to the rest of userspace so this should be unlikely).

Signed-off-by: Tom Rini &lt;tom_rini@mentor.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[bug 1195] site/mips-common: Cache cvs_cv_func_printf_ptr</title>
<updated>2011-07-08T16:31:07+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2011-07-07T23:17:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=1dd820ed5e426578cac485d63e8c350447332dcb'/>
<id>1dd820ed5e426578cac485d63e8c350447332dcb</id>
<content type='text'>
Signed-off-by: Jessica Zhang &lt;jessica.zhang@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Jessica Zhang &lt;jessica.zhang@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>apr: add configure for NODELAY to mips-common</title>
<updated>2010-12-23T14:28:22+00:00</updated>
<author>
<name>Saul Wold</name>
<email>sgw@linux.intel.com</email>
</author>
<published>2010-12-22T23:50:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=5929ead20b55c7a0ec208c2ffe79840b5e115596'/>
<id>5929ead20b55c7a0ec208c2ffe79840b5e115596</id>
<content type='text'>
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dpkg: fix powerpc and mips build failure</title>
<updated>2010-09-02T08:50:49+00:00</updated>
<author>
<name>Dongxiao Xu</name>
<email>dongxiao.xu@intel.com</email>
</author>
<published>2010-09-01T02:23:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=c56bab6b25350df34b3dd9b191d368c05ac7f96e'/>
<id>c56bab6b25350df34b3dd9b191d368c05ac7f96e</id>
<content type='text'>
set dpkg va_copy value in corresponding site files for powerpc and mips
Fixes [BUGID #219]

Signed-off-by: Dongxiao Xu &lt;dongxiao.xu@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
set dpkg va_copy value in corresponding site files for powerpc and mips
Fixes [BUGID #219]

Signed-off-by: Dongxiao Xu &lt;dongxiao.xu@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>qemumips: Add qemumips machine from OE.dev</title>
<updated>2010-01-06T15:52:16+00:00</updated>
<author>
<name>Joshua Lock</name>
<email>josh@linux.intel.com</email>
</author>
<published>2010-01-06T15:32:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=955c7aaf5163d6c2a712a365bfe94291a1accf8a'/>
<id>955c7aaf5163d6c2a712a365bfe94291a1accf8a</id>
<content type='text'>
Site and machine configuration for Mips architecture and
a qemumips target from Openembedded.

Signed-off-by: Joshua Lock &lt;josh@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Site and machine configuration for Mips architecture and
a qemumips target from Openembedded.

Signed-off-by: Joshua Lock &lt;josh@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
