<feed xmlns='http://www.w3.org/2005/Atom'>
<title>openembedded-core.git/meta/conf/machine/include, branch uninative-1.5</title>
<subtitle>Mirror of openembedded-core</subtitle>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/'/>
<entry>
<title>arch-mips: Fix tune configuration for mipsisa64r6el-n32-nf</title>
<updated>2017-03-04T10:42:33+00:00</updated>
<author>
<name>Zubair Lutfullah Kakakhel</name>
<email>Zubair.Kakakhel@imgtec.com</email>
</author>
<published>2017-03-02T13:36:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=5a7f2f9abb9c471d08497face0954db9749df0ca'/>
<id>5a7f2f9abb9c471d08497face0954db9749df0ca</id>
<content type='text'>
Big endian flag marked in a little endian configuration by mistake.
Remove it.

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Big endian flag marked in a little endian configuration by mistake.
Remove it.

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>recipes: Make use of the new bb.utils.filter() function</title>
<updated>2017-03-01T11:17:22+00:00</updated>
<author>
<name>Peter Kjellerstedt</name>
<email>peter.kjellerstedt@axis.com</email>
</author>
<published>2017-02-27T13:02:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=0a1427bf9aeeda6bee2cc0af8da4ea5fd90aef6f'/>
<id>0a1427bf9aeeda6bee2cc0af8da4ea5fd90aef6f</id>
<content type='text'>
Signed-off-by: Peter Kjellerstedt &lt;peter.kjellerstedt@axis.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Peter Kjellerstedt &lt;peter.kjellerstedt@axis.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-arm*.inc: squash whitespace within TUNE_FEATURES strings</title>
<updated>2017-02-23T20:29:11+00:00</updated>
<author>
<name>Andre McCurdy</name>
<email>armccurdy@gmail.com</email>
</author>
<published>2017-02-17T18:47:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=971e43270173afb08f21ffac16a4157f7e611b81'/>
<id>971e43270173afb08f21ffac16a4157f7e611b81</id>
<content type='text'>
TUNE_FEATURES is include in BUILDCFG_VARS, so any whitespace is
visible to the user during the build process. Remove the extra
whitespace added during the 2.1 development cycle:

  http://git.openembedded.org/openembedded-core/commit/?id=f774b44fa007a2a756ada892ede832b1251d940c

For consistency, squash whitespace within PACKAGE_EXTRA_ARCHS strings
too.

Whitespace within TUNE_FEATURES strings in the tune-cortexa*.inc
files has been fixed in a separate commit:

  http://git.openembedded.org/openembedded-core/commit/?id=5610c6397ee098dd998b7417b343494de77179f9

(From OE-Core rev: 3cd0c5ef748ad072f1bd9a8d42157e9643bf97eb)

Signed-off-by: Andre McCurdy &lt;armccurdy@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
TUNE_FEATURES is include in BUILDCFG_VARS, so any whitespace is
visible to the user during the build process. Remove the extra
whitespace added during the 2.1 development cycle:

  http://git.openembedded.org/openembedded-core/commit/?id=f774b44fa007a2a756ada892ede832b1251d940c

For consistency, squash whitespace within PACKAGE_EXTRA_ARCHS strings
too.

Whitespace within TUNE_FEATURES strings in the tune-cortexa*.inc
files has been fixed in a separate commit:

  http://git.openembedded.org/openembedded-core/commit/?id=5610c6397ee098dd998b7417b343494de77179f9

(From OE-Core rev: 3cd0c5ef748ad072f1bd9a8d42157e9643bf97eb)

Signed-off-by: Andre McCurdy &lt;armccurdy@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>runqemu: fixes for slirp, network device and hostfwd</title>
<updated>2017-01-23T12:04:00+00:00</updated>
<author>
<name>Robert Yang</name>
<email>liezhi.yang@windriver.com</email>
</author>
<published>2016-11-29T06:02:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=7dddd090806914a62d977730440d803e48f44763'/>
<id>7dddd090806914a62d977730440d803e48f44763</id>
<content type='text'>
Fixed:
- Add QB_NETWORK_DEVICE to set network device, it will be used by both
  slirp and tap.
- Set QB_NETWORK_DEVICE to "-device virtio-net-pci" in qemuboot.bbclass
  but runqemu will default to "-device e1000" when QB_NETWORK_DEVICE is
  not set, this is because oe-core's qemu targets support
  virtio-net-pci, but the one outside of oe-core may not,
  "-device e1000" is more common.
- Set hostfwd by default: 2222 -&gt; 22, 2323 -&gt; 23, and it will choose a
  usable port when the one like 222 is being used. This can avoid
  conflicts when multilib slirp qemus are running. We can forward more
  ports by default if needed, and bsp.conf can custom it.
- Use different mac sections for slirp and tap to fix conflicts when
  running both of them on the same host.

[YOCTO #7887]

CC: Nathan Rossi &lt;nathan@nathanrossi.com&gt;
CC: Randy Witt &lt;randy.e.witt@linux.intel.com&gt;
Signed-off-by: Robert Yang &lt;liezhi.yang@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixed:
- Add QB_NETWORK_DEVICE to set network device, it will be used by both
  slirp and tap.
- Set QB_NETWORK_DEVICE to "-device virtio-net-pci" in qemuboot.bbclass
  but runqemu will default to "-device e1000" when QB_NETWORK_DEVICE is
  not set, this is because oe-core's qemu targets support
  virtio-net-pci, but the one outside of oe-core may not,
  "-device e1000" is more common.
- Set hostfwd by default: 2222 -&gt; 22, 2323 -&gt; 23, and it will choose a
  usable port when the one like 222 is being used. This can avoid
  conflicts when multilib slirp qemus are running. We can forward more
  ports by default if needed, and bsp.conf can custom it.
- Use different mac sections for slirp and tap to fix conflicts when
  running both of them on the same host.

[YOCTO #7887]

CC: Nathan Rossi &lt;nathan@nathanrossi.com&gt;
CC: Randy Witt &lt;randy.e.witt@linux.intel.com&gt;
Signed-off-by: Robert Yang &lt;liezhi.yang@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-mips: Add MIPS 64r6 N32 tune</title>
<updated>2016-12-22T08:46:35+00:00</updated>
<author>
<name>Zubair Lutfullah Kakakhel</name>
<email>Zubair.Kakakhel@imgtec.com</email>
</author>
<published>2016-12-16T15:14:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=e723dbb9614f7d7e7e158bc9afd0b2bfac0fbee2'/>
<id>e723dbb9614f7d7e7e158bc9afd0b2bfac0fbee2</id>
<content type='text'>
Add MIPS64R6-n32 tuning options.

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add MIPS64R6-n32 tuning options.

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>meta: remove True option to getVar calls</title>
<updated>2016-12-16T08:30:03+00:00</updated>
<author>
<name>Joshua Lock</name>
<email>joshua.g.lock@intel.com</email>
</author>
<published>2016-12-14T21:13:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=7c552996597faaee2fbee185b250c0ee30ea3b5f'/>
<id>7c552996597faaee2fbee185b250c0ee30ea3b5f</id>
<content type='text'>
getVar() now defaults to expanding by default, thus remove the True
option from getVar() calls with a regex search and replace.

Search made with the following regex: getVar ?\(( ?[^,()]*), True\)

Signed-off-by: Joshua Lock &lt;joshua.g.lock@intel.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
getVar() now defaults to expanding by default, thus remove the True
option from getVar() calls with a regex search and replace.

Search made with the following regex: getVar ?\(( ?[^,()]*), True\)

Signed-off-by: Joshua Lock &lt;joshua.g.lock@intel.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-mips: sort new MACHINEOVERRIDES by priority</title>
<updated>2016-12-07T10:36:12+00:00</updated>
<author>
<name>André Draszik</name>
<email>adraszik@tycoint.com</email>
</author>
<published>2016-12-01T11:23:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=59c724db5628775e77fa090183897c6ae0fdf9a8'/>
<id>59c724db5628775e77fa090183897c6ae0fdf9a8</id>
<content type='text'>
While I couldn't find explicit documentation, it appears
that the list of MACHINEOVERRIDES should be sorted from
less specific to more specific left to right, so that
more specific overrides take precedence.

Signed-off-by: André Draszik &lt;adraszik@tycoint.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While I couldn't find explicit documentation, it appears
that the list of MACHINEOVERRIDES should be sorted from
less specific to more specific left to right, so that
more specific overrides take precedence.

Signed-off-by: André Draszik &lt;adraszik@tycoint.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tune-cortexa*.inc: squash whitespace within TUNE_FEATURES strings</title>
<updated>2016-12-07T10:36:11+00:00</updated>
<author>
<name>Andre McCurdy</name>
<email>armccurdy@gmail.com</email>
</author>
<published>2016-11-29T18:36:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=5610c6397ee098dd998b7417b343494de77179f9'/>
<id>5610c6397ee098dd998b7417b343494de77179f9</id>
<content type='text'>
TUNE_FEATURES is include in BUILDCFG_VARS, so any whitespace is
visible to the user during the build process. Remove the extra
whitespace added during the 2.1 development cycle:

  http://git.openembedded.org/openembedded-core/commit/?id=f774b44fa007a2a756ada892ede832b1251d940c

For consistency, squash whitespace within PACKAGE_EXTRA_ARCHS strings
too.

Signed-off-by: Andre McCurdy &lt;armccurdy@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
TUNE_FEATURES is include in BUILDCFG_VARS, so any whitespace is
visible to the user during the build process. Remove the extra
whitespace added during the 2.1 development cycle:

  http://git.openembedded.org/openembedded-core/commit/?id=f774b44fa007a2a756ada892ede832b1251d940c

For consistency, squash whitespace within PACKAGE_EXTRA_ARCHS strings
too.

Signed-off-by: Andre McCurdy &lt;armccurdy@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-arm64.inc: Include arch-armv7ve.inc</title>
<updated>2016-11-30T15:47:12+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2016-11-23T09:28:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=f896375c60d8ce0f1293f5329163172e946f46df'/>
<id>f896375c60d8ce0f1293f5329163172e946f46df</id>
<content type='text'>
All armv8 implementations from a53 - a73 supports
virtual extentions

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All armv8 implementations from a53 - a73 supports
virtual extentions

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-mips: Add MACHINEOVERRIDES variables to reduce duplication</title>
<updated>2016-11-15T15:11:54+00:00</updated>
<author>
<name>Zubair Lutfullah Kakakhel</name>
<email>Zubair.Kakakhel@imgtec.com</email>
</author>
<published>2016-11-08T17:12:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=0d2205f26e5ece089630f72af2bd5f0931e851c3'/>
<id>0d2205f26e5ece089630f72af2bd5f0931e851c3</id>
<content type='text'>
In some cases, each MIPS variant in a recipe requires a duplicate
line. Even if the passed flag is the same.

Add global MACHINEOVERRIDES variables for the following
 * mipsarch		: All MIPS
 * mipsarch{eb,el}	: All MIPS Big/Little Endian
 * mipsarchr6		: All MIPS R6
 * mipsarcho32		: All MIPS o32 Endian Independent
 * mipsarchn32		: All MIPS n32 Endian Independent
 * mipsarchn64		: All MIPS n64 Endian Independent
 * mipsarcho32{eb,el}	: All MIPS o32 Big/Little Endian
 * mipsarchn32{eb,el}	: All MIPS n32 Big/Little Endian
 * mipsarchn64{eb,el}	: All MIPS n64 Big/Little Endian

This is intended to reduce duplications in recipes

[YOCTO #10404]

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In some cases, each MIPS variant in a recipe requires a duplicate
line. Even if the passed flag is the same.

Add global MACHINEOVERRIDES variables for the following
 * mipsarch		: All MIPS
 * mipsarch{eb,el}	: All MIPS Big/Little Endian
 * mipsarchr6		: All MIPS R6
 * mipsarcho32		: All MIPS o32 Endian Independent
 * mipsarchn32		: All MIPS n32 Endian Independent
 * mipsarchn64		: All MIPS n64 Endian Independent
 * mipsarcho32{eb,el}	: All MIPS o32 Big/Little Endian
 * mipsarchn32{eb,el}	: All MIPS n32 Big/Little Endian
 * mipsarchn64{eb,el}	: All MIPS n64 Big/Little Endian

This is intended to reduce duplications in recipes

[YOCTO #10404]

Signed-off-by: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
