<feed xmlns='http://www.w3.org/2005/Atom'>
<title>openembedded-core.git/meta/conf/machine/include/tune-core2.inc, branch fido</title>
<subtitle>Mirror of openembedded-core</subtitle>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/'/>
<entry>
<title>tune: Make 32b or 64b explicit in tune name for core2</title>
<updated>2014-01-28T00:48:22+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-01-21T17:51:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=69e6395b8d11e2940892a6293ecbbe645c2a478b'/>
<id>69e6395b8d11e2940892a6293ecbbe645c2a478b</id>
<content type='text'>
Core2 has both a 32b and a 64b variant. Currently, core2 implies 32b,
while core2_64 is the 64b version. This implicit 32b mode will become
confusing in later architectures, such as corei7, where it would be
natural for people to assume "corei7" meant 64 bit.

Rather than carrying forward an implicit 32b mode and rather than
changing the naming scheme part way through the architecture hiearchy,
make the 32b and 64b variant explicit in the tune name by changing core2
to core2-32. This patch also standardises on using '-' in the names.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Core2 has both a 32b and a 64b variant. Currently, core2 implies 32b,
while core2_64 is the 64b version. This implicit 32b mode will become
confusing in later architectures, such as corei7, where it would be
natural for people to assume "corei7" meant 64 bit.

Rather than carrying forward an implicit 32b mode and rather than
changing the naming scheme part way through the architecture hiearchy,
make the 32b and 64b variant explicit in the tune name by changing core2
to core2-32. This patch also standardises on using '-' in the names.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tune-core2: Only add the current ARCH to PACKAGE_EXTRA_ARCHS</title>
<updated>2014-01-28T00:48:22+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-01-17T22:26:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=2a10d570560c37eb1d23cf853c0e541bc08a2878'/>
<id>2a10d570560c37eb1d23cf853c0e541bc08a2878</id>
<content type='text'>
Inherit the PACKAGE_EXTRA_ARCHS from i586 and only explicitly add core2
here.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Inherit the PACKAGE_EXTRA_ARCHS from i586 and only explicitly add core2
here.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tune-core2: Replace -mtune=generic with -mtune=core2</title>
<updated>2014-01-28T00:48:22+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-01-17T22:25:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=4cd33193b2db6c281275db2fb5cc169181955217'/>
<id>4cd33193b2db6c281275db2fb5cc169181955217</id>
<content type='text'>
-march specifies which ISA to use. -mtune specifies which cpu-type to
optimize instruction ordering for, but not which ISA to use. There are
times when it may make sense to specify mtune=generic and use a more
specific march, such as core2, but the opposite makes little sense at
all: use cpu-type specific ISA, but order the instructions
generically. While the -mtune is implied by -march, gcc does not verify
it is using -mtune=core2 with:

    gcc -Q -march=core2 --help=target

Explicitly specify -mtune=core2 to be sure.

Add a comment header describing the CPUs targeted by this tune file.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
-march specifies which ISA to use. -mtune specifies which cpu-type to
optimize instruction ordering for, but not which ISA to use. There are
times when it may make sense to specify mtune=generic and use a more
specific march, such as core2, but the opposite makes little sense at
all: use cpu-type specific ISA, but order the instructions
generically. While the -mtune is implied by -march, gcc does not verify
it is using -mtune=core2 with:

    gcc -Q -march=core2 --help=target

Explicitly specify -mtune=core2 to be sure.

Add a comment header describing the CPUs targeted by this tune file.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
Cc: Paul Eggleton &lt;paul.eggleton@intel.com&gt;
Cc: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Cc: Nitin Kamble &lt;nitin.a.kamble@intel.com&gt;
Cc: Mark Hatle &lt;mark.hatle@windriver.com&gt;
Cc: Bruce Ashfield &lt;bruce.ashfield@windriver.com&gt;
Cc: Martin Jansa &lt;martin.jansa@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>conf/machine: use .= instead of += in TUNE_CCARGS</title>
<updated>2013-04-29T13:43:50+00:00</updated>
<author>
<name>Martin Jansa</name>
<email>martin.jansa@gmail.com</email>
</author>
<published>2013-04-24T13:42:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=b7430ff83760ac29079d20dc7c62f498a0a9d55d'/>
<id>b7430ff83760ac29079d20dc7c62f498a0a9d55d</id>
<content type='text'>
* number of TUNE_CCARGS conditionals is important if we add
  extra space with each one in "else" branch

  I'm building for 2 MACHINEs one is cortexa9, second is cortexa8

  few months ago we added TUNE_CCARGS[vardepvalue] in bitbake.conf
  http://git.openembedded.org/openembedded-core/commit/?id=03f1e34ea3ce80931e9c3cd2ab22824f28a7233b

  which fixed some cases (like mentioned tune-xscale and tune-arm926ejs)
  where both had unused TUNE_CCARGS when common DEFAULTTUNE was used.

  with cortexa[89] it's different, because cortexa9 has one extra TUNE_CCARGS
  TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "cortexa9", "-mtune=cortex-a9", "", d)}"
  which adds extra *space* even when not used because of '+=' and as result:

  $ bitbake-diffsigs tmp-eglibc/sstate-diff/1366797730/*/armv7*/adapterbase/*do_configure*
  basehash changed from f986789fb8fb3579ed6a3492cc8a8d10 to c851b5f838d945ee13072e9ad6725dca
  Variable TUNE_CCARGS value changed from
  ' -march=armv7-a     -mthumb-interwork -mfloat-abi=softfp -mfpu=neon '
  to
  ' -march=armv7-a     -mthumb-interwork -mfloat-abi=softfp -mfpu=neon  '
  Hash for dependent task gcc-runtime_4.7.bb.do_populate_sysroot changed from bdeabf7a86958b9110b566344b7916de to 2be5618e6bc8c57ec9db5659bf217915
  Hash for dependent task eglibc_2.17.bb.do_populate_sysroot changed from b4f40fc62dde684acd0a574532a55360 to 97fcb426603d4a1c1099c0504d2ebf7d
  Hash for dependent task glib-2.0_2.34.3.bb.do_populate_sysroot changed from fd2f90b83098c34e88d649d70f6ea4f5 to ebd740bb94ea3eb0a914efda6fc82c4a

Signed-off-by: Martin Jansa &lt;Martin.Jansa@gmail.com&gt;
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* number of TUNE_CCARGS conditionals is important if we add
  extra space with each one in "else" branch

  I'm building for 2 MACHINEs one is cortexa9, second is cortexa8

  few months ago we added TUNE_CCARGS[vardepvalue] in bitbake.conf
  http://git.openembedded.org/openembedded-core/commit/?id=03f1e34ea3ce80931e9c3cd2ab22824f28a7233b

  which fixed some cases (like mentioned tune-xscale and tune-arm926ejs)
  where both had unused TUNE_CCARGS when common DEFAULTTUNE was used.

  with cortexa[89] it's different, because cortexa9 has one extra TUNE_CCARGS
  TUNE_CCARGS += "${@bb.utils.contains("TUNE_FEATURES", "cortexa9", "-mtune=cortex-a9", "", d)}"
  which adds extra *space* even when not used because of '+=' and as result:

  $ bitbake-diffsigs tmp-eglibc/sstate-diff/1366797730/*/armv7*/adapterbase/*do_configure*
  basehash changed from f986789fb8fb3579ed6a3492cc8a8d10 to c851b5f838d945ee13072e9ad6725dca
  Variable TUNE_CCARGS value changed from
  ' -march=armv7-a     -mthumb-interwork -mfloat-abi=softfp -mfpu=neon '
  to
  ' -march=armv7-a     -mthumb-interwork -mfloat-abi=softfp -mfpu=neon  '
  Hash for dependent task gcc-runtime_4.7.bb.do_populate_sysroot changed from bdeabf7a86958b9110b566344b7916de to 2be5618e6bc8c57ec9db5659bf217915
  Hash for dependent task eglibc_2.17.bb.do_populate_sysroot changed from b4f40fc62dde684acd0a574532a55360 to 97fcb426603d4a1c1099c0504d2ebf7d
  Hash for dependent task glib-2.0_2.34.3.bb.do_populate_sysroot changed from fd2f90b83098c34e88d649d70f6ea4f5 to ebd740bb94ea3eb0a914efda6fc82c4a

Signed-off-by: Martin Jansa &lt;Martin.Jansa@gmail.com&gt;
Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>conf/machine/include: Cleanup IA tunings to match README</title>
<updated>2012-04-04T16:01:30+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@windriver.com</email>
</author>
<published>2012-03-30T19:27:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=ab77d3401908964f3249c761969600b5ec1bfbd0'/>
<id>ab77d3401908964f3249c761969600b5ec1bfbd0</id>
<content type='text'>
We perform a basic cleanup of the IA32 architecture and related
tunings in order to match the rules and descriptions within the
new tuning README file.

A number of small issues were corrected in the "c3" tuning to
bring it inline with the README.

Signed-off-by: Mark Hatle &lt;mark.hatle@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We perform a basic cleanup of the IA32 architecture and related
tunings in order to match the rules and descriptions within the
new tuning README file.

A number of small issues were corrected in the "c3" tuning to
bring it inline with the README.

Signed-off-by: Mark Hatle &lt;mark.hatle@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86 tune: fix TUNE_PKGARCH definition for proper PACKAGE_ARCH</title>
<updated>2011-12-12T21:50:09+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2011-12-08T05:28:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=1a599cc822ad517f9ba70ceb0e39c5572d37a5a6'/>
<id>1a599cc822ad517f9ba70ceb0e39c5572d37a5a6</id>
<content type='text'>
rpmbuild can not handle the PACKAGE_ARCH of these kinds:
	x86_64-x32, core2-64, core2-64-x32

With these kinds of PACKAGE_ARCH the --target parameter of rpmbuild
becomes like: core2-64-x32-poky-linux-gnux32 ; And rpmbuild extracts
%_target (arch) wrongly as core2 generating these kinds of rpms with
incorrect filenames: zip-3.0-r0.core2.rpm

So this commit fixes the issue by making PACKAGE_ARCH like this:
	x86_64_x32, core2_64, core2_64_x32
Now --target parameter of rpmbuild becomes like:
core2_64_x32-poky-linux-gnux32 ; And rpmbuild extracts %_target (arch)
correctly as core2_64_x32 generating these kinds of rpms with correct
filenames: zip-3.0-r0.core2_64_x32.rpm

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
rpmbuild can not handle the PACKAGE_ARCH of these kinds:
	x86_64-x32, core2-64, core2-64-x32

With these kinds of PACKAGE_ARCH the --target parameter of rpmbuild
becomes like: core2-64-x32-poky-linux-gnux32 ; And rpmbuild extracts
%_target (arch) wrongly as core2 generating these kinds of rpms with
incorrect filenames: zip-3.0-r0.core2.rpm

So this commit fixes the issue by making PACKAGE_ARCH like this:
	x86_64_x32, core2_64, core2_64_x32
Now --target parameter of rpmbuild becomes like:
core2_64_x32-poky-linux-gnux32 ; And rpmbuild extracts %_target (arch)
correctly as core2_64_x32 generating these kinds of rpms with correct
filenames: zip-3.0-r0.core2_64_x32.rpm

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86 tune files: set baselib for x32 tune as libx32</title>
<updated>2011-10-20T12:06:39+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2011-10-12T18:30:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=7b3cf9556085429faf8155a6eea412a0b8cc2c52'/>
<id>7b3cf9556085429faf8155a6eea412a0b8cc2c52</id>
<content type='text'>
This ensures that on a multilib system the two executable formats
don't conflict.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This ensures that on a multilib system the two executable formats
don't conflict.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86 tune inc files: add x32 abi tune parameters</title>
<updated>2011-08-08T17:05:02+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2011-07-23T00:18:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=19252e0592c59ed0fb06ca510d11e564518f746d'/>
<id>19252e0592c59ed0fb06ca510d11e564518f746d</id>
<content type='text'>
Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tune-core2.inc: Drop X86ARCH32 usage</title>
<updated>2011-07-27T09:34:35+00:00</updated>
<author>
<name>Richard Purdie</name>
<email>richard.purdie@linuxfoundation.org</email>
</author>
<published>2011-07-27T09:34:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=79b7b1aab5d3d002bfa7a49887d5d834c29eae45'/>
<id>79b7b1aab5d3d002bfa7a49887d5d834c29eae45</id>
<content type='text'>
Using i686 doesn't work well with locale generation and doesn't gain anything
so revert to the i586 default.

Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Using i686 doesn't work well with locale generation and doesn't gain anything
so revert to the i586 default.

Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch-ia32.inc: Fix up TUNE_ARCH variable conflicts</title>
<updated>2011-07-26T21:39:49+00:00</updated>
<author>
<name>Richard Purdie</name>
<email>richard.purdie@linuxfoundation.org</email>
</author>
<published>2011-07-26T17:51:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.multitech.net/cgit/openembedded-core.git/commit/?id=02031d766f983cd7e01e468cb2c926604313cd2a'/>
<id>02031d766f983cd7e01e468cb2c926604313cd2a</id>
<content type='text'>
The current approach causes duplicate values to appear in the TUNE_ARCH
field and this patch addresses that.

Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current approach causes duplicate values to appear in the TUNE_ARCH
field and this patch addresses that.

Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
